[git.ipfire.org] IPFire 2.x development tree branch, seventeen, updated. 9156480159cd9661659df683967a964989dc9e70
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- Log ----------------------------------------------------------------- commit 9156480159cd9661659df683967a964989dc9e70 Merge: 01e64ad df24f32 Author: Arne Fitzenreiter arne_f@ipfire.org Date: Thu Nov 27 07:34:41 2014 +0100
Merge branch 'seventeen' of git.ipfire.org:/pub/git/ipfire-2.x into seventeen
commit 01e64ad1310344c78aee3b2634acaed5b8e988cf Author: Arne Fitzenreiter arne_f@ipfire.org Date: Thu Nov 27 07:33:50 2014 +0100
kernel: remove obsolete modules and patches.
-----------------------------------------------------------------------
Summary of changes: lfs/compat-drivers | 138 - lfs/e1000 | 90 - lfs/kvm-kmod | 86 - lfs/linux | 2 - lfs/mISDN | 119 - lfs/r8101 | 90 - lfs/r8168 | 89 - lfs/r8169 | 95 - lfs/v4l-dvb | 103 - make.sh | 23 - ...wl-common-Add-default-power-configuration.patch | 88 - ...1-omap3isp-Use-the-common-clock-framework.patch | 444 -- .../omap/3isp/0002-mt9m032-Fix-PLL-setup.patch | 91 - ...03-mt9m032-Define-MT9M032_READ_MODE1-bits.patch | 55 - .../0004-mt9p031-Use-devm_-managed-helpers.patch | 62 - .../0005-mt9p031-Add-support-for-regulators.patch | 82 - ...06-mt9p031-Use-the-common-clock-framework.patch | 110 - ...b-add-Toshiba-LTA070B220F-800x480-support.patch | 30 - ...ght-Add-TLC59108-backlight-control-driver.patch | 217 - ...003-tlc59108-adjust-for-beagleboard-uLCD7.patch | 124 - .../omap/beagle/0004-zeroMAP-Open-your-eyes.patch | 31 - ...P-Beagle-use-TWL4030-generic-reset-script.patch | 29 - .../0006-DSS2-use-DSI-PLL-for-DPI-with-OMAP3.patch | 28 - ...nsion-add-buddy-param-for-expansionboard-.patch | 63 - .../0002-Beagle-expansion-add-zippy.patch | 242 - .../0003-Beagle-expansion-add-zippy2.patch | 86 - .../0004-Beagle-expansion-add-trainer.patch | 55 - ...agle-expansion-add-CircuitCo-ulcd-Support.patch | 285 - .../expansion/0006-Beagle-expansion-add-wifi.patch | 180 - .../0007-Beagle-expansion-add-beaglefpga.patch | 117 - .../0008-Beagle-expansion-add-spidev.patch | 35 - ...Beagle-expansion-add-Aptina-li5m03-camera.patch | 217 - ...gle-expansion-add-LSR-COM6L-Adapter-Board.patch | 123 - ...nsion-LSR-COM6L-Adapter-Board-also-initia.patch | 73 - ...P-Beagle-expansion-extend-spidev-to-uart2.patch | 43 - .../panda/0001-panda-fix-wl12xx-regulator.patch | 27 - .../0002-ti-st-st-kim-fixing-firmware-path.patch | 36 - .../panda/0003-Panda-expansion-add-spidev.patch | 112 - ...andaES-disable-cpufreq-so-board-will-boot.patch | 38 - ...kpoint-Enable-debug-powerdown-only-if-sys.patch | 122 - ...gulator-twl-Remove-TWL6030_FIXED_RESOURCE.patch | 39 - ...lator-twl-Remove-another-unused-variable-.patch | 34 - ...lator-twl-Remove-references-to-the-twl403.patch | 28 - ...lator-twl-Remove-references-to-32kHz-cloc.patch | 49 - .../panda/0011-panda-spidev-setup-pinmux.patch | 50 - ...MAP-DSS2-add-bootarg-for-selecting-svideo.patch | 78 - .../sakoman/0002-video-add-timings-for-hd720.patch | 28 - ...cache-flush-management-symbols-when-MULTI.patch | 34 - .../dts/0001-imx6qdl-wandboard-dts-backport.patch | 6354 -------------------- ...6qdl-wandboard-add-gpio-lines-to-wandboar.patch | 41 - ...ts-imx6qdl-wandboard-Add-support-for-i2c1.patch | 33 - ...dboard-add-binding-for-wand-rfkill-driver.patch | 52 - ...0005-ARM-dts-imx6qdl-add-pcie-device-node.patch | 38 - .../wandboard/imx/0001-i2c-imx-retry-on-NAK.patch | 38 - ...002-i.MX6-Wandboard-add-CKO1-clock-output.patch | 29 - ...03-thermal-add-imx-thermal-driver-support.patch | 489 -- ...i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch | 341 -- .../imx/0005-Add-IMX6Q-AHCI-support.patch | 85 - .../imx/0006-imx-Add-IMX53-AHCI-support.patch | 25 - ...mx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch | 33 - ...update-the-sata-bits-definitions-of-gpr13.patch | 150 - ...mx-add-ahci-sata-support-on-imx-platforms.patch | 316 - ...0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch | 24 - .../wandboard/imx/0011-add-pcie-designware.patch | 636 -- .../wandboard/imx/0012-pcie-backport-fixes.patch | 17 - ...ide-support-for-parsing-PCI-DT-ranges-pro.patch | 194 - ...6q-Add-PCIe-bits-to-GPR-syscon-definition.patch | 37 - ...mx6-Add-support-for-i.MX6-PCIe-controller.patch | 616 -- .../wandboard/imx/0016-imx6-pci-tweaks.patch | 24 - ...Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch | 70 - ...clock-and-Kconfig-update-for-PCIe-support.patch | 38 - src/patches/linux-2.6-arm-asm-constraint.patch | 347 -- src/patches/linux-2.6-silence-acpi-blacklist.patch | 25 - ...-2.6-vmscan_remove_wait_on_page_writeback.patch | 37 - src/patches/linux-2.6.32-crypto-mv_cesa.patch | 647 -- src/patches/linux-2.6.32-imq-test2.patch | 1462 ----- src/patches/linux-2.6.32.11-netdev-1.patch | 478 -- ...linux-2.6.32.15-option_add_huawei_android.patch | 19 - .../linux-2.6.32.27_ipg-fix-driver-name.patch | 15 - ...6.32.45_align_ssb_modtable_32bit_boundary.patch | 12 - src/patches/linux-2.6.32.8-ipp2p-0.8.2-pomng.patch | 1033 ---- src/patches/linux-2.6.32.8-xen-imq-test2.patch | 1353 ----- .../linux-2.x-smsc95xx-add_mac_addr_param.patch | 149 - src/patches/linux-3.0-ipp2p-0.8.2-ipfire.patch | 1039 ---- src/patches/linux-3.1-imq.patch | 1603 ----- src/patches/linux-3.10-layer7-filter.patch | 2185 ------- .../linux-3.10.10-arm_kirkwood_setups.patch | 704 --- ...omic64-operand-requires-impossible-reload.patch | 11 - src/patches/linux-3.10.30-imq.patch | 3304 ---------- ...3.10.34-iwlwifi-noibss_only_on_radar_chan.patch | 23 - src/patches/linux-3.10.39-pie_packet_sch.patch | 674 --- src/patches/linux-3.10.57-mmc_add_eMMC_5.x.patch | 12 - src/patches/linux-3.10.9-ledtrig-netdev-1.patch | 478 -- ...-3.10.y-usbnet_mcs7830_rework_link_detect.patch | 71 - src/patches/linux-3.2-0001-panda-wlan-fix.patch | 12 - src/patches/linux-3.2-0002-panda-i2c.patch | 51 - src/patches/linux-3.2-imq.patch | 1603 ----- src/patches/linux-3.2-panda-reboot.patch | 29 - src/patches/linux-3.2.25-arm_kirkwood_setups.patch | 692 --- .../linux-3.2.27-rpi_fix_dwc_common_build.patch | 38 - src/patches/linux-3.2.33-ledtrig-netdev-1.patch | 479 -- src/patches/linux-3.9-dvbsky-wot2.patch | 6161 ------------------- 102 files changed, 38846 deletions(-) delete mode 100644 lfs/compat-drivers delete mode 100644 lfs/e1000 delete mode 100644 lfs/kvm-kmod delete mode 100644 lfs/mISDN delete mode 100644 lfs/r8101 delete mode 100644 lfs/r8168 delete mode 100644 lfs/r8169 delete mode 100644 lfs/v4l-dvb delete mode 100644 src/patches/kernel/omap/0002-omap2-twl-common-Add-default-power-configuration.patch delete mode 100644 src/patches/kernel/omap/3isp/0001-omap3isp-Use-the-common-clock-framework.patch delete mode 100644 src/patches/kernel/omap/3isp/0002-mt9m032-Fix-PLL-setup.patch delete mode 100644 src/patches/kernel/omap/3isp/0003-mt9m032-Define-MT9M032_READ_MODE1-bits.patch delete mode 100644 src/patches/kernel/omap/3isp/0004-mt9p031-Use-devm_-managed-helpers.patch delete mode 100644 src/patches/kernel/omap/3isp/0005-mt9p031-Add-support-for-regulators.patch delete mode 100644 src/patches/kernel/omap/3isp/0006-mt9p031-Use-the-common-clock-framework.patch delete mode 100644 src/patches/kernel/omap/beagle/0001-meego-modedb-add-Toshiba-LTA070B220F-800x480-support.patch delete mode 100644 src/patches/kernel/omap/beagle/0002-backlight-Add-TLC59108-backlight-control-driver.patch delete mode 100644 src/patches/kernel/omap/beagle/0003-tlc59108-adjust-for-beagleboard-uLCD7.patch delete mode 100644 src/patches/kernel/omap/beagle/0004-zeroMAP-Open-your-eyes.patch delete mode 100644 src/patches/kernel/omap/beagle/0005-ARM-OMAP-Beagle-use-TWL4030-generic-reset-script.patch delete mode 100644 src/patches/kernel/omap/beagle/0006-DSS2-use-DSI-PLL-for-DPI-with-OMAP3.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0001-Beagle-expansion-add-buddy-param-for-expansionboard-.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0002-Beagle-expansion-add-zippy.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0003-Beagle-expansion-add-zippy2.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0004-Beagle-expansion-add-trainer.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0005-Beagle-expansion-add-CircuitCo-ulcd-Support.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0006-Beagle-expansion-add-wifi.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0007-Beagle-expansion-add-beaglefpga.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0008-Beagle-expansion-add-spidev.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0009-Beagle-expansion-add-Aptina-li5m03-camera.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0010-Beagle-expansion-add-LSR-COM6L-Adapter-Board.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0011-Beagle-expansion-LSR-COM6L-Adapter-Board-also-initia.patch delete mode 100644 src/patches/kernel/omap/beagle/expansion/0011-WIP-Beagle-expansion-extend-spidev-to-uart2.patch delete mode 100644 src/patches/kernel/omap/panda/0001-panda-fix-wl12xx-regulator.patch delete mode 100644 src/patches/kernel/omap/panda/0002-ti-st-st-kim-fixing-firmware-path.patch delete mode 100644 src/patches/kernel/omap/panda/0003-Panda-expansion-add-spidev.patch delete mode 100644 src/patches/kernel/omap/panda/0004-HACK-PandaES-disable-cpufreq-so-board-will-boot.patch delete mode 100644 src/patches/kernel/omap/panda/0006-ARM-hw_breakpoint-Enable-debug-powerdown-only-if-sys.patch delete mode 100644 src/patches/kernel/omap/panda/0007-Revert-regulator-twl-Remove-TWL6030_FIXED_RESOURCE.patch delete mode 100644 src/patches/kernel/omap/panda/0008-Revert-regulator-twl-Remove-another-unused-variable-.patch delete mode 100644 src/patches/kernel/omap/panda/0009-Revert-regulator-twl-Remove-references-to-the-twl403.patch delete mode 100644 src/patches/kernel/omap/panda/0010-Revert-regulator-twl-Remove-references-to-32kHz-cloc.patch delete mode 100644 src/patches/kernel/omap/panda/0011-panda-spidev-setup-pinmux.patch delete mode 100644 src/patches/kernel/omap/sakoman/0001-OMAP-DSS2-add-bootarg-for-selecting-svideo.patch delete mode 100644 src/patches/kernel/omap/sakoman/0002-video-add-timings-for-hd720.patch delete mode 100644 src/patches/kernel/omap/sgx/0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch delete mode 100644 src/patches/kernel/wandboard/dts/0001-imx6qdl-wandboard-dts-backport.patch delete mode 100644 src/patches/kernel/wandboard/dts/0002-ARM-dts-imx6qdl-wandboard-add-gpio-lines-to-wandboar.patch delete mode 100644 src/patches/kernel/wandboard/dts/0003-ARM-dts-imx6qdl-wandboard-Add-support-for-i2c1.patch delete mode 100644 src/patches/kernel/wandboard/dts/0004-ARM-dts-wandboard-add-binding-for-wand-rfkill-driver.patch delete mode 100644 src/patches/kernel/wandboard/dts/0005-ARM-dts-imx6qdl-add-pcie-device-node.patch delete mode 100644 src/patches/kernel/wandboard/imx/0001-i2c-imx-retry-on-NAK.patch delete mode 100644 src/patches/kernel/wandboard/imx/0002-i.MX6-Wandboard-add-CKO1-clock-output.patch delete mode 100644 src/patches/kernel/wandboard/imx/0003-thermal-add-imx-thermal-driver-support.patch delete mode 100644 src/patches/kernel/wandboard/imx/0004-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch delete mode 100644 src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch delete mode 100644 src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch delete mode 100644 src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch delete mode 100644 src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch delete mode 100644 src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch delete mode 100644 src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch delete mode 100644 src/patches/kernel/wandboard/imx/0011-add-pcie-designware.patch delete mode 100644 src/patches/kernel/wandboard/imx/0012-pcie-backport-fixes.patch delete mode 100644 src/patches/kernel/wandboard/imx/0013-of-pci-Provide-support-for-parsing-PCI-DT-ranges-pro.patch delete mode 100644 src/patches/kernel/wandboard/imx/0014-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch delete mode 100644 src/patches/kernel/wandboard/imx/0015-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch delete mode 100644 src/patches/kernel/wandboard/imx/0016-imx6-pci-tweaks.patch delete mode 100644 src/patches/kernel/wandboard/imx/0017-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch delete mode 100644 src/patches/kernel/wandboard/imx/0018-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch delete mode 100644 src/patches/linux-2.6-arm-asm-constraint.patch delete mode 100644 src/patches/linux-2.6-silence-acpi-blacklist.patch delete mode 100644 src/patches/linux-2.6-vmscan_remove_wait_on_page_writeback.patch delete mode 100644 src/patches/linux-2.6.32-crypto-mv_cesa.patch delete mode 100644 src/patches/linux-2.6.32-imq-test2.patch delete mode 100644 src/patches/linux-2.6.32.11-netdev-1.patch delete mode 100644 src/patches/linux-2.6.32.15-option_add_huawei_android.patch delete mode 100644 src/patches/linux-2.6.32.27_ipg-fix-driver-name.patch delete mode 100644 src/patches/linux-2.6.32.45_align_ssb_modtable_32bit_boundary.patch delete mode 100644 src/patches/linux-2.6.32.8-ipp2p-0.8.2-pomng.patch delete mode 100644 src/patches/linux-2.6.32.8-xen-imq-test2.patch delete mode 100644 src/patches/linux-2.x-smsc95xx-add_mac_addr_param.patch delete mode 100644 src/patches/linux-3.0-ipp2p-0.8.2-ipfire.patch delete mode 100644 src/patches/linux-3.1-imq.patch delete mode 100644 src/patches/linux-3.10-layer7-filter.patch delete mode 100644 src/patches/linux-3.10.10-arm_kirkwood_setups.patch delete mode 100644 src/patches/linux-3.10.27-fs-exec-atomic64-operand-requires-impossible-reload.patch delete mode 100644 src/patches/linux-3.10.30-imq.patch delete mode 100644 src/patches/linux-3.10.34-iwlwifi-noibss_only_on_radar_chan.patch delete mode 100644 src/patches/linux-3.10.39-pie_packet_sch.patch delete mode 100644 src/patches/linux-3.10.57-mmc_add_eMMC_5.x.patch delete mode 100644 src/patches/linux-3.10.9-ledtrig-netdev-1.patch delete mode 100644 src/patches/linux-3.10.y-usbnet_mcs7830_rework_link_detect.patch delete mode 100644 src/patches/linux-3.2-0001-panda-wlan-fix.patch delete mode 100644 src/patches/linux-3.2-0002-panda-i2c.patch delete mode 100644 src/patches/linux-3.2-imq.patch delete mode 100644 src/patches/linux-3.2-panda-reboot.patch delete mode 100644 src/patches/linux-3.2.25-arm_kirkwood_setups.patch delete mode 100644 src/patches/linux-3.2.27-rpi_fix_dwc_common_build.patch delete mode 100644 src/patches/linux-3.2.33-ledtrig-netdev-1.patch delete mode 100644 src/patches/linux-3.9-dvbsky-wot2.patch
Difference in files: diff --git a/lfs/compat-drivers b/lfs/compat-drivers deleted file mode 100644 index 57a9b16..0000000 --- a/lfs/compat-drivers +++ /dev/null @@ -1,138 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2013 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX=ipfire$(KCFG) - -VER = 3.8.3-2-snpu - -ifeq "$(KCFG)" "-xen" - KVER = 2.6.32.61 -endif - -THISAPP = compat-drivers-$(VER) -DL_FILE = compat-drivers-$(VER).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) asix-4.7.0a.tar.xz asix_gb-1.4.0a.tar.xz - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) -asix-4.7.0a.tar.xz = $(DL_FROM)/asix-4.7.0a.tar.xz -asix_gb-1.4.0a.tar.xz = $(DL_FROM)/asix_gb-1.4.0a.tar.xz - -$(DL_FILE)_MD5 = 5a1e27e5b694aa5022116a5a3220bfdc -asix-4.7.0a.tar.xz_MD5=491f7e8c3ee74433975812d86a0fa98b -asix_gb-1.4.0a.tar.xz_MD5=9c9db731631abf00da2069d03253f9a7 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar xaf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-drivers-3.8-1-u-kref_get_unless_zero.patch - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-drivers-3.8.3-ath_ignore_eeprom_regdomain.patch - - # kfifo has no license info and taints kernel - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-wireless-2.6.39_kfifo_module_info.patch - - # Codel patches - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-wireless_codel-avoid-a-nul-rec_inv_sqrt.patch - - # Build ath5k only if target has pci - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-wireless-3.5-build_ath5k_only_with_pci.patch - - # Copy USB-Net drivers from Kernel... - mkdir $(DIR_APP)/drivers/net/usb/new - cp $(DIR_APP)/drivers/net/usb/*.c $(DIR_APP)/drivers/net/usb/new - cp /usr/src/linux/drivers/net/usb/{*.c,*.h,Makefile} $(DIR_APP)/drivers/net/usb - cp $(DIR_APP)/drivers/net/usb/new/*.c $(DIR_APP)/drivers/net/usb - - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-wireless-2.6.34-usbnet_compile.patch - - # Build Updated asix usb lan driver - cd $(DIR_APP)/drivers/net/usb && tar xvJf $(DIR_DL)/asix-4.7.0a.tar.xz - - # Build Updated asix usb gigabit lan driver - cd $(DIR_APP)/drivers/net/usb && tar xvJf $(DIR_DL)/asix_gb-1.4.0a.tar.xz - echo 'obj-$$(CONFIG_USB_ASIX_GB) += asix_gb.o' >> $(DIR_APP)/drivers/net/usb/Makefile - cd $(DIR_APP) && echo export CONFIG_USB_ASIX_GB=m >> config.mk - - # Add libartas uAP driver - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/compat-wireless-3.5-libertas_uap.patch - - # uAP will not build with xen-kernel (2.6) -ifneq "$(KCFG)" "-xen" - cd $(DIR_APP) && echo export CONFIG_LIBERTAS_UAP=m >> config.mk -endif - -ifeq "$(MACHINE_TYPE)" "arm" - # disable video because it not build on Arm - cd $(DIR_APP) && sed -i -e \ - "s/export CONFIG_COMPAT_VIDEO_MODULES=y//g" config.mk -endif - - # Erase some modules that are obsolete or moved to other path - rm -rf /lib/modules/$(KVER)-$(VERSUFIX)/kernel/net/bluetooth - rm -rf /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/wireless/wl12* - - cd $(DIR_APP) && make KLIB=/lib/modules/$(KVER)-$(VERSUFIX) \ - KLIB_BUILD=/lib/modules/$(KVER)-$(VERSUFIX)/build \ - KMODPATH_ARG='INSTALL_MOD_PATH=' KMODDIR=kernel install-modules - - # Install firmware udev files... - cd $(DIR_APP)/udev && install -m 644 50-compat_firmware.rules /lib/udev/rules.d/ - cd $(DIR_APP)/udev && install -m 755 compat_firmware.sh /lib/udev/ - - -rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/e1000 b/lfs/e1000 deleted file mode 100644 index d9ae7c6..0000000 --- a/lfs/e1000 +++ /dev/null @@ -1,90 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2012 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX = ipfire$(KCFG) - -# e1000 vendor modul is only for legacy xen kernel -# The 3.2.x kernel has newer module. - -KVER = 2.6.32.61 -MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/e1000/ - -VER = 8.0.35 - -THISAPP = e1000-$(VER) -DL_FILE = $(THISAPP).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 0f452b979f7a7b9ea0b5a87a117f7408 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - #Save original e1000 module - -mv $(MODPATH)/e1000.ko \ - $(MODPATH)/e1000.ko.org - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP)/src && make BUILD_KERNEL=$(KVER)-$(VERSUFIX) - cd $(DIR_APP)/src && install -m 644 e1000.ko $(MODPATH) - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/kvm-kmod b/lfs/kvm-kmod deleted file mode 100644 index 90bd790..0000000 --- a/lfs/kvm-kmod +++ /dev/null @@ -1,86 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2011 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX=ipfire$(KCFG) - -VER = 3.6 - -THISAPP = kvm-kmod-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) -SUP_ARCH = i586 - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 3e51d395d6a0ecac6ae600a0515880c2 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && ./configure --kerneldir=/usr/src/linux - cd $(DIR_APP) && make $(MAKETUNING) - cd $(DIR_APP) && install -m 644 x86/*.ko \ - /lib/modules/$(KVER)-$(VERSUFIX)/kernel/arch/x86/kvm/ - cd $(DIR_APP) && cp -f include/asm/* /usr/include/asm - cd $(DIR_APP) && cp -f include/linux/* /usr/include/linux - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/linux b/lfs/linux index 1e6298c..383dac0 100644 --- a/lfs/linux +++ b/lfs/linux @@ -125,11 +125,9 @@ $(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/linux-3.14-layer7-filter.patch
# Grsecurity-patches -ifneq "$(KCFG)" "-headers" cd $(DIR_APP) && xz -c -d $(DIR_DL)/$(GRS_PATCHES) | patch -Np1 cd $(DIR_APP) && rm localversion-grsec cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/linux-3.7-disable-compat_vdso.patch -endif
# DVB Patches cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/linux-3.14.22-dvbsky.patch diff --git a/lfs/mISDN b/lfs/mISDN deleted file mode 100644 index 5cd4972..0000000 --- a/lfs/mISDN +++ /dev/null @@ -1,119 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2012 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX=ipfire$(KCFG) - -ifeq "$(KCFG)" "-xen" - KVER = "2.6.32.61" -endif - -VER = 20121008 - -THISAPP = mISDN-$(VER) -DL_FILE = $(THISAPP).tar.xz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 7fee0514fd523176b36fca53b02b45cc - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_SRC)/mISDN* && cd $(DIR_SRC) && tar Jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_SRC)/mISDN && patch -Np1 < $(DIR_SRC)/src/patches/mISDN-hfcusb-reportl1down.patch - cd $(DIR_SRC)/mISDN && patch -Np1 < $(DIR_SRC)/src/patches/mISDN_hfc-s_add_id.patch -ifeq "$(MACHINE_TYPE)" "arm" - # Remove unsupported timestampcounter on arm. the result seems to be unused - cd $(DIR_SRC)/mISDN && sed -i -e "s|rdtscl(pChan->ulTimestampIn);||g" drivers/isdn/mISDN/octvqe/octvqe_linux.c -endif -ifeq "$(NOPCI)" "1" - # Disable PCI drivers if kernel has no PCI - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_HFCPCI|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_HFCMULTI|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_XHFC|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_AVMFRITZ|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_SPEEDFAX|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_INFINEON|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_W6692|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_NETJET|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_IPAC|#&|g" mISDN.cfg.default - cd $(DIR_SRC)/mISDN && sed -i -e "s|^CONFIG_MISDN_ISAR|#&|g" mISDN.cfg.default -endif - cd $(DIR_SRC)/mISDN && ./configure --with-kerneldir=/usr/src/linux - cd $(DIR_SRC)/mISDN && make KVERS=$(KVER)-$(VERSUFIX) modules - cd $(DIR_SRC)/mISDN && make KVERS=$(KVER)-$(VERSUFIX) \ - INSTALL_PREFIX=$(DIR_SRC)/mISDN/dest/ \ - modules_install - mv $(DIR_SRC)/mISDN/dest/lib/modules/*/extra \ - /lib/modules/$(KVER)-$(VERSUFIX)/mISDN - -ifneq "$(XEN)" "1" - # Blacklist misdn modules - for f in $$(find /lib/modules/$(KVER)-$(VERSUFIX)/mISDN -name *.ko); do \ - echo "blacklist $$(basename $$f)" >> /etc/modprobe.d/mISDN.conf ; \ - done - sed -i -e "s|.ko||g" /etc/modprobe.d/mISDN.conf -endif - - # Remove mISDN modules that was shipped with the kernel - rm -rf /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/isdn/mISDN - rm -rf /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/isdn/hardware/mISDN - - @rm -rf $(DIR_SRC)/mISDN* - @$(POSTBUILD) diff --git a/lfs/r8101 b/lfs/r8101 deleted file mode 100644 index fb03e56..0000000 --- a/lfs/r8101 +++ /dev/null @@ -1,90 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2013 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX = ipfire$(KCFG) -ifeq "$(KCFG)" "-xen" - KVER = 2.6.32.61 - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - MODNAME = r8101.ko -else - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/ethernet/realtek - MODNAME = r8101.ko.vendor -endif - -VER = 1.023.00 - -THISAPP = r8101-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 03cfc34e41522cd34ac6f4b1b6508896 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/r8101_add_missing_pciids.patch - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 r8101.ko $(MODPATH)/$(MODNAME) - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/r8168 b/lfs/r8168 deleted file mode 100644 index 9826737..0000000 --- a/lfs/r8168 +++ /dev/null @@ -1,89 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2013 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX = ipfire$(KCFG) -ifeq "$(KCFG)" "-xen" - KVER = 2.6.32.61 - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - MODNAME = r8168.ko -else - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/ethernet/realtek - MODNAME = r8168.ko.vendor -endif - -VER = 8.035.00 - -THISAPP = r8168-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 80b8d23e463e5408dced1b1377579dae - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 r8168.ko $(MODPATH)/$(MODNAME) - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/r8169 b/lfs/r8169 deleted file mode 100644 index 5a8be3c..0000000 --- a/lfs/r8169 +++ /dev/null @@ -1,95 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2013 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX = ipfire$(KCFG) -ifeq "$(KCFG)" "-xen" - KVER = 2.6.32.61 - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - MODNAME = r8169.ko -else - MODPATH = /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/ethernet/realtek - MODNAME = r8169.ko.vendor -endif - -VER = 6.017.00 - -THISAPP = r8169-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 396d7e28d573bde416fbdfdef723f4bd - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - #Save original r8169 module -ifeq "$(KCFG)" "-xen" - -mv $(MODPATH)/r8169.ko \ - $(MODPATH)/r8169.ko.org -endif - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/r8169_add_missing_pciids.patch - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 r8169.ko $(MODPATH)/$(MODNAME) - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/v4l-dvb b/lfs/v4l-dvb deleted file mode 100644 index 9cf277c..0000000 --- a/lfs/v4l-dvb +++ /dev/null @@ -1,103 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007-2012 IPFire Team info@ipfire.org # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VERSUFIX=ipfire$(KCFG) - -VER = 20120916 -THISAPP = v4l-dvb-$(VER) -DL_FILE = $(THISAPP).tar.xz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -ifeq "$(KCFG)" "-xen" - XVER = 2.6.32 - KVER = 2.6.32.61 -else - XVER = 3.2.0 -endif -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 7824fdd540605c54584df0d16f0e923b - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar Jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/v4l-dvb_rtl28xx_add_usb_ids.patch - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/v4l-dvb_rtl28xx_commented_usb_clear_halt.patch - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/v4l-dvb_usbv2_dont_report_pidfilter_fail.patch - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/v4l-dvb_fix_tua6034_pll.patch - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/v4l-dvb_bestunar_us638x.patch - - cd $(DIR_APP) && make allyesconfig KERNELRELEASE=$(KVER)-$(VERSUFIX) VER=$(XVER) -ifeq "$(KCFG)" "-omap" - # Disable failing OMAP2 Video Out and IR RX51 driver - cd $(DIR_APP) && sed -i -e \ - "s|^CONFIG_VIDEO_OMAP2_VOUT=m|# CONFIG_VIDEO_OMAP2_VOUT is not set|g" \ - v4l/.config - cd $(DIR_APP) && sed -i -e \ - "s|^CONFIG_IR_RX51=m|# CONFIG_IR_RX51 is not set|g" \ - v4l/.config -endif - # Disable Radio Shark (missing tuner module) - cd $(DIR_APP) && sed -i -e \ - "s|^CONFIG_RADIO_SHARK=m|# CONFIG_RADIO_SHARK is not set|g" \ - v4l/.config - cd $(DIR_APP) && make all KERNELRELEASE=$(KVER)-$(VERSUFIX) VER=$(XVER) - cd $(DIR_APP) && make install KERNELRELEASE=$(KVER)-$(VERSUFIX) VER=$(XVER) - ln -sf $(DIR_APP)/ /usr/src/v4l-dvb - @$(POSTBUILD) diff --git a/make.sh b/make.sh index 3121fdd..4007591 100755 --- a/make.sh +++ b/make.sh @@ -408,14 +408,7 @@ buildipfire() { i586) # x86-pae (Native and new XEN) kernel build ipfiremake linux KCFG="-pae" -# ipfiremake kvm-kmod KCFG="-pae" -# ipfiremake v4l-dvb KCFG="-pae" -# ipfiremake mISDN KCFG="-pae" ipfiremake cryptodev KCFG="-pae" -# ipfiremake compat-drivers KCFG="-pae" -# ipfiremake r8169 KCFG="-pae" -# ipfiremake r8168 KCFG="-pae" -# ipfiremake r8101 KCFG="-pae" ipfiremake e1000e KCFG="-pae" ipfiremake igb KCFG="-pae" ipfiremake ixgbe KCFG="-pae" @@ -423,14 +416,7 @@ buildipfire() {
# x86 kernel build ipfiremake linux KCFG="" -# ipfiremake kvm-kmod KCFG="" -# ipfiremake v4l-dvb KCFG="" -# ipfiremake mISDN KCFG="" ipfiremake cryptodev KCFG="" -# ipfiremake compat-drivers KCFG="" -# ipfiremake r8169 KCFG="" -# ipfiremake r8168 KCFG="" -# ipfiremake r8101 KCFG="" ipfiremake e1000e KCFG="" ipfiremake igb KCFG="" ipfiremake ixgbe KCFG="" @@ -440,10 +426,7 @@ buildipfire() { armv5tel) # arm-rpi (Raspberry Pi) kernel build ipfiremake linux KCFG="-rpi" -# ipfiremake v4l-dvb KCFG="-rpi" -# ipfiremake mISDN KCFG="-rpi" NOPCI=1 ipfiremake cryptodev KCFG="-rpi" -# ipfiremake compat-drivers KCFG="-rpi" ipfiremake linux-initrd KCFG="-rpi"
# arm multi platform (Panda, Wandboard ...) kernel build @@ -456,13 +439,7 @@ buildipfire() {
# arm-kirkwood (Dreamplug, ICY-Box ...) kernel build ipfiremake linux KCFG="-kirkwood" -# ipfiremake v4l-dvb KCFG="-kirkwood" -# ipfiremake mISDN KCFG="-kirkwood" ipfiremake cryptodev KCFG="-kirkwood" -# ipfiremake compat-drivers KCFG="-kirkwood" -# ipfiremake r8169 KCFG="-kirkwood" -# ipfiremake r8168 KCFG="-kirkwood" -# ipfiremake r8101 KCFG="-kirkwood" ipfiremake e1000e KCFG="-kirkwood" ipfiremake igb KCFG="-kirkwood" ipfiremake ixgbe KCFG="-kirkwood" diff --git a/src/patches/kernel/omap/0002-omap2-twl-common-Add-default-power-configuration.patch b/src/patches/kernel/omap/0002-omap2-twl-common-Add-default-power-configuration.patch deleted file mode 100644 index d27ad54..0000000 --- a/src/patches/kernel/omap/0002-omap2-twl-common-Add-default-power-configuration.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 2e908aeebd6804296e7d14a96de6be1e2de38e93 Mon Sep 17 00:00:00 2001 -From: Matthias Brugger matthias.bgg@gmail.com -Date: Wed, 23 Jan 2013 19:50:38 +0100 -Subject: [PATCH 2/2] omap2: twl-common: Add default power configuration - -This patch adds a generic power script configuration. -When rebooting an OMAP3530 at 125 MHz, the reboot hangs. -With the generic power script, TWL4030 will be reset -when a warm reset occures. This way the OMAP3530 does not -hang on reboot. - -Signed-off-by: Matthias Brugger matthias.bgg@gmail.com ---- - arch/arm/mach-omap2/twl-common.c | 38 ++++++++++++++++++++++++++++++++++++++ - arch/arm/mach-omap2/twl-common.h | 1 + - 2 files changed, 39 insertions(+) - -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index e49b40b..f096beb 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -120,6 +120,41 @@ static struct twl4030_audio_data omap3_audio_pdata = { - .codec = &omap3_codec, - }; - -+static struct twl4030_ins wrst_seq[] __initdata = { -+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2}, -+ {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15}, -+ {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15}, -+ {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60}, -+ {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2}, -+ {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2}, -+}; -+ -+static struct twl4030_script wrst_script __initdata = { -+ .script = wrst_seq, -+ .size = ARRAY_SIZE(wrst_seq), -+ .flags = TWL4030_WRST_SCRIPT, -+}; -+ -+static struct twl4030_script *omap3_power_scripts[] __initdata = { -+ &wrst_script, -+}; -+ -+static struct twl4030_resconfig omap3_rconfig[] = { -+ { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, .type = -1, -+ .type2 = -1 }, -+ { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, .type = -1, -+ .type2 = -1 }, -+ { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, .type = -1, -+ .type2 = -1 }, -+ { 0, 0}, -+}; -+ -+static struct twl4030_power_data omap3_power_pdata = { -+ .scripts = omap3_power_scripts, -+ .num = ARRAY_SIZE(omap3_power_scripts), -+ .resource_config = omap3_rconfig, -+}; -+ - static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), - }; -@@ -224,6 +259,9 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, - if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio) - pmic_data->audio = &omap3_audio_pdata; - -+ if (pdata_flags & TWL_COMMON_PDATA_POWER && !pmic_data->power) -+ pmic_data->power = &omap3_power_pdata; -+ - /* Common regulator configurations */ - if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) - pmic_data->vdac = &omap3_vdac_idata; -diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h -index dcfbad5..dbeb905 100644 ---- a/arch/arm/mach-omap2/twl-common.h -+++ b/arch/arm/mach-omap2/twl-common.h -@@ -7,6 +7,7 @@ - #define TWL_COMMON_PDATA_BCI (1 << 1) - #define TWL_COMMON_PDATA_MADC (1 << 2) - #define TWL_COMMON_PDATA_AUDIO (1 << 3) -+#define TWL_COMMON_PDATA_POWER (1 << 4) - - /* Common LDO regulators for TWL4030/TWL6030 */ - #define TWL_COMMON_REGULATOR_VDAC (1 << 0) --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0001-omap3isp-Use-the-common-clock-framework.patch b/src/patches/kernel/omap/3isp/0001-omap3isp-Use-the-common-clock-framework.patch deleted file mode 100644 index a61d5b8..0000000 --- a/src/patches/kernel/omap/3isp/0001-omap3isp-Use-the-common-clock-framework.patch +++ /dev/null @@ -1,444 +0,0 @@ -From 369b60c157f67a71a6f302ab9843ae2de1805a2a Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Mon, 22 Oct 2012 15:43:00 +0200 -Subject: [PATCH 1/6] omap3isp: Use the common clock framework - -Expose the two ISP external clocks XCLKA and XCLKB as common clocks for -subdev drivers. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com -Acked-by: Mike Turquette mturquette@linaro.org ---- - drivers/media/platform/omap3isp/isp.c | 277 ++++++++++++++++++++++++--------- - drivers/media/platform/omap3isp/isp.h | 22 ++- - include/media/omap3isp.h | 10 +- - 3 files changed, 225 insertions(+), 84 deletions(-) - -diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c -index 6e5ad8e..1d7dbd5 100644 ---- a/drivers/media/platform/omap3isp/isp.c -+++ b/drivers/media/platform/omap3isp/isp.c -@@ -55,6 +55,7 @@ - #include <asm/cacheflush.h> - - #include <linux/clk.h> -+#include <linux/clkdev.h> - #include <linux/delay.h> - #include <linux/device.h> - #include <linux/dma-mapping.h> -@@ -148,6 +149,201 @@ void omap3isp_flush(struct isp_device *isp) - isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); - } - -+/* ----------------------------------------------------------------------------- -+ * XCLK -+ */ -+ -+#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw) -+ -+static void isp_xclk_update(struct isp_xclk *xclk, u32 divider) -+{ -+ switch (xclk->id) { -+ case ISP_XCLK_A: -+ isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, -+ ISPTCTRL_CTRL_DIVA_MASK, -+ divider << ISPTCTRL_CTRL_DIVA_SHIFT); -+ break; -+ case ISP_XCLK_B: -+ isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, -+ ISPTCTRL_CTRL_DIVB_MASK, -+ divider << ISPTCTRL_CTRL_DIVB_SHIFT); -+ break; -+ } -+} -+ -+static int isp_xclk_prepare(struct clk_hw *hw) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ -+ omap3isp_get(xclk->isp); -+ -+ return 0; -+} -+ -+static void isp_xclk_unprepare(struct clk_hw *hw) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ -+ omap3isp_put(xclk->isp); -+} -+ -+static int isp_xclk_enable(struct clk_hw *hw) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&xclk->lock, flags); -+ isp_xclk_update(xclk, xclk->divider); -+ xclk->enabled = true; -+ spin_unlock_irqrestore(&xclk->lock, flags); -+ -+ return 0; -+} -+ -+static void isp_xclk_disable(struct clk_hw *hw) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&xclk->lock, flags); -+ isp_xclk_update(xclk, 0); -+ xclk->enabled = false; -+ spin_unlock_irqrestore(&xclk->lock, flags); -+} -+ -+static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ -+ return parent_rate / xclk->divider; -+} -+ -+static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate) -+{ -+ u32 divider; -+ -+ if (*rate >= parent_rate) { -+ *rate = parent_rate; -+ return ISPTCTRL_CTRL_DIV_BYPASS; -+ } -+ -+ divider = DIV_ROUND_CLOSEST(parent_rate, *rate); -+ if (divider >= ISPTCTRL_CTRL_DIV_BYPASS) -+ divider = ISPTCTRL_CTRL_DIV_BYPASS - 1; -+ -+ *rate = parent_rate / divider; -+ return divider; -+} -+ -+static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long *parent_rate) -+{ -+ isp_xclk_calc_divider(&rate, *parent_rate); -+ return rate; -+} -+ -+static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct isp_xclk *xclk = to_isp_xclk(hw); -+ unsigned long flags; -+ u32 divider; -+ -+ divider = isp_xclk_calc_divider(&rate, parent_rate); -+ -+ spin_lock_irqsave(&xclk->lock, flags); -+ -+ xclk->divider = divider; -+ if (xclk->enabled) -+ isp_xclk_update(xclk, divider); -+ -+ spin_unlock_irqrestore(&xclk->lock, flags); -+ -+ dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n", -+ __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider); -+ return 0; -+} -+ -+static const struct clk_ops isp_xclk_ops = { -+ .prepare = isp_xclk_prepare, -+ .unprepare = isp_xclk_unprepare, -+ .enable = isp_xclk_enable, -+ .disable = isp_xclk_disable, -+ .recalc_rate = isp_xclk_recalc_rate, -+ .round_rate = isp_xclk_round_rate, -+ .set_rate = isp_xclk_set_rate, -+}; -+ -+static const char *isp_xclk_parent_name = "cam_mclk"; -+ -+static const struct clk_init_data isp_xclk_init_data = { -+ .name = "cam_xclk", -+ .ops = &isp_xclk_ops, -+ .parent_names = &isp_xclk_parent_name, -+ .num_parents = 1, -+}; -+ -+static int isp_xclk_init(struct isp_device *isp) -+{ -+ struct isp_platform_data *pdata = isp->pdata; -+ struct clk_init_data init; -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) { -+ struct isp_xclk *xclk = &isp->xclks[i]; -+ struct clk *clk; -+ -+ xclk->isp = isp; -+ xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B; -+ xclk->divider = 1; -+ spin_lock_init(&xclk->lock); -+ -+ init.name = i == 0 ? "cam_xclka" : "cam_xclkb"; -+ init.ops = &isp_xclk_ops; -+ init.parent_names = &isp_xclk_parent_name; -+ init.num_parents = 1; -+ -+ xclk->hw.init = &init; -+ -+ clk = devm_clk_register(isp->dev, &xclk->hw); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ -+ if (pdata->xclks[i].con_id == NULL && -+ pdata->xclks[i].dev_id == NULL) -+ continue; -+ -+ xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL); -+ if (xclk->lookup == NULL) -+ return -ENOMEM; -+ -+ xclk->lookup->con_id = pdata->xclks[i].con_id; -+ xclk->lookup->dev_id = pdata->xclks[i].dev_id; -+ xclk->lookup->clk = clk; -+ -+ clkdev_add(xclk->lookup); -+ } -+ -+ return 0; -+} -+ -+static void isp_xclk_cleanup(struct isp_device *isp) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) { -+ struct isp_xclk *xclk = &isp->xclks[i]; -+ -+ if (xclk->lookup) -+ clkdev_drop(xclk->lookup); -+ } -+} -+ -+/* ----------------------------------------------------------------------------- -+ * Interrupts -+ */ -+ - /* - * isp_enable_interrupts - Enable ISP interrupts. - * @isp: OMAP3 ISP device -@@ -180,80 +376,6 @@ static void isp_disable_interrupts(struct isp_device *isp) - isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE); - } - --/** -- * isp_set_xclk - Configures the specified cam_xclk to the desired frequency. -- * @isp: OMAP3 ISP device -- * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high -- * @xclksel: XCLK to configure (0 = A, 1 = B). -- * -- * Configures the specified MCLK divisor in the ISP timing control register -- * (TCTRL_CTRL) to generate the desired xclk clock value. -- * -- * Divisor = cam_mclk_hz / xclk -- * -- * Returns the final frequency that is actually being generated -- **/ --static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel) --{ -- u32 divisor; -- u32 currentxclk; -- unsigned long mclk_hz; -- -- if (!omap3isp_get(isp)) -- return 0; -- -- mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]); -- -- if (xclk >= mclk_hz) { -- divisor = ISPTCTRL_CTRL_DIV_BYPASS; -- currentxclk = mclk_hz; -- } else if (xclk >= 2) { -- divisor = mclk_hz / xclk; -- if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS) -- divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1; -- currentxclk = mclk_hz / divisor; -- } else { -- divisor = xclk; -- currentxclk = 0; -- } -- -- switch (xclksel) { -- case ISP_XCLK_A: -- isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, -- ISPTCTRL_CTRL_DIVA_MASK, -- divisor << ISPTCTRL_CTRL_DIVA_SHIFT); -- dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n", -- currentxclk); -- break; -- case ISP_XCLK_B: -- isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, -- ISPTCTRL_CTRL_DIVB_MASK, -- divisor << ISPTCTRL_CTRL_DIVB_SHIFT); -- dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n", -- currentxclk); -- break; -- case ISP_XCLK_NONE: -- default: -- omap3isp_put(isp); -- dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested " -- "xclk. Must be 0 (A) or 1 (B).\n"); -- return -EINVAL; -- } -- -- /* Do we go from stable whatever to clock? */ -- if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2) -- omap3isp_get(isp); -- /* Stopping the clock. */ -- else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2) -- omap3isp_put(isp); -- -- isp->xclk_divisor[xclksel - 1] = divisor; -- -- omap3isp_put(isp); -- -- return currentxclk; --} -- - /* - * isp_core_init - ISP core settings - * @isp: OMAP3 ISP device -@@ -1969,6 +2091,7 @@ static int isp_remove(struct platform_device *pdev) - - isp_unregister_entities(isp); - isp_cleanup_modules(isp); -+ isp_xclk_cleanup(isp); - - __omap3isp_get(isp, false); - iommu_detach_device(isp->domain, &pdev->dev); -@@ -2042,7 +2165,6 @@ static int isp_probe(struct platform_device *pdev) - } - - isp->autoidle = autoidle; -- isp->platform_cb.set_xclk = isp_set_xclk; - - mutex_init(&isp->isp_mutex); - spin_lock_init(&isp->stat_lock); -@@ -2093,6 +2215,10 @@ static int isp_probe(struct platform_device *pdev) - if (ret < 0) - goto error_isp; - -+ ret = isp_xclk_init(isp); -+ if (ret < 0) -+ goto error_isp; -+ - /* Memory resources */ - for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++) - if (isp->revision == isp_res_maps[m].isp_rev) -@@ -2162,6 +2288,7 @@ detach_dev: - free_domain: - iommu_domain_free(isp->domain); - error_isp: -+ isp_xclk_cleanup(isp); - omap3isp_put(isp); - error: - platform_set_drvdata(pdev, NULL); -diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h -index c77e1f2..cd3eff4 100644 ---- a/drivers/media/platform/omap3isp/isp.h -+++ b/drivers/media/platform/omap3isp/isp.h -@@ -29,6 +29,7 @@ - - #include <media/omap3isp.h> - #include <media/v4l2-device.h> -+#include <linux/clk-provider.h> - #include <linux/device.h> - #include <linux/io.h> - #include <linux/iommu.h> -@@ -125,8 +126,20 @@ struct isp_reg { - u32 val; - }; - --struct isp_platform_callback { -- u32 (*set_xclk)(struct isp_device *isp, u32 xclk, u8 xclksel); -+enum isp_xclk_id { -+ ISP_XCLK_A, -+ ISP_XCLK_B, -+}; -+ -+struct isp_xclk { -+ struct isp_device *isp; -+ struct clk_hw hw; -+ struct clk_lookup *lookup; -+ enum isp_xclk_id id; -+ -+ spinlock_t lock; /* Protects enabled and divider */ -+ bool enabled; -+ unsigned int divider; - }; - - /* -@@ -149,6 +162,7 @@ struct isp_platform_callback { - * @cam_mclk: Pointer to camera functional clock structure. - * @csi2_fck: Pointer to camera CSI2 complexIO clock structure. - * @l3_ick: Pointer to OMAP3 L3 bus interface clock. -+ * @xclks: External clocks provided by the ISP - * @irq: Currently attached ISP ISR callbacks information structure. - * @isp_af: Pointer to current settings for ISP AutoFocus SCM. - * @isp_hist: Pointer to current settings for ISP Histogram SCM. -@@ -185,12 +199,12 @@ struct isp_device { - int has_context; - int ref_count; - unsigned int autoidle; -- u32 xclk_divisor[2]; /* Two clocks, a and b. */ - #define ISP_CLK_CAM_ICK 0 - #define ISP_CLK_CAM_MCLK 1 - #define ISP_CLK_CSI2_FCK 2 - #define ISP_CLK_L3_ICK 3 - struct clk *clock[4]; -+ struct isp_xclk xclks[2]; - - /* ISP modules */ - struct ispstat isp_af; -@@ -209,8 +223,6 @@ struct isp_device { - unsigned int subclk_resources; - - struct iommu_domain *domain; -- -- struct isp_platform_callback platform_cb; - }; - - #define v4l2_dev_to_isp_device(dev) \ -diff --git a/include/media/omap3isp.h b/include/media/omap3isp.h -index 9584269..c9d06d9 100644 ---- a/include/media/omap3isp.h -+++ b/include/media/omap3isp.h -@@ -29,10 +29,6 @@ - struct i2c_board_info; - struct isp_device; - --#define ISP_XCLK_NONE 0 --#define ISP_XCLK_A 1 --#define ISP_XCLK_B 2 -- - enum isp_interface_type { - ISP_INTERFACE_PARALLEL, - ISP_INTERFACE_CSI2A_PHY2, -@@ -153,7 +149,13 @@ struct isp_v4l2_subdevs_group { - } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */ - }; - -+struct isp_platform_xclk { -+ const char *dev_id; -+ const char *con_id; -+}; -+ - struct isp_platform_data { -+ struct isp_platform_xclk xclks[2]; - struct isp_v4l2_subdevs_group *subdevs; - void (*set_constraints)(struct isp_device *isp, bool enable); - }; --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0002-mt9m032-Fix-PLL-setup.patch b/src/patches/kernel/omap/3isp/0002-mt9m032-Fix-PLL-setup.patch deleted file mode 100644 index 9d2b19c..0000000 --- a/src/patches/kernel/omap/3isp/0002-mt9m032-Fix-PLL-setup.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 7c44c8a989ad01bd7cd02370d4ca4a742db218be Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Tue, 25 Sep 2012 15:46:34 +0200 -Subject: [PATCH 2/6] mt9m032: Fix PLL setup - -The MT9M032 PLL was assumed to be identical to the MT9P031 PLL but -differs significantly. Update the registers definitions and PLL limits -according to the datasheet. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com ---- - drivers/media/i2c/mt9m032.c | 24 +++++++++++++----------- - 1 file changed, 13 insertions(+), 11 deletions(-) - -diff --git a/drivers/media/i2c/mt9m032.c b/drivers/media/i2c/mt9m032.c -index f80c1d7e..30d755a 100644 ---- a/drivers/media/i2c/mt9m032.c -+++ b/drivers/media/i2c/mt9m032.c -@@ -87,7 +87,7 @@ - #define MT9M032_RESTART 0x0b - #define MT9M032_RESET 0x0d - #define MT9M032_PLL_CONFIG1 0x11 --#define MT9M032_PLL_CONFIG1_OUTDIV_MASK 0x3f -+#define MT9M032_PLL_CONFIG1_PREDIV_MASK 0x3f - #define MT9M032_PLL_CONFIG1_MUL_SHIFT 8 - #define MT9M032_READ_MODE1 0x1e - #define MT9M032_READ_MODE2 0x20 -@@ -106,6 +106,8 @@ - #define MT9M032_GAIN_AMUL_SHIFT 6 - #define MT9M032_GAIN_ANALOG_MASK 0x3f - #define MT9M032_FORMATTER1 0x9e -+#define MT9M032_FORMATTER1_PLL_P1_6 (1 << 8) -+#define MT9M032_FORMATTER1_PARALLEL (1 << 12) - #define MT9M032_FORMATTER2 0x9f - #define MT9M032_FORMATTER2_DOUT_EN 0x1000 - #define MT9M032_FORMATTER2_PIXCLK_EN 0x2000 -@@ -121,8 +123,6 @@ - #define MT9P031_PLL_CONTROL_PWROFF 0x0050 - #define MT9P031_PLL_CONTROL_PWRON 0x0051 - #define MT9P031_PLL_CONTROL_USEPLL 0x0052 --#define MT9P031_PLL_CONFIG2 0x11 --#define MT9P031_PLL_CONFIG2_P1_DIV_MASK 0x1f - - struct mt9m032 { - struct v4l2_subdev subdev; -@@ -255,13 +255,14 @@ static int mt9m032_setup_pll(struct mt9m032 *sensor) - .n_max = 64, - .m_min = 16, - .m_max = 255, -- .p1_min = 1, -- .p1_max = 128, -+ .p1_min = 6, -+ .p1_max = 7, - }; - - struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev); - struct mt9m032_platform_data *pdata = sensor->pdata; - struct aptina_pll pll; -+ u16 reg_val; - int ret; - - pll.ext_clock = pdata->ext_clock; -@@ -274,18 +275,19 @@ static int mt9m032_setup_pll(struct mt9m032 *sensor) - sensor->pix_clock = pdata->pix_clock; - - ret = mt9m032_write(client, MT9M032_PLL_CONFIG1, -- (pll.m << MT9M032_PLL_CONFIG1_MUL_SHIFT) -- | (pll.p1 - 1)); -- if (!ret) -- ret = mt9m032_write(client, MT9P031_PLL_CONFIG2, pll.n - 1); -+ (pll.m << MT9M032_PLL_CONFIG1_MUL_SHIFT) | -+ ((pll.n - 1) & MT9M032_PLL_CONFIG1_PREDIV_MASK)); - if (!ret) - ret = mt9m032_write(client, MT9P031_PLL_CONTROL, - MT9P031_PLL_CONTROL_PWRON | - MT9P031_PLL_CONTROL_USEPLL); - if (!ret) /* more reserved, Continuous, Master Mode */ - ret = mt9m032_write(client, MT9M032_READ_MODE1, 0x8006); -- if (!ret) /* Set 14-bit mode, select 7 divider */ -- ret = mt9m032_write(client, MT9M032_FORMATTER1, 0x111e); -+ if (!ret) { -+ reg_val = (pll.p1 == 6 ? MT9M032_FORMATTER1_PLL_P1_6 : 0) -+ | MT9M032_FORMATTER1_PARALLEL | 0x001e; /* 14-bit */ -+ ret = mt9m032_write(client, MT9M032_FORMATTER1, reg_val); -+ } - - return ret; - } --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0003-mt9m032-Define-MT9M032_READ_MODE1-bits.patch b/src/patches/kernel/omap/3isp/0003-mt9m032-Define-MT9M032_READ_MODE1-bits.patch deleted file mode 100644 index c80e876..0000000 --- a/src/patches/kernel/omap/3isp/0003-mt9m032-Define-MT9M032_READ_MODE1-bits.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 1115becbb4875d62abb10f94a9510c81f376606f Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Wed, 26 Sep 2012 10:54:17 +0200 -Subject: [PATCH 3/6] mt9m032: Define MT9M032_READ_MODE1 bits - -Replace hardcoded values with #define's. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com ---- - drivers/media/i2c/mt9m032.c | 22 +++++++++++++++++++++- - 1 file changed, 21 insertions(+), 1 deletion(-) - -diff --git a/drivers/media/i2c/mt9m032.c b/drivers/media/i2c/mt9m032.c -index 30d755a..de150d3 100644 ---- a/drivers/media/i2c/mt9m032.c -+++ b/drivers/media/i2c/mt9m032.c -@@ -90,6 +90,24 @@ - #define MT9M032_PLL_CONFIG1_PREDIV_MASK 0x3f - #define MT9M032_PLL_CONFIG1_MUL_SHIFT 8 - #define MT9M032_READ_MODE1 0x1e -+#define MT9M032_READ_MODE1_OUTPUT_BAD_FRAMES (1 << 13) -+#define MT9M032_READ_MODE1_MAINTAIN_FRAME_RATE (1 << 12) -+#define MT9M032_READ_MODE1_XOR_LINE_VALID (1 << 11) -+#define MT9M032_READ_MODE1_CONT_LINE_VALID (1 << 10) -+#define MT9M032_READ_MODE1_INVERT_TRIGGER (1 << 9) -+#define MT9M032_READ_MODE1_SNAPSHOT (1 << 8) -+#define MT9M032_READ_MODE1_GLOBAL_RESET (1 << 7) -+#define MT9M032_READ_MODE1_BULB_EXPOSURE (1 << 6) -+#define MT9M032_READ_MODE1_INVERT_STROBE (1 << 5) -+#define MT9M032_READ_MODE1_STROBE_ENABLE (1 << 4) -+#define MT9M032_READ_MODE1_STROBE_START_TRIG1 (0 << 2) -+#define MT9M032_READ_MODE1_STROBE_START_EXP (1 << 2) -+#define MT9M032_READ_MODE1_STROBE_START_SHUTTER (2 << 2) -+#define MT9M032_READ_MODE1_STROBE_START_TRIG2 (3 << 2) -+#define MT9M032_READ_MODE1_STROBE_END_TRIG1 (0 << 0) -+#define MT9M032_READ_MODE1_STROBE_END_EXP (1 << 0) -+#define MT9M032_READ_MODE1_STROBE_END_SHUTTER (2 << 0) -+#define MT9M032_READ_MODE1_STROBE_END_TRIG2 (3 << 0) - #define MT9M032_READ_MODE2 0x20 - #define MT9M032_READ_MODE2_VFLIP_SHIFT 15 - #define MT9M032_READ_MODE2_HFLIP_SHIFT 14 -@@ -282,7 +300,9 @@ static int mt9m032_setup_pll(struct mt9m032 *sensor) - MT9P031_PLL_CONTROL_PWRON | - MT9P031_PLL_CONTROL_USEPLL); - if (!ret) /* more reserved, Continuous, Master Mode */ -- ret = mt9m032_write(client, MT9M032_READ_MODE1, 0x8006); -+ ret = mt9m032_write(client, MT9M032_READ_MODE1, 0x8000 | -+ MT9M032_READ_MODE1_STROBE_START_EXP | -+ MT9M032_READ_MODE1_STROBE_END_SHUTTER); - if (!ret) { - reg_val = (pll.p1 == 6 ? MT9M032_FORMATTER1_PLL_P1_6 : 0) - | MT9M032_FORMATTER1_PARALLEL | 0x001e; /* 14-bit */ --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0004-mt9p031-Use-devm_-managed-helpers.patch b/src/patches/kernel/omap/3isp/0004-mt9p031-Use-devm_-managed-helpers.patch deleted file mode 100644 index bcc4360..0000000 --- a/src/patches/kernel/omap/3isp/0004-mt9p031-Use-devm_-managed-helpers.patch +++ /dev/null @@ -1,62 +0,0 @@ -From d3f188f38eaa34acf6375d5d88fe27971aae1170 Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Fri, 21 Dec 2012 20:34:06 +0100 -Subject: [PATCH 4/6] mt9p031: Use devm_* managed helpers - -Replace kzalloc and gpio_request_one by their managed equivalents. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com ---- - drivers/media/i2c/mt9p031.c | 13 +++---------- - 1 file changed, 3 insertions(+), 10 deletions(-) - -diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c -index e328332..e0bad59 100644 ---- a/drivers/media/i2c/mt9p031.c -+++ b/drivers/media/i2c/mt9p031.c -@@ -927,7 +927,7 @@ static int mt9p031_probe(struct i2c_client *client, - return -EIO; - } - -- mt9p031 = kzalloc(sizeof(*mt9p031), GFP_KERNEL); -+ mt9p031 = devm_kzalloc(&client->dev, sizeof(*mt9p031), GFP_KERNEL); - if (mt9p031 == NULL) - return -ENOMEM; - -@@ -1001,8 +1001,8 @@ static int mt9p031_probe(struct i2c_client *client, - mt9p031->format.colorspace = V4L2_COLORSPACE_SRGB; - - if (pdata->reset != -1) { -- ret = gpio_request_one(pdata->reset, GPIOF_OUT_INIT_LOW, -- "mt9p031_rst"); -+ ret = devm_gpio_request_one(&client->dev, pdata->reset, -+ GPIOF_OUT_INIT_LOW, "mt9p031_rst"); - if (ret < 0) - goto done; - -@@ -1013,12 +1013,8 @@ static int mt9p031_probe(struct i2c_client *client, - - done: - if (ret < 0) { -- if (mt9p031->reset != -1) -- gpio_free(mt9p031->reset); -- - v4l2_ctrl_handler_free(&mt9p031->ctrls); - media_entity_cleanup(&mt9p031->subdev.entity); -- kfree(mt9p031); - } - - return ret; -@@ -1032,9 +1028,6 @@ static int mt9p031_remove(struct i2c_client *client) - v4l2_ctrl_handler_free(&mt9p031->ctrls); - v4l2_device_unregister_subdev(subdev); - media_entity_cleanup(&subdev->entity); -- if (mt9p031->reset != -1) -- gpio_free(mt9p031->reset); -- kfree(mt9p031); - - return 0; - } --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0005-mt9p031-Add-support-for-regulators.patch b/src/patches/kernel/omap/3isp/0005-mt9p031-Add-support-for-regulators.patch deleted file mode 100644 index 57c80fd..0000000 --- a/src/patches/kernel/omap/3isp/0005-mt9p031-Add-support-for-regulators.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 9ff2bc0c9458f0eecde6d9b52a899fd2bb1dd3a3 Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Tue, 8 May 2012 15:10:36 +0200 -Subject: [PATCH 5/6] mt9p031: Add support for regulators - -Enable the regulators when powering the sensor up, and disable them when -powering it down. - -The regulators are mandatory. Boards that don't allow controlling the -sensor power lines must provide fixed voltage regulators. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com ---- - drivers/media/i2c/mt9p031.c | 24 ++++++++++++++++++++++++ - 1 file changed, 24 insertions(+) - -diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c -index e0bad59..ecf4492 100644 ---- a/drivers/media/i2c/mt9p031.c -+++ b/drivers/media/i2c/mt9p031.c -@@ -19,6 +19,7 @@ - #include <linux/i2c.h> - #include <linux/log2.h> - #include <linux/pm.h> -+#include <linux/regulator/consumer.h> - #include <linux/slab.h> - #include <linux/videodev2.h> - -@@ -121,6 +122,10 @@ struct mt9p031 { - struct mutex power_lock; /* lock to protect power_count */ - int power_count; - -+ struct regulator *vaa; -+ struct regulator *vdd; -+ struct regulator *vdd_io; -+ - enum mt9p031_model model; - struct aptina_pll pll; - int reset; -@@ -264,6 +269,11 @@ static int mt9p031_power_on(struct mt9p031 *mt9p031) - usleep_range(1000, 2000); - } - -+ /* Bring up the supplies */ -+ regulator_enable(mt9p031->vdd); -+ regulator_enable(mt9p031->vdd_io); -+ regulator_enable(mt9p031->vaa); -+ - /* Emable clock */ - if (mt9p031->pdata->set_xclk) - mt9p031->pdata->set_xclk(&mt9p031->subdev, -@@ -285,6 +295,10 @@ static void mt9p031_power_off(struct mt9p031 *mt9p031) - usleep_range(1000, 2000); - } - -+ regulator_disable(mt9p031->vaa); -+ regulator_disable(mt9p031->vdd_io); -+ regulator_disable(mt9p031->vdd); -+ - if (mt9p031->pdata->set_xclk) - mt9p031->pdata->set_xclk(&mt9p031->subdev, 0); - } -@@ -937,6 +951,16 @@ static int mt9p031_probe(struct i2c_client *client, - mt9p031->model = did->driver_data; - mt9p031->reset = -1; - -+ mt9p031->vaa = devm_regulator_get(&client->dev, "vaa"); -+ mt9p031->vdd = devm_regulator_get(&client->dev, "vdd"); -+ mt9p031->vdd_io = devm_regulator_get(&client->dev, "vdd_io"); -+ -+ if (IS_ERR(mt9p031->vaa) || IS_ERR(mt9p031->vdd) || -+ IS_ERR(mt9p031->vdd_io)) { -+ dev_err(&client->dev, "Unable to get regulators\n"); -+ return -ENODEV; -+ } -+ - v4l2_ctrl_handler_init(&mt9p031->ctrls, ARRAY_SIZE(mt9p031_ctrls) + 6); - - v4l2_ctrl_new_std(&mt9p031->ctrls, &mt9p031_ctrl_ops, --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/3isp/0006-mt9p031-Use-the-common-clock-framework.patch b/src/patches/kernel/omap/3isp/0006-mt9p031-Use-the-common-clock-framework.patch deleted file mode 100644 index fc8d583..0000000 --- a/src/patches/kernel/omap/3isp/0006-mt9p031-Use-the-common-clock-framework.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 6cd62f5ae305142c0490e80caa04f99f00029b68 Mon Sep 17 00:00:00 2001 -From: Laurent Pinchart laurent.pinchart@ideasonboard.com -Date: Fri, 21 Dec 2012 20:11:55 +0100 -Subject: [PATCH 6/6] mt9p031: Use the common clock framework - -Configure the device external clock using the common clock framework -instead of a board code callback function. - -Signed-off-by: Laurent Pinchart laurent.pinchart@ideasonboard.com -Acked-by: Sakari Ailus sakari.ailus@iki.fi ---- - drivers/media/i2c/mt9p031.c | 21 ++++++++++++++------- - include/media/mt9p031.h | 2 -- - 2 files changed, 14 insertions(+), 9 deletions(-) - -diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c -index ecf4492..28cf95b 100644 ---- a/drivers/media/i2c/mt9p031.c -+++ b/drivers/media/i2c/mt9p031.c -@@ -12,6 +12,7 @@ - * published by the Free Software Foundation. - */ - -+#include <linux/clk.h> - #include <linux/delay.h> - #include <linux/device.h> - #include <linux/gpio.h> -@@ -122,6 +123,7 @@ struct mt9p031 { - struct mutex power_lock; /* lock to protect power_count */ - int power_count; - -+ struct clk *clk; - struct regulator *vaa; - struct regulator *vdd; - struct regulator *vdd_io; -@@ -200,7 +202,7 @@ static int mt9p031_reset(struct mt9p031 *mt9p031) - 0); - } - --static int mt9p031_pll_setup(struct mt9p031 *mt9p031) -+static int mt9p031_clk_setup(struct mt9p031 *mt9p031) - { - static const struct aptina_pll_limits limits = { - .ext_clock_min = 6000000, -@@ -221,6 +223,12 @@ static int mt9p031_pll_setup(struct mt9p031 *mt9p031) - struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev); - struct mt9p031_platform_data *pdata = mt9p031->pdata; - -+ mt9p031->clk = devm_clk_get(&client->dev, NULL); -+ if (IS_ERR(mt9p031->clk)) -+ return PTR_ERR(mt9p031->clk); -+ -+ clk_set_rate(mt9p031->clk, pdata->ext_freq); -+ - mt9p031->pll.ext_clock = pdata->ext_freq; - mt9p031->pll.pix_clock = pdata->target_freq; - -@@ -275,9 +283,8 @@ static int mt9p031_power_on(struct mt9p031 *mt9p031) - regulator_enable(mt9p031->vaa); - - /* Emable clock */ -- if (mt9p031->pdata->set_xclk) -- mt9p031->pdata->set_xclk(&mt9p031->subdev, -- mt9p031->pdata->ext_freq); -+ if (mt9p031->clk) -+ clk_prepare_enable(mt9p031->clk); - - /* Now RESET_BAR must be high */ - if (mt9p031->reset != -1) { -@@ -299,8 +306,8 @@ static void mt9p031_power_off(struct mt9p031 *mt9p031) - regulator_disable(mt9p031->vdd_io); - regulator_disable(mt9p031->vdd); - -- if (mt9p031->pdata->set_xclk) -- mt9p031->pdata->set_xclk(&mt9p031->subdev, 0); -+ if (mt9p031->clk) -+ clk_disable_unprepare(mt9p031->clk); - } - - static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on) -@@ -1033,7 +1040,7 @@ static int mt9p031_probe(struct i2c_client *client, - mt9p031->reset = pdata->reset; - } - -- ret = mt9p031_pll_setup(mt9p031); -+ ret = mt9p031_clk_setup(mt9p031); - - done: - if (ret < 0) { -diff --git a/include/media/mt9p031.h b/include/media/mt9p031.h -index 0c97b19..b1e63f2 100644 ---- a/include/media/mt9p031.h -+++ b/include/media/mt9p031.h -@@ -5,13 +5,11 @@ struct v4l2_subdev; - - /* - * struct mt9p031_platform_data - MT9P031 platform data -- * @set_xclk: Clock frequency set callback - * @reset: Chip reset GPIO (set to -1 if not used) - * @ext_freq: Input clock frequency - * @target_freq: Pixel clock frequency - */ - struct mt9p031_platform_data { -- int (*set_xclk)(struct v4l2_subdev *subdev, int hz); - int reset; - int ext_freq; - int target_freq; --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/0001-meego-modedb-add-Toshiba-LTA070B220F-800x480-support.patch b/src/patches/kernel/omap/beagle/0001-meego-modedb-add-Toshiba-LTA070B220F-800x480-support.patch deleted file mode 100644 index 34d6034..0000000 --- a/src/patches/kernel/omap/beagle/0001-meego-modedb-add-Toshiba-LTA070B220F-800x480-support.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 6ac98647956cbff190954b4cac6bd71fdbb8647b Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Wed, 23 Mar 2011 08:37:54 -0500 -Subject: [PATCH 1/5] meego: modedb add Toshiba LTA070B220F 800x480 support - - from http://wiki.meego.com/ARM/Meego_on_Beagleboard_from_scratch - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/video/modedb.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c -index 5b686de..69ad1ec 100644 ---- a/drivers/video/modedb.c -+++ b/drivers/video/modedb.c -@@ -293,6 +293,10 @@ static const struct fb_videomode modedb[] = { - /* 864x480 @ 60 Hz, 35.15 kHz hsync */ - { NULL, 60, 864, 480, 27777, 1, 1, 1, 1, 0, 0, - 0, FB_VMODE_NONINTERLACED }, -+ -+ /* 800x480 @ 60 Hz, Toshiba LTA070B220F 7 inch LCD */ -+ { NULL, 60, 800, 480, 32787, 48, 80, 33, 31, 32, 2, -+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED }, - }; - - #ifdef CONFIG_FB_MODE_HELPERS --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/beagle/0002-backlight-Add-TLC59108-backlight-control-driver.patch b/src/patches/kernel/omap/beagle/0002-backlight-Add-TLC59108-backlight-control-driver.patch deleted file mode 100644 index ce4df82..0000000 --- a/src/patches/kernel/omap/beagle/0002-backlight-Add-TLC59108-backlight-control-driver.patch +++ /dev/null @@ -1,217 +0,0 @@ -From e989473bea15beef8d480b822a619e7b8fca860c Mon Sep 17 00:00:00 2001 -From: "Manjunathappa, Prakash" prakash.pm@ti.com -Date: Mon, 1 Aug 2011 18:25:11 +0530 -Subject: [PATCH 2/5] backlight: Add TLC59108 backlight control driver - -This patch adds support for I2C configurable TLC59108 backlight -control driver. - -Signed-off-by: Manjunathappa, Prakash prakash.pm@ti.com -Signed-off-by: Vaibhav Hiremath hvaibhav@ti.com ---- - drivers/video/backlight/Kconfig | 8 ++ - drivers/video/backlight/Makefile | 1 + - drivers/video/backlight/tlc59108.c | 160 ++++++++++++++++++++++++++++++++++++ - 3 files changed, 169 insertions(+) - create mode 100644 drivers/video/backlight/tlc59108.c - -diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig -index db10d01..04a2275 100644 ---- a/drivers/video/backlight/Kconfig -+++ b/drivers/video/backlight/Kconfig -@@ -418,6 +418,14 @@ config BACKLIGHT_AS3711 - If you have an Austrian Microsystems AS3711 say Y to enable the - backlight driver. - -+config BACKLIGHT_TLC59108 -+ tristate "TLC59108 LCD Backlight Driver" -+ depends on I2C && BACKLIGHT_CLASS_DEVICE -+ default n -+ help -+ If you have an LCD Panel with backlight control via TLC59108, -+ say Y to enable its LCD control driver. -+ - endif # BACKLIGHT_CLASS_DEVICE - - endif # BACKLIGHT_LCD_SUPPORT -diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile -index 96c4d62..3687852 100644 ---- a/drivers/video/backlight/Makefile -+++ b/drivers/video/backlight/Makefile -@@ -41,6 +41,7 @@ obj-$(CONFIG_BACKLIGHT_LP855X) += lp855x_bl.o - obj-$(CONFIG_BACKLIGHT_LP8788) += lp8788_bl.o - obj-$(CONFIG_BACKLIGHT_MAX8925) += max8925_bl.o - obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o -+obj-$(CONFIG_BACKLIGHT_TLC59108) += tlc59108.o - obj-$(CONFIG_BACKLIGHT_OT200) += ot200_bl.o - obj-$(CONFIG_BACKLIGHT_PANDORA) += pandora_bl.o - obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o -diff --git a/drivers/video/backlight/tlc59108.c b/drivers/video/backlight/tlc59108.c -new file mode 100644 -index 0000000..4f4ea34 ---- /dev/null -+++ b/drivers/video/backlight/tlc59108.c -@@ -0,0 +1,160 @@ -+/* -+ * ti81xxhdmi_tlc59108.c -+ * -+ * Copyright (C) 2011 Texas Instruments -+ * Author: Senthil Natarajan -+ * -+ * tlc59108 HDMI Driver -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see http://www.gnu.org/licenses/. -+ * History: -+ * -+ * Senthil Natarajansenthil.n@ti.com July 2011 I2C driver for tlc59108 -+ * backlight control -+ */ -+ -+#include <linux/i2c.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/backlight.h> -+#include <linux/fb.h> -+ -+#define tlc59108_MODULE_NAME "tlc59108" -+#define TLC59108_MODE1 0x00 -+#define TLC59108_PWM2 0x04 -+#define TLC59108_LEDOUT0 0x0c -+#define TLC59108_LEDOUT1 0x0d -+#define TLC59108_MAX_BRIGHTNESS 0xFF -+ -+struct tlc59108_bl { -+ struct i2c_client *client; -+ struct backlight_device *bl; -+}; -+ -+static void tlc59108_bl_set_backlight(struct tlc59108_bl *data, int brightness) -+{ -+ /* Set Mode1 Register */ -+ i2c_smbus_write_byte_data(data->client, TLC59108_MODE1, 0x00); -+ -+ /* Set LEDOUT0 Register */ -+ i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT0, 0x21); -+ -+ /* Set Backlight Duty Cycle*/ -+ i2c_smbus_write_byte_data(data->client, TLC59108_PWM2, -+ brightness & 0xff); -+} -+ -+static int tlc59108_bl_get_brightness(struct backlight_device *dev) -+{ -+ struct backlight_properties *props = &dev->props; -+ -+ return props->brightness; -+} -+ -+static int tlc59108_bl_update_status(struct backlight_device *dev) -+{ -+ struct backlight_properties *props = &dev->props; -+ struct tlc59108_bl *data = dev_get_drvdata(&dev->dev); -+ int brightness = props->brightness; -+ -+ tlc59108_bl_set_backlight(data, brightness); -+ -+ return 0; -+} -+ -+static const struct backlight_ops bl_ops = { -+ .get_brightness = tlc59108_bl_get_brightness, -+ .update_status = tlc59108_bl_update_status, -+}; -+ -+static int tlc59108_probe(struct i2c_client *c, const struct i2c_device_id *id) -+{ -+ struct backlight_properties props; -+ struct tlc59108_bl *data = kzalloc(sizeof(struct tlc59108_bl), -+ GFP_KERNEL); -+ int ret = 0; -+ -+ if (!data) -+ return -ENOMEM; -+ -+ i2c_set_clientdata(c, data); -+ data->client = c; -+ -+ memset(&props, 0, sizeof(struct backlight_properties)); -+ props.max_brightness = TLC59108_MAX_BRIGHTNESS; -+ props.type = BACKLIGHT_RAW; -+ data->bl = backlight_device_register("tlc59108-bl", &c->dev, data, -+ &bl_ops, &props); -+ if (IS_ERR(data->bl)) { -+ ret = PTR_ERR(data->bl); -+ goto err_reg; -+ } -+ -+ data->bl->props.brightness = TLC59108_MAX_BRIGHTNESS; -+ -+ backlight_update_status(data->bl); -+ -+ return 0; -+ -+err_reg: -+ data->bl = NULL; -+ kfree(data); -+ return ret; -+} -+ -+static int tlc59108_remove(struct i2c_client *c) -+{ -+ struct tlc59108_bl *data = i2c_get_clientdata(c); -+ -+ backlight_device_unregister(data->bl); -+ data->bl = NULL; -+ -+ kfree(data); -+ -+ return 0; -+} -+ -+/* I2C Device ID table */ -+static const struct i2c_device_id tlc59108_id[] = { -+ { "tlc59108", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, tlc59108_id); -+ -+/* I2C driver data */ -+static struct i2c_driver tlc59108_driver = { -+ .driver = { -+ .owner = THIS_MODULE, -+ .name = tlc59108_MODULE_NAME, -+ }, -+ .probe = tlc59108_probe, -+ .remove = tlc59108_remove, -+ .id_table = tlc59108_id, -+}; -+ -+static int __init tlc59108_init(void) -+{ -+ return i2c_add_driver(&tlc59108_driver); -+} -+ -+static void __exit tlc59108_exit(void) -+{ -+ i2c_del_driver(&tlc59108_driver); -+} -+ -+module_init(tlc59108_init); -+module_exit(tlc59108_exit); -+ -+MODULE_DESCRIPTION("LCD/Backlight control for TLC59108"); -+MODULE_AUTHOR("Senthil Natarajan senthil.n@ti.com"); -+MODULE_LICENSE("GPL v2"); --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/0003-tlc59108-adjust-for-beagleboard-uLCD7.patch b/src/patches/kernel/omap/beagle/0003-tlc59108-adjust-for-beagleboard-uLCD7.patch deleted file mode 100644 index 5c9659b..0000000 --- a/src/patches/kernel/omap/beagle/0003-tlc59108-adjust-for-beagleboard-uLCD7.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 40cbddde06a9f0e1845810b904502f922fc3288f Mon Sep 17 00:00:00 2001 -From: Koen Kooi koen@dominion.thruhere.net -Date: Fri, 27 Apr 2012 21:30:00 +0200 -Subject: [PATCH 3/5] tlc59108: adjust for beagleboard+uLCD7 - -Signed-off-by: Koen Kooi koen@dominion.thruhere.net ---- - drivers/video/backlight/tlc59108.c | 46 ++++++++++++++++++++++++----------- - 1 files changed, 31 insertions(+), 15 deletions(-) - -diff --git a/drivers/video/backlight/tlc59108.c b/drivers/video/backlight/tlc59108.c -index 4f4ea34..40a21e7 100644 ---- a/drivers/video/backlight/tlc59108.c -+++ b/drivers/video/backlight/tlc59108.c -@@ -29,9 +29,16 @@ - #include <linux/backlight.h> - #include <linux/fb.h> - --#define tlc59108_MODULE_NAME "tlc59108" - #define TLC59108_MODE1 0x00 --#define TLC59108_PWM2 0x04 -+#define TLC59108_MODE2 0x01 -+#define TLC59108_PWM0 0x02 -+#define TLC59108_PWM1 0x03 -+#define TLC59108_PWM2 0x04 -+#define TLC59108_PWM3 0x05 -+#define TLC59108_PWM4 0x06 -+#define TLC59108_PWM5 0x07 -+#define TLC59108_PWM6 0x08 -+#define TLC59108_PWM7 0x09 - #define TLC59108_LEDOUT0 0x0c - #define TLC59108_LEDOUT1 0x0d - #define TLC59108_MAX_BRIGHTNESS 0xFF -@@ -43,15 +50,9 @@ struct tlc59108_bl { - - static void tlc59108_bl_set_backlight(struct tlc59108_bl *data, int brightness) - { -- /* Set Mode1 Register */ -- i2c_smbus_write_byte_data(data->client, TLC59108_MODE1, 0x00); -- -- /* Set LEDOUT0 Register */ -- i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT0, 0x21); -- - /* Set Backlight Duty Cycle*/ - i2c_smbus_write_byte_data(data->client, TLC59108_PWM2, -- brightness & 0xff); -+ 0xff - brightness ); - } - - static int tlc59108_bl_get_brightness(struct backlight_device *dev) -@@ -65,8 +66,18 @@ static int tlc59108_bl_update_status(struct backlight_device *dev) - { - struct backlight_properties *props = &dev->props; - struct tlc59108_bl *data = dev_get_drvdata(&dev->dev); -+ - int brightness = props->brightness; - -+ if (dev->props.state & BL_CORE_FBBLANK) { -+ brightness = 0; -+ /* Set LEDOUT0 Register */ -+ i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT0, 0x10); -+ } else { -+ /* Set LEDOUT0 Register */ -+ i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT0, 0x30); -+ } -+ - tlc59108_bl_set_backlight(data, brightness); - - return 0; -@@ -77,7 +88,7 @@ static const struct backlight_ops bl_ops = { - .update_status = tlc59108_bl_update_status, - }; - --static int tlc59108_probe(struct i2c_client *c, const struct i2c_device_id *id) -+static int __devinit tlc59108_probe(struct i2c_client *c, const struct i2c_device_id *id) - { - struct backlight_properties props; - struct tlc59108_bl *data = kzalloc(sizeof(struct tlc59108_bl), -@@ -104,6 +115,11 @@ static int tlc59108_probe(struct i2c_client *c, const struct i2c_device_id *id) - - backlight_update_status(data->bl); - -+ i2c_smbus_write_byte_data(data->client, TLC59108_MODE1, 0x00); -+ i2c_smbus_write_byte_data(data->client, TLC59108_PWM2, 0x80); -+ i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT1, 0x05); -+ i2c_smbus_write_byte_data(data->client, TLC59108_LEDOUT1, 0x15); -+ - return 0; - - err_reg: -@@ -125,7 +141,7 @@ static int tlc59108_remove(struct i2c_client *c) - } - - /* I2C Device ID table */ --static const struct i2c_device_id tlc59108_id[] = { -+static struct i2c_device_id tlc59108_id[] = { - { "tlc59108", 0 }, - { } - }; -@@ -134,12 +150,12 @@ MODULE_DEVICE_TABLE(i2c, tlc59108_id); - /* I2C driver data */ - static struct i2c_driver tlc59108_driver = { - .driver = { -- .owner = THIS_MODULE, -- .name = tlc59108_MODULE_NAME, -+ .owner = THIS_MODULE, -+ .name = "tlc59108" - }, -+ .id_table = tlc59108_id, - .probe = tlc59108_probe, - .remove = tlc59108_remove, -- .id_table = tlc59108_id, - }; - - static int __init tlc59108_init(void) -@@ -157,4 +173,4 @@ module_exit(tlc59108_exit); - - MODULE_DESCRIPTION("LCD/Backlight control for TLC59108"); - MODULE_AUTHOR("Senthil Natarajan senthil.n@ti.com"); --MODULE_LICENSE("GPL v2"); -+MODULE_LICENSE("GPL"); --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/beagle/0004-zeroMAP-Open-your-eyes.patch b/src/patches/kernel/omap/beagle/0004-zeroMAP-Open-your-eyes.patch deleted file mode 100644 index d179420..0000000 --- a/src/patches/kernel/omap/beagle/0004-zeroMAP-Open-your-eyes.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 81ff7627ad0d958a5c156cb7d880af8707e14f47 Mon Sep 17 00:00:00 2001 -From: Alexander Holler holler@ahsoftware.de -Date: Wed, 4 Jul 2012 00:03:04 +0200 -Subject: [PATCH 4/5] zeroMAP: Open your eyes! - -Signed-off-by: Alexander Holler holler@ahsoftware.de ---- - kernel/printk.c | 7 +++++++ - 1 files changed, 7 insertions(+), 0 deletions(-) - -diff --git a/kernel/printk.c b/kernel/printk.c -index 22e070f..3678740 100644 ---- a/kernel/printk.c -+++ b/kernel/printk.c -@@ -1759,6 +1759,13 @@ static int __init console_setup(char *str) - char *s, *options, *brl_options = NULL; - int idx; - -+#ifdef CONFIG_SERIAL_OMAP -+ if (!strncmp(str, "tty0", 4) && '0' <= str[4] && '9' >= str[4]) { -+ str[3] = 'O'; -+ pr_warn("We are opening your eyes, assuming you want to use an OMAP based serial driver and not a zeroMAP based one! ;)\n"); -+ pr_warn("Which means 'tty0%s' was changed to 'ttyO%s' automagically for your pleasure.\n", str+4, str+4); -+ } -+#endif - #ifdef CONFIG_A11Y_BRAILLE_CONSOLE - if (!memcmp(str, "brl,", 4)) { - brl_options = ""; --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/beagle/0005-ARM-OMAP-Beagle-use-TWL4030-generic-reset-script.patch b/src/patches/kernel/omap/beagle/0005-ARM-OMAP-Beagle-use-TWL4030-generic-reset-script.patch deleted file mode 100644 index ffb5ffb..0000000 --- a/src/patches/kernel/omap/beagle/0005-ARM-OMAP-Beagle-use-TWL4030-generic-reset-script.patch +++ /dev/null @@ -1,29 +0,0 @@ -From f2ec859cb99e6137d78b457f8a6693e69e3b1f33 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Thu, 24 Jan 2013 09:43:51 -0600 -Subject: [PATCH 5/5] ARM: OMAP: Beagle: use TWL4030 generic reset script - -Enable TWL_COMMON_PDATA_POWER such that OMAP3530 revisions of the -Beagle (Bx/Cx) will not hang on reboot when running at 125 Mhz. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 5b57885..9a2c80b 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -831,7 +831,7 @@ static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | -- TWL_COMMON_PDATA_AUDIO, -+ TWL_COMMON_PDATA_AUDIO | TWL_COMMON_PDATA_POWER, - TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - beagle_twldata.vpll2->constraints.name = "VDVI"; --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/0006-DSS2-use-DSI-PLL-for-DPI-with-OMAP3.patch b/src/patches/kernel/omap/beagle/0006-DSS2-use-DSI-PLL-for-DPI-with-OMAP3.patch deleted file mode 100644 index 56879cb..0000000 --- a/src/patches/kernel/omap/beagle/0006-DSS2-use-DSI-PLL-for-DPI-with-OMAP3.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 40d889a09a05765138f3b737becadfe927c9b004 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 19 Mar 2013 13:40:50 -0500 -Subject: [PATCH 6/6] DSS2: use DSI PLL for DPI with OMAP3 - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/video/omap2/dss/dpi.c | 4 ---- - 1 file changed, 4 deletions(-) - -diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c -index 757b57f..12ed14f 100644 ---- a/drivers/video/omap2/dss/dpi.c -+++ b/drivers/video/omap2/dss/dpi.c -@@ -58,10 +58,6 @@ static struct platform_device *dpi_get_dsidev(enum omap_channel channel) - */ - switch (omapdss_get_version()) { - case OMAPDSS_VER_OMAP24xx: -- case OMAPDSS_VER_OMAP34xx_ES1: -- case OMAPDSS_VER_OMAP34xx_ES3: -- case OMAPDSS_VER_OMAP3630: -- case OMAPDSS_VER_AM35xx: - return NULL; - - case OMAPDSS_VER_OMAP4430_ES1: --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0001-Beagle-expansion-add-buddy-param-for-expansionboard-.patch b/src/patches/kernel/omap/beagle/expansion/0001-Beagle-expansion-add-buddy-param-for-expansionboard-.patch deleted file mode 100644 index 44a1ae3..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0001-Beagle-expansion-add-buddy-param-for-expansionboard-.patch +++ /dev/null @@ -1,63 +0,0 @@ -From c070885eaf883884f89a77e2f71def5b447f914b Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:25:27 -0600 -Subject: [PATCH 01/10] Beagle: expansion: add buddy param for expansionboard - names - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index c3558f9..29d549c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -23,6 +23,7 @@ - #include <linux/pwm.h> - #include <linux/leds_pwm.h> - #include <linux/gpio.h> -+#include <linux/irq.h> - #include <linux/input.h> - #include <linux/gpio_keys.h> - #include <linux/opp.h> -@@ -191,6 +192,8 @@ static void __init omap3_beagle_init_rev(void) - } - } - -+char expansionboard_name[16]; -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -470,6 +473,18 @@ static struct omap_board_mux board_mux[] __initdata = { - }; - #endif - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!machine_is_omap3_beagle()) -+ return 0; -+ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard_name, str, 16); -+ pr_info("Beagle expansionboard: %s\n", expansionboard_name); -+ return 0; -+} -+ - static int __init beagle_opp_init(void) - { - int r = 0; -@@ -559,6 +574,8 @@ static void __init omap3_beagle_init(void) - pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ - .atag_offset = 0x100, --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0002-Beagle-expansion-add-zippy.patch b/src/patches/kernel/omap/beagle/expansion/0002-Beagle-expansion-add-zippy.patch deleted file mode 100644 index fff6243..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0002-Beagle-expansion-add-zippy.patch +++ /dev/null @@ -1,242 +0,0 @@ -From e71075202707e044a28604bd929fd6f7a89adeae Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Mon, 21 Jan 2013 11:47:02 -0600 -Subject: [PATCH 02/10] Beagle: expansion: add zippy - -v2: add #include <linux/regulator/fixed.h> -build fix from Pantelis Antoniou panto@antoniou-consulting.com - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 164 +++++++++++++++++++++++++++++-- - 1 file changed, 158 insertions(+), 6 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 4e6e767..b3685ed 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -37,6 +37,7 @@ - #include <linux/usb/nop-usb-xceiv.h> - - #include <linux/regulator/machine.h> -+#include <linux/regulator/fixed.h> - #include <linux/i2c/twl.h> - - #include <asm/mach-types.h> -@@ -195,6 +196,86 @@ static void __init omap3_beagle_init_rev(void) - - char expansionboard_name[16]; - -+enum { -+ EXPANSION_MMC_NONE = 0, -+ EXPANSION_MMC_ZIPPY, -+ EXPANSION_MMC_WIFI, -+}; -+ -+enum { -+ EXPANSION_I2C_NONE = 0, -+ EXPANSION_I2C_ZIPPY, -+}; -+ -+static struct { -+ int mmc_settings; -+ int i2c_settings; -+} expansion_config = { -+ .mmc_settings = EXPANSION_MMC_NONE, -+ .i2c_settings = EXPANSION_I2C_NONE, -+}; -+ -+//rcn-ee: this is just a fake regulator, the zippy hardware provides 3.3/1.8 with jumper.. -+static struct fixed_voltage_config beagle_vzippy = { -+ .supply_name = "vzippy", -+ .microvolts = 3300000, /* 3.3V */ -+ .startup_delay = 70000, /* 70ms */ -+ .enable_high = 1, -+ .enabled_at_boot = 0, -+ .init_data = &beagle_vmmc2, -+}; -+ -+static struct platform_device omap_zippy_device = { -+ .name = "reg-fixed-voltage", -+ .id = 1, -+ .dev = { -+ .platform_data = &beagle_vzippy, -+ }, -+}; -+ -+#define OMAP3BEAGLE_GPIO_ZIPPY_MMC_WP 141 -+#define OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD 162 -+ -+#if IS_ENABLED(CONFIG_ENC28J60) -+#include <linux/platform_data/spi-omap2-mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 -+ -+static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { -+ .turbo_mode = 0, -+}; -+ -+static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { -+ { -+ .modalias = "enc28j60", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 20000000, -+ .controller_data = &enc28j60_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_enc28j60_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); -+ omap3beagle_zippy_spi_board_info[0].irq = gpio_to_irq(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); -+ irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ pr_err("Beagle expansionboard: could not obtain gpio for ENC28J60_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_enc28j60_init(void) { return; } -+#endif -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -271,6 +352,23 @@ static struct omap2_hsmmc_info mmc[] = { - {} /* Terminator */ - }; - -+static struct omap2_hsmmc_info mmc_zippy[] = { -+ { -+ .mmc = 1, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .gpio_wp = -EINVAL, -+ .deferred = true, -+ }, -+ { -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .gpio_wp = OMAP3BEAGLE_GPIO_ZIPPY_MMC_WP, -+ .gpio_cd = OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, -+ .transceiver = true, -+ .deferred = true, -+ }, -+ {} /* Terminator */ -+}; - static struct regulator_consumer_supply beagle_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; -@@ -301,10 +399,21 @@ static int beagle_twl_gpio_setup(struct device *dev, - { - int r; - -- mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; -- /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -- mmc[0].gpio_cd = gpio + 0; -- omap_hsmmc_late_init(mmc); -+ switch (expansion_config.mmc_settings) { -+ case EXPANSION_MMC_ZIPPY: -+ mmc_zippy[0].gpio_wp = beagle_config.mmc1_gpio_wp; -+ /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -+ mmc_zippy[0].gpio_cd = gpio + 0; -+ -+ omap_hsmmc_late_init(mmc_zippy); -+ break; -+ default: -+ mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; -+ /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -+ mmc[0].gpio_cd = gpio + 0; -+ -+ omap_hsmmc_late_init(mmc); -+ } - - /* - * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active -@@ -396,6 +505,14 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { - }, - }; - -+static struct i2c_board_info __initdata zippy_i2c2_rtc[] = { -+#if defined(CONFIG_RTC_DRV_DS1307) || defined(CONFIG_RTC_DRV_DS1307_MODULE) -+ { -+ I2C_BOARD_INFO("ds1307", 0x68), -+ }, -+#endif -+}; -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -406,6 +523,15 @@ static int __init omap3_beagle_i2c_init(void) - beagle_twldata.vpll2->constraints.name = "VDVI"; - - omap3_pmic_init("twl4030", &beagle_twldata); -+ -+ switch (expansion_config.i2c_settings) { -+ case EXPANSION_I2C_ZIPPY: -+ omap_register_i2c_bus(2, 400, zippy_i2c2_rtc, ARRAY_SIZE(zippy_i2c2_rtc)); -+ break; -+ default: -+ omap_register_i2c_bus(2, 400, NULL, 0); -+ } -+ - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 100, beagle_i2c_eeprom, ARRAY_SIZE(beagle_i2c_eeprom)); -@@ -548,10 +674,30 @@ static void __init omap3_beagle_init(void) - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_beagle_init_rev(); - -+ if (!strcmp(expansionboard_name, "zippy")) -+ { -+ pr_info("Beagle expansionboard: initializing zippy mmc\n"); -+ platform_device_register(&omap_zippy_device); -+ -+ expansion_config.i2c_settings = EXPANSION_I2C_ZIPPY; -+ expansion_config.mmc_settings = EXPANSION_MMC_ZIPPY; -+ -+ omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_WP, OMAP_PIN_INPUT); -+ omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, OMAP_PIN_INPUT); -+ } -+ - if (gpio_is_valid(beagle_config.mmc1_gpio_wp)) - omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); -- mmc[0].caps = beagle_config.mmc_caps; -- omap_hsmmc_init(mmc); -+ -+ switch (expansion_config.mmc_settings) { -+ case EXPANSION_MMC_ZIPPY: -+ mmc_zippy[0].caps = beagle_config.mmc_caps; -+ omap_hsmmc_init(mmc_zippy); -+ break; -+ default: -+ mmc[0].caps = beagle_config.mmc_caps; -+ omap_hsmmc_init(mmc); -+ } - - omap3_beagle_i2c_init(); - -@@ -566,6 +712,12 @@ static void __init omap3_beagle_init(void) - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - -+ if (!strcmp(expansionboard_name, "zippy")) -+ { -+ pr_info("Beagle expansionboard: initializing enc28j60\n"); -+ omap3beagle_enc28j60_init(); -+ } -+ - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0003-Beagle-expansion-add-zippy2.patch b/src/patches/kernel/omap/beagle/expansion/0003-Beagle-expansion-add-zippy2.patch deleted file mode 100644 index b569f92..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0003-Beagle-expansion-add-zippy2.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 45bed17e65e1a83f753896e250f3458654dcb229 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:32:15 -0600 -Subject: [PATCH 03/10] Beagle: expansion: add zippy2 - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 48 ++++++++++++++++++++++++++++++- - 1 file changed, 47 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index b3685ed..74da505 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -276,6 +276,46 @@ static void __init omap3beagle_enc28j60_init(void) - static inline void __init omap3beagle_enc28j60_init(void) { return; } - #endif - -+#if IS_ENABLED(CONFIG_KS8851) -+#include <linux/platform_data/spi-omap2-mcspi.h> -+#include <linux/spi/spi.h> -+ -+#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 -+ -+static struct omap2_mcspi_device_config ks8851_spi_chip_info = { -+ .turbo_mode = 0, -+}; -+ -+static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { -+ { -+ .modalias = "ks8851", -+ .bus_num = 4, -+ .chip_select = 0, -+ .max_speed_hz = 36000000, -+ .controller_data = &ks8851_spi_chip_info, -+ }, -+}; -+ -+static void __init omap3beagle_ks8851_init(void) -+{ -+ if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && -+ (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { -+ gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); -+ omap3beagle_zippy2_spi_board_info[0].irq = gpio_to_irq(OMAP3BEAGLE_GPIO_KS8851_IRQ); -+ irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); -+ } else { -+ pr_err("Beagle expansionboard: could not obtain gpio for KS8851_IRQ\n"); -+ return; -+ } -+ -+ spi_register_board_info(omap3beagle_zippy2_spi_board_info, -+ ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); -+} -+ -+#else -+static inline void __init omap3beagle_ks8851_init(void) { return; } -+#endif -+ - static struct mtd_partition omap3beagle_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { -@@ -674,7 +714,7 @@ static void __init omap3_beagle_init(void) - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_beagle_init_rev(); - -- if (!strcmp(expansionboard_name, "zippy")) -+ if ((!strcmp(expansionboard_name, "zippy")) || (!strcmp(expansionboard_name, "zippy2"))) - { - pr_info("Beagle expansionboard: initializing zippy mmc\n"); - platform_device_register(&omap_zippy_device); -@@ -718,6 +758,12 @@ static void __init omap3_beagle_init(void) - omap3beagle_enc28j60_init(); - } - -+ if (!strcmp(expansionboard_name, "zippy2")) -+ { -+ pr_info("Beagle expansionboard: initializing ks_8851\n"); -+ omap3beagle_ks8851_init(); -+ } -+ - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0004-Beagle-expansion-add-trainer.patch b/src/patches/kernel/omap/beagle/expansion/0004-Beagle-expansion-add-trainer.patch deleted file mode 100644 index 08ace67..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0004-Beagle-expansion-add-trainer.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 4d9b4e5795e322ed3efed9b8402f604e2e53cc6f Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:33:24 -0600 -Subject: [PATCH 04/10] Beagle: expansion: add trainer - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 74da505..b5ed547 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -764,6 +764,37 @@ static void __init omap3_beagle_init(void) - omap3beagle_ks8851_init(); - } - -+ if (!strcmp(expansionboard_name, "trainer")) -+ { -+ pr_info("Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); -+ gpio_request(130, "sysfs"); -+ gpio_export(130, 1); -+ gpio_request(131, "sysfs"); -+ gpio_export(131, 1); -+ gpio_request(132, "sysfs"); -+ gpio_export(132, 1); -+ gpio_request(133, "sysfs"); -+ gpio_export(133, 1); -+ gpio_request(134, "sysfs"); -+ gpio_export(134, 1); -+ gpio_request(135, "sysfs"); -+ gpio_export(135, 1); -+ gpio_request(136, "sysfs"); -+ gpio_export(136, 1); -+ gpio_request(137, "sysfs"); -+ gpio_export(137, 1); -+ gpio_request(138, "sysfs"); -+ gpio_export(138, 1); -+ gpio_request(139, "sysfs"); -+ gpio_export(139, 1); -+ gpio_request(140, "sysfs"); -+ gpio_export(140, 1); -+ gpio_request(141, "sysfs"); -+ gpio_export(141, 1); -+ gpio_request(162, "sysfs"); -+ gpio_export(162, 1); -+ } -+ - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0005-Beagle-expansion-add-CircuitCo-ulcd-Support.patch b/src/patches/kernel/omap/beagle/expansion/0005-Beagle-expansion-add-CircuitCo-ulcd-Support.patch deleted file mode 100644 index 8b716ee..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0005-Beagle-expansion-add-CircuitCo-ulcd-Support.patch +++ /dev/null @@ -1,285 +0,0 @@ -From a53e7913a95faefde1ee87a7ea048c04b0850066 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:42:03 -0600 -Subject: [PATCH 05/10] Beagle: expansion: add CircuitCo ulcd Support - -This of a cleanup, squashed both ulcd commits into one: - -====================================================================== - -expansion: add ulcd -Signed-off-by: Robert Nelson robertcnelson@gmail.com - -====================================================================== - -beagleboard: fix uLCD7 support -Signed-off-by: Koen Kooi koen@dominion.thruhere.net - -====================================================================== - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 136 ++++++++++++++++++++++ - drivers/video/omap2/displays/panel-generic-dpi.c | 27 +++++ - 2 files changed, 163 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 0f9b253..b2807c2 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -118,12 +118,16 @@ static struct { - int dvi_pd_gpio; - int usr_button_gpio; - int mmc_caps; -+ char *lcd_driver_name; -+ int lcd_pwren; - } beagle_config = { - .mmc1_gpio_wp = -EINVAL, - .usb_pwr_level = 0, - .dvi_pd_gpio = -EINVAL, - .usr_button_gpio = 4, - .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, -+ .lcd_driver_name = "", -+ .lcd_pwren = 156, - }; - - static struct gpio omap3_beagle_rev_gpios[] __initdata = { -@@ -195,6 +199,7 @@ static void __init omap3_beagle_init_rev(void) - } - - char expansionboard_name[16]; -+char expansionboard2_name[16]; - - enum { - EXPANSION_MMC_NONE = 0, -@@ -205,6 +210,7 @@ enum { - enum { - EXPANSION_I2C_NONE = 0, - EXPANSION_I2C_ZIPPY, -+ EXPANSION_I2C_7ULCD, - }; - - static struct { -@@ -369,9 +375,53 @@ static struct omap_dss_device beagle_tv_device = { - .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, - }; - -+static int beagle_enable_lcd(struct omap_dss_device *dssdev) -+{ -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { -+ pr_info("%s: Enabling LCD\n", __FUNCTION__); -+ gpio_set_value(beagle_config.lcd_pwren, 0); -+ } else { -+ pr_info("%s: Invalid LCD enable GPIO: %d\n", -+ __FUNCTION__, beagle_config.lcd_pwren); -+ } -+ -+ return 0; -+} -+ -+static void beagle_disable_lcd(struct omap_dss_device *dssdev) -+{ -+ if (gpio_is_valid(beagle_config.lcd_pwren)) { -+ pr_info("%s: Disabling LCD\n", __FUNCTION__); -+ gpio_set_value(beagle_config.lcd_pwren, 1); -+ } else { -+ pr_info("%s: Invalid LCD enable GPIO: %d\n", -+ __FUNCTION__, beagle_config.lcd_pwren); -+ } -+ -+ return; -+} -+ -+static struct panel_generic_dpi_data lcd_panel = { -+ .name = "tfc_s9700rtwv35tr-01b", -+ .platform_enable = beagle_enable_lcd, -+ .platform_disable = beagle_disable_lcd, -+}; -+ -+static struct omap_dss_device beagle_lcd_device = { -+ .type = OMAP_DISPLAY_TYPE_DPI, -+ .name = "lcd", -+ .driver_name = "generic_dpi_panel", -+ .phy.dpi.data_lines = 24, -+ .platform_enable = beagle_enable_lcd, -+ .platform_disable = beagle_disable_lcd, -+ .reset_gpio = -EINVAL, -+ .data = &lcd_panel, -+}; -+ - static struct omap_dss_device *beagle_dss_devices[] = { - &beagle_dvi_device, - &beagle_tv_device, -+ &beagle_lcd_device, - }; - - static struct omap_dss_board_info beagle_dss_data = { -@@ -553,6 +603,53 @@ static struct i2c_board_info __initdata zippy_i2c2_rtc[] = { - #endif - }; - -+#if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2007) -+/* Touchscreen */ -+#include <linux/i2c/tsc2007.h> -+ -+#define OMAP3BEAGLE_TSC2007_GPIO 157 -+ -+static int omap3beagle_tsc2007_get_pendown_state(void) -+{ -+ return !gpio_get_value(OMAP3BEAGLE_TSC2007_GPIO); -+} -+ -+static struct tsc2007_platform_data tsc2007_info = { -+ .model = 2007, -+ .x_plate_ohms = 180, -+ .get_pendown_state = omap3beagle_tsc2007_get_pendown_state, -+}; -+ -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = { -+ { -+ I2C_BOARD_INFO("tlc59108", 0x40), -+ }, -+ { -+ I2C_BOARD_INFO("tsc2007", 0x48), -+ .platform_data = &tsc2007_info, -+ }, -+}; -+ -+static void __init omap3beagle_tsc2007_init(void) -+{ -+ int r; -+ -+ omap_mux_init_gpio(OMAP3BEAGLE_TSC2007_GPIO, OMAP_PIN_INPUT_PULLUP); -+ -+ r = gpio_request_one(OMAP3BEAGLE_TSC2007_GPIO, GPIOF_IN, "tsc2007_pen_down"); -+ if (r < 0) { -+ pr_err("Beagle expansionboard: failed to request GPIO#%d for " -+ "tsc2007 pen down IRQ\n", OMAP3BEAGLE_TSC2007_GPIO); -+ return; -+ } -+ -+ beagle_i2c2_bbtoys_ulcd[0].irq = gpio_to_irq(OMAP3BEAGLE_TSC2007_GPIO); -+ irq_set_irq_type(gpio_to_irq(OMAP3BEAGLE_TSC2007_GPIO), IRQ_TYPE_EDGE_FALLING); -+} -+#else -+static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = {}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -565,6 +662,10 @@ static int __init omap3_beagle_i2c_init(void) - omap3_pmic_init("twl4030", &beagle_twldata); - - switch (expansion_config.i2c_settings) { -+ case EXPANSION_I2C_7ULCD: -+ omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, -+ ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); -+ break; - case EXPANSION_I2C_ZIPPY: - omap_register_i2c_bus(2, 400, zippy_i2c2_rtc, ARRAY_SIZE(zippy_i2c2_rtc)); - break; -@@ -661,6 +762,18 @@ static int __init expansionboard_setup(char *str) - return 0; - } - -+static int __init expansionboard2_setup(char *str) -+{ -+ if (!machine_is_omap3_beagle()) -+ return 0; -+ -+ if (!str) -+ return -EINVAL; -+ strncpy(expansionboard2_name, str, 16); -+ pr_info("Beagle expansionboard2: %s\n", expansionboard2_name); -+ return 0; -+} -+ - static int __init beagle_opp_init(void) - { - int r = 0; -@@ -726,6 +839,20 @@ static void __init omap3_beagle_init(void) - omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, OMAP_PIN_INPUT); - } - -+ if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) -+ { -+ int r; -+ expansion_config.i2c_settings = EXPANSION_I2C_7ULCD; -+ -+ /* TODO: set lcd_driver_name by command line or device tree */ -+ beagle_config.lcd_driver_name = "tfc_s9700rtwv35tr-01b", -+ lcd_panel.name = beagle_config.lcd_driver_name; -+ -+ r = gpio_request_one(beagle_config.lcd_pwren, GPIOF_OUT_INIT_LOW, "LCD power"); -+ if (r < 0) -+ pr_err("Beagle expansionboard: Unable to get LCD power enable GPIO\n"); -+ } -+ - if (gpio_is_valid(beagle_config.mmc1_gpio_wp)) - omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); - -@@ -795,6 +922,14 @@ static void __init omap3_beagle_init(void) - gpio_export(162, 1); - } - -+ if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) -+ { -+ #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2007) -+ pr_info("Beagle expansionboard: initializing touchscreen: tsc2007\n"); -+ omap3beagle_tsc2007_init(); -+ #endif -+ } -+ - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - -@@ -816,6 +951,7 @@ static void __init omap3_beagle_init(void) - } - - early_param("buddy", expansionboard_setup); -+early_param("buddy2", expansionboard2_setup); - - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ -diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c -index 97363f7..614031f 100644 ---- a/drivers/video/omap2/displays/panel-generic-dpi.c -+++ b/drivers/video/omap2/displays/panel-generic-dpi.c -@@ -515,6 +515,33 @@ static struct panel_config generic_dpi_panels[] = { - }, - .name = "primeview_pd104slf", - }, -+ -+ /* ThreeFiveCorp S9700RTWV35TR-01B */ -+ { -+ { -+ .x_res = 800, -+ .y_res = 480, -+ -+ .pixel_clock = 30000, -+ -+ .hsw = 49, -+ .hfp = 41, -+ .hbp = 40, -+ -+ .vsw = 4, -+ .vfp = 14, -+ .vbp = 29, -+ -+ .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, -+ .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, -+ .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, -+ .de_level = OMAPDSS_SIG_ACTIVE_HIGH, -+ .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, -+ }, -+ .power_on_delay = 50, -+ .power_off_delay = 100, -+ .name = "tfc_s9700rtwv35tr-01b", -+ }, - }; - - struct panel_drv_data { --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0006-Beagle-expansion-add-wifi.patch b/src/patches/kernel/omap/beagle/expansion/0006-Beagle-expansion-add-wifi.patch deleted file mode 100644 index 88d48af..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0006-Beagle-expansion-add-wifi.patch +++ /dev/null @@ -1,180 +0,0 @@ -From f78cd93d767cd75969c4661723cfce46071e5b1b Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:48:52 -0600 -Subject: [PATCH 06/10] Beagle: expansion: add wifi - -build fixes from Pantelis Antoniou panto@antoniou-consulting.com - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 119 +++++++++++++++++++++++++++++++ - 1 file changed, 119 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index a8de97e..2322d6c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -221,6 +221,73 @@ static struct { - .i2c_settings = EXPANSION_I2C_NONE, - }; - -+#if IS_ENABLED(CONFIG_WL12XX) -+#include <linux/regulator/fixed.h> -+#include <linux/ti_wilink_st.h> -+#include <linux/wl12xx.h> -+ -+#define OMAP_BEAGLE_WLAN_EN_GPIO (139) -+#define OMAP_BEAGLE_BT_EN_GPIO (138) -+#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) -+#define OMAP_BEAGLE_FM_EN_BT_WU (136) -+ -+struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { -+ .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */ -+}; -+ -+static struct ti_st_plat_data wilink_platform_data = { -+ .nshutdown_gpio = OMAP_BEAGLE_BT_EN_GPIO, -+ .dev_name = "/dev/ttyO1", -+ .flow_cntrl = 1, -+ .baud_rate = 3000000, -+ .chip_enable = NULL, -+ .suspend = NULL, -+ .resume = NULL, -+}; -+ -+static struct platform_device wl12xx_device = { -+ .name = "kim", -+ .id = -1, -+ .dev.platform_data = &wilink_platform_data, -+}; -+ -+static struct platform_device btwilink_device = { -+ .name = "btwilink", -+ .id = -1, -+}; -+#endif -+ -+static struct regulator_consumer_supply beagle_vmmc2_supply = -+ REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); -+ -+static struct regulator_init_data beagle_vmmc2 = { -+ .constraints = { -+ .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vmmc2_supply, -+}; -+ -+#if IS_ENABLED(CONFIG_WL12XX) -+static struct fixed_voltage_config beagle_vwlan = { -+ .supply_name = "vwl1271", -+ .microvolts = 1800000, /* 1.8V */ -+ .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, -+ .startup_delay = 70000, /* 70ms */ -+ .enable_high = 1, -+ .enabled_at_boot = 0, -+ .init_data = &beagle_vmmc2, -+}; -+ -+static struct platform_device omap_vwlan_device = { -+ .name = "reg-fixed-voltage", -+ .id = 1, -+ .dev = { -+ .platform_data = &beagle_vwlan, -+ }, -+}; -+#endif -+ - //rcn-ee: this is just a fake regulator, the zippy hardware provides 3.3/1.8 with jumper.. - static struct fixed_voltage_config beagle_vzippy = { - .supply_name = "vzippy", -@@ -459,6 +526,26 @@ static struct omap2_hsmmc_info mmc_zippy[] = { - }, - {} /* Terminator */ - }; -+ -+static struct omap2_hsmmc_info mmcbbt[] = { -+ { -+ .mmc = 1, -+ .caps = MMC_CAP_4_BIT_DATA, -+ .gpio_wp = -EINVAL, -+ .deferred = true, -+ }, -+ { -+ .name = "wl1271", -+ .mmc = 2, -+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, -+ .gpio_wp = -EINVAL, -+ .gpio_cd = -EINVAL, -+ .ocr_mask = MMC_VDD_165_195, -+ .nonremovable = true, -+ }, -+ {} /* Terminator */ -+}; -+ - static struct regulator_consumer_supply beagle_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), - }; -@@ -490,6 +577,13 @@ static int beagle_twl_gpio_setup(struct device *dev, - int r; - - switch (expansion_config.mmc_settings) { -+ case EXPANSION_MMC_WIFI: -+ mmcbbt[0].gpio_wp = beagle_config.mmc1_gpio_wp; -+ /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -+ mmcbbt[0].gpio_cd = gpio + 0; -+ -+ omap_hsmmc_late_init(mmcbbt); -+ break; - case EXPANSION_MMC_ZIPPY: - mmc_zippy[0].gpio_wp = beagle_config.mmc1_gpio_wp; - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ -@@ -839,6 +933,13 @@ static void __init omap3_beagle_init(void) - omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, OMAP_PIN_INPUT); - } - -+ if (!strcmp(expansionboard_name, "bbtoys-wifi")) -+ { -+ #if IS_ENABLED(CONFIG_WL12XX) -+ expansion_config.mmc_settings = EXPANSION_MMC_WIFI; -+ #endif -+ } -+ - if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) - { - int r; -@@ -857,6 +958,10 @@ static void __init omap3_beagle_init(void) - omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); - - switch (expansion_config.mmc_settings) { -+ case EXPANSION_MMC_WIFI: -+ mmcbbt[0].caps = beagle_config.mmc_caps; -+ omap_hsmmc_init(mmcbbt); -+ break; - case EXPANSION_MMC_ZIPPY: - mmc_zippy[0].caps = beagle_config.mmc_caps; - omap_hsmmc_init(mmc_zippy); -@@ -922,6 +1027,20 @@ static void __init omap3_beagle_init(void) - gpio_export(162, 1); - } - -+ if (!strcmp(expansionboard_name, "bbtoys-wifi")) -+ { -+ #if IS_ENABLED(CONFIG_WL12XX) -+ omap_beagle_wlan_data.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -+ pr_err("error setting wl12xx data\n"); -+ pr_info("Beagle expansionboard: registering wl12xx bt platform device\n"); -+ platform_device_register(&wl12xx_device); -+ platform_device_register(&btwilink_device); -+ pr_info("Beagle expansionboard: registering wl12xx wifi platform device\n"); -+ platform_device_register(&omap_vwlan_device); -+ #endif -+ } -+ - if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) - { - #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2007) --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0007-Beagle-expansion-add-beaglefpga.patch b/src/patches/kernel/omap/beagle/expansion/0007-Beagle-expansion-add-beaglefpga.patch deleted file mode 100644 index a006c7b..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0007-Beagle-expansion-add-beaglefpga.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 0c361e9db10f9ec3598bf062a605a451857ee06e Mon Sep 17 00:00:00 2001 -From: Bas van der Doorn bas@doornvd.com -Date: Tue, 11 Dec 2012 06:52:22 -0600 -Subject: [PATCH 07/10] Beagle: expansion: add beaglefpga - -Added SPI dev and McBSP 3 mux when FPGA is detected - -Signed-off-by: Bas van der Doorn bas@doornvd.com -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 76 +++++++++++++++++++++++++++++++ - 1 file changed, 76 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 2322d6c..c257f3c 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -44,6 +44,7 @@ - #include <asm/mach/arch.h> - #include <asm/mach/map.h> - #include <asm/mach/flash.h> -+#include <linux/spi/spi.h> - - #include <video/omapdss.h> - #include <video/omap-panel-data.h> -@@ -916,6 +917,68 @@ static int __init beagle_opp_init(void) - } - omap_device_initcall(beagle_opp_init); - -+static void __init omap3_beagle_config_mcspi3_mux(void) -+{ -+ /* NOTE: Clock pins need to be in input mode */ -+ omap_mux_init_signal("sdmmc2_clk.mcspi3_clk", OMAP_PIN_INPUT); -+ omap_mux_init_signal("sdmmc2_cmd.mcspi3_simo", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("sdmmc2_dat0.mcspi3_somi", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("sdmmc2_dat2.mcspi3_cs1", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("sdmmc2_dat3.mcspi3_cs0", OMAP_PIN_OUTPUT); -+} -+ -+static void __init omap3_beagle_config_mcspi4_mux(void) -+{ -+ /* NOTE: Clock pins need to be in input mode */ -+ omap_mux_init_signal("mcbsp1_clkr.mcspi4_clk", OMAP_PIN_INPUT); -+ omap_mux_init_signal("mcbsp1_dx.mcspi4_simo", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("mcbsp1_dr.mcspi4_somi", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("mcbsp1_fsx.mcspi4_cs0", OMAP_PIN_OUTPUT); -+} -+ -+static void __init omap3_beagle_config_mcbsp3_mux(void) -+{ -+ omap_mux_init_signal("mcbsp3_fsx.uart2_rx", OMAP_PIN_INPUT); -+ omap_mux_init_signal("uart2_cts.mcbsp3_dx", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("uart2_rts.mcbsp3_dr", OMAP_PIN_INPUT); -+ /* NOTE: Clock pins need to be in input mode */ -+ omap_mux_init_signal("uart2_tx.mcbsp3_clkx", OMAP_PIN_INPUT); -+} -+ -+static void __init omap3_beagle_config_fpga_mux(void) -+{ -+ omap3_beagle_config_mcbsp3_mux(); -+ omap3_beagle_config_mcspi3_mux(); -+ omap3_beagle_config_mcspi4_mux(); -+} -+ -+static struct spi_board_info beagle_mcspi_board_info[] = { -+ /* spi 3.0 */ -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 3, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ }, -+ /* spi 3.1 */ -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 3, -+ .chip_select = 1, -+ .mode = SPI_MODE_1, -+ }, -+ /* spi 4.0 */ -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 4, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ }, -+}; -+ - static void __init omap3_beagle_init(void) - { - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); -@@ -1041,6 +1104,19 @@ static void __init omap3_beagle_init(void) - #endif - } - -+ if (!strcmp(expansionboard_name, "beaglefpga")) -+ { -+ #if IS_ENABLED(CONFIG_SPI_SPIDEV) -+ pr_info("Beagle expansionboard: enabling SPIdev for McSPI3/4 and pin muxing for McBSP3 slave mode\n"); -+ -+ /* FPGA pin settings configure McSPI 3, McSPI 4 and McBSP 3 */ -+ omap3_beagle_config_fpga_mux(); -+ -+ /* register McSPI 3 and McSPI 4 for FPGA programming and control */ -+ spi_register_board_info(beagle_mcspi_board_info, ARRAY_SIZE(beagle_mcspi_board_info)); -+ #endif -+ } -+ - if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) - { - #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2007) --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0008-Beagle-expansion-add-spidev.patch b/src/patches/kernel/omap/beagle/expansion/0008-Beagle-expansion-add-spidev.patch deleted file mode 100644 index 23cc525..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0008-Beagle-expansion-add-spidev.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5258354e6e4d0b55334099868668a166d967c1d2 Mon Sep 17 00:00:00 2001 -From: Russell Hay russell.hay@gmail.com -Date: Tue, 11 Dec 2012 06:53:58 -0600 -Subject: [PATCH 08/10] Beagle: expansion: add spidev - -Signed-off-by: Russell Hay russell.hay@gmail.com -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index c257f3c..3e0313ee 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -1117,6 +1117,16 @@ static void __init omap3_beagle_init(void) - #endif - } - -+ if (!strcmp(expansionboard_name, "spidev")) -+ { -+ #if IS_ENABLED(CONFIG_SPI_SPIDEV) -+ pr_info("Beagle expansionboard: registering spidev\n"); -+ omap3_beagle_config_mcspi3_mux(); -+ omap3_beagle_config_mcspi4_mux(); -+ spi_register_board_info(beagle_mcspi_board_info, ARRAY_SIZE(beagle_mcspi_board_info)); -+ #endif -+ } -+ - if (!strcmp(expansionboard2_name, "bbtoys-ulcd")) - { - #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2007) --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0009-Beagle-expansion-add-Aptina-li5m03-camera.patch b/src/patches/kernel/omap/beagle/expansion/0009-Beagle-expansion-add-Aptina-li5m03-camera.patch deleted file mode 100644 index 28d2d4a..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0009-Beagle-expansion-add-Aptina-li5m03-camera.patch +++ /dev/null @@ -1,217 +0,0 @@ -From cc6ced0a1cbaea65a507ec3fe543a5b98d760d23 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 06:58:15 -0600 -Subject: [PATCH 09/10] Beagle: expansion: add Aptina li5m03 camera - -Based on: -https://github.com/Aptina/BeagleBoard-xM/blob/master/tools/0266-Adding-MT9P0... - -And on Max Galemin's patch -https://github.com/MaxGalemin/buildroot/blob/master/board/beagleboard/xm/ker... - -And Koen Kooi Previous work's -https://github.com/beagleboard/kernel/blob/beagleboard-3.2/patches/camera/00... - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 142 +++++++++++++++++++++++++++++++ - 1 file changed, 142 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 3e0313ee..4fb5eae 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -201,6 +201,7 @@ static void __init omap3_beagle_init_rev(void) - - char expansionboard_name[16]; - char expansionboard2_name[16]; -+char camera_name[16]; - - enum { - EXPANSION_MMC_NONE = 0, -@@ -555,6 +556,14 @@ static struct regulator_consumer_supply beagle_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), - }; - -+static struct regulator_consumer_supply beagle_vaux3_supply = { -+ .supply = "cam_1v8", -+}; -+ -+static struct regulator_consumer_supply beagle_vaux4_supply = { -+ .supply = "cam_2v8", -+}; -+ - static struct gpio_led gpio_leds[]; - - /* PHY's VCC regulator might be added later, so flag that we need it */ -@@ -677,11 +686,43 @@ static struct regulator_init_data beagle_vsim = { - .consumer_supplies = beagle_vsim_supply, - }; - -+/* VAUX3 for CAM_1V8 */ -+static struct regulator_init_data beagle_vaux3 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux3_supply, -+}; -+ -+/* VAUX4 for CAM_2V8 */ -+static struct regulator_init_data beagle_vaux4 = { -+ .constraints = { -+ .min_uV = 1800000, -+ .max_uV = 1800000, -+ .apply_uV = true, -+ .valid_modes_mask = REGULATOR_MODE_NORMAL -+ | REGULATOR_MODE_STANDBY, -+ .valid_ops_mask = REGULATOR_CHANGE_MODE -+ | REGULATOR_CHANGE_STATUS, -+ }, -+ .num_consumer_supplies = 1, -+ .consumer_supplies = &beagle_vaux4_supply, -+}; -+ - static struct twl4030_platform_data beagle_twldata = { - /* platform_data for children goes here */ - .gpio = &beagle_gpio_data, - .vmmc1 = &beagle_vmmc1, - .vsim = &beagle_vsim, -+ .vaux3 = &beagle_vaux3, -+ .vaux4 = &beagle_vaux4, - }; - - static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { -@@ -745,6 +786,61 @@ static void __init omap3beagle_tsc2007_init(void) - static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = {}; - #endif - -+#if IS_ENABLED(CONFIG_VIDEO_MT9P031) -+/* needed for: omap3_beagle_late_initcall */ -+#include "devices.h" -+#include <media/omap3isp.h> -+#include <media/mt9p031.h> -+/* needed for: v4l2_dev_to_isp_device */ -+#include "../../../drivers/media/platform/omap3isp/isp.h" -+ -+#define MT9P031_RESET_GPIO 98 -+#define MT9P031_EXT_FREQ 21000000 -+#define MT9P031_TARGET_FREQ 48000000 -+ -+#define MT9P031_I2C_ADDR 0x48 -+#define MT9P031_I2C_BUS 2 -+ -+static struct regulator *reg_1v8, *reg_2v8; -+ -+static struct mt9p031_platform_data beagle_mt9p031_platform_data = { -+ .reset = MT9P031_RESET_GPIO, -+ .ext_freq = MT9P031_EXT_FREQ, -+ .target_freq = MT9P031_TARGET_FREQ, -+}; -+ -+static struct i2c_board_info mt9p031_camera_i2c_device = { -+ I2C_BOARD_INFO("mt9p031", MT9P031_I2C_ADDR), -+ .platform_data = &beagle_mt9p031_platform_data, -+}; -+ -+static struct isp_subdev_i2c_board_info mt9p031_camera_subdevs[] = { -+ { -+ .board_info = &mt9p031_camera_i2c_device, -+ .i2c_adapter_id = MT9P031_I2C_BUS, -+ }, -+ { NULL, 0, }, -+}; -+ -+static struct isp_v4l2_subdevs_group beagle_camera_subdevs[] = { -+ { -+ .subdevs = mt9p031_camera_subdevs, -+ .interface = ISP_INTERFACE_PARALLEL, -+ .bus = { -+ .parallel = { -+ .data_lane_shift = 0, -+ .clk_pol = 1, -+ } -+ }, -+ }, -+ { }, -+}; -+ -+static struct isp_platform_data beagle_isp_platform_data = { -+ .subdevs = beagle_camera_subdevs, -+}; -+#endif -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -869,6 +965,18 @@ static int __init expansionboard2_setup(char *str) - return 0; - } - -+static int __init camera_setup(char *str) -+{ -+ if (!machine_is_omap3_beagle()) -+ return 0; -+ -+ if (!str) -+ return -EINVAL; -+ strncpy(camera_name, str, 16); -+ pr_info("Beagle camera: %s\n", camera_name); -+ return 0; -+} -+ - static int __init beagle_opp_init(void) - { - int r = 0; -@@ -1155,8 +1263,42 @@ static void __init omap3_beagle_init(void) - pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup)); - } - -+static int __init omap3_beagle_late_initcall(void) -+{ -+ if (!machine_is_omap3_beagle()) -+ return 0; -+ -+ if (!cpu_is_omap3630()) -+ return 0; -+ -+#if IS_ENABLED(CONFIG_VIDEO_MT9P031) -+ if ((!strcmp(camera_name, "lbcm5m1")) || (!strcmp(camera_name, "li5m03"))) -+ { -+ pr_info("Beagle camera: MT9P031 init\n"); -+ -+ reg_1v8 = regulator_get(NULL, "cam_1v8"); -+ if (IS_ERR(reg_1v8)) -+ pr_err("%s: cannot get cam_1v8 regulator\n", __func__); -+ else -+ regulator_enable(reg_1v8); -+ -+ reg_2v8 = regulator_get(NULL, "cam_2v8"); -+ if (IS_ERR(reg_2v8)) -+ pr_err("%s: cannot get cam_2v8 regulator\n", __func__); -+ else -+ regulator_enable(reg_2v8); -+ -+ omap3_init_camera(&beagle_isp_platform_data); -+ } -+#endif -+ return 0; -+} -+ - early_param("buddy", expansionboard_setup); - early_param("buddy2", expansionboard2_setup); -+early_param("camera", camera_setup); -+ -+late_initcall(omap3_beagle_late_initcall); - - MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") - /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0010-Beagle-expansion-add-LSR-COM6L-Adapter-Board.patch b/src/patches/kernel/omap/beagle/expansion/0010-Beagle-expansion-add-LSR-COM6L-Adapter-Board.patch deleted file mode 100644 index 04a3656..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0010-Beagle-expansion-add-LSR-COM6L-Adapter-Board.patch +++ /dev/null @@ -1,123 +0,0 @@ -From f2e2294733d926e627dcda6425f58611b185c7fc Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 11 Dec 2012 07:02:40 -0600 -Subject: [PATCH 10/10] Beagle: expansion: add LSR COM6L Adapter Board - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 60 ++++++++++++++++++++++++++++--- - 1 file changed, 55 insertions(+), 5 deletions(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 0ac1b49..5a7e7b5 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -202,6 +202,7 @@ static void __init omap3_beagle_init_rev(void) - char expansionboard_name[16]; - char expansionboard2_name[16]; - char camera_name[16]; -+char wl12xx_name[16]; - - enum { - EXPANSION_MMC_NONE = 0, -@@ -237,6 +238,10 @@ struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { - .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */ - }; - -+struct wl12xx_platform_data omap_beagle_wlan_data_26mhz __initdata = { -+ .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */ -+}; -+ - static struct ti_st_plat_data wilink_platform_data = { - .nshutdown_gpio = OMAP_BEAGLE_BT_EN_GPIO, - .dev_name = "/dev/ttyO1", -@@ -987,6 +992,18 @@ static int __init camera_setup(char *str) - return 0; - } - -+static int __init wl12xx_setup(char *str) -+{ -+ if (!machine_is_omap3_beagle()) -+ return 0; -+ -+ if (!str) -+ return -EINVAL; -+ strncpy(wl12xx_name, str, 16); -+ pr_info("Beagle wl12xx clk: %s\n", wl12xx_name); -+ return 0; -+} -+ - static int __init beagle_opp_init(void) - { - int r = 0; -@@ -1114,9 +1131,29 @@ static void __init omap3_beagle_init(void) - omap_mux_init_gpio(OMAP3BEAGLE_GPIO_ZIPPY_MMC_CD, OMAP_PIN_INPUT); - } - -- if (!strcmp(expansionboard_name, "bbtoys-wifi")) -+ if ((!strcmp(expansionboard_name, "bbtoys-wifi")) || (!strcmp(expansionboard_name, "lsr-com6l-adpt"))) - { - #if IS_ENABLED(CONFIG_WL12XX) -+ pr_info("Beagle expansion: wl12xx: setting up gpio pinmux\n"); -+ -+ omap_mux_init_gpio(OMAP_BEAGLE_FM_EN_BT_WU, OMAP_PIN_OUTPUT); -+ omap_mux_init_gpio(OMAP_BEAGLE_BT_EN_GPIO, OMAP_PIN_OUTPUT); -+ omap_mux_init_gpio(OMAP_BEAGLE_WLAN_EN_GPIO, OMAP_PIN_OUTPUT); -+ -+ omap_mux_init_gpio(OMAP_BEAGLE_WLAN_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP); -+ -+ /* WLAN SDIO: MMC2 CLK */ -+ omap_mux_init_signal("sdmmc2_clk.sdmmc2_clk", OMAP_PIN_INPUT_PULLUP); -+ -+ /* WLAN SDIO: MMC2 CMD */ -+ omap_mux_init_signal("sdmmc2_cmd.sdmmc2_cmd", OMAP_PIN_INPUT_PULLUP); -+ -+ /* WLAN SDIO: MMC2 DAT[0-3] */ -+ omap_mux_init_signal("sdmmc2_dat0.sdmmc2_dat0", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("sdmmc2_dat1.sdmmc2_dat1", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("sdmmc2_dat2.sdmmc2_dat2", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("sdmmc2_dat3.sdmmc2_dat3", OMAP_PIN_INPUT_PULLUP); -+ - expansion_config.mmc_settings = EXPANSION_MMC_WIFI; - #endif - } -@@ -1208,12 +1245,24 @@ static void __init omap3_beagle_init(void) - gpio_export(162, 1); - } - -- if (!strcmp(expansionboard_name, "bbtoys-wifi")) -+ if ((!strcmp(expansionboard_name, "bbtoys-wifi")) || (!strcmp(expansionboard_name, "lsr-com6l-adpt"))) - { - #if IS_ENABLED(CONFIG_WL12XX) -- omap_beagle_wlan_data.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); -- if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -- pr_err("error setting wl12xx data\n"); -+ pr_info("Beagle expansionboard: initializing wl12xx platform\n"); -+ -+ if (!strcmp(wl12xx_name, "wl12xx_26mhz")) { -+ pr_info("wl12xx: 26Mhz reference clock (TiWi5)\n"); -+ omap_beagle_wlan_data_26mhz.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data_26mhz)) -+ pr_err("error setting wl12xx data\n"); -+ } else { -+ pr_info("wl12xx: 38.4Mhz reference clock (TiWi2/TiWi-BLE)\n"); -+ pr_info("wl12xx: for (TiWi5) support pass kernel [wl12xx_clk=wl12xx_26mhz]\n"); -+ omap_beagle_wlan_data.irq = gpio_to_irq(OMAP_BEAGLE_WLAN_IRQ_GPIO); -+ if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) -+ pr_err("error setting wl12xx data\n"); -+ } -+ - pr_info("Beagle expansionboard: registering wl12xx bt platform device\n"); - platform_device_register(&wl12xx_device); - platform_device_register(&btwilink_device); -@@ -1307,6 +1356,7 @@ static int __init omap3_beagle_late_initcall(void) - early_param("buddy", expansionboard_setup); - early_param("buddy2", expansionboard2_setup); - early_param("camera", camera_setup); -+early_param("wl12xx_clk", wl12xx_setup); - - late_initcall(omap3_beagle_late_initcall); - --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0011-Beagle-expansion-LSR-COM6L-Adapter-Board-also-initia.patch b/src/patches/kernel/omap/beagle/expansion/0011-Beagle-expansion-LSR-COM6L-Adapter-Board-also-initia.patch deleted file mode 100644 index a8edc77..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0011-Beagle-expansion-LSR-COM6L-Adapter-Board-also-initia.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 89eb49ac0268518799984fa035ac3fea0ae758ec Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Mon, 21 Jan 2013 11:52:20 -0600 -Subject: [PATCH 11/11] Beagle: expansion: LSR COM6L Adapter Board also - initialize the 24c256 eeprom - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 5a7e7b5..6797488 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -39,6 +39,7 @@ - #include <linux/regulator/machine.h> - #include <linux/regulator/fixed.h> - #include <linux/i2c/twl.h> -+#include <linux/i2c/at24.h> - - #include <asm/mach-types.h> - #include <asm/mach/arch.h> -@@ -214,6 +215,7 @@ enum { - EXPANSION_I2C_NONE = 0, - EXPANSION_I2C_ZIPPY, - EXPANSION_I2C_7ULCD, -+ EXPANSION_I2C_COM6L, - }; - - static struct { -@@ -856,6 +858,20 @@ static struct isp_platform_data beagle_isp_platform_data = { - }; - #endif - -+static struct at24_platform_data beagle_at24_eeprom_info = { -+ .byte_len = (256*1024) / 8, -+ .page_size = 64, -+ .flags = AT24_FLAG_ADDR16, -+ .context = (void *)NULL, -+}; -+ -+static struct i2c_board_info __initdata com6l_adpt_eeprom[] = { -+ { -+ I2C_BOARD_INFO("24c256", 0x50), -+ .platform_data = &beagle_at24_eeprom_info, -+ }, -+}; -+ - static int __init omap3_beagle_i2c_init(void) - { - omap3_pmic_get_config(&beagle_twldata, -@@ -875,6 +891,9 @@ static int __init omap3_beagle_i2c_init(void) - case EXPANSION_I2C_ZIPPY: - omap_register_i2c_bus(2, 400, zippy_i2c2_rtc, ARRAY_SIZE(zippy_i2c2_rtc)); - break; -+ case EXPANSION_I2C_COM6L: -+ omap_register_i2c_bus(2, 400, com6l_adpt_eeprom, ARRAY_SIZE(com6l_adpt_eeprom)); -+ break; - default: - omap_register_i2c_bus(2, 400, NULL, 0); - } -@@ -1155,6 +1174,7 @@ static void __init omap3_beagle_init(void) - omap_mux_init_signal("sdmmc2_dat3.sdmmc2_dat3", OMAP_PIN_INPUT_PULLUP); - - expansion_config.mmc_settings = EXPANSION_MMC_WIFI; -+ expansion_config.i2c_settings = EXPANSION_I2C_COM6L; - #endif - } - --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/beagle/expansion/0011-WIP-Beagle-expansion-extend-spidev-to-uart2.patch b/src/patches/kernel/omap/beagle/expansion/0011-WIP-Beagle-expansion-extend-spidev-to-uart2.patch deleted file mode 100644 index 2039e4a..0000000 --- a/src/patches/kernel/omap/beagle/expansion/0011-WIP-Beagle-expansion-extend-spidev-to-uart2.patch +++ /dev/null @@ -1,43 +0,0 @@ -From d78f1a01cc52ebad5d59edad772f2b403bfe67bd Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Wed, 12 Dec 2012 11:34:29 -0600 -Subject: [PATCH 11/11] WIP: Beagle: expansion: extend spidev to uart2 - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap3beagle.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c -index 4fa880a..e4cfd5f 100644 ---- a/arch/arm/mach-omap2/board-omap3beagle.c -+++ b/arch/arm/mach-omap2/board-omap3beagle.c -@@ -1162,6 +1162,16 @@ static void __init omap3_beagle_init(void) - if (gpio_is_valid(beagle_config.dvi_pd_gpio)) - omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT); - omap_display_init(&beagle_dss_data); -+ -+ if (!strcmp(expansionboard_name, "spidev")) -+ { -+ pr_info("Beagle expansion: spidev: enable uart2/ttyO1\n"); -+ omap_mux_init_signal("uart2_tx.uart2_tx", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("uart2_rts.uart2_rts", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("uart2_cts.uart2_cts", OMAP_PIN_INPUT); -+ omap_mux_init_signal("mcbsp3_fsx.uart2_rx", OMAP_PIN_INPUT); -+ } -+ - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); -@@ -1248,7 +1258,7 @@ static void __init omap3_beagle_init(void) - - if (!strcmp(expansionboard_name, "spidev")) - { -- pr_info("Beagle expansionboard: registering spidev\n"); -+ pr_info("Beagle expansionboard: spidev: enabling spi3/spi4\n"); - omap3_beagle_config_mcspi3_mux(); - omap3_beagle_config_mcspi4_mux(); - spi_register_board_info(beagle_mcspi_board_info, ARRAY_SIZE(beagle_mcspi_board_info)); --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0001-panda-fix-wl12xx-regulator.patch b/src/patches/kernel/omap/panda/0001-panda-fix-wl12xx-regulator.patch deleted file mode 100644 index de0e84b..0000000 --- a/src/patches/kernel/omap/panda/0001-panda-fix-wl12xx-regulator.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a3abd1593e381deb4b1f358a55069988996eeae4 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 2 Aug 2011 21:55:34 -0500 -Subject: [PATCH 1/2] panda: fix wl12xx regulator - -pulled from: http://elinux.org/Panda_How_to_kernel_3_0_rel - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/twl-common.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index e49b40b..0fd1a70 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -360,6 +360,7 @@ static struct regulator_init_data omap4_vusb_idata = { - static struct regulator_init_data omap4_clk32kg_idata = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, - }, - }; - --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/panda/0002-ti-st-st-kim-fixing-firmware-path.patch b/src/patches/kernel/omap/panda/0002-ti-st-st-kim-fixing-firmware-path.patch deleted file mode 100644 index 694bc36..0000000 --- a/src/patches/kernel/omap/panda/0002-ti-st-st-kim-fixing-firmware-path.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 8de5d11f076ee25182df805ab78e0823ce4dd2be Mon Sep 17 00:00:00 2001 -From: Ricardo Salveti de Araujo ricardo.salveti@linaro.org -Date: Tue, 25 Oct 2011 10:06:39 +0200 -Subject: [PATCH 2/2] ti-st/st-kim: fixing firmware path - -Signed-off-by: Ricardo Salveti de Araujo ricardo.salveti@linaro.org -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/misc/ti-st/st_kim.c | 4 ++-- - 1 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/misc/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c -index 9ff942a..f673464 100644 ---- a/drivers/misc/ti-st/st_kim.c -+++ b/drivers/misc/ti-st/st_kim.c -@@ -244,7 +244,7 @@ static long read_local_version(struct kim_data_s *kim_gdata, char *bts_scr_name) - if (version & 0x8000) - maj_ver |= 0x0008; - -- sprintf(bts_scr_name, "TIInit_%d.%d.%d.bts", chip, maj_ver, min_ver); -+ sprintf(bts_scr_name, "ti-connectivity/TIInit_%d.%d.%d.bts", chip, maj_ver, min_ver); - - /* to be accessed later via sysfs entry */ - kim_gdata->version.full = version; -@@ -287,7 +287,7 @@ static long download_firmware(struct kim_data_s *kim_gdata) - long len = 0; - unsigned char *ptr = NULL; - unsigned char *action_ptr = NULL; -- unsigned char bts_scr_name[30] = { 0 }; /* 30 char long bts scr name? */ -+ unsigned char bts_scr_name[50] = { 0 }; /* 50 char long bts scr name? */ - int wr_room_space; - int cmd_size; - unsigned long timeout; --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/panda/0003-Panda-expansion-add-spidev.patch b/src/patches/kernel/omap/panda/0003-Panda-expansion-add-spidev.patch deleted file mode 100644 index 9369852..0000000 --- a/src/patches/kernel/omap/panda/0003-Panda-expansion-add-spidev.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 3304f2feba4999fc1013911f0cf0d9acc33a0117 Mon Sep 17 00:00:00 2001 -From: Adrien Ferre ferre.adrien@gmail.com -Date: Mon, 25 Mar 2013 12:00:38 -0500 -Subject: [PATCH 3/3] Panda: expansion: add spidev - -I've made a patch to enable spidev on pandaboards using buddy=spidev just like for beagle. - -https://github.com/RobertCNelson/stable-kernel/issues/22 - -Signed-off-by: Adrien Ferre ferre.adrien@gmail.com -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap4panda.c | 43 ++++++++++++++++++++++++++++++++ - 1 file changed, 43 insertions(+) - -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index 1e2c75e..3563f86 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -22,6 +22,7 @@ - #include <linux/clk.h> - #include <linux/io.h> - #include <linux/leds.h> -+#include <linux/irq.h> - #include <linux/gpio.h> - #include <linux/usb/otg.h> - #include <linux/i2c/twl.h> -@@ -35,6 +36,7 @@ - #include <linux/wl12xx.h> - #include <linux/irqchip/arm-gic.h> - #include <linux/platform_data/omap-abe-twl6040.h> -+#include <linux/spi/spi.h> - - #include <asm/mach-types.h> - #include <asm/mach/arch.h> -@@ -54,6 +56,8 @@ - #define GPIO_WIFI_PMENA 43 - #define GPIO_WIFI_IRQ 53 - -+char expboard_name[16]; -+ - /* wl127x BT, FM, GPS connectivity chip */ - static struct ti_st_plat_data wilink_platform_data = { - .nshutdown_gpio = 46, -@@ -99,6 +103,25 @@ static struct platform_device leds_gpio = { - }, - }; - -+static struct spi_board_info panda_mcspi_board_info[] = { -+ /* spi 1.0 */ -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 1, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ }, -+ /* spi 1.1 */ -+ { -+ .modalias = "spidev", -+ .max_speed_hz = 48000000, //48 Mbps -+ .bus_num = 1, -+ .chip_select = 1, -+ .mode = SPI_MODE_1, -+ }, -+}; -+ - static struct omap_abe_twl6040_data panda_abe_audio_data = { - /* Audio out */ - .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT, -@@ -161,6 +184,18 @@ static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - }; - -+static int __init expansionboard_setup(char *str) -+{ -+ if (!machine_is_omap4_panda()) -+ return 0; -+ -+ if (!str) -+ return -EINVAL; -+ strncpy(expboard_name, str, 16); -+ pr_info("Panda expansionboard: %s\n", expboard_name); -+ return 0; -+} -+ - static void __init omap4_ehci_init(void) - { - int ret; -@@ -435,11 +470,19 @@ static void __init omap4_panda_init(void) - omap_sdrc_init(NULL, NULL); - omap4_twl6030_hsmmc_init(mmc); - omap4_ehci_init(); -+ if (!strcmp(expboard_name, "spidev")) { -+ #if IS_ENABLED(CONFIG_SPI_SPIDEV) -+ pr_info("Panda expansionboard: spidev: enabling spi3/spi4\n"); -+ spi_register_board_info(panda_mcspi_board_info, ARRAY_SIZE(panda_mcspi_board_info)); -+ #endif -+ } - usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto"); - usb_musb_init(&musb_board_data); - omap4_panda_display_init(); - } - -+early_param("buddy", expansionboard_setup); -+ - MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") - /* Maintainer: David Anders - Texas Instruments Inc */ - .atag_offset = 0x100, --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0004-HACK-PandaES-disable-cpufreq-so-board-will-boot.patch b/src/patches/kernel/omap/panda/0004-HACK-PandaES-disable-cpufreq-so-board-will-boot.patch deleted file mode 100644 index 12194e4..0000000 --- a/src/patches/kernel/omap/panda/0004-HACK-PandaES-disable-cpufreq-so-board-will-boot.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 359104632fa556e3c5c78e4016c2585896225716 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Mon, 1 Apr 2013 12:17:50 -0500 -Subject: [PATCH 4/4] HACK: PandaES: disable cpufreq so board will boot - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/cpufreq/omap-cpufreq.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c -index 0279d18..0a8ac09 100644 ---- a/drivers/cpufreq/omap-cpufreq.c -+++ b/drivers/cpufreq/omap-cpufreq.c -@@ -31,6 +31,8 @@ - #include <asm/smp_plat.h> - #include <asm/cpu.h> - -+#include "../../arch/arm/mach-omap2/soc.h" -+ - /* OPP tolerance in percentage */ - #define OPP_TOLERANCE 4 - -@@ -246,6 +248,11 @@ static struct cpufreq_driver omap_driver = { - - static int omap_cpufreq_probe(struct platform_device *pdev) - { -+ if (cpu_is_omap446x()) { -+ pr_err("%s: unsupported Silicon?\n", __func__); -+ return -EINVAL; -+ } -+ - mpu_dev = get_cpu_device(0); - if (!mpu_dev) { - pr_warning("%s: unable to get the mpu device\n", __func__); --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0006-ARM-hw_breakpoint-Enable-debug-powerdown-only-if-sys.patch b/src/patches/kernel/omap/panda/0006-ARM-hw_breakpoint-Enable-debug-powerdown-only-if-sys.patch deleted file mode 100644 index fa64934..0000000 --- a/src/patches/kernel/omap/panda/0006-ARM-hw_breakpoint-Enable-debug-powerdown-only-if-sys.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 76c1d8cdfa0967b04ca8168a77bb101d4ea71150 Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar santosh.shilimkar@ti.com -Date: Mon, 18 Mar 2013 06:51:30 +0000 -Subject: [PATCH 6/6] ARM: hw_breakpoint: Enable debug powerdown only if - system supports 'has_ossr' - -On Friday 15 March 2013 10:30 AM, Will Deacon wrote: -> On Thu, Mar 14, 2013 at 01:08:00PM +0530, Santosh Shilimkar wrote: ->> Will, -> -> Hi guys, -> -> I'm out of the office at the moment and have really terrible connectivity, -> so I can't do too much until next week. However, I don't think adding the -> has_ossr check is the right fix for this problem. -> ->> On Wednesday 13 March 2013 05:59 PM, Lokesh Vutla wrote: ->>> Hi Dietmar, ->>> On Wednesday 13 March 2013 05:35 PM, Dietmar Eggemann wrote: ->>>> On 13/03/13 06:52, Lokesh Vutla wrote: ->>>>> Commit {9a6eb31 ARM: hw_breakpoint: Debug powerdown support for ->>>>> self-hosted ->>>>> debug} introduces debug powerdown support for self-hosted debug. ->>>>> While merging the patch 'has_ossr' check was removed which ->>>>> was needed for hardwares which doesn't support self-hosted debug. ->>>>> Pandaboard (A9) is one such hardware and Dietmar's orginial ->>>>> patch did mention this issue. ->>>>> Without that check on Panda with CPUIDLE enabled, a flood of ->>>>> below messages thrown. ->>>>> ->>>>> [ 3.597930] hw-breakpoint: CPU 0 failed to disable vector catch ->>>>> [ 3.597991] hw-breakpoint: CPU 1 failed to disable vector catch -> -> Ok, so this means that we've taken an undefined instruction exception while -> trying to reset the debug registers on the PM_EXIT path. Now, the code there -> deals with CPUs that don't have the save/restore registers just fine, so -> that shouldn't have anything to do with this problem, particularly if the -> bit that is tripping us up is related to clearing vector catch. -> -Agree. - -> Furthermore, I was under the impression that hw_breakpoint did actually -> work on panda, which implies that a cold boot *does* manage to reset the -> registers (can you please confirm this by looking in your dmesg during -> boot?). In that case, it seems as though a PM cycle is powering down a -> bunch of debug logic that was powered up during boot, and then we trip over -> because we can't access the register bank. -> -Actually it seems to be without PM. Thanks to analysis from Lokesh, the issue -can be seen even with just suspend or cpu hotplug. So cold boot as such is -fine. - -> The proper solution to this problem requires us to establish exactly what is -> turning off the debug registers, and then having an OMAP PM notifier to -> enable it again. Assuming this has always been the case, I expect hardware -> debug across PM fails silently with older kernels. -> -This has been always the case it seems with CPU power cycle. -After the CPU is power cycled, 'DBGAUTHSTATUS' reads '0xaa' rather -than '0xaf' which means 'DBGEN = 0' and hence code fails to enable -monitor mode. This happens on both secure and GP devices and it can not -be patched since the secure code is ROM'ed. We didn't notice so far -because hw_breakpoint support was not default enabled on OMAP till the -multi-platform build. - ->> I was also wondering whether we should just warn once rather ->> than continuous warnings in the notifier. Patch is end of the ->> email. -> -> Could do, but I'd like to see a fix for the real issue before we simply hide -> the warnings :) -> -Agree here too. As evident above, the feature won't work on OMAP4 -devices with PM and hence some solution is needed. - -What you think of below ? - ->From d74b4264f6a5967b0f7ada96aad77ab0ac30dbed Mon Sep 17 00:00:00 2001 -From: Santosh Shilimkar santosh.shilimkar@ti.com -Date: Mon, 18 Mar 2013 11:59:04 +0530 -Subject: [PATCH] ARM: hw_breakpoints: Check for CPU debug availability before - enabling it - -CPU debug features like hardware break, watchpoints can be used only when -the debug mode is enabled and available for non-secure mode. - -Hence check 'DBGAUTHSTATUS.DBGEN' before proceeding to enable the -features. - -Thanks to Will for pointers and Lokesh for the analysis of the issue on -OMAP4 where after a CPU power cycle, debug mode gets disabled. - -Cc: Will Deacon Will.Deacon@arm.com - -Tested-by: Lokesh Vutla lokeshvutla@ti.com -Signed-off-by: Santosh Shilimkar santosh.shilimkar@ti.com ---- - arch/arm/kernel/hw_breakpoint.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c -index 96093b7..683a7cf 100644 ---- a/arch/arm/kernel/hw_breakpoint.c -+++ b/arch/arm/kernel/hw_breakpoint.c -@@ -930,6 +930,14 @@ static void reset_ctrl_regs(void *unused) - int i, raw_num_brps, err = 0, cpu = smp_processor_id(); - u32 val; - -+ /* Check if we have access to CPU debug features */ -+ ARM_DBG_READ(c7, c14, 6, val); -+ if ((val & 0x1) == 0) { -+ pr_warn_once("CPU %d debug is unavailable\n", cpu); -+ cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu)); -+ return; -+ } -+ - /* - * v7 debug contains save and restore registers so that debug state - * can be maintained across low-power modes without leaving the debug --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0007-Revert-regulator-twl-Remove-TWL6030_FIXED_RESOURCE.patch b/src/patches/kernel/omap/panda/0007-Revert-regulator-twl-Remove-TWL6030_FIXED_RESOURCE.patch deleted file mode 100644 index 0799d83..0000000 --- a/src/patches/kernel/omap/panda/0007-Revert-regulator-twl-Remove-TWL6030_FIXED_RESOURCE.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 42d8b74383b670412107c943efd2fec46aa04158 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Sat, 1 Jun 2013 16:32:46 -0500 -Subject: [PATCH 07/10] Revert "regulator: twl: Remove TWL6030_FIXED_RESOURCE" - -This reverts commit d1924519fe1dada0cfd9a228bf2ff1ea15840c84. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/regulator/twl-regulator.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c -index fb6e67d..7ce7edf 100644 ---- a/drivers/regulator/twl-regulator.c -+++ b/drivers/regulator/twl-regulator.c -@@ -933,6 +933,19 @@ static const struct twlreg_info TWLFIXED_INFO_##label = { \ - }, \ - } - -+#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \ -+static struct twlreg_info TWLRES_INFO_##label = { \ -+ .base = offset, \ -+ .desc = { \ -+ .name = #label, \ -+ .id = TWL6030_REG_##label, \ -+ .ops = &twl6030_fixed_resource, \ -+ .type = REGULATOR_VOLTAGE, \ -+ .owner = THIS_MODULE, \ -+ .enable_time = turnon_delay, \ -+ }, \ -+ } -+ - #define TWL6025_ADJUSTABLE_SMPS(label, offset) \ - static const struct twlreg_info TWLSMPS_INFO_##label = { \ - .base = offset, \ --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0008-Revert-regulator-twl-Remove-another-unused-variable-.patch b/src/patches/kernel/omap/panda/0008-Revert-regulator-twl-Remove-another-unused-variable-.patch deleted file mode 100644 index 4abbd05..0000000 --- a/src/patches/kernel/omap/panda/0008-Revert-regulator-twl-Remove-another-unused-variable-.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 48e4598f1b8e9dd486d551b76c5f5021d0dc946d Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Sat, 1 Jun 2013 16:32:48 -0500 -Subject: [PATCH 08/10] Revert "regulator: twl: Remove another unused variable - warning" - -This reverts commit 029dd3cefa46ecdd879f9b4e2df3bdf4371cc22c. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/regulator/twl-regulator.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c -index 7ce7edf..124a2f2 100644 ---- a/drivers/regulator/twl-regulator.c -+++ b/drivers/regulator/twl-regulator.c -@@ -633,6 +633,13 @@ static struct regulator_ops twl6030fixed_ops = { - .get_status = twl6030reg_get_status, - }; - -+static struct regulator_ops twl6030_fixed_resource = { -+ .enable = twl6030reg_enable, -+ .disable = twl6030reg_disable, -+ .is_enabled = twl6030reg_is_enabled, -+ .get_status = twl6030reg_get_status, -+}; -+ - /* - * SMPS status and control - */ --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0009-Revert-regulator-twl-Remove-references-to-the-twl403.patch b/src/patches/kernel/omap/panda/0009-Revert-regulator-twl-Remove-references-to-the-twl403.patch deleted file mode 100644 index 27bc6ea..0000000 --- a/src/patches/kernel/omap/panda/0009-Revert-regulator-twl-Remove-references-to-the-twl403.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 76cc643690032d9789bbd17c9a3542cae4b0603e Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Sat, 1 Jun 2013 16:32:51 -0500 -Subject: [PATCH 09/10] Revert "regulator: twl: Remove references to the - twl4030 regulator" - -This reverts commit e76ab829cc2d8b6350a3f01fffb208df4d7d8c1b. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/regulator/twl-regulator.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c -index 124a2f2..5a18317 100644 ---- a/drivers/regulator/twl-regulator.c -+++ b/drivers/regulator/twl-regulator.c -@@ -1021,6 +1021,7 @@ TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0); - TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0); - TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0); - TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0); -+TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0); - TWL6025_ADJUSTABLE_SMPS(SMPS3, 0x34); - TWL6025_ADJUSTABLE_SMPS(SMPS4, 0x10); - TWL6025_ADJUSTABLE_SMPS(VIO, 0x16); --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0010-Revert-regulator-twl-Remove-references-to-32kHz-cloc.patch b/src/patches/kernel/omap/panda/0010-Revert-regulator-twl-Remove-references-to-32kHz-cloc.patch deleted file mode 100644 index ad18b29..0000000 --- a/src/patches/kernel/omap/panda/0010-Revert-regulator-twl-Remove-references-to-32kHz-cloc.patch +++ /dev/null @@ -1,49 +0,0 @@ -From ffdb3fad79cf70dcc943764f075215d6525435be Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Sat, 1 Jun 2013 16:32:54 -0500 -Subject: [PATCH 10/10] Revert "regulator: twl: Remove references to 32kHz - clock from DT bindings" - -This reverts commit 0e8e5c34cf1a8beaaf0a6a05c053592693bf8cb4. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - Documentation/devicetree/bindings/regulator/twl-regulator.txt | 1 + - drivers/regulator/twl-regulator.c | 2 ++ - 2 files changed, 3 insertions(+) - -diff --git a/Documentation/devicetree/bindings/regulator/twl-regulator.txt b/Documentation/devicetree/bindings/regulator/twl-regulator.txt -index 658749b..0c3395d 100644 ---- a/Documentation/devicetree/bindings/regulator/twl-regulator.txt -+++ b/Documentation/devicetree/bindings/regulator/twl-regulator.txt -@@ -15,6 +15,7 @@ For twl6030 regulators/LDOs - - "ti,twl6030-vusb" for VUSB LDO - - "ti,twl6030-v1v8" for V1V8 LDO - - "ti,twl6030-v2v1" for V2V1 LDO -+ - "ti,twl6030-clk32kg" for CLK32KG RESOURCE - - "ti,twl6030-vdd1" for VDD1 SMPS - - "ti,twl6030-vdd2" for VDD2 SMPS - - "ti,twl6030-vdd3" for VDD3 SMPS -diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c -index 5a18317..40f27bb 100644 ---- a/drivers/regulator/twl-regulator.c -+++ b/drivers/regulator/twl-regulator.c -@@ -1054,6 +1054,7 @@ static u8 twl_get_smps_mult(void) - #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) - #define TWL6025_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6025, label) - #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) -+#define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label) - #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) - - static const struct of_device_id twl_of_match[] = { -@@ -1101,6 +1102,7 @@ static const struct of_device_id twl_of_match[] = { - TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB), - TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8), - TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1), -+ TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG), - TWLSMPS_OF_MATCH("ti,twl6025-smps3", SMPS3), - TWLSMPS_OF_MATCH("ti,twl6025-smps4", SMPS4), - TWLSMPS_OF_MATCH("ti,twl6025-vio", VIO), --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/panda/0011-panda-spidev-setup-pinmux.patch b/src/patches/kernel/omap/panda/0011-panda-spidev-setup-pinmux.patch deleted file mode 100644 index da9fcda..0000000 --- a/src/patches/kernel/omap/panda/0011-panda-spidev-setup-pinmux.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 9f5066a898b77f2fe2b1f0946bb6afebe3d08f6d Mon Sep 17 00:00:00 2001 -From: Yann yann.wanwanscappel@free.fr -Date: Sat, 8 Jun 2013 13:06:37 -0500 -Subject: [PATCH 7/7] panda: spidev: setup pinmux - -It works fine on my board, I've been able to perform data transfers using the spidev_test program provided in kernel documentation -(shortcut between SIMO and SOMI to perform an hardware loopback). I also checked that CS0 and CS1 and CLK are properly driven using my scope. - -The clock is strangely configured as input, but it is also the case for omap3 beagle board, so I guess this is fine. - -Signed-off-by: Yann yann.wanwanscappel@free.fr -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - arch/arm/mach-omap2/board-omap4panda.c | 13 ++++++++++++- - 1 file changed, 12 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c -index 3563f86..10bb576 100644 ---- a/arch/arm/mach-omap2/board-omap4panda.c -+++ b/arch/arm/mach-omap2/board-omap4panda.c -@@ -103,6 +103,16 @@ static struct platform_device leds_gpio = { - }, - }; - -+static void __init omap4_panda_config_mcspi1_mux(void) -+{ -+ /* NOTE: Clock pins need to be in input mode */ -+ omap_mux_init_signal("mcspi1_clk", OMAP_PIN_INPUT); -+ omap_mux_init_signal("mcspi1_simo", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("mcspi1_somi", OMAP_PIN_INPUT_PULLUP); -+ omap_mux_init_signal("mcspi1_cs0", OMAP_PIN_OUTPUT); -+ omap_mux_init_signal("mcspi1_cs1", OMAP_PIN_OUTPUT); -+} -+ - static struct spi_board_info panda_mcspi_board_info[] = { - /* spi 1.0 */ - { -@@ -472,7 +482,8 @@ static void __init omap4_panda_init(void) - omap4_ehci_init(); - if (!strcmp(expboard_name, "spidev")) { - #if IS_ENABLED(CONFIG_SPI_SPIDEV) -- pr_info("Panda expansionboard: spidev: enabling spi3/spi4\n"); -+ pr_info("Panda expansionboard: spidev: enabling spi1.0 and spi1.1\n"); -+ omap4_panda_config_mcspi1_mux(); - spi_register_board_info(panda_mcspi_board_info, ARRAY_SIZE(panda_mcspi_board_info)); - #endif - } --- -1.7.10.4 - diff --git a/src/patches/kernel/omap/sakoman/0001-OMAP-DSS2-add-bootarg-for-selecting-svideo.patch b/src/patches/kernel/omap/sakoman/0001-OMAP-DSS2-add-bootarg-for-selecting-svideo.patch deleted file mode 100644 index 8e8a08e..0000000 --- a/src/patches/kernel/omap/sakoman/0001-OMAP-DSS2-add-bootarg-for-selecting-svideo.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 6bce72b21600d9f52ae60d5bf80d00152eb75b50 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman steve@sakoman.com -Date: Tue, 19 Jan 2010 21:19:15 -0800 -Subject: [PATCH 1/2] OMAP: DSS2: add bootarg for selecting svideo - - OMAP: DSS2: add bootarg for selecting svideo or composite for tv output - also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ - drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- - 2 files changed, 31 insertions(+), 1 deletions(-) - -diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c -index 56efa3b..d46f7f8 100644 ---- a/drivers/video/omap2/dss/venc.c -+++ b/drivers/video/omap2/dss/venc.c -@@ -86,6 +86,11 @@ - #define VENC_OUTPUT_TEST 0xC8 - #define VENC_DAC_B__DAC_C 0xC8 - -+static char *tv_connection; -+ -+module_param_named(tvcable, tv_connection, charp, 0); -+MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); -+ - struct venc_config { - u32 f_control; - u32 vidout_ctrl; -@@ -465,6 +470,23 @@ static int venc_power_on(struct omap_dss_device *dssdev) - if (r) - goto err2; - -+ /* Allow the TV output to be overriden */ -+ if (tv_connection) { -+ if (strcmp(tv_connection, "svideo") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is svideo.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO; -+ } else if (strcmp(tv_connection, "composite") == 0) { -+ printk(KERN_INFO -+ "omapdss: tv output is composite.\n"); -+ dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE; -+ } else { -+ printk(KERN_INFO -+ "omapdss: unsupported output type'%s'.\n", -+ tv_connection); -+ } -+ } -+ - return 0; - - err2: -diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c -index bc225e4..34d6679 100644 ---- a/drivers/video/omap2/omapfb/omapfb-main.c -+++ b/drivers/video/omap2/omapfb/omapfb-main.c -@@ -2032,7 +2032,15 @@ static int omapfb_mode_to_timings(const char *mode_str, - int r; - - #ifdef CONFIG_OMAP2_DSS_VENC -- if (strcmp(mode_str, "pal") == 0) { -+ if (strcmp(mode_str, "pal-16") == 0) { -+ *timings = omap_dss_pal_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "ntsc-16") == 0) { -+ *timings = omap_dss_ntsc_timings; -+ *bpp = 16; -+ return 0; -+ } else if (strcmp(mode_str, "pal") == 0) { - *timings = omap_dss_pal_timings; - *bpp = 24; - return 0; --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/sakoman/0002-video-add-timings-for-hd720.patch b/src/patches/kernel/omap/sakoman/0002-video-add-timings-for-hd720.patch deleted file mode 100644 index 1b936f5..0000000 --- a/src/patches/kernel/omap/sakoman/0002-video-add-timings-for-hd720.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 747de06d5cc69b2407684ba0455fff5c1d6af797 Mon Sep 17 00:00:00 2001 -From: Steve Sakoman steve@sakoman.com -Date: Sat, 19 Dec 2009 06:52:43 -0800 -Subject: [PATCH 2/2] video: add timings for hd720 - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - drivers/video/modedb.c | 4 ++++ - 1 files changed, 4 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c -index a9a907c..5b686de 100644 ---- a/drivers/video/modedb.c -+++ b/drivers/video/modedb.c -@@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { - { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, - FB_VMODE_NONINTERLACED }, - -+ /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ -+ { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, -+ FB_VMODE_NONINTERLACED }, -+ - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, - FB_VMODE_INTERLACED }, --- -1.7.7.6 - diff --git a/src/patches/kernel/omap/sgx/0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch b/src/patches/kernel/omap/sgx/0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch deleted file mode 100644 index 1ca1e70..0000000 --- a/src/patches/kernel/omap/sgx/0001-arm-Export-cache-flush-management-symbols-when-MULTI.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 29885f2f3d700341d322274db6ad085e601c0994 Mon Sep 17 00:00:00 2001 -From: Pantelis Antoniou panto@antoniou-consulting.com -Date: Fri, 4 Jan 2013 00:32:33 +0200 -Subject: [PATCH 3/3] arm: Export cache flush management symbols when - !MULTI_CACHE - -When compiling a kernel without CONFIG_MULTI_CACHE enabled the -dma access functions end up not being exported. Fix it. - -Signed-off-by: Pantelis Antoniou panto@antoniou-consulting.com ---- - arch/arm/kernel/setup.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c -index da1d1aa..dcb678c 100644 ---- a/arch/arm/kernel/setup.c -+++ b/arch/arm/kernel/setup.c -@@ -923,3 +923,12 @@ const struct seq_operations cpuinfo_op = { - .stop = c_stop, - .show = c_show - }; -+ -+/* export the cache management functions */ -+#ifndef MULTI_CACHE -+ -+EXPORT_SYMBOL(__glue(_CACHE,_dma_map_area)); -+EXPORT_SYMBOL(__glue(_CACHE,_dma_unmap_area)); -+EXPORT_SYMBOL(__glue(_CACHE,_dma_flush_range)); -+ -+#endif --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/dts/0001-imx6qdl-wandboard-dts-backport.patch b/src/patches/kernel/wandboard/dts/0001-imx6qdl-wandboard-dts-backport.patch deleted file mode 100644 index e1c6bea..0000000 --- a/src/patches/kernel/wandboard/dts/0001-imx6qdl-wandboard-dts-backport.patch +++ /dev/null @@ -1,6354 +0,0 @@ -commit a97d4c27dd2eef64af9e5d778d05a8915cba6822 -Author: Stefan Schantl stefan.schantl@ipfire.org -Date: Mon Nov 18 21:34:31 2013 +0100 - - Backport dts for imx6qdl. - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index f0895c5..a3d2869 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -120,7 +120,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ - imx6q-sabreauto.dtb \ - imx6q-sabrelite.dtb \ - imx6q-sabresd.dtb \ -- imx6q-sbc6x.dtb -+ imx6q-sbc6x.dtb \ -+ imx6q-wandboard.dtb - dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ - imx23-olinuxino.dtb \ - imx23-stmp378x_devb.dtb \ -diff --git a/arch/arm/boot/dts/imx6dl-pinfunc.h b/arch/arm/boot/dts/imx6dl-pinfunc.h -index 9aab950..b81a7a4 100644 ---- a/arch/arm/boot/dts/imx6dl-pinfunc.h -+++ b/arch/arm/boot/dts/imx6dl-pinfunc.h -@@ -14,1072 +14,1076 @@ - * The pin function ID is a tuple of - * <mux_reg conf_reg input_reg mux_mode input_val> - */ --#define MX6DL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT11__UART1_RX_DATA 0x050 0x364 0x8fc 0x3 0x1 --#define MX6DL_PAD_CSI0_DAT11__UART1_TX_DATA 0x050 0x364 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT11__GPIO5_IO29 0x050 0x364 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT11__ARM_TRACE08 0x050 0x364 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x054 0x368 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT12__EIM_DATA08 0x054 0x368 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT12__UART4_TX_DATA 0x054 0x368 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT12__UART4_RX_DATA 0x054 0x368 0x914 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT12__GPIO5_IO30 0x054 0x368 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT12__ARM_TRACE09 0x054 0x368 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x058 0x36c 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT13__EIM_DATA09 0x058 0x36c 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT13__UART4_RX_DATA 0x058 0x36c 0x914 0x3 0x1 --#define MX6DL_PAD_CSI0_DAT13__UART4_TX_DATA 0x058 0x36c 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT13__GPIO5_IO31 0x058 0x36c 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT13__ARM_TRACE10 0x058 0x36c 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x05c 0x370 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT14__EIM_DATA10 0x05c 0x370 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT14__UART5_TX_DATA 0x05c 0x370 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT14__UART5_RX_DATA 0x05c 0x370 0x91c 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT14__GPIO6_IO00 0x05c 0x370 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT14__ARM_TRACE11 0x05c 0x370 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x060 0x374 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT15__EIM_DATA11 0x060 0x374 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT15__UART5_RX_DATA 0x060 0x374 0x91c 0x3 0x1 --#define MX6DL_PAD_CSI0_DAT15__UART5_TX_DATA 0x060 0x374 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT15__GPIO6_IO01 0x060 0x374 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT15__ARM_TRACE12 0x060 0x374 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT16__EIM_DATA12 0x064 0x378 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT16__UART4_RTS_B 0x064 0x378 0x910 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT16__UART4_CTS_B 0x064 0x378 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT16__GPIO6_IO02 0x064 0x378 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT16__ARM_TRACE13 0x064 0x378 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT17__EIM_DATA13 0x068 0x37c 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT17__UART4_CTS_B 0x068 0x37c 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT17__UART4_RTS_B 0x068 0x37c 0x910 0x3 0x1 --#define MX6DL_PAD_CSI0_DAT17__GPIO6_IO03 0x068 0x37c 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT17__ARM_TRACE14 0x068 0x37c 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x06c 0x380 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT18__EIM_DATA14 0x06c 0x380 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT18__UART5_RTS_B 0x06c 0x380 0x918 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT18__UART5_CTS_B 0x06c 0x380 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT18__GPIO6_IO04 0x06c 0x380 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT18__ARM_TRACE15 0x06c 0x380 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x070 0x384 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT19__EIM_DATA15 0x070 0x384 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT19__UART5_CTS_B 0x070 0x384 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT19__UART5_RTS_B 0x070 0x384 0x918 0x3 0x1 --#define MX6DL_PAD_CSI0_DAT19__GPIO6_IO05 0x070 0x384 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x074 0x388 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT4__EIM_DATA02 0x074 0x388 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x074 0x388 0x7d8 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT4__KEY_COL5 0x074 0x388 0x8c0 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT4__AUD3_TXC 0x074 0x388 0x000 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT4__GPIO5_IO22 0x074 0x388 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT4__ARM_TRACE01 0x074 0x388 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x078 0x38c 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT5__EIM_DATA03 0x078 0x38c 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x078 0x38c 0x7e0 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT5__KEY_ROW5 0x078 0x38c 0x8cc 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT5__AUD3_TXD 0x078 0x38c 0x000 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT5__GPIO5_IO23 0x078 0x38c 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT5__ARM_TRACE02 0x078 0x38c 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x07c 0x390 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT6__EIM_DATA04 0x07c 0x390 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT6__ECSPI1_MISO 0x07c 0x390 0x7dc 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT6__KEY_COL6 0x07c 0x390 0x8c4 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT6__AUD3_TXFS 0x07c 0x390 0x000 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT6__GPIO5_IO24 0x07c 0x390 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT6__ARM_TRACE03 0x07c 0x390 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x080 0x394 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT7__EIM_DATA05 0x080 0x394 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT7__ECSPI1_SS0 0x080 0x394 0x7e4 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT7__KEY_ROW6 0x080 0x394 0x8d0 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT7__AUD3_RXD 0x080 0x394 0x000 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT7__GPIO5_IO25 0x080 0x394 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT7__ARM_TRACE04 0x080 0x394 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x084 0x398 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT8__EIM_DATA06 0x084 0x398 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x084 0x398 0x7f4 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT8__KEY_COL7 0x084 0x398 0x8c8 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT8__I2C1_SDA 0x084 0x398 0x86c 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT8__GPIO5_IO26 0x084 0x398 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT8__ARM_TRACE05 0x084 0x398 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x088 0x39c 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DAT9__EIM_DATA07 0x088 0x39c 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x088 0x39c 0x7fc 0x2 0x0 --#define MX6DL_PAD_CSI0_DAT9__KEY_ROW7 0x088 0x39c 0x8d4 0x3 0x0 --#define MX6DL_PAD_CSI0_DAT9__I2C1_SCL 0x088 0x39c 0x868 0x4 0x0 --#define MX6DL_PAD_CSI0_DAT9__GPIO5_IO27 0x088 0x39c 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DAT9__ARM_TRACE06 0x088 0x39c 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x08c 0x3a0 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_DATA_EN__EIM_DATA00 0x08c 0x3a0 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x08c 0x3a0 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x08c 0x3a0 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x090 0x3a4 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_MCLK__CCM_CLKO1 0x090 0x3a4 0x000 0x3 0x0 --#define MX6DL_PAD_CSI0_MCLK__GPIO5_IO19 0x090 0x3a4 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x090 0x3a4 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x094 0x3a8 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x094 0x3a8 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x094 0x3a8 0x000 0x7 0x0 --#define MX6DL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x098 0x3ac 0x000 0x0 0x0 --#define MX6DL_PAD_CSI0_VSYNC__EIM_DATA01 0x098 0x3ac 0x000 0x1 0x0 --#define MX6DL_PAD_CSI0_VSYNC__GPIO5_IO21 0x098 0x3ac 0x000 0x5 0x0 --#define MX6DL_PAD_CSI0_VSYNC__ARM_TRACE00 0x098 0x3ac 0x000 0x7 0x0 --#define MX6DL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x09c 0x3b0 0x000 0x0 0x0 --#define MX6DL_PAD_DI0_DISP_CLK__LCD_CLK 0x09c 0x3b0 0x000 0x1 0x0 --#define MX6DL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x09c 0x3b0 0x000 0x5 0x0 --#define MX6DL_PAD_DI0_DISP_CLK__LCD_WR_RWN 0x09c 0x3b0 0x000 0x8 0x0 --#define MX6DL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x0a0 0x3b4 0x000 0x0 0x0 --#define MX6DL_PAD_DI0_PIN15__LCD_ENABLE 0x0a0 0x3b4 0x000 0x1 0x0 --#define MX6DL_PAD_DI0_PIN15__AUD6_TXC 0x0a0 0x3b4 0x000 0x2 0x0 --#define MX6DL_PAD_DI0_PIN15__GPIO4_IO17 0x0a0 0x3b4 0x000 0x5 0x0 --#define MX6DL_PAD_DI0_PIN15__LCD_RD_E 0x0a0 0x3b4 0x000 0x8 0x0 --#define MX6DL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x0a4 0x3b8 0x000 0x0 0x0 --#define MX6DL_PAD_DI0_PIN2__LCD_HSYNC 0x0a4 0x3b8 0x8d8 0x1 0x0 --#define MX6DL_PAD_DI0_PIN2__AUD6_TXD 0x0a4 0x3b8 0x000 0x2 0x0 --#define MX6DL_PAD_DI0_PIN2__GPIO4_IO18 0x0a4 0x3b8 0x000 0x5 0x0 --#define MX6DL_PAD_DI0_PIN2__LCD_RS 0x0a4 0x3b8 0x000 0x8 0x0 --#define MX6DL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x0a8 0x3bc 0x000 0x0 0x0 --#define MX6DL_PAD_DI0_PIN3__LCD_VSYNC 0x0a8 0x3bc 0x000 0x1 0x0 --#define MX6DL_PAD_DI0_PIN3__AUD6_TXFS 0x0a8 0x3bc 0x000 0x2 0x0 --#define MX6DL_PAD_DI0_PIN3__GPIO4_IO19 0x0a8 0x3bc 0x000 0x5 0x0 --#define MX6DL_PAD_DI0_PIN3__LCD_CS 0x0a8 0x3bc 0x000 0x8 0x0 --#define MX6DL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x0ac 0x3c0 0x000 0x0 0x0 --#define MX6DL_PAD_DI0_PIN4__LCD_BUSY 0x0ac 0x3c0 0x8d8 0x1 0x1 --#define MX6DL_PAD_DI0_PIN4__AUD6_RXD 0x0ac 0x3c0 0x000 0x2 0x0 --#define MX6DL_PAD_DI0_PIN4__SD1_WP 0x0ac 0x3c0 0x92c 0x3 0x0 --#define MX6DL_PAD_DI0_PIN4__GPIO4_IO20 0x0ac 0x3c0 0x000 0x5 0x0 --#define MX6DL_PAD_DI0_PIN4__LCD_RESET 0x0ac 0x3c0 0x000 0x8 0x0 --#define MX6DL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x0b0 0x3c4 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT0__LCD_DATA00 0x0b0 0x3c4 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x0b0 0x3c4 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT0__GPIO4_IO21 0x0b0 0x3c4 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x0b4 0x3c8 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT1__LCD_DATA01 0x0b4 0x3c8 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x0b4 0x3c8 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT1__GPIO4_IO22 0x0b4 0x3c8 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x0b8 0x3cc 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT10__LCD_DATA10 0x0b8 0x3cc 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT10__GPIO4_IO31 0x0b8 0x3cc 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x0bc 0x3d0 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT11__LCD_DATA11 0x0bc 0x3d0 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT11__GPIO5_IO05 0x0bc 0x3d0 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x0c0 0x3d4 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT12__LCD_DATA12 0x0c0 0x3d4 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT12__GPIO5_IO06 0x0c0 0x3d4 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x0c4 0x3d8 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT13__LCD_DATA13 0x0c4 0x3d8 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT13__AUD5_RXFS 0x0c4 0x3d8 0x7bc 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT13__GPIO5_IO07 0x0c4 0x3d8 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x0c8 0x3dc 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT14__LCD_DATA14 0x0c8 0x3dc 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT14__AUD5_RXC 0x0c8 0x3dc 0x7b8 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT14__GPIO5_IO08 0x0c8 0x3dc 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x0cc 0x3e0 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT15__LCD_DATA15 0x0cc 0x3e0 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT15__ECSPI1_SS1 0x0cc 0x3e0 0x7e8 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT15__ECSPI2_SS1 0x0cc 0x3e0 0x804 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT15__GPIO5_IO09 0x0cc 0x3e0 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x0d0 0x3e4 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT16__LCD_DATA16 0x0d0 0x3e4 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x0d0 0x3e4 0x7fc 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT16__AUD5_TXC 0x0d0 0x3e4 0x7c0 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 0x0d0 0x3e4 0x8e8 0x4 0x0 --#define MX6DL_PAD_DISP0_DAT16__GPIO5_IO10 0x0d0 0x3e4 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x0d4 0x3e8 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT17__LCD_DATA17 0x0d4 0x3e8 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT17__ECSPI2_MISO 0x0d4 0x3e8 0x7f8 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT17__AUD5_TXD 0x0d4 0x3e8 0x7b4 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 0x0d4 0x3e8 0x8ec 0x4 0x0 --#define MX6DL_PAD_DISP0_DAT17__GPIO5_IO11 0x0d4 0x3e8 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x0d8 0x3ec 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT18__LCD_DATA18 0x0d8 0x3ec 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT18__ECSPI2_SS0 0x0d8 0x3ec 0x800 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT18__AUD5_TXFS 0x0d8 0x3ec 0x7c4 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT18__AUD4_RXFS 0x0d8 0x3ec 0x7a4 0x4 0x0 --#define MX6DL_PAD_DISP0_DAT18__GPIO5_IO12 0x0d8 0x3ec 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT18__EIM_CS2_B 0x0d8 0x3ec 0x000 0x7 0x0 --#define MX6DL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x0dc 0x3f0 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT19__LCD_DATA19 0x0dc 0x3f0 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x0dc 0x3f0 0x7f4 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT19__AUD5_RXD 0x0dc 0x3f0 0x7b0 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT19__AUD4_RXC 0x0dc 0x3f0 0x7a0 0x4 0x0 --#define MX6DL_PAD_DISP0_DAT19__GPIO5_IO13 0x0dc 0x3f0 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT19__EIM_CS3_B 0x0dc 0x3f0 0x000 0x7 0x0 --#define MX6DL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x0e0 0x3f4 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT2__LCD_DATA02 0x0e0 0x3f4 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT2__ECSPI3_MISO 0x0e0 0x3f4 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT2__GPIO4_IO23 0x0e0 0x3f4 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x0e4 0x3f8 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT20__LCD_DATA20 0x0e4 0x3f8 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT20__ECSPI1_SCLK 0x0e4 0x3f8 0x7d8 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT20__AUD4_TXC 0x0e4 0x3f8 0x7a8 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT20__GPIO5_IO14 0x0e4 0x3f8 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x0e8 0x3fc 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT21__LCD_DATA21 0x0e8 0x3fc 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT21__ECSPI1_MOSI 0x0e8 0x3fc 0x7e0 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT21__AUD4_TXD 0x0e8 0x3fc 0x79c 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT21__GPIO5_IO15 0x0e8 0x3fc 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x0ec 0x400 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT22__LCD_DATA22 0x0ec 0x400 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT22__ECSPI1_MISO 0x0ec 0x400 0x7dc 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT22__AUD4_TXFS 0x0ec 0x400 0x7ac 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT22__GPIO5_IO16 0x0ec 0x400 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x0f0 0x404 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT23__LCD_DATA23 0x0f0 0x404 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT23__ECSPI1_SS0 0x0f0 0x404 0x7e4 0x2 0x1 --#define MX6DL_PAD_DISP0_DAT23__AUD4_RXD 0x0f0 0x404 0x798 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT23__GPIO5_IO17 0x0f0 0x404 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x0f4 0x408 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT3__LCD_DATA03 0x0f4 0x408 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT3__ECSPI3_SS0 0x0f4 0x408 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT3__GPIO4_IO24 0x0f4 0x408 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x0f8 0x40c 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT4__LCD_DATA04 0x0f8 0x40c 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT4__ECSPI3_SS1 0x0f8 0x40c 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT4__GPIO4_IO25 0x0f8 0x40c 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x0fc 0x410 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT5__LCD_DATA05 0x0fc 0x410 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT5__ECSPI3_SS2 0x0fc 0x410 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT5__AUD6_RXFS 0x0fc 0x410 0x000 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT5__GPIO4_IO26 0x0fc 0x410 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100 0x414 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT6__LCD_DATA06 0x100 0x414 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT6__ECSPI3_SS3 0x100 0x414 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT6__AUD6_RXC 0x100 0x414 0x000 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT6__GPIO4_IO27 0x100 0x414 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x104 0x418 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT7__LCD_DATA07 0x104 0x418 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT7__ECSPI3_RDY 0x104 0x418 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT7__GPIO4_IO28 0x104 0x418 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x108 0x41c 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT8__LCD_DATA08 0x108 0x41c 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT8__PWM1_OUT 0x108 0x41c 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT8__WDOG1_B 0x108 0x41c 0x000 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT8__GPIO4_IO29 0x108 0x41c 0x000 0x5 0x0 --#define MX6DL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10c 0x420 0x000 0x0 0x0 --#define MX6DL_PAD_DISP0_DAT9__LCD_DATA09 0x10c 0x420 0x000 0x1 0x0 --#define MX6DL_PAD_DISP0_DAT9__PWM2_OUT 0x10c 0x420 0x000 0x2 0x0 --#define MX6DL_PAD_DISP0_DAT9__WDOG2_B 0x10c 0x420 0x000 0x3 0x0 --#define MX6DL_PAD_DISP0_DAT9__GPIO4_IO30 0x10c 0x420 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A16__EIM_ADDR16 0x110 0x4e0 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x110 0x4e0 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x110 0x4e0 0x8b8 0x2 0x0 --#define MX6DL_PAD_EIM_A16__GPIO2_IO22 0x110 0x4e0 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A16__SRC_BOOT_CFG16 0x110 0x4e0 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A16__EPDC_DATA00 0x110 0x4e0 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A17__EIM_ADDR17 0x114 0x4e4 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x114 0x4e4 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x114 0x4e4 0x890 0x2 0x0 --#define MX6DL_PAD_EIM_A17__GPIO2_IO21 0x114 0x4e4 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A17__SRC_BOOT_CFG17 0x114 0x4e4 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A17__EPDC_PWR_STAT 0x114 0x4e4 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A18__EIM_ADDR18 0x118 0x4e8 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x118 0x4e8 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A18__IPU1_CSI1_DATA13 0x118 0x4e8 0x894 0x2 0x0 --#define MX6DL_PAD_EIM_A18__GPIO2_IO20 0x118 0x4e8 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A18__SRC_BOOT_CFG18 0x118 0x4e8 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A18__EPDC_PWR_CTRL0 0x118 0x4e8 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A19__EIM_ADDR19 0x11c 0x4ec 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x11c 0x4ec 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A19__IPU1_CSI1_DATA14 0x11c 0x4ec 0x898 0x2 0x0 --#define MX6DL_PAD_EIM_A19__GPIO2_IO19 0x11c 0x4ec 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A19__SRC_BOOT_CFG19 0x11c 0x4ec 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A19__EPDC_PWR_CTRL1 0x11c 0x4ec 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A20__EIM_ADDR20 0x120 0x4f0 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x120 0x4f0 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A20__IPU1_CSI1_DATA15 0x120 0x4f0 0x89c 0x2 0x0 --#define MX6DL_PAD_EIM_A20__GPIO2_IO18 0x120 0x4f0 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A20__SRC_BOOT_CFG20 0x120 0x4f0 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A20__EPDC_PWR_CTRL2 0x120 0x4f0 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A21__EIM_ADDR21 0x124 0x4f4 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x124 0x4f4 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A21__IPU1_CSI1_DATA16 0x124 0x4f4 0x8a0 0x2 0x0 --#define MX6DL_PAD_EIM_A21__GPIO2_IO17 0x124 0x4f4 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A21__SRC_BOOT_CFG21 0x124 0x4f4 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A21__EPDC_GDCLK 0x124 0x4f4 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A22__EIM_ADDR22 0x128 0x4f8 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x128 0x4f8 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A22__IPU1_CSI1_DATA17 0x128 0x4f8 0x8a4 0x2 0x0 --#define MX6DL_PAD_EIM_A22__GPIO2_IO16 0x128 0x4f8 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A22__SRC_BOOT_CFG22 0x128 0x4f8 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A22__EPDC_GDSP 0x128 0x4f8 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A23__EIM_ADDR23 0x12c 0x4fc 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x12c 0x4fc 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A23__IPU1_CSI1_DATA18 0x12c 0x4fc 0x8a8 0x2 0x0 --#define MX6DL_PAD_EIM_A23__IPU1_SISG3 0x12c 0x4fc 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_A23__GPIO6_IO06 0x12c 0x4fc 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A23__SRC_BOOT_CFG23 0x12c 0x4fc 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A23__EPDC_GDOE 0x12c 0x4fc 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A24__EIM_ADDR24 0x130 0x500 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x130 0x500 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A24__IPU1_CSI1_DATA19 0x130 0x500 0x8ac 0x2 0x0 --#define MX6DL_PAD_EIM_A24__IPU1_SISG2 0x130 0x500 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_A24__GPIO5_IO04 0x130 0x500 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A24__SRC_BOOT_CFG24 0x130 0x500 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_A24__EPDC_GDRL 0x130 0x500 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A25__EIM_ADDR25 0x134 0x504 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_A25__ECSPI4_SS1 0x134 0x504 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_A25__ECSPI2_RDY 0x134 0x504 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_A25__IPU1_DI1_PIN12 0x134 0x504 0x000 0x3 0x0 --#define MX6DL_PAD_EIM_A25__IPU1_DI0_D1_CS 0x134 0x504 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_A25__GPIO5_IO02 0x134 0x504 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x134 0x504 0x85c 0x6 0x0 --#define MX6DL_PAD_EIM_A25__EPDC_DATA15 0x134 0x504 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_A25__EIM_ACLK_FREERUN 0x134 0x504 0x000 0x9 0x0 --#define MX6DL_PAD_EIM_BCLK__EIM_BCLK 0x138 0x508 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_BCLK__IPU1_DI1_PIN16 0x138 0x508 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_BCLK__GPIO6_IO31 0x138 0x508 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_BCLK__EPDC_SDCE9 0x138 0x508 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_CS0__EIM_CS0_B 0x13c 0x50c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_CS0__IPU1_DI1_PIN05 0x13c 0x50c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 --#define MX6DL_PAD_EIM_CS0__GPIO2_IO23 0x13c 0x50c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_CS0__EPDC_DATA06 0x13c 0x50c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_CS1__EIM_CS1_B 0x140 0x510 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_CS1__IPU1_DI1_PIN06 0x140 0x510 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_CS1__ECSPI2_MOSI 0x140 0x510 0x7fc 0x2 0x2 --#define MX6DL_PAD_EIM_CS1__GPIO2_IO24 0x140 0x510 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_CS1__EPDC_DATA08 0x140 0x510 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D16__EIM_DATA16 0x144 0x514 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D16__ECSPI1_SCLK 0x144 0x514 0x7d8 0x1 0x2 --#define MX6DL_PAD_EIM_D16__IPU1_DI0_PIN05 0x144 0x514 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x144 0x514 0x8a8 0x3 0x1 --#define MX6DL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x144 0x514 0x864 0x4 0x0 --#define MX6DL_PAD_EIM_D16__GPIO3_IO16 0x144 0x514 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D16__I2C2_SDA 0x144 0x514 0x874 0x6 0x0 --#define MX6DL_PAD_EIM_D16__EPDC_DATA10 0x144 0x514 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D17__EIM_DATA17 0x148 0x518 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D17__ECSPI1_MISO 0x148 0x518 0x7dc 0x1 0x2 --#define MX6DL_PAD_EIM_D17__IPU1_DI0_PIN06 0x148 0x518 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D17__IPU1_CSI1_PIXCLK 0x148 0x518 0x8b8 0x3 0x1 --#define MX6DL_PAD_EIM_D17__DCIC1_OUT 0x148 0x518 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D17__GPIO3_IO17 0x148 0x518 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D17__I2C3_SCL 0x148 0x518 0x878 0x6 0x0 --#define MX6DL_PAD_EIM_D17__EPDC_VCOM0 0x148 0x518 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D18__EIM_DATA18 0x14c 0x51c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D18__ECSPI1_MOSI 0x14c 0x51c 0x7e0 0x1 0x2 --#define MX6DL_PAD_EIM_D18__IPU1_DI0_PIN07 0x14c 0x51c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x14c 0x51c 0x8a4 0x3 0x1 --#define MX6DL_PAD_EIM_D18__IPU1_DI1_D0_CS 0x14c 0x51c 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D18__GPIO3_IO18 0x14c 0x51c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D18__I2C3_SDA 0x14c 0x51c 0x87c 0x6 0x0 --#define MX6DL_PAD_EIM_D18__EPDC_VCOM1 0x14c 0x51c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D19__EIM_DATA19 0x150 0x520 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D19__ECSPI1_SS1 0x150 0x520 0x7e8 0x1 0x1 --#define MX6DL_PAD_EIM_D19__IPU1_DI0_PIN08 0x150 0x520 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x150 0x520 0x8a0 0x3 0x1 --#define MX6DL_PAD_EIM_D19__UART1_CTS_B 0x150 0x520 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D19__UART1_RTS_B 0x150 0x520 0x8f8 0x4 0x0 --#define MX6DL_PAD_EIM_D19__GPIO3_IO19 0x150 0x520 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D19__EPIT1_OUT 0x150 0x520 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D19__EPDC_DATA12 0x150 0x520 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D20__EIM_DATA20 0x154 0x524 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D20__ECSPI4_SS0 0x154 0x524 0x808 0x1 0x0 --#define MX6DL_PAD_EIM_D20__IPU1_DI0_PIN16 0x154 0x524 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x154 0x524 0x89c 0x3 0x1 --#define MX6DL_PAD_EIM_D20__UART1_RTS_B 0x154 0x524 0x8f8 0x4 0x1 --#define MX6DL_PAD_EIM_D20__UART1_CTS_B 0x154 0x524 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D20__GPIO3_IO20 0x154 0x524 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D20__EPIT2_OUT 0x154 0x524 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D21__EIM_DATA21 0x158 0x528 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D21__ECSPI4_SCLK 0x158 0x528 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D21__IPU1_DI0_PIN17 0x158 0x528 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D21__IPU1_CSI1_DATA11 0x158 0x528 0x88c 0x3 0x0 --#define MX6DL_PAD_EIM_D21__USB_OTG_OC 0x158 0x528 0x920 0x4 0x0 --#define MX6DL_PAD_EIM_D21__GPIO3_IO21 0x158 0x528 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D21__I2C1_SCL 0x158 0x528 0x868 0x6 0x1 --#define MX6DL_PAD_EIM_D21__SPDIF_IN 0x158 0x528 0x8f0 0x7 0x0 --#define MX6DL_PAD_EIM_D22__EIM_DATA22 0x15c 0x52c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D22__ECSPI4_MISO 0x15c 0x52c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D22__IPU1_DI0_PIN01 0x15c 0x52c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D22__IPU1_CSI1_DATA10 0x15c 0x52c 0x888 0x3 0x0 --#define MX6DL_PAD_EIM_D22__USB_OTG_PWR 0x15c 0x52c 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D22__GPIO3_IO22 0x15c 0x52c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D22__SPDIF_OUT 0x15c 0x52c 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D22__EPDC_SDCE6 0x15c 0x52c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D23__EIM_DATA23 0x160 0x530 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D23__IPU1_DI0_D0_CS 0x160 0x530 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D23__UART3_CTS_B 0x160 0x530 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D23__UART3_RTS_B 0x160 0x530 0x908 0x2 0x0 --#define MX6DL_PAD_EIM_D23__UART1_DCD_B 0x160 0x530 0x000 0x3 0x0 --#define MX6DL_PAD_EIM_D23__IPU1_CSI1_DATA_EN 0x160 0x530 0x8b0 0x4 0x0 --#define MX6DL_PAD_EIM_D23__GPIO3_IO23 0x160 0x530 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D23__IPU1_DI1_PIN02 0x160 0x530 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D23__IPU1_DI1_PIN14 0x160 0x530 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D23__EPDC_DATA11 0x160 0x530 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D24__EIM_DATA24 0x164 0x534 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D24__ECSPI4_SS2 0x164 0x534 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D24__UART3_TX_DATA 0x164 0x534 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D24__UART3_RX_DATA 0x164 0x534 0x90c 0x2 0x0 --#define MX6DL_PAD_EIM_D24__ECSPI1_SS2 0x164 0x534 0x7ec 0x3 0x0 --#define MX6DL_PAD_EIM_D24__ECSPI2_SS2 0x164 0x534 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D24__GPIO3_IO24 0x164 0x534 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D24__AUD5_RXFS 0x164 0x534 0x7bc 0x6 0x1 --#define MX6DL_PAD_EIM_D24__UART1_DTR_B 0x164 0x534 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D24__EPDC_SDCE7 0x164 0x534 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D25__EIM_DATA25 0x168 0x538 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D25__ECSPI4_SS3 0x168 0x538 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D25__UART3_RX_DATA 0x168 0x538 0x90c 0x2 0x1 --#define MX6DL_PAD_EIM_D25__UART3_TX_DATA 0x168 0x538 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D25__ECSPI1_SS3 0x168 0x538 0x7f0 0x3 0x0 --#define MX6DL_PAD_EIM_D25__ECSPI2_SS3 0x168 0x538 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D25__GPIO3_IO25 0x168 0x538 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D25__AUD5_RXC 0x168 0x538 0x7b8 0x6 0x1 --#define MX6DL_PAD_EIM_D25__UART1_DSR_B 0x168 0x538 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D25__EPDC_SDCE8 0x168 0x538 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D26__EIM_DATA26 0x16c 0x53c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D26__IPU1_DI1_PIN11 0x16c 0x53c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D26__IPU1_CSI0_DATA01 0x16c 0x53c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x16c 0x53c 0x898 0x3 0x1 --#define MX6DL_PAD_EIM_D26__UART2_TX_DATA 0x16c 0x53c 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D26__UART2_RX_DATA 0x16c 0x53c 0x904 0x4 0x0 --#define MX6DL_PAD_EIM_D26__GPIO3_IO26 0x16c 0x53c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D26__IPU1_SISG2 0x16c 0x53c 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x16c 0x53c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D26__EPDC_SDOED 0x16c 0x53c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D27__EIM_DATA27 0x170 0x540 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D27__IPU1_DI1_PIN13 0x170 0x540 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D27__IPU1_CSI0_DATA00 0x170 0x540 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x170 0x540 0x894 0x3 0x1 --#define MX6DL_PAD_EIM_D27__UART2_RX_DATA 0x170 0x540 0x904 0x4 0x1 --#define MX6DL_PAD_EIM_D27__UART2_TX_DATA 0x170 0x540 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D27__GPIO3_IO27 0x170 0x540 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D27__IPU1_SISG3 0x170 0x540 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x170 0x540 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D27__EPDC_SDOE 0x170 0x540 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D28__EIM_DATA28 0x174 0x544 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D28__I2C1_SDA 0x174 0x544 0x86c 0x1 0x1 --#define MX6DL_PAD_EIM_D28__ECSPI4_MOSI 0x174 0x544 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D28__IPU1_CSI1_DATA12 0x174 0x544 0x890 0x3 0x1 --#define MX6DL_PAD_EIM_D28__UART2_CTS_B 0x174 0x544 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D28__UART2_RTS_B 0x174 0x544 0x900 0x4 0x0 --#define MX6DL_PAD_EIM_D28__GPIO3_IO28 0x174 0x544 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D28__IPU1_EXT_TRIG 0x174 0x544 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D28__IPU1_DI0_PIN13 0x174 0x544 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D28__EPDC_PWR_CTRL3 0x174 0x544 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D29__EIM_DATA29 0x178 0x548 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D29__IPU1_DI1_PIN15 0x178 0x548 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D29__ECSPI4_SS0 0x178 0x548 0x808 0x2 0x1 --#define MX6DL_PAD_EIM_D29__UART2_RTS_B 0x178 0x548 0x900 0x4 0x1 --#define MX6DL_PAD_EIM_D29__UART2_CTS_B 0x178 0x548 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D29__GPIO3_IO29 0x178 0x548 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x178 0x548 0x8bc 0x6 0x0 --#define MX6DL_PAD_EIM_D29__IPU1_DI0_PIN14 0x178 0x548 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_D29__EPDC_PWR_WAKE 0x178 0x548 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D30__EIM_DATA30 0x17c 0x54c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x17c 0x54c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D30__IPU1_DI0_PIN11 0x17c 0x54c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D30__IPU1_CSI0_DATA03 0x17c 0x54c 0x000 0x3 0x0 --#define MX6DL_PAD_EIM_D30__UART3_CTS_B 0x17c 0x54c 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D30__UART3_RTS_B 0x17c 0x54c 0x908 0x4 0x1 --#define MX6DL_PAD_EIM_D30__GPIO3_IO30 0x17c 0x54c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D30__USB_H1_OC 0x17c 0x54c 0x924 0x6 0x0 --#define MX6DL_PAD_EIM_D30__EPDC_SDOEZ 0x17c 0x54c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D31__EIM_DATA31 0x180 0x550 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x180 0x550 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_D31__IPU1_DI0_PIN12 0x180 0x550 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_D31__IPU1_CSI0_DATA02 0x180 0x550 0x000 0x3 0x0 --#define MX6DL_PAD_EIM_D31__UART3_RTS_B 0x180 0x550 0x908 0x4 0x2 --#define MX6DL_PAD_EIM_D31__UART3_CTS_B 0x180 0x550 0x000 0x4 0x0 --#define MX6DL_PAD_EIM_D31__GPIO3_IO31 0x180 0x550 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_D31__USB_H1_PWR 0x180 0x550 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_D31__EPDC_SDCLK_P 0x180 0x550 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_D31__EIM_ACLK_FREERUN 0x180 0x550 0x000 0x9 0x0 --#define MX6DL_PAD_EIM_DA0__EIM_AD00 0x184 0x554 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x184 0x554 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA0__IPU1_CSI1_DATA09 0x184 0x554 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA0__GPIO3_IO00 0x184 0x554 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA0__SRC_BOOT_CFG00 0x184 0x554 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA0__EPDC_SDCLK_N 0x184 0x554 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA1__EIM_AD01 0x188 0x558 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x188 0x558 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA1__IPU1_CSI1_DATA08 0x188 0x558 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA1__GPIO3_IO01 0x188 0x558 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA1__SRC_BOOT_CFG01 0x188 0x558 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA1__EPDC_SDLE 0x188 0x558 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA10__EIM_AD10 0x18c 0x55c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x18c 0x55c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA10__IPU1_CSI1_DATA_EN 0x18c 0x55c 0x8b0 0x2 0x1 --#define MX6DL_PAD_EIM_DA10__GPIO3_IO10 0x18c 0x55c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA10__SRC_BOOT_CFG10 0x18c 0x55c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA10__EPDC_DATA01 0x18c 0x55c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA11__EIM_AD11 0x190 0x560 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x190 0x560 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA11__IPU1_CSI1_HSYNC 0x190 0x560 0x8b4 0x2 0x0 --#define MX6DL_PAD_EIM_DA11__GPIO3_IO11 0x190 0x560 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA11__SRC_BOOT_CFG11 0x190 0x560 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA11__EPDC_DATA03 0x190 0x560 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA12__EIM_AD12 0x194 0x564 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x194 0x564 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA12__IPU1_CSI1_VSYNC 0x194 0x564 0x8bc 0x2 0x1 --#define MX6DL_PAD_EIM_DA12__GPIO3_IO12 0x194 0x564 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA12__SRC_BOOT_CFG12 0x194 0x564 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA12__EPDC_DATA02 0x194 0x564 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA13__EIM_AD13 0x198 0x568 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA13__IPU1_DI1_D0_CS 0x198 0x568 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA13__GPIO3_IO13 0x198 0x568 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA13__SRC_BOOT_CFG13 0x198 0x568 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA13__EPDC_DATA13 0x198 0x568 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA14__EIM_AD14 0x19c 0x56c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA14__IPU1_DI1_D1_CS 0x19c 0x56c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA14__GPIO3_IO14 0x19c 0x56c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA14__SRC_BOOT_CFG14 0x19c 0x56c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA14__EPDC_DATA14 0x19c 0x56c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA15__EIM_AD15 0x1a0 0x570 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA15__IPU1_DI1_PIN01 0x1a0 0x570 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA15__IPU1_DI1_PIN04 0x1a0 0x570 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA15__GPIO3_IO15 0x1a0 0x570 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA15__SRC_BOOT_CFG15 0x1a0 0x570 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA15__EPDC_DATA09 0x1a0 0x570 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA2__EIM_AD02 0x1a4 0x574 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x1a4 0x574 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA2__IPU1_CSI1_DATA07 0x1a4 0x574 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA2__GPIO3_IO02 0x1a4 0x574 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA2__SRC_BOOT_CFG02 0x1a4 0x574 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA2__EPDC_BDR0 0x1a4 0x574 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA3__EIM_AD03 0x1a8 0x578 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x1a8 0x578 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA3__IPU1_CSI1_DATA06 0x1a8 0x578 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA3__GPIO3_IO03 0x1a8 0x578 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA3__SRC_BOOT_CFG03 0x1a8 0x578 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA3__EPDC_BDR1 0x1a8 0x578 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA4__EIM_AD04 0x1ac 0x57c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x1ac 0x57c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA4__IPU1_CSI1_DATA05 0x1ac 0x57c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA4__GPIO3_IO04 0x1ac 0x57c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA4__SRC_BOOT_CFG04 0x1ac 0x57c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA4__EPDC_SDCE0 0x1ac 0x57c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA5__EIM_AD05 0x1b0 0x580 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x1b0 0x580 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA5__IPU1_CSI1_DATA04 0x1b0 0x580 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA5__GPIO3_IO05 0x1b0 0x580 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA5__SRC_BOOT_CFG05 0x1b0 0x580 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA5__EPDC_SDCE1 0x1b0 0x580 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA6__EIM_AD06 0x1b4 0x584 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x1b4 0x584 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA6__IPU1_CSI1_DATA03 0x1b4 0x584 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA6__GPIO3_IO06 0x1b4 0x584 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA6__SRC_BOOT_CFG06 0x1b4 0x584 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA6__EPDC_SDCE2 0x1b4 0x584 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA7__EIM_AD07 0x1b8 0x588 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x1b8 0x588 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA7__IPU1_CSI1_DATA02 0x1b8 0x588 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA7__GPIO3_IO07 0x1b8 0x588 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA7__SRC_BOOT_CFG07 0x1b8 0x588 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA7__EPDC_SDCE3 0x1b8 0x588 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA8__EIM_AD08 0x1bc 0x58c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x1bc 0x58c 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA8__IPU1_CSI1_DATA01 0x1bc 0x58c 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA8__GPIO3_IO08 0x1bc 0x58c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA8__SRC_BOOT_CFG08 0x1bc 0x58c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA8__EPDC_SDCE4 0x1bc 0x58c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_DA9__EIM_AD09 0x1c0 0x590 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x1c0 0x590 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_DA9__IPU1_CSI1_DATA00 0x1c0 0x590 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_DA9__GPIO3_IO09 0x1c0 0x590 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_DA9__SRC_BOOT_CFG09 0x1c0 0x590 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_DA9__EPDC_SDCE5 0x1c0 0x590 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_EB0__EIM_EB0_B 0x1c4 0x594 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x1c4 0x594 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_EB0__IPU1_CSI1_DATA11 0x1c4 0x594 0x88c 0x2 0x1 --#define MX6DL_PAD_EIM_EB0__CCM_PMIC_READY 0x1c4 0x594 0x7d4 0x4 0x0 --#define MX6DL_PAD_EIM_EB0__GPIO2_IO28 0x1c4 0x594 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_EB0__SRC_BOOT_CFG27 0x1c4 0x594 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_EB0__EPDC_PWR_COM 0x1c4 0x594 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_EB1__EIM_EB1_B 0x1c8 0x598 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x1c8 0x598 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_EB1__IPU1_CSI1_DATA10 0x1c8 0x598 0x888 0x2 0x1 --#define MX6DL_PAD_EIM_EB1__GPIO2_IO29 0x1c8 0x598 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_EB1__SRC_BOOT_CFG28 0x1c8 0x598 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_EB1__EPDC_SDSHR 0x1c8 0x598 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_EB2__EIM_EB2_B 0x1cc 0x59c 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_EB2__ECSPI1_SS0 0x1cc 0x59c 0x7e4 0x1 0x2 --#define MX6DL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1cc 0x59c 0x8ac 0x3 0x1 --#define MX6DL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x1cc 0x59c 0x860 0x4 0x0 --#define MX6DL_PAD_EIM_EB2__GPIO2_IO30 0x1cc 0x59c 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_EB2__I2C2_SCL 0x1cc 0x59c 0x870 0x6 0x0 --#define MX6DL_PAD_EIM_EB2__SRC_BOOT_CFG30 0x1cc 0x59c 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_EB2__EPDC_DATA05 0x1cc 0x59c 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_EB3__EIM_EB3_B 0x1d0 0x5a0 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_EB3__ECSPI4_RDY 0x1d0 0x5a0 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_EB3__UART3_RTS_B 0x1d0 0x5a0 0x908 0x2 0x3 --#define MX6DL_PAD_EIM_EB3__UART3_CTS_B 0x1d0 0x5a0 0x000 0x2 0x0 --#define MX6DL_PAD_EIM_EB3__UART1_RI_B 0x1d0 0x5a0 0x000 0x3 0x0 --#define MX6DL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1d0 0x5a0 0x8b4 0x4 0x1 --#define MX6DL_PAD_EIM_EB3__GPIO2_IO31 0x1d0 0x5a0 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_EB3__IPU1_DI1_PIN03 0x1d0 0x5a0 0x000 0x6 0x0 --#define MX6DL_PAD_EIM_EB3__SRC_BOOT_CFG31 0x1d0 0x5a0 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_EB3__EPDC_SDCE0 0x1d0 0x5a0 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_EB3__EIM_ACLK_FREERUN 0x1d0 0x5a0 0x000 0x9 0x0 --#define MX6DL_PAD_EIM_LBA__EIM_LBA_B 0x1d4 0x5a4 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_LBA__IPU1_DI1_PIN17 0x1d4 0x5a4 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_LBA__ECSPI2_SS1 0x1d4 0x5a4 0x804 0x2 0x1 --#define MX6DL_PAD_EIM_LBA__GPIO2_IO27 0x1d4 0x5a4 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_LBA__SRC_BOOT_CFG26 0x1d4 0x5a4 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_LBA__EPDC_DATA04 0x1d4 0x5a4 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_OE__EIM_OE_B 0x1d8 0x5a8 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_OE__IPU1_DI1_PIN07 0x1d8 0x5a8 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_OE__ECSPI2_MISO 0x1d8 0x5a8 0x7f8 0x2 0x2 --#define MX6DL_PAD_EIM_OE__GPIO2_IO25 0x1d8 0x5a8 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_OE__EPDC_PWR_IRQ 0x1d8 0x5a8 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_RW__EIM_RW 0x1dc 0x5ac 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_RW__IPU1_DI1_PIN08 0x1dc 0x5ac 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_RW__ECSPI2_SS0 0x1dc 0x5ac 0x800 0x2 0x2 --#define MX6DL_PAD_EIM_RW__GPIO2_IO26 0x1dc 0x5ac 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_RW__SRC_BOOT_CFG29 0x1dc 0x5ac 0x000 0x7 0x0 --#define MX6DL_PAD_EIM_RW__EPDC_DATA07 0x1dc 0x5ac 0x000 0x8 0x0 --#define MX6DL_PAD_EIM_WAIT__EIM_WAIT_B 0x1e0 0x5b0 0x000 0x0 0x0 --#define MX6DL_PAD_EIM_WAIT__EIM_DTACK_B 0x1e0 0x5b0 0x000 0x1 0x0 --#define MX6DL_PAD_EIM_WAIT__GPIO5_IO00 0x1e0 0x5b0 0x000 0x5 0x0 --#define MX6DL_PAD_EIM_WAIT__SRC_BOOT_CFG25 0x1e0 0x5b0 0x000 0x7 0x0 --#define MX6DL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1e4 0x5b4 0x828 0x1 0x0 --#define MX6DL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1e4 0x5b4 0x840 0x2 0x0 --#define MX6DL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK 0x1e4 0x5b4 0x8f4 0x3 0x0 --#define MX6DL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1e4 0x5b4 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_MDC__MLB_DATA 0x1e8 0x5b8 0x8e0 0x0 0x0 --#define MX6DL_PAD_ENET_MDC__ENET_MDC 0x1e8 0x5b8 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1e8 0x5b8 0x858 0x2 0x0 --#define MX6DL_PAD_ENET_MDC__ENET_1588_EVENT1_IN 0x1e8 0x5b8 0x000 0x4 0x0 --#define MX6DL_PAD_ENET_MDC__GPIO1_IO31 0x1e8 0x5b8 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_MDIO__ENET_MDIO 0x1ec 0x5bc 0x810 0x1 0x0 --#define MX6DL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1ec 0x5bc 0x83c 0x2 0x0 --#define MX6DL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT 0x1ec 0x5bc 0x000 0x4 0x0 --#define MX6DL_PAD_ENET_MDIO__GPIO1_IO22 0x1ec 0x5bc 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_MDIO__SPDIF_LOCK 0x1ec 0x5bc 0x000 0x6 0x0 --#define MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1f0 0x5c0 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1f0 0x5c0 0x82c 0x2 0x0 --#define MX6DL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1f0 0x5c0 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1f0 0x5c0 0x000 0x6 0x0 --#define MX6DL_PAD_ENET_RX_ER__USB_OTG_ID 0x1f4 0x5c4 0x790 0x0 0x0 --#define MX6DL_PAD_ENET_RX_ER__ENET_RX_ER 0x1f4 0x5c4 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1f4 0x5c4 0x834 0x2 0x0 --#define MX6DL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1 --#define MX6DL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0 --#define MX6DL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0 --#define MX6DL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0 --#define MX6DL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0 --#define MX6DL_PAD_ENET_RXD0__GPIO1_IO27 0x1f8 0x5c8 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_RXD1__MLB_SIG 0x1fc 0x5cc 0x8e4 0x0 0x0 --#define MX6DL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1fc 0x5cc 0x81c 0x1 0x0 --#define MX6DL_PAD_ENET_RXD1__ESAI_TX_FS 0x1fc 0x5cc 0x830 0x2 0x0 --#define MX6DL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1fc 0x5cc 0x000 0x4 0x0 --#define MX6DL_PAD_ENET_RXD1__GPIO1_IO26 0x1fc 0x5cc 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_TX_EN__ENET_TX_EN 0x200 0x5d0 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x200 0x5d0 0x850 0x2 0x0 --#define MX6DL_PAD_ENET_TX_EN__GPIO1_IO28 0x200 0x5d0 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_TX_EN__I2C4_SCL 0x200 0x5d0 0x880 0x9 0x0 --#define MX6DL_PAD_ENET_TXD0__ENET_TX_DATA0 0x204 0x5d4 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x204 0x5d4 0x854 0x2 0x0 --#define MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x204 0x5d4 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_TXD1__MLB_CLK 0x208 0x5d8 0x8dc 0x0 0x0 --#define MX6DL_PAD_ENET_TXD1__ENET_TX_DATA1 0x208 0x5d8 0x000 0x1 0x0 --#define MX6DL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x208 0x5d8 0x84c 0x2 0x0 --#define MX6DL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN 0x208 0x5d8 0x000 0x4 0x0 --#define MX6DL_PAD_ENET_TXD1__GPIO1_IO29 0x208 0x5d8 0x000 0x5 0x0 --#define MX6DL_PAD_ENET_TXD1__I2C4_SDA 0x208 0x5d8 0x884 0x9 0x0 --#define MX6DL_PAD_GPIO_0__CCM_CLKO1 0x20c 0x5dc 0x000 0x0 0x0 --#define MX6DL_PAD_GPIO_0__KEY_COL5 0x20c 0x5dc 0x8c0 0x2 0x1 --#define MX6DL_PAD_GPIO_0__ASRC_EXT_CLK 0x20c 0x5dc 0x794 0x3 0x0 --#define MX6DL_PAD_GPIO_0__EPIT1_OUT 0x20c 0x5dc 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_0__GPIO1_IO00 0x20c 0x5dc 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_0__USB_H1_PWR 0x20c 0x5dc 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_0__SNVS_VIO_5 0x20c 0x5dc 0x000 0x7 0x0 --#define MX6DL_PAD_GPIO_1__ESAI_RX_CLK 0x210 0x5e0 0x83c 0x0 0x1 --#define MX6DL_PAD_GPIO_1__WDOG2_B 0x210 0x5e0 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_1__KEY_ROW5 0x210 0x5e0 0x8cc 0x2 0x1 --#define MX6DL_PAD_GPIO_1__USB_OTG_ID 0x210 0x5e0 0x790 0x3 0x1 --#define MX6DL_PAD_GPIO_1__PWM2_OUT 0x210 0x5e0 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_1__GPIO1_IO01 0x210 0x5e0 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_1__SD1_CD_B 0x210 0x5e0 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_16__ESAI_TX3_RX2 0x214 0x5e4 0x850 0x0 0x1 --#define MX6DL_PAD_GPIO_16__ENET_1588_EVENT2_IN 0x214 0x5e4 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x214 0x5e4 0x80c 0x2 0x0 --#define MX6DL_PAD_GPIO_16__SD1_LCTL 0x214 0x5e4 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_16__SPDIF_IN 0x214 0x5e4 0x8f0 0x4 0x2 --#define MX6DL_PAD_GPIO_16__GPIO7_IO11 0x214 0x5e4 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_16__I2C3_SDA 0x214 0x5e4 0x87c 0x6 0x1 --#define MX6DL_PAD_GPIO_16__JTAG_DE_B 0x214 0x5e4 0x000 0x7 0x0 --#define MX6DL_PAD_GPIO_17__ESAI_TX0 0x218 0x5e8 0x844 0x0 0x0 --#define MX6DL_PAD_GPIO_17__ENET_1588_EVENT3_IN 0x218 0x5e8 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_17__CCM_PMIC_READY 0x218 0x5e8 0x7d4 0x2 0x1 --#define MX6DL_PAD_GPIO_17__SDMA_EXT_EVENT0 0x218 0x5e8 0x8e8 0x3 0x1 --#define MX6DL_PAD_GPIO_17__SPDIF_OUT 0x218 0x5e8 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_17__GPIO7_IO12 0x218 0x5e8 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_18__ESAI_TX1 0x21c 0x5ec 0x848 0x0 0x0 --#define MX6DL_PAD_GPIO_18__ENET_RX_CLK 0x21c 0x5ec 0x814 0x1 0x0 --#define MX6DL_PAD_GPIO_18__SD3_VSELECT 0x21c 0x5ec 0x000 0x2 0x0 --#define MX6DL_PAD_GPIO_18__SDMA_EXT_EVENT1 0x21c 0x5ec 0x8ec 0x3 0x1 --#define MX6DL_PAD_GPIO_18__ASRC_EXT_CLK 0x21c 0x5ec 0x794 0x4 0x1 --#define MX6DL_PAD_GPIO_18__GPIO7_IO13 0x21c 0x5ec 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_18__SNVS_VIO_5_CTL 0x21c 0x5ec 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_19__KEY_COL5 0x220 0x5f0 0x8c0 0x0 0x2 --#define MX6DL_PAD_GPIO_19__ENET_1588_EVENT0_OUT 0x220 0x5f0 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_19__SPDIF_OUT 0x220 0x5f0 0x000 0x2 0x0 --#define MX6DL_PAD_GPIO_19__CCM_CLKO1 0x220 0x5f0 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_19__ECSPI1_RDY 0x220 0x5f0 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_19__GPIO4_IO05 0x220 0x5f0 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_19__ENET_TX_ER 0x220 0x5f0 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_2__ESAI_TX_FS 0x224 0x5f4 0x830 0x0 0x1 --#define MX6DL_PAD_GPIO_2__KEY_ROW6 0x224 0x5f4 0x8d0 0x2 0x1 --#define MX6DL_PAD_GPIO_2__GPIO1_IO02 0x224 0x5f4 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_2__SD2_WP 0x224 0x5f4 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_2__MLB_DATA 0x224 0x5f4 0x8e0 0x7 0x1 --#define MX6DL_PAD_GPIO_3__ESAI_RX_HF_CLK 0x228 0x5f8 0x834 0x0 0x1 --#define MX6DL_PAD_GPIO_3__I2C3_SCL 0x228 0x5f8 0x878 0x2 0x1 --#define MX6DL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x228 0x5f8 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_3__CCM_CLKO2 0x228 0x5f8 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_3__GPIO1_IO03 0x228 0x5f8 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_3__USB_H1_OC 0x228 0x5f8 0x924 0x6 0x1 --#define MX6DL_PAD_GPIO_3__MLB_CLK 0x228 0x5f8 0x8dc 0x7 0x1 --#define MX6DL_PAD_GPIO_4__ESAI_TX_HF_CLK 0x22c 0x5fc 0x838 0x0 0x1 --#define MX6DL_PAD_GPIO_4__KEY_COL7 0x22c 0x5fc 0x8c8 0x2 0x1 --#define MX6DL_PAD_GPIO_4__GPIO1_IO04 0x22c 0x5fc 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_4__SD2_CD_B 0x22c 0x5fc 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_5__ESAI_TX2_RX3 0x230 0x600 0x84c 0x0 0x1 --#define MX6DL_PAD_GPIO_5__KEY_ROW7 0x230 0x600 0x8d4 0x2 0x1 --#define MX6DL_PAD_GPIO_5__CCM_CLKO1 0x230 0x600 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_5__GPIO1_IO05 0x230 0x600 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_5__I2C3_SCL 0x230 0x600 0x878 0x6 0x2 --#define MX6DL_PAD_GPIO_5__ARM_EVENTI 0x230 0x600 0x000 0x7 0x0 --#define MX6DL_PAD_GPIO_6__ESAI_TX_CLK 0x234 0x604 0x840 0x0 0x1 --#define MX6DL_PAD_GPIO_6__I2C3_SDA 0x234 0x604 0x87c 0x2 0x2 --#define MX6DL_PAD_GPIO_6__GPIO1_IO06 0x234 0x604 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_6__SD2_LCTL 0x234 0x604 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_6__MLB_SIG 0x234 0x604 0x8e4 0x7 0x1 --#define MX6DL_PAD_GPIO_7__ESAI_TX4_RX1 0x238 0x608 0x854 0x0 0x1 --#define MX6DL_PAD_GPIO_7__EPIT1_OUT 0x238 0x608 0x000 0x2 0x0 --#define MX6DL_PAD_GPIO_7__FLEXCAN1_TX 0x238 0x608 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_7__UART2_TX_DATA 0x238 0x608 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_7__UART2_RX_DATA 0x238 0x608 0x904 0x4 0x2 --#define MX6DL_PAD_GPIO_7__GPIO1_IO07 0x238 0x608 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_7__SPDIF_LOCK 0x238 0x608 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_7__USB_OTG_HOST_MODE 0x238 0x608 0x000 0x7 0x0 --#define MX6DL_PAD_GPIO_7__I2C4_SCL 0x238 0x608 0x880 0x8 0x1 --#define MX6DL_PAD_GPIO_8__ESAI_TX5_RX0 0x23c 0x60c 0x858 0x0 0x1 --#define MX6DL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x23c 0x60c 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_8__EPIT2_OUT 0x23c 0x60c 0x000 0x2 0x0 --#define MX6DL_PAD_GPIO_8__FLEXCAN1_RX 0x23c 0x60c 0x7c8 0x3 0x0 --#define MX6DL_PAD_GPIO_8__UART2_RX_DATA 0x23c 0x60c 0x904 0x4 0x3 --#define MX6DL_PAD_GPIO_8__UART2_TX_DATA 0x23c 0x60c 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_8__GPIO1_IO08 0x23c 0x60c 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_8__SPDIF_SR_CLK 0x23c 0x60c 0x000 0x6 0x0 --#define MX6DL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE 0x23c 0x60c 0x000 0x7 0x0 --#define MX6DL_PAD_GPIO_8__I2C4_SDA 0x23c 0x60c 0x884 0x8 0x1 --#define MX6DL_PAD_GPIO_9__ESAI_RX_FS 0x240 0x610 0x82c 0x0 0x1 --#define MX6DL_PAD_GPIO_9__WDOG1_B 0x240 0x610 0x000 0x1 0x0 --#define MX6DL_PAD_GPIO_9__KEY_COL6 0x240 0x610 0x8c4 0x2 0x1 --#define MX6DL_PAD_GPIO_9__CCM_REF_EN_B 0x240 0x610 0x000 0x3 0x0 --#define MX6DL_PAD_GPIO_9__PWM1_OUT 0x240 0x610 0x000 0x4 0x0 --#define MX6DL_PAD_GPIO_9__GPIO1_IO09 0x240 0x610 0x000 0x5 0x0 --#define MX6DL_PAD_GPIO_9__SD1_WP 0x240 0x610 0x92c 0x6 0x1 --#define MX6DL_PAD_KEY_COL0__ECSPI1_SCLK 0x244 0x62c 0x7d8 0x0 0x3 --#define MX6DL_PAD_KEY_COL0__ENET_RX_DATA3 0x244 0x62c 0x824 0x1 0x0 --#define MX6DL_PAD_KEY_COL0__AUD5_TXC 0x244 0x62c 0x7c0 0x2 0x1 --#define MX6DL_PAD_KEY_COL0__KEY_COL0 0x244 0x62c 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_COL0__UART4_TX_DATA 0x244 0x62c 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_COL0__UART4_RX_DATA 0x244 0x62c 0x914 0x4 0x2 --#define MX6DL_PAD_KEY_COL0__GPIO4_IO06 0x244 0x62c 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_COL0__DCIC1_OUT 0x244 0x62c 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_COL1__ECSPI1_MISO 0x248 0x630 0x7dc 0x0 0x3 --#define MX6DL_PAD_KEY_COL1__ENET_MDIO 0x248 0x630 0x810 0x1 0x1 --#define MX6DL_PAD_KEY_COL1__AUD5_TXFS 0x248 0x630 0x7c4 0x2 0x1 --#define MX6DL_PAD_KEY_COL1__KEY_COL1 0x248 0x630 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_COL1__UART5_TX_DATA 0x248 0x630 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_COL1__UART5_RX_DATA 0x248 0x630 0x91c 0x4 0x2 --#define MX6DL_PAD_KEY_COL1__GPIO4_IO08 0x248 0x630 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_COL1__SD1_VSELECT 0x248 0x630 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_COL2__ECSPI1_SS1 0x24c 0x634 0x7e8 0x0 0x2 --#define MX6DL_PAD_KEY_COL2__ENET_RX_DATA2 0x24c 0x634 0x820 0x1 0x0 --#define MX6DL_PAD_KEY_COL2__FLEXCAN1_TX 0x24c 0x634 0x000 0x2 0x0 --#define MX6DL_PAD_KEY_COL2__KEY_COL2 0x24c 0x634 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_COL2__ENET_MDC 0x24c 0x634 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_COL2__GPIO4_IO10 0x24c 0x634 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE 0x24c 0x634 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_COL3__ECSPI1_SS3 0x250 0x638 0x7f0 0x0 0x1 --#define MX6DL_PAD_KEY_COL3__ENET_CRS 0x250 0x638 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x250 0x638 0x860 0x2 0x1 --#define MX6DL_PAD_KEY_COL3__KEY_COL3 0x250 0x638 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_COL3__I2C2_SCL 0x250 0x638 0x870 0x4 0x1 --#define MX6DL_PAD_KEY_COL3__GPIO4_IO12 0x250 0x638 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_COL3__SPDIF_IN 0x250 0x638 0x8f0 0x6 0x3 --#define MX6DL_PAD_KEY_COL4__FLEXCAN2_TX 0x254 0x63c 0x000 0x0 0x0 --#define MX6DL_PAD_KEY_COL4__IPU1_SISG4 0x254 0x63c 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_COL4__USB_OTG_OC 0x254 0x63c 0x920 0x2 0x1 --#define MX6DL_PAD_KEY_COL4__KEY_COL4 0x254 0x63c 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_COL4__UART5_RTS_B 0x254 0x63c 0x918 0x4 0x2 --#define MX6DL_PAD_KEY_COL4__UART5_CTS_B 0x254 0x63c 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_COL4__GPIO4_IO14 0x254 0x63c 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_ROW0__ECSPI1_MOSI 0x258 0x640 0x7e0 0x0 0x3 --#define MX6DL_PAD_KEY_ROW0__ENET_TX_DATA3 0x258 0x640 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_ROW0__AUD5_TXD 0x258 0x640 0x7b4 0x2 0x1 --#define MX6DL_PAD_KEY_ROW0__KEY_ROW0 0x258 0x640 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_ROW0__UART4_RX_DATA 0x258 0x640 0x914 0x4 0x3 --#define MX6DL_PAD_KEY_ROW0__UART4_TX_DATA 0x258 0x640 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_ROW0__GPIO4_IO07 0x258 0x640 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_ROW0__DCIC2_OUT 0x258 0x640 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_ROW1__ECSPI1_SS0 0x25c 0x644 0x7e4 0x0 0x3 --#define MX6DL_PAD_KEY_ROW1__ENET_COL 0x25c 0x644 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_ROW1__AUD5_RXD 0x25c 0x644 0x7b0 0x2 0x1 --#define MX6DL_PAD_KEY_ROW1__KEY_ROW1 0x25c 0x644 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_ROW1__UART5_RX_DATA 0x25c 0x644 0x91c 0x4 0x3 --#define MX6DL_PAD_KEY_ROW1__UART5_TX_DATA 0x25c 0x644 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_ROW1__GPIO4_IO09 0x25c 0x644 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_ROW1__SD2_VSELECT 0x25c 0x644 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_ROW2__ECSPI1_SS2 0x260 0x648 0x7ec 0x0 0x1 --#define MX6DL_PAD_KEY_ROW2__ENET_TX_DATA2 0x260 0x648 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_ROW2__FLEXCAN1_RX 0x260 0x648 0x7c8 0x2 0x1 --#define MX6DL_PAD_KEY_ROW2__KEY_ROW2 0x260 0x648 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_ROW2__SD2_VSELECT 0x260 0x648 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_ROW2__GPIO4_IO11 0x260 0x648 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x260 0x648 0x85c 0x6 0x1 --#define MX6DL_PAD_KEY_ROW3__ASRC_EXT_CLK 0x264 0x64c 0x794 0x1 0x2 --#define MX6DL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x264 0x64c 0x864 0x2 0x1 --#define MX6DL_PAD_KEY_ROW3__KEY_ROW3 0x264 0x64c 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_ROW3__I2C2_SDA 0x264 0x64c 0x874 0x4 0x1 --#define MX6DL_PAD_KEY_ROW3__GPIO4_IO13 0x264 0x64c 0x000 0x5 0x0 --#define MX6DL_PAD_KEY_ROW3__SD1_VSELECT 0x264 0x64c 0x000 0x6 0x0 --#define MX6DL_PAD_KEY_ROW4__FLEXCAN2_RX 0x268 0x650 0x7cc 0x0 0x0 --#define MX6DL_PAD_KEY_ROW4__IPU1_SISG5 0x268 0x650 0x000 0x1 0x0 --#define MX6DL_PAD_KEY_ROW4__USB_OTG_PWR 0x268 0x650 0x000 0x2 0x0 --#define MX6DL_PAD_KEY_ROW4__KEY_ROW4 0x268 0x650 0x000 0x3 0x0 --#define MX6DL_PAD_KEY_ROW4__UART5_CTS_B 0x268 0x650 0x000 0x4 0x0 --#define MX6DL_PAD_KEY_ROW4__UART5_RTS_B 0x268 0x650 0x918 0x4 0x3 --#define MX6DL_PAD_KEY_ROW4__GPIO4_IO15 0x268 0x650 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_ALE__NAND_ALE 0x26c 0x654 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_ALE__SD4_RESET 0x26c 0x654 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_ALE__GPIO6_IO08 0x26c 0x654 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CLE__NAND_CLE 0x270 0x658 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_CLE__GPIO6_IO07 0x270 0x658 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CS0__NAND_CE0_B 0x274 0x65c 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_CS0__GPIO6_IO11 0x274 0x65c 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CS1__NAND_CE1_B 0x278 0x660 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_CS1__SD4_VSELECT 0x278 0x660 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_CS1__SD3_VSELECT 0x278 0x660 0x000 0x2 0x0 --#define MX6DL_PAD_NANDF_CS1__GPIO6_IO14 0x278 0x660 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CS2__NAND_CE2_B 0x27c 0x664 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_CS2__IPU1_SISG0 0x27c 0x664 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_CS2__ESAI_TX0 0x27c 0x664 0x844 0x2 0x1 --#define MX6DL_PAD_NANDF_CS2__EIM_CRE 0x27c 0x664 0x000 0x3 0x0 --#define MX6DL_PAD_NANDF_CS2__CCM_CLKO2 0x27c 0x664 0x000 0x4 0x0 --#define MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x27c 0x664 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CS3__NAND_CE3_B 0x280 0x668 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_CS3__IPU1_SISG1 0x280 0x668 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_CS3__ESAI_TX1 0x280 0x668 0x848 0x2 0x1 --#define MX6DL_PAD_NANDF_CS3__EIM_ADDR26 0x280 0x668 0x000 0x3 0x0 --#define MX6DL_PAD_NANDF_CS3__GPIO6_IO16 0x280 0x668 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_CS3__I2C4_SDA 0x280 0x668 0x884 0x9 0x2 --#define MX6DL_PAD_NANDF_D0__NAND_DATA00 0x284 0x66c 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D0__SD1_DATA4 0x284 0x66c 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D0__GPIO2_IO00 0x284 0x66c 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D1__NAND_DATA01 0x288 0x670 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D1__SD1_DATA5 0x288 0x670 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D1__GPIO2_IO01 0x288 0x670 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D2__NAND_DATA02 0x28c 0x674 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D2__SD1_DATA6 0x28c 0x674 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D2__GPIO2_IO02 0x28c 0x674 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D3__NAND_DATA03 0x290 0x678 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D3__SD1_DATA7 0x290 0x678 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D3__GPIO2_IO03 0x290 0x678 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D4__NAND_DATA04 0x294 0x67c 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D4__SD2_DATA4 0x294 0x67c 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D4__GPIO2_IO04 0x294 0x67c 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D5__NAND_DATA05 0x298 0x680 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D5__SD2_DATA5 0x298 0x680 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D5__GPIO2_IO05 0x298 0x680 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D6__NAND_DATA06 0x29c 0x684 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D6__SD2_DATA6 0x29c 0x684 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D6__GPIO2_IO06 0x29c 0x684 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_D7__NAND_DATA07 0x2a0 0x688 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_D7__SD2_DATA7 0x2a0 0x688 0x000 0x1 0x0 --#define MX6DL_PAD_NANDF_D7__GPIO2_IO07 0x2a0 0x688 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_RB0__NAND_READY_B 0x2a4 0x68c 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_RB0__GPIO6_IO10 0x2a4 0x68c 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_WP_B__NAND_WP_B 0x2a8 0x690 0x000 0x0 0x0 --#define MX6DL_PAD_NANDF_WP_B__GPIO6_IO09 0x2a8 0x690 0x000 0x5 0x0 --#define MX6DL_PAD_NANDF_WP_B__I2C4_SCL 0x2a8 0x690 0x880 0x9 0x2 --#define MX6DL_PAD_RGMII_RD0__HSI_RX_READY 0x2ac 0x694 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RD0__RGMII_RD0 0x2ac 0x694 0x818 0x1 0x1 --#define MX6DL_PAD_RGMII_RD0__GPIO6_IO25 0x2ac 0x694 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_RD1__HSI_TX_FLAG 0x2b0 0x698 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RD1__RGMII_RD1 0x2b0 0x698 0x81c 0x1 0x1 --#define MX6DL_PAD_RGMII_RD1__GPIO6_IO27 0x2b0 0x698 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_RD2__HSI_TX_DATA 0x2b4 0x69c 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x2b4 0x69c 0x820 0x1 0x1 --#define MX6DL_PAD_RGMII_RD2__GPIO6_IO28 0x2b4 0x69c 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_RD3__HSI_TX_WAKE 0x2b8 0x6a0 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x2b8 0x6a0 0x824 0x1 0x1 --#define MX6DL_PAD_RGMII_RD3__GPIO6_IO29 0x2b8 0x6a0 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x2bc 0x6a4 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x2bc 0x6a4 0x828 0x1 0x1 --#define MX6DL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x2bc 0x6a4 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_RXC__USB_H3_STROBE 0x2c0 0x6a8 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_RXC__RGMII_RXC 0x2c0 0x6a8 0x814 0x1 0x1 --#define MX6DL_PAD_RGMII_RXC__GPIO6_IO30 0x2c0 0x6a8 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TD0__HSI_TX_READY 0x2c4 0x6ac 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x2c4 0x6ac 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TD0__GPIO6_IO20 0x2c4 0x6ac 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TD1__HSI_RX_FLAG 0x2c8 0x6b0 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x2c8 0x6b0 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TD1__GPIO6_IO21 0x2c8 0x6b0 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TD2__HSI_RX_DATA 0x2cc 0x6b4 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TD2__RGMII_TD2 0x2cc 0x6b4 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TD2__GPIO6_IO22 0x2cc 0x6b4 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TD3__HSI_RX_WAKE 0x2d0 0x6b8 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TD3__RGMII_TD3 0x2d0 0x6b8 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TD3__GPIO6_IO23 0x2d0 0x6b8 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x2d4 0x6bc 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x2d4 0x6bc 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x2d4 0x6bc 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TX_CTL__ENET_REF_CLK 0x2d4 0x6bc 0x80c 0x7 0x1 --#define MX6DL_PAD_RGMII_TXC__USB_H2_DATA 0x2d8 0x6c0 0x000 0x0 0x0 --#define MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x2d8 0x6c0 0x000 0x1 0x0 --#define MX6DL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x2d8 0x6c0 0x8f4 0x2 0x1 --#define MX6DL_PAD_RGMII_TXC__GPIO6_IO19 0x2d8 0x6c0 0x000 0x5 0x0 --#define MX6DL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M 0x2d8 0x6c0 0x000 0x7 0x0 --#define MX6DL_PAD_SD1_CLK__SD1_CLK 0x2dc 0x6c4 0x928 0x0 0x1 --#define MX6DL_PAD_SD1_CLK__GPT_CLKIN 0x2dc 0x6c4 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_CLK__GPIO1_IO20 0x2dc 0x6c4 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_CMD__SD1_CMD 0x2e0 0x6c8 0x000 0x0 0x0 --#define MX6DL_PAD_SD1_CMD__PWM4_OUT 0x2e0 0x6c8 0x000 0x2 0x0 --#define MX6DL_PAD_SD1_CMD__GPT_COMPARE1 0x2e0 0x6c8 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_CMD__GPIO1_IO18 0x2e0 0x6c8 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_DAT0__SD1_DATA0 0x2e4 0x6cc 0x000 0x0 0x0 --#define MX6DL_PAD_SD1_DAT0__GPT_CAPTURE1 0x2e4 0x6cc 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_DAT0__GPIO1_IO16 0x2e4 0x6cc 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_DAT1__SD1_DATA1 0x2e8 0x6d0 0x000 0x0 0x0 --#define MX6DL_PAD_SD1_DAT1__PWM3_OUT 0x2e8 0x6d0 0x000 0x2 0x0 --#define MX6DL_PAD_SD1_DAT1__GPT_CAPTURE2 0x2e8 0x6d0 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_DAT1__GPIO1_IO17 0x2e8 0x6d0 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_DAT2__SD1_DATA2 0x2ec 0x6d4 0x000 0x0 0x0 --#define MX6DL_PAD_SD1_DAT2__GPT_COMPARE2 0x2ec 0x6d4 0x000 0x2 0x0 --#define MX6DL_PAD_SD1_DAT2__PWM2_OUT 0x2ec 0x6d4 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_DAT2__WDOG1_B 0x2ec 0x6d4 0x000 0x4 0x0 --#define MX6DL_PAD_SD1_DAT2__GPIO1_IO19 0x2ec 0x6d4 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x2ec 0x6d4 0x000 0x6 0x0 --#define MX6DL_PAD_SD1_DAT3__SD1_DATA3 0x2f0 0x6d8 0x000 0x0 0x0 --#define MX6DL_PAD_SD1_DAT3__GPT_COMPARE3 0x2f0 0x6d8 0x000 0x2 0x0 --#define MX6DL_PAD_SD1_DAT3__PWM1_OUT 0x2f0 0x6d8 0x000 0x3 0x0 --#define MX6DL_PAD_SD1_DAT3__WDOG2_B 0x2f0 0x6d8 0x000 0x4 0x0 --#define MX6DL_PAD_SD1_DAT3__GPIO1_IO21 0x2f0 0x6d8 0x000 0x5 0x0 --#define MX6DL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB 0x2f0 0x6d8 0x000 0x6 0x0 --#define MX6DL_PAD_SD2_CLK__SD2_CLK 0x2f4 0x6dc 0x930 0x0 0x1 --#define MX6DL_PAD_SD2_CLK__KEY_COL5 0x2f4 0x6dc 0x8c0 0x2 0x3 --#define MX6DL_PAD_SD2_CLK__AUD4_RXFS 0x2f4 0x6dc 0x7a4 0x3 0x1 --#define MX6DL_PAD_SD2_CLK__GPIO1_IO10 0x2f4 0x6dc 0x000 0x5 0x0 --#define MX6DL_PAD_SD2_CMD__SD2_CMD 0x2f8 0x6e0 0x000 0x0 0x0 --#define MX6DL_PAD_SD2_CMD__KEY_ROW5 0x2f8 0x6e0 0x8cc 0x2 0x2 --#define MX6DL_PAD_SD2_CMD__AUD4_RXC 0x2f8 0x6e0 0x7a0 0x3 0x1 --#define MX6DL_PAD_SD2_CMD__GPIO1_IO11 0x2f8 0x6e0 0x000 0x5 0x0 --#define MX6DL_PAD_SD2_DAT0__SD2_DATA0 0x2fc 0x6e4 0x000 0x0 0x0 --#define MX6DL_PAD_SD2_DAT0__AUD4_RXD 0x2fc 0x6e4 0x798 0x3 0x1 --#define MX6DL_PAD_SD2_DAT0__KEY_ROW7 0x2fc 0x6e4 0x8d4 0x4 0x2 --#define MX6DL_PAD_SD2_DAT0__GPIO1_IO15 0x2fc 0x6e4 0x000 0x5 0x0 --#define MX6DL_PAD_SD2_DAT0__DCIC2_OUT 0x2fc 0x6e4 0x000 0x6 0x0 --#define MX6DL_PAD_SD2_DAT1__SD2_DATA1 0x300 0x6e8 0x000 0x0 0x0 --#define MX6DL_PAD_SD2_DAT1__EIM_CS2_B 0x300 0x6e8 0x000 0x2 0x0 --#define MX6DL_PAD_SD2_DAT1__AUD4_TXFS 0x300 0x6e8 0x7ac 0x3 0x1 --#define MX6DL_PAD_SD2_DAT1__KEY_COL7 0x300 0x6e8 0x8c8 0x4 0x2 --#define MX6DL_PAD_SD2_DAT1__GPIO1_IO14 0x300 0x6e8 0x000 0x5 0x0 --#define MX6DL_PAD_SD2_DAT2__SD2_DATA2 0x304 0x6ec 0x000 0x0 0x0 --#define MX6DL_PAD_SD2_DAT2__EIM_CS3_B 0x304 0x6ec 0x000 0x2 0x0 --#define MX6DL_PAD_SD2_DAT2__AUD4_TXD 0x304 0x6ec 0x79c 0x3 0x1 --#define MX6DL_PAD_SD2_DAT2__KEY_ROW6 0x304 0x6ec 0x8d0 0x4 0x2 --#define MX6DL_PAD_SD2_DAT2__GPIO1_IO13 0x304 0x6ec 0x000 0x5 0x0 --#define MX6DL_PAD_SD2_DAT3__SD2_DATA3 0x308 0x6f0 0x000 0x0 0x0 --#define MX6DL_PAD_SD2_DAT3__KEY_COL6 0x308 0x6f0 0x8c4 0x2 0x2 --#define MX6DL_PAD_SD2_DAT3__AUD4_TXC 0x308 0x6f0 0x7a8 0x3 0x1 --#define MX6DL_PAD_SD2_DAT3__GPIO1_IO12 0x308 0x6f0 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_CLK__SD3_CLK 0x30c 0x6f4 0x934 0x0 0x1 --#define MX6DL_PAD_SD3_CLK__UART2_RTS_B 0x30c 0x6f4 0x900 0x1 0x2 --#define MX6DL_PAD_SD3_CLK__UART2_CTS_B 0x30c 0x6f4 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_CLK__FLEXCAN1_RX 0x30c 0x6f4 0x7c8 0x2 0x2 --#define MX6DL_PAD_SD3_CLK__GPIO7_IO03 0x30c 0x6f4 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_CMD__SD3_CMD 0x310 0x6f8 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_CMD__UART2_CTS_B 0x310 0x6f8 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_CMD__UART2_RTS_B 0x310 0x6f8 0x900 0x1 0x3 --#define MX6DL_PAD_SD3_CMD__FLEXCAN1_TX 0x310 0x6f8 0x000 0x2 0x0 --#define MX6DL_PAD_SD3_CMD__GPIO7_IO02 0x310 0x6f8 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT0__SD3_DATA0 0x314 0x6fc 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT0__UART1_CTS_B 0x314 0x6fc 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT0__UART1_RTS_B 0x314 0x6fc 0x8f8 0x1 0x2 --#define MX6DL_PAD_SD3_DAT0__FLEXCAN2_TX 0x314 0x6fc 0x000 0x2 0x0 --#define MX6DL_PAD_SD3_DAT0__GPIO7_IO04 0x314 0x6fc 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT1__SD3_DATA1 0x318 0x700 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT1__UART1_RTS_B 0x318 0x700 0x8f8 0x1 0x3 --#define MX6DL_PAD_SD3_DAT1__UART1_CTS_B 0x318 0x700 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT1__FLEXCAN2_RX 0x318 0x700 0x7cc 0x2 0x1 --#define MX6DL_PAD_SD3_DAT1__GPIO7_IO05 0x318 0x700 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT2__SD3_DATA2 0x31c 0x704 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT2__GPIO7_IO06 0x31c 0x704 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT3__SD3_DATA3 0x320 0x708 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT3__UART3_CTS_B 0x320 0x708 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT3__UART3_RTS_B 0x320 0x708 0x908 0x1 0x4 --#define MX6DL_PAD_SD3_DAT3__GPIO7_IO07 0x320 0x708 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT4__SD3_DATA4 0x324 0x70c 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT4__UART2_RX_DATA 0x324 0x70c 0x904 0x1 0x4 --#define MX6DL_PAD_SD3_DAT4__UART2_TX_DATA 0x324 0x70c 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT4__GPIO7_IO01 0x324 0x70c 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT5__SD3_DATA5 0x328 0x710 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT5__UART2_TX_DATA 0x328 0x710 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT5__UART2_RX_DATA 0x328 0x710 0x904 0x1 0x5 --#define MX6DL_PAD_SD3_DAT5__GPIO7_IO00 0x328 0x710 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT6__SD3_DATA6 0x32c 0x714 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT6__UART1_RX_DATA 0x32c 0x714 0x8fc 0x1 0x2 --#define MX6DL_PAD_SD3_DAT6__UART1_TX_DATA 0x32c 0x714 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT6__GPIO6_IO18 0x32c 0x714 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_DAT7__SD3_DATA7 0x330 0x718 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_DAT7__UART1_TX_DATA 0x330 0x718 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_DAT7__UART1_RX_DATA 0x330 0x718 0x8fc 0x1 0x3 --#define MX6DL_PAD_SD3_DAT7__GPIO6_IO17 0x330 0x718 0x000 0x5 0x0 --#define MX6DL_PAD_SD3_RST__SD3_RESET 0x334 0x71c 0x000 0x0 0x0 --#define MX6DL_PAD_SD3_RST__UART3_RTS_B 0x334 0x71c 0x908 0x1 0x5 --#define MX6DL_PAD_SD3_RST__UART3_CTS_B 0x334 0x71c 0x000 0x1 0x0 --#define MX6DL_PAD_SD3_RST__GPIO7_IO08 0x334 0x71c 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_CLK__SD4_CLK 0x338 0x720 0x938 0x0 0x1 --#define MX6DL_PAD_SD4_CLK__NAND_WE_B 0x338 0x720 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_CLK__UART3_RX_DATA 0x338 0x720 0x90c 0x2 0x2 --#define MX6DL_PAD_SD4_CLK__UART3_TX_DATA 0x338 0x720 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_CLK__GPIO7_IO10 0x338 0x720 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_CMD__SD4_CMD 0x33c 0x724 0x000 0x0 0x0 --#define MX6DL_PAD_SD4_CMD__NAND_RE_B 0x33c 0x724 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_CMD__UART3_TX_DATA 0x33c 0x724 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_CMD__UART3_RX_DATA 0x33c 0x724 0x90c 0x2 0x3 --#define MX6DL_PAD_SD4_CMD__GPIO7_IO09 0x33c 0x724 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT0__SD4_DATA0 0x340 0x728 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT0__NAND_DQS 0x340 0x728 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT0__GPIO2_IO08 0x340 0x728 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT1__SD4_DATA1 0x344 0x72c 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT1__PWM3_OUT 0x344 0x72c 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT1__GPIO2_IO09 0x344 0x72c 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT2__SD4_DATA2 0x348 0x730 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT2__PWM4_OUT 0x348 0x730 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT2__GPIO2_IO10 0x348 0x730 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT3__SD4_DATA3 0x34c 0x734 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT3__GPIO2_IO11 0x34c 0x734 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT4__SD4_DATA4 0x350 0x738 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT4__UART2_RX_DATA 0x350 0x738 0x904 0x2 0x6 --#define MX6DL_PAD_SD4_DAT4__UART2_TX_DATA 0x350 0x738 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT4__GPIO2_IO12 0x350 0x738 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT5__SD4_DATA5 0x354 0x73c 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT5__UART2_RTS_B 0x354 0x73c 0x900 0x2 0x4 --#define MX6DL_PAD_SD4_DAT5__UART2_CTS_B 0x354 0x73c 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT5__GPIO2_IO13 0x354 0x73c 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT6__SD4_DATA6 0x358 0x740 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT6__UART2_CTS_B 0x358 0x740 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT6__UART2_RTS_B 0x358 0x740 0x900 0x2 0x5 --#define MX6DL_PAD_SD4_DAT6__GPIO2_IO14 0x358 0x740 0x000 0x5 0x0 --#define MX6DL_PAD_SD4_DAT7__SD4_DATA7 0x35c 0x744 0x000 0x1 0x0 --#define MX6DL_PAD_SD4_DAT7__UART2_TX_DATA 0x35c 0x744 0x000 0x2 0x0 --#define MX6DL_PAD_SD4_DAT7__UART2_RX_DATA 0x35c 0x744 0x904 0x2 0x7 --#define MX6DL_PAD_SD4_DAT7__GPIO2_IO15 0x35c 0x744 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x050 0x364 0x8fc 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x050 0x364 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x050 0x364 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x050 0x364 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x054 0x368 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x054 0x368 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x054 0x368 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA 0x054 0x368 0x914 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x054 0x368 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x054 0x368 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x058 0x36c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x058 0x36c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x058 0x36c 0x914 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA 0x058 0x36c 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x058 0x36c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x058 0x36c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x05c 0x370 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x05c 0x370 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x05c 0x370 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA 0x05c 0x370 0x91c 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x05c 0x370 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x05c 0x370 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x060 0x374 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x060 0x374 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x060 0x374 0x91c 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA 0x060 0x374 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x060 0x374 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x060 0x374 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x064 0x378 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x064 0x378 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x064 0x378 0x910 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B 0x064 0x378 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x064 0x378 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x064 0x378 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x068 0x37c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x068 0x37c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x068 0x37c 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B 0x068 0x37c 0x910 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x068 0x37c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x068 0x37c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x06c 0x380 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x06c 0x380 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x06c 0x380 0x918 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B 0x06c 0x380 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x06c 0x380 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x06c 0x380 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x070 0x384 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x070 0x384 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x070 0x384 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B 0x070 0x384 0x918 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x070 0x384 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x074 0x388 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x074 0x388 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x074 0x388 0x7d8 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__KEY_COL5 0x074 0x388 0x8c0 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x074 0x388 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x074 0x388 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x074 0x388 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x078 0x38c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x078 0x38c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x078 0x38c 0x7e0 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__KEY_ROW5 0x078 0x38c 0x8cc 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x078 0x38c 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x078 0x38c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x078 0x38c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x07c 0x390 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x07c 0x390 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x07c 0x390 0x7dc 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__KEY_COL6 0x07c 0x390 0x8c4 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x07c 0x390 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 0x07c 0x390 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x07c 0x390 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x080 0x394 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x080 0x394 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0 0x080 0x394 0x7e4 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__KEY_ROW6 0x080 0x394 0x8d0 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x080 0x394 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x080 0x394 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x080 0x394 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x084 0x398 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x084 0x398 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x084 0x398 0x7f4 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__KEY_COL7 0x084 0x398 0x8c8 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x084 0x398 0x86c 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x084 0x398 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x084 0x398 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x088 0x39c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x088 0x39c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x088 0x39c 0x7fc 0x2 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__KEY_ROW7 0x088 0x39c 0x8d4 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x088 0x39c 0x868 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x088 0x39c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x088 0x39c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x08c 0x3a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x08c 0x3a0 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x08c 0x3a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x08c 0x3a0 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x090 0x3a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x090 0x3a4 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x090 0x3a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x090 0x3a4 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x094 0x3a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x094 0x3a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x094 0x3a8 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x098 0x3ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x098 0x3ac 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x098 0x3ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x098 0x3ac 0x000 0x7 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x09c 0x3b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__LCD_CLK 0x09c 0x3b0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x09c 0x3b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__LCD_WR_RWN 0x09c 0x3b0 0x000 0x8 0x0 -+#define MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x0a0 0x3b4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN15__LCD_ENABLE 0x0a0 0x3b4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x0a0 0x3b4 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x0a0 0x3b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN15__LCD_RD_E 0x0a0 0x3b4 0x000 0x8 0x0 -+#define MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x0a4 0x3b8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN2__LCD_HSYNC 0x0a4 0x3b8 0x8d8 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x0a4 0x3b8 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x0a4 0x3b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN2__LCD_RS 0x0a4 0x3b8 0x000 0x8 0x0 -+#define MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x0a8 0x3bc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN3__LCD_VSYNC 0x0a8 0x3bc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x0a8 0x3bc 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x0a8 0x3bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN3__LCD_CS 0x0a8 0x3bc 0x000 0x8 0x0 -+#define MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x0ac 0x3c0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN4__LCD_BUSY 0x0ac 0x3c0 0x8d8 0x1 0x1 -+#define MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x0ac 0x3c0 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN4__SD1_WP 0x0ac 0x3c0 0x92c 0x3 0x0 -+#define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0ac 0x3c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN4__LCD_RESET 0x0ac 0x3c0 0x000 0x8 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x0b0 0x3c4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__LCD_DATA00 0x0b0 0x3c4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x0b0 0x3c4 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x0b0 0x3c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x0b4 0x3c8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__LCD_DATA01 0x0b4 0x3c8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x0b4 0x3c8 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 0x0b4 0x3c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x0b8 0x3cc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__LCD_DATA10 0x0b8 0x3cc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x0b8 0x3cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x0bc 0x3d0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__LCD_DATA11 0x0bc 0x3d0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x0bc 0x3d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x0c0 0x3d4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__LCD_DATA12 0x0c0 0x3d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x0c0 0x3d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x0c4 0x3d8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__LCD_DATA13 0x0c4 0x3d8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x0c4 0x3d8 0x7bc 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x0c4 0x3d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x0c8 0x3dc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__LCD_DATA14 0x0c8 0x3dc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x0c8 0x3dc 0x7b8 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x0c8 0x3dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x0cc 0x3e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__LCD_DATA15 0x0cc 0x3e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1 0x0cc 0x3e0 0x7e8 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1 0x0cc 0x3e0 0x804 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x0cc 0x3e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x0d0 0x3e4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__LCD_DATA16 0x0d0 0x3e4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x0d0 0x3e4 0x7fc 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x0d0 0x3e4 0x7c0 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 0x0d0 0x3e4 0x8e8 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x0d0 0x3e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x0d4 0x3e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__LCD_DATA17 0x0d4 0x3e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x0d4 0x3e8 0x7f8 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x0d4 0x3e8 0x7b4 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 0x0d4 0x3e8 0x8ec 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0d4 0x3e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x0d8 0x3ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__LCD_DATA18 0x0d8 0x3ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0 0x0d8 0x3ec 0x800 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x0d8 0x3ec 0x7c4 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS 0x0d8 0x3ec 0x7a4 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0d8 0x3ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B 0x0d8 0x3ec 0x000 0x7 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x0dc 0x3f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__LCD_DATA19 0x0dc 0x3f0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x0dc 0x3f0 0x7f4 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x0dc 0x3f0 0x7b0 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__AUD4_RXC 0x0dc 0x3f0 0x7a0 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0dc 0x3f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B 0x0dc 0x3f0 0x000 0x7 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x0e0 0x3f4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__LCD_DATA02 0x0e0 0x3f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x0e0 0x3f4 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 0x0e0 0x3f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x0e4 0x3f8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__LCD_DATA20 0x0e4 0x3f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK 0x0e4 0x3f8 0x7d8 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x0e4 0x3f8 0x7a8 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x0e4 0x3f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x0e8 0x3fc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__LCD_DATA21 0x0e8 0x3fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI 0x0e8 0x3fc 0x7e0 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x0e8 0x3fc 0x79c 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0e8 0x3fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x0ec 0x400 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__LCD_DATA22 0x0ec 0x400 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO 0x0ec 0x400 0x7dc 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x0ec 0x400 0x7ac 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0ec 0x400 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x0f0 0x404 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__LCD_DATA23 0x0f0 0x404 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0 0x0f0 0x404 0x7e4 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x0f0 0x404 0x798 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0f0 0x404 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x0f4 0x408 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__LCD_DATA03 0x0f4 0x408 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0 0x0f4 0x408 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x0f4 0x408 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x0f8 0x40c 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__LCD_DATA04 0x0f8 0x40c 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1 0x0f8 0x40c 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x0f8 0x40c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x0fc 0x410 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__LCD_DATA05 0x0fc 0x410 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2 0x0fc 0x410 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS 0x0fc 0x410 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x0fc 0x410 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100 0x414 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__LCD_DATA06 0x100 0x414 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3 0x100 0x414 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__AUD6_RXC 0x100 0x414 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x100 0x414 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x104 0x418 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__LCD_DATA07 0x104 0x418 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY 0x104 0x418 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x104 0x418 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x108 0x41c 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__LCD_DATA08 0x108 0x41c 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x108 0x41c 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x108 0x41c 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x108 0x41c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10c 0x420 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__LCD_DATA09 0x10c 0x420 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x10c 0x420 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__WDOG2_B 0x10c 0x420 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x10c 0x420 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A16__EIM_ADDR16 0x110 0x4e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x110 0x4e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A16__IPU1_CSI1_PIXCLK 0x110 0x4e0 0x8b8 0x2 0x0 -+#define MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x110 0x4e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16 0x110 0x4e0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A16__EPDC_DATA00 0x110 0x4e0 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A17__EIM_ADDR17 0x114 0x4e4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x114 0x4e4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A17__IPU1_CSI1_DATA12 0x114 0x4e4 0x890 0x2 0x0 -+#define MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x114 0x4e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17 0x114 0x4e4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A17__EPDC_PWR_STAT 0x114 0x4e4 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A18__EIM_ADDR18 0x118 0x4e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x118 0x4e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A18__IPU1_CSI1_DATA13 0x118 0x4e8 0x894 0x2 0x0 -+#define MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x118 0x4e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18 0x118 0x4e8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A18__EPDC_PWR_CTRL0 0x118 0x4e8 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A19__EIM_ADDR19 0x11c 0x4ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x11c 0x4ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A19__IPU1_CSI1_DATA14 0x11c 0x4ec 0x898 0x2 0x0 -+#define MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x11c 0x4ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19 0x11c 0x4ec 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A19__EPDC_PWR_CTRL1 0x11c 0x4ec 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A20__EIM_ADDR20 0x120 0x4f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x120 0x4f0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A20__IPU1_CSI1_DATA15 0x120 0x4f0 0x89c 0x2 0x0 -+#define MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x120 0x4f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20 0x120 0x4f0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A20__EPDC_PWR_CTRL2 0x120 0x4f0 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A21__EIM_ADDR21 0x124 0x4f4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x124 0x4f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A21__IPU1_CSI1_DATA16 0x124 0x4f4 0x8a0 0x2 0x0 -+#define MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x124 0x4f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21 0x124 0x4f4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A21__EPDC_GDCLK 0x124 0x4f4 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A22__EIM_ADDR22 0x128 0x4f8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x128 0x4f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A22__IPU1_CSI1_DATA17 0x128 0x4f8 0x8a4 0x2 0x0 -+#define MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x128 0x4f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22 0x128 0x4f8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A22__EPDC_GDSP 0x128 0x4f8 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A23__EIM_ADDR23 0x12c 0x4fc 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x12c 0x4fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU1_CSI1_DATA18 0x12c 0x4fc 0x8a8 0x2 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU1_SISG3 0x12c 0x4fc 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x12c 0x4fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23 0x12c 0x4fc 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A23__EPDC_GDOE 0x12c 0x4fc 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A24__EIM_ADDR24 0x130 0x500 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x130 0x500 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU1_CSI1_DATA19 0x130 0x500 0x8ac 0x2 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU1_SISG2 0x130 0x500 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x130 0x500 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24 0x130 0x500 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A24__EPDC_GDRL 0x130 0x500 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A25__EIM_ADDR25 0x134 0x504 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A25__ECSPI4_SS1 0x134 0x504 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A25__ECSPI2_RDY 0x134 0x504 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12 0x134 0x504 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS 0x134 0x504 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x134 0x504 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x134 0x504 0x85c 0x6 0x0 -+#define MX6QDL_PAD_EIM_A25__EPDC_DATA15 0x134 0x504 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_A25__EIM_ACLK_FREERUN 0x134 0x504 0x000 0x9 0x0 -+#define MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0x138 0x508 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16 0x138 0x508 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x138 0x508 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_BCLK__EPDC_SDCE9 0x138 0x508 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0x13c 0x50c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05 0x13c 0x50c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 -+#define MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x13c 0x50c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_CS0__EPDC_DATA06 0x13c 0x50c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0x140 0x510 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06 0x140 0x510 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x140 0x510 0x7fc 0x2 0x2 -+#define MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x140 0x510 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_CS1__EPDC_DATA08 0x140 0x510 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D16__EIM_DATA16 0x144 0x514 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x144 0x514 0x7d8 0x1 0x2 -+#define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 0x144 0x514 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D16__IPU1_CSI1_DATA18 0x144 0x514 0x8a8 0x3 0x1 -+#define MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x144 0x514 0x864 0x4 0x0 -+#define MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x144 0x514 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D16__I2C2_SDA 0x144 0x514 0x874 0x6 0x0 -+#define MX6QDL_PAD_EIM_D16__EPDC_DATA10 0x144 0x514 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D17__EIM_DATA17 0x148 0x518 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x148 0x518 0x7dc 0x1 0x2 -+#define MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06 0x148 0x518 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D17__IPU1_CSI1_PIXCLK 0x148 0x518 0x8b8 0x3 0x1 -+#define MX6QDL_PAD_EIM_D17__DCIC1_OUT 0x148 0x518 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x148 0x518 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D17__I2C3_SCL 0x148 0x518 0x878 0x6 0x0 -+#define MX6QDL_PAD_EIM_D17__EPDC_VCOM0 0x148 0x518 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D18__EIM_DATA18 0x14c 0x51c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x14c 0x51c 0x7e0 0x1 0x2 -+#define MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07 0x14c 0x51c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D18__IPU1_CSI1_DATA17 0x14c 0x51c 0x8a4 0x3 0x1 -+#define MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS 0x14c 0x51c 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x14c 0x51c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D18__I2C3_SDA 0x14c 0x51c 0x87c 0x6 0x0 -+#define MX6QDL_PAD_EIM_D18__EPDC_VCOM1 0x14c 0x51c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D19__EIM_DATA19 0x150 0x520 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D19__ECSPI1_SS1 0x150 0x520 0x7e8 0x1 0x1 -+#define MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08 0x150 0x520 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D19__IPU1_CSI1_DATA16 0x150 0x520 0x8a0 0x3 0x1 -+#define MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x150 0x520 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x150 0x520 0x8f8 0x4 0x0 -+#define MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x150 0x520 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D19__EPIT1_OUT 0x150 0x520 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D19__EPDC_DATA12 0x150 0x520 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D20__EIM_DATA20 0x154 0x524 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D20__ECSPI4_SS0 0x154 0x524 0x808 0x1 0x0 -+#define MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16 0x154 0x524 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D20__IPU1_CSI1_DATA15 0x154 0x524 0x89c 0x3 0x1 -+#define MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x154 0x524 0x8f8 0x4 0x1 -+#define MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x154 0x524 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x154 0x524 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D20__EPIT2_OUT 0x154 0x524 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D21__EIM_DATA21 0x158 0x528 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x158 0x528 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17 0x158 0x528 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D21__IPU1_CSI1_DATA11 0x158 0x528 0x88c 0x3 0x0 -+#define MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x158 0x528 0x920 0x4 0x0 -+#define MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x158 0x528 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D21__I2C1_SCL 0x158 0x528 0x868 0x6 0x1 -+#define MX6QDL_PAD_EIM_D21__SPDIF_IN 0x158 0x528 0x8f0 0x7 0x0 -+#define MX6QDL_PAD_EIM_D22__EIM_DATA22 0x15c 0x52c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x15c 0x52c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01 0x15c 0x52c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D22__IPU1_CSI1_DATA10 0x15c 0x52c 0x888 0x3 0x0 -+#define MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x15c 0x52c 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x15c 0x52c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D22__SPDIF_OUT 0x15c 0x52c 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D22__EPDC_SDCE6 0x15c 0x52c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D23__EIM_DATA23 0x160 0x530 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS 0x160 0x530 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x160 0x530 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x160 0x530 0x908 0x2 0x0 -+#define MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x160 0x530 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_CSI1_DATA_EN 0x160 0x530 0x8b0 0x4 0x0 -+#define MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x160 0x530 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02 0x160 0x530 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14 0x160 0x530 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D23__EPDC_DATA11 0x160 0x530 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D24__EIM_DATA24 0x164 0x534 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI4_SS2 0x164 0x534 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x164 0x534 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x164 0x534 0x90c 0x2 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI1_SS2 0x164 0x534 0x7ec 0x3 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI2_SS2 0x164 0x534 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x164 0x534 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x164 0x534 0x7bc 0x6 0x1 -+#define MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x164 0x534 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D24__EPDC_SDCE7 0x164 0x534 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D25__EIM_DATA25 0x168 0x538 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI4_SS3 0x168 0x538 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x168 0x538 0x90c 0x2 0x1 -+#define MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x168 0x538 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI1_SS3 0x168 0x538 0x7f0 0x3 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI2_SS3 0x168 0x538 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x168 0x538 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D25__AUD5_RXC 0x168 0x538 0x7b8 0x6 0x1 -+#define MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x168 0x538 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D25__EPDC_SDCE8 0x168 0x538 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D26__EIM_DATA26 0x16c 0x53c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11 0x16c 0x53c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01 0x16c 0x53c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_CSI1_DATA14 0x16c 0x53c 0x898 0x3 0x1 -+#define MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x16c 0x53c 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x16c 0x53c 0x904 0x4 0x0 -+#define MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x16c 0x53c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_SISG2 0x16c 0x53c 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x16c 0x53c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D26__EPDC_SDOED 0x16c 0x53c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D27__EIM_DATA27 0x170 0x540 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13 0x170 0x540 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00 0x170 0x540 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_CSI1_DATA13 0x170 0x540 0x894 0x3 0x1 -+#define MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x170 0x540 0x904 0x4 0x1 -+#define MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x170 0x540 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x170 0x540 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_SISG3 0x170 0x540 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x170 0x540 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D27__EPDC_SDOE 0x170 0x540 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D28__EIM_DATA28 0x174 0x544 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D28__I2C1_SDA 0x174 0x544 0x86c 0x1 0x1 -+#define MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x174 0x544 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU1_CSI1_DATA12 0x174 0x544 0x890 0x3 0x1 -+#define MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x174 0x544 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_RTS_B 0x174 0x544 0x900 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x174 0x544 0x900 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B 0x174 0x544 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x174 0x544 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG 0x174 0x544 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13 0x174 0x544 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D28__EPDC_PWR_CTRL3 0x174 0x544 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D29__EIM_DATA29 0x178 0x548 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15 0x178 0x548 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x178 0x548 0x808 0x2 0x1 -+#define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x178 0x548 0x900 0x4 0x1 -+#define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x178 0x548 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x178 0x548 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x178 0x548 0x900 0x4 0x1 -+#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x178 0x548 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0x178 0x548 0x8bc 0x6 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x178 0x548 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D29__EPDC_PWR_WAKE 0x178 0x548 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D30__EIM_DATA30 0x17c 0x54c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x17c 0x54c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11 0x17c 0x54c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03 0x17c 0x54c 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x17c 0x54c 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x17c 0x54c 0x908 0x4 0x1 -+#define MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x17c 0x54c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D30__USB_H1_OC 0x17c 0x54c 0x924 0x6 0x0 -+#define MX6QDL_PAD_EIM_D30__EPDC_SDOEZ 0x17c 0x54c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D31__EIM_DATA31 0x180 0x550 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x180 0x550 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12 0x180 0x550 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02 0x180 0x550 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x180 0x550 0x908 0x4 0x2 -+#define MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x180 0x550 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x180 0x550 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D31__USB_H1_PWR 0x180 0x550 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D31__EPDC_SDCLK_P 0x180 0x550 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_D31__EIM_ACLK_FREERUN 0x180 0x550 0x000 0x9 0x0 -+#define MX6QDL_PAD_EIM_DA0__EIM_AD00 0x184 0x554 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x184 0x554 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA0__IPU1_CSI1_DATA09 0x184 0x554 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x184 0x554 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 0x184 0x554 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA0__EPDC_SDCLK_N 0x184 0x554 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA1__EIM_AD01 0x188 0x558 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x188 0x558 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA1__IPU1_CSI1_DATA08 0x188 0x558 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x188 0x558 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01 0x188 0x558 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA1__EPDC_SDLE 0x188 0x558 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA10__EIM_AD10 0x18c 0x55c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x18c 0x55c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA10__IPU1_CSI1_DATA_EN 0x18c 0x55c 0x8b0 0x2 0x1 -+#define MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x18c 0x55c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10 0x18c 0x55c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA10__EPDC_DATA01 0x18c 0x55c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA11__EIM_AD11 0x190 0x560 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x190 0x560 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA11__IPU1_CSI1_HSYNC 0x190 0x560 0x8b4 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x190 0x560 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11 0x190 0x560 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA11__EPDC_DATA03 0x190 0x560 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA12__EIM_AD12 0x194 0x564 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x194 0x564 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA12__IPU1_CSI1_VSYNC 0x194 0x564 0x8bc 0x2 0x1 -+#define MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x194 0x564 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12 0x194 0x564 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA12__EPDC_DATA02 0x194 0x564 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA13__EIM_AD13 0x198 0x568 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS 0x198 0x568 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x198 0x568 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13 0x198 0x568 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA13__EPDC_DATA13 0x198 0x568 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA14__EIM_AD14 0x19c 0x56c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS 0x19c 0x56c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x19c 0x56c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14 0x19c 0x56c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA14__EPDC_DATA14 0x19c 0x56c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA15__EIM_AD15 0x1a0 0x570 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01 0x1a0 0x570 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04 0x1a0 0x570 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1a0 0x570 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15 0x1a0 0x570 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA15__EPDC_DATA09 0x1a0 0x570 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA2__EIM_AD02 0x1a4 0x574 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x1a4 0x574 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA2__IPU1_CSI1_DATA07 0x1a4 0x574 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1a4 0x574 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02 0x1a4 0x574 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA2__EPDC_BDR0 0x1a4 0x574 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA3__EIM_AD03 0x1a8 0x578 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x1a8 0x578 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA3__IPU1_CSI1_DATA06 0x1a8 0x578 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1a8 0x578 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03 0x1a8 0x578 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA3__EPDC_BDR1 0x1a8 0x578 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA4__EIM_AD04 0x1ac 0x57c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x1ac 0x57c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA4__IPU1_CSI1_DATA05 0x1ac 0x57c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1ac 0x57c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04 0x1ac 0x57c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA4__EPDC_SDCE0 0x1ac 0x57c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA5__EIM_AD05 0x1b0 0x580 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x1b0 0x580 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA5__IPU1_CSI1_DATA04 0x1b0 0x580 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b0 0x580 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05 0x1b0 0x580 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA5__EPDC_SDCE1 0x1b0 0x580 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA6__EIM_AD06 0x1b4 0x584 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x1b4 0x584 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA6__IPU1_CSI1_DATA03 0x1b4 0x584 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b4 0x584 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06 0x1b4 0x584 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA6__EPDC_SDCE2 0x1b4 0x584 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA7__EIM_AD07 0x1b8 0x588 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x1b8 0x588 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA7__IPU1_CSI1_DATA02 0x1b8 0x588 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b8 0x588 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07 0x1b8 0x588 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA7__EPDC_SDCE3 0x1b8 0x588 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA8__EIM_AD08 0x1bc 0x58c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x1bc 0x58c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA8__IPU1_CSI1_DATA01 0x1bc 0x58c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1bc 0x58c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08 0x1bc 0x58c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA8__EPDC_SDCE4 0x1bc 0x58c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_DA9__EIM_AD09 0x1c0 0x590 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x1c0 0x590 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA9__IPU1_CSI1_DATA00 0x1c0 0x590 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1c0 0x590 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09 0x1c0 0x590 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA9__EPDC_SDCE5 0x1c0 0x590 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_EB0__EIM_EB0_B 0x1c4 0x594 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x1c4 0x594 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB0__IPU1_CSI1_DATA11 0x1c4 0x594 0x88c 0x2 0x1 -+#define MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY 0x1c4 0x594 0x7d4 0x4 0x0 -+#define MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1c4 0x594 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27 0x1c4 0x594 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB0__EPDC_PWR_COM 0x1c4 0x594 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_EB1__EIM_EB1_B 0x1c8 0x598 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x1c8 0x598 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB1__IPU1_CSI1_DATA10 0x1c8 0x598 0x888 0x2 0x1 -+#define MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1c8 0x598 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28 0x1c8 0x598 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB1__EPDC_SDSHR 0x1c8 0x598 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_EB2__EIM_EB2_B 0x1cc 0x59c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB2__ECSPI1_SS0 0x1cc 0x59c 0x7e4 0x1 0x2 -+#define MX6QDL_PAD_EIM_EB2__IPU1_CSI1_DATA19 0x1cc 0x59c 0x8ac 0x3 0x1 -+#define MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x1cc 0x59c 0x860 0x4 0x0 -+#define MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1cc 0x59c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x1cc 0x59c 0x870 0x6 0x0 -+#define MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30 0x1cc 0x59c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB2__EPDC_DATA05 0x1cc 0x59c 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_EB3__EIM_EB3_B 0x1d0 0x5a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB3__ECSPI4_RDY 0x1d0 0x5a0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1d0 0x5a0 0x908 0x2 0x3 -+#define MX6QDL_PAD_EIM_EB3__UART3_CTS_B 0x1d0 0x5a0 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_EB3__UART1_RI_B 0x1d0 0x5a0 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0x1d0 0x5a0 0x8b4 0x4 0x1 -+#define MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1d0 0x5a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03 0x1d0 0x5a0 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31 0x1d0 0x5a0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB3__EPDC_SDCE0 0x1d0 0x5a0 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_EB3__EIM_ACLK_FREERUN 0x1d0 0x5a0 0x000 0x9 0x0 -+#define MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0x1d4 0x5a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17 0x1d4 0x5a4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 0x1d4 0x5a4 0x804 0x2 0x1 -+#define MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1d4 0x5a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26 0x1d4 0x5a4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_LBA__EPDC_DATA04 0x1d4 0x5a4 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_OE__EIM_OE_B 0x1d8 0x5a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07 0x1d8 0x5a8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x1d8 0x5a8 0x7f8 0x2 0x2 -+#define MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1d8 0x5a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_OE__EPDC_PWR_IRQ 0x1d8 0x5a8 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_RW__EIM_RW 0x1dc 0x5ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08 0x1dc 0x5ac 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_RW__ECSPI2_SS0 0x1dc 0x5ac 0x800 0x2 0x2 -+#define MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1dc 0x5ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29 0x1dc 0x5ac 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_RW__EPDC_DATA07 0x1dc 0x5ac 0x000 0x8 0x0 -+#define MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0x1e0 0x5b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B 0x1e0 0x5b0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1e0 0x5b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25 0x1e0 0x5b0 0x000 0x7 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1e4 0x5b4 0x828 0x1 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1e4 0x5b4 0x840 0x2 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK 0x1e4 0x5b4 0x8f4 0x3 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1e4 0x5b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDC__MLB_DATA 0x1e8 0x5b8 0x8e0 0x0 0x0 -+#define MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1e8 0x5b8 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1e8 0x5b8 0x858 0x2 0x0 -+#define MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN 0x1e8 0x5b8 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0x1e8 0x5b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1ec 0x5bc 0x810 0x1 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1ec 0x5bc 0x83c 0x2 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT 0x1ec 0x5bc 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x1ec 0x5bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK 0x1ec 0x5bc 0x000 0x6 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1f0 0x5c0 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1f0 0x5c0 0x82c 0x2 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1f0 0x5c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1f0 0x5c0 0x000 0x6 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1f4 0x5c4 0x790 0x0 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1f4 0x5c4 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1f4 0x5c4 0x834 0x2 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1 -+#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0 -+#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0 -+#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0 -+#define MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1f8 0x5c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_RXD1__MLB_SIG 0x1fc 0x5cc 0x8e4 0x0 0x0 -+#define MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1fc 0x5cc 0x81c 0x1 0x0 -+#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1fc 0x5cc 0x830 0x2 0x0 -+#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1fc 0x5cc 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1fc 0x5cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x200 0x5d0 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x200 0x5d0 0x850 0x2 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x200 0x5d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__I2C4_SCL 0x200 0x5d0 0x880 0x9 0x0 -+#define MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x204 0x5d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x204 0x5d4 0x854 0x2 0x0 -+#define MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x204 0x5d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x208 0x5d8 0x8dc 0x0 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x208 0x5d8 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x208 0x5d8 0x84c 0x2 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN 0x208 0x5d8 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x208 0x5d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TXD1__I2C4_SDA 0x208 0x5d8 0x884 0x9 0x0 -+#define MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x20c 0x5dc 0x000 0x0 0x0 -+#define MX6QDL_PAD_GPIO_0__KEY_COL5 0x20c 0x5dc 0x8c0 0x2 0x1 -+#define MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK 0x20c 0x5dc 0x794 0x3 0x0 -+#define MX6QDL_PAD_GPIO_0__EPIT1_OUT 0x20c 0x5dc 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x20c 0x5dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x20c 0x5dc 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_0__SNVS_VIO_5 0x20c 0x5dc 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x210 0x5e0 0x83c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_1__WDOG2_B 0x210 0x5e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x210 0x5e0 0x8cc 0x2 0x1 -+#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x210 0x5e0 0x790 0x3 0x1 -+#define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x210 0x5e0 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x210 0x5e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x210 0x5e0 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2 0x214 0x5e4 0x850 0x0 0x1 -+#define MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN 0x214 0x5e4 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x214 0x5e4 0x80c 0x2 0x0 -+#define MX6QDL_PAD_GPIO_16__SD1_LCTL 0x214 0x5e4 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_16__SPDIF_IN 0x214 0x5e4 0x8f0 0x4 0x2 -+#define MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x214 0x5e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_16__I2C3_SDA 0x214 0x5e4 0x87c 0x6 0x1 -+#define MX6QDL_PAD_GPIO_16__JTAG_DE_B 0x214 0x5e4 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_17__ESAI_TX0 0x218 0x5e8 0x844 0x0 0x0 -+#define MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN 0x218 0x5e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_17__CCM_PMIC_READY 0x218 0x5e8 0x7d4 0x2 0x1 -+#define MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0 0x218 0x5e8 0x8e8 0x3 0x1 -+#define MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x218 0x5e8 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x218 0x5e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_18__ESAI_TX1 0x21c 0x5ec 0x848 0x0 0x0 -+#define MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x21c 0x5ec 0x814 0x1 0x0 -+#define MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x21c 0x5ec 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1 0x21c 0x5ec 0x8ec 0x3 0x1 -+#define MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK 0x21c 0x5ec 0x794 0x4 0x1 -+#define MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x21c 0x5ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL 0x21c 0x5ec 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_19__KEY_COL5 0x220 0x5f0 0x8c0 0x0 0x2 -+#define MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT 0x220 0x5f0 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x220 0x5f0 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_19__CCM_CLKO1 0x220 0x5f0 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_19__ECSPI1_RDY 0x220 0x5f0 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x220 0x5f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x220 0x5f0 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_2__ESAI_TX_FS 0x224 0x5f4 0x830 0x0 0x1 -+#define MX6QDL_PAD_GPIO_2__KEY_ROW6 0x224 0x5f4 0x8d0 0x2 0x1 -+#define MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x224 0x5f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_2__SD2_WP 0x224 0x5f4 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_2__MLB_DATA 0x224 0x5f4 0x8e0 0x7 0x1 -+#define MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK 0x228 0x5f8 0x834 0x0 0x1 -+#define MX6QDL_PAD_GPIO_3__I2C3_SCL 0x228 0x5f8 0x878 0x2 0x1 -+#define MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x228 0x5f8 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x228 0x5f8 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x228 0x5f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_3__USB_H1_OC 0x228 0x5f8 0x924 0x6 0x1 -+#define MX6QDL_PAD_GPIO_3__MLB_CLK 0x228 0x5f8 0x8dc 0x7 0x1 -+#define MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK 0x22c 0x5fc 0x838 0x0 0x1 -+#define MX6QDL_PAD_GPIO_4__KEY_COL7 0x22c 0x5fc 0x8c8 0x2 0x1 -+#define MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x22c 0x5fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_4__SD2_CD_B 0x22c 0x5fc 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x230 0x600 0x84c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_5__KEY_ROW7 0x230 0x600 0x8d4 0x2 0x1 -+#define MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x230 0x600 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x230 0x600 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_5__I2C3_SCL 0x230 0x600 0x878 0x6 0x2 -+#define MX6QDL_PAD_GPIO_5__ARM_EVENTI 0x230 0x600 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK 0x234 0x604 0x840 0x0 0x1 -+#define MX6QDL_PAD_GPIO_6__I2C3_SDA 0x234 0x604 0x87c 0x2 0x2 -+#define MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x234 0x604 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_6__SD2_LCTL 0x234 0x604 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_6__MLB_SIG 0x234 0x604 0x8e4 0x7 0x1 -+#define MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1 0x238 0x608 0x854 0x0 0x1 -+#define MX6QDL_PAD_GPIO_7__EPIT1_OUT 0x238 0x608 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x238 0x608 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x238 0x608 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_7__UART2_RX_DATA 0x238 0x608 0x904 0x4 0x2 -+#define MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x238 0x608 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_7__SPDIF_LOCK 0x238 0x608 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE 0x238 0x608 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_7__I2C4_SCL 0x238 0x608 0x880 0x8 0x1 -+#define MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0 0x23c 0x60c 0x858 0x0 0x1 -+#define MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x23c 0x60c 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_8__EPIT2_OUT 0x23c 0x60c 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x23c 0x60c 0x7c8 0x3 0x0 -+#define MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x23c 0x60c 0x904 0x4 0x3 -+#define MX6QDL_PAD_GPIO_8__UART2_TX_DATA 0x23c 0x60c 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x23c 0x60c 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK 0x23c 0x60c 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE 0x23c 0x60c 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_8__I2C4_SDA 0x23c 0x60c 0x884 0x8 0x1 -+#define MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x240 0x610 0x82c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_9__WDOG1_B 0x240 0x610 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_9__KEY_COL6 0x240 0x610 0x8c4 0x2 0x1 -+#define MX6QDL_PAD_GPIO_9__CCM_REF_EN_B 0x240 0x610 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_9__PWM1_OUT 0x240 0x610 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x240 0x610 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_9__SD1_WP 0x240 0x610 0x92c 0x6 0x1 -+#define MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x244 0x62c 0x7d8 0x0 0x3 -+#define MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x244 0x62c 0x824 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x244 0x62c 0x7c0 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL0__KEY_COL0 0x244 0x62c 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x244 0x62c 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x244 0x62c 0x914 0x4 0x2 -+#define MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x244 0x62c 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL0__DCIC1_OUT 0x244 0x62c 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x248 0x630 0x7dc 0x0 0x3 -+#define MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x248 0x630 0x810 0x1 0x1 -+#define MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x248 0x630 0x7c4 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL1__KEY_COL1 0x248 0x630 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x248 0x630 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x248 0x630 0x91c 0x4 0x2 -+#define MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x248 0x630 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL1__SD1_VSELECT 0x248 0x630 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x24c 0x634 0x7e8 0x0 0x2 -+#define MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x24c 0x634 0x820 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x24c 0x634 0x000 0x2 0x0 -+#define MX6QDL_PAD_KEY_COL2__KEY_COL2 0x24c 0x634 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL2__ENET_MDC 0x24c 0x634 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x24c 0x634 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE 0x24c 0x634 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL3__ECSPI1_SS3 0x250 0x638 0x7f0 0x0 0x1 -+#define MX6QDL_PAD_KEY_COL3__ENET_CRS 0x250 0x638 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x250 0x638 0x860 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL3__KEY_COL3 0x250 0x638 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x250 0x638 0x870 0x4 0x1 -+#define MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x250 0x638 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x250 0x638 0x8f0 0x6 0x3 -+#define MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x254 0x63c 0x000 0x0 0x0 -+#define MX6QDL_PAD_KEY_COL4__IPU1_SISG4 0x254 0x63c 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x254 0x63c 0x920 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL4__KEY_COL4 0x254 0x63c 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x254 0x63c 0x918 0x4 0x2 -+#define MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x254 0x63c 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x254 0x63c 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x258 0x640 0x7e0 0x0 0x3 -+#define MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x258 0x640 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x258 0x640 0x7b4 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW0__KEY_ROW0 0x258 0x640 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x258 0x640 0x914 0x4 0x3 -+#define MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x258 0x640 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x258 0x640 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW0__DCIC2_OUT 0x258 0x640 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x25c 0x644 0x7e4 0x0 0x3 -+#define MX6QDL_PAD_KEY_ROW1__ENET_COL 0x25c 0x644 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x25c 0x644 0x7b0 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x25c 0x644 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x25c 0x644 0x91c 0x4 0x3 -+#define MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x25c 0x644 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x25c 0x644 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x25c 0x644 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2 0x260 0x648 0x7ec 0x0 0x1 -+#define MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x260 0x648 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x260 0x648 0x7c8 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x260 0x648 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW2__SD2_VSELECT 0x260 0x648 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x260 0x648 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x260 0x648 0x85c 0x6 0x1 -+#define MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK 0x264 0x64c 0x794 0x1 0x2 -+#define MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x264 0x64c 0x864 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x264 0x64c 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x264 0x64c 0x874 0x4 0x1 -+#define MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x264 0x64c 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW3__SD1_VSELECT 0x264 0x64c 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x268 0x650 0x7cc 0x0 0x0 -+#define MX6QDL_PAD_KEY_ROW4__IPU1_SISG5 0x268 0x650 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x268 0x650 0x000 0x2 0x0 -+#define MX6QDL_PAD_KEY_ROW4__KEY_ROW4 0x268 0x650 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x268 0x650 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x268 0x650 0x918 0x4 0x3 -+#define MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x268 0x650 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x26c 0x654 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x26c 0x654 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x26c 0x654 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x270 0x658 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x270 0x658 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x274 0x65c 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x274 0x65c 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0x278 0x660 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS1__SD4_VSELECT 0x278 0x660 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x278 0x660 0x000 0x2 0x0 -+#define MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x278 0x660 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0x27c 0x664 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS2__IPU1_SISG0 0x27c 0x664 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x27c 0x664 0x844 0x2 0x1 -+#define MX6QDL_PAD_NANDF_CS2__EIM_CRE 0x27c 0x664 0x000 0x3 0x0 -+#define MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x27c 0x664 0x000 0x4 0x0 -+#define MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x27c 0x664 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0x280 0x668 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS3__IPU1_SISG1 0x280 0x668 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x280 0x668 0x848 0x2 0x1 -+#define MX6QDL_PAD_NANDF_CS3__EIM_ADDR26 0x280 0x668 0x000 0x3 0x0 -+#define MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x280 0x668 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS3__I2C4_SDA 0x280 0x668 0x884 0x9 0x2 -+#define MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x284 0x66c 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x284 0x66c 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x284 0x66c 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x288 0x670 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x288 0x670 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x288 0x670 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x28c 0x674 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x28c 0x674 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x28c 0x674 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x290 0x678 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x290 0x678 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x290 0x678 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x294 0x67c 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x294 0x67c 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x294 0x67c 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x298 0x680 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x298 0x680 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x298 0x680 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x29c 0x684 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x29c 0x684 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x29c 0x684 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x2a0 0x688 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x2a0 0x688 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x2a0 0x688 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x2a4 0x68c 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x2a4 0x68c 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x2a8 0x690 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x2a8 0x690 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__I2C4_SCL 0x2a8 0x690 0x880 0x9 0x2 -+#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY 0x2ac 0x694 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x2ac 0x694 0x818 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x2ac 0x694 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG 0x2b0 0x698 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x2b0 0x698 0x81c 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 0x2b0 0x698 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA 0x2b4 0x69c 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x2b4 0x69c 0x820 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 0x2b4 0x69c 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE 0x2b8 0x6a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x2b8 0x6a0 0x824 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 0x2b8 0x6a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x2bc 0x6a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x2bc 0x6a4 0x828 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x2bc 0x6a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x2c0 0x6a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x2c0 0x6a8 0x814 0x1 0x1 -+#define MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x2c0 0x6a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY 0x2c4 0x6ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x2c4 0x6ac 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x2c4 0x6ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG 0x2c8 0x6b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x2c8 0x6b0 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x2c8 0x6b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA 0x2cc 0x6b4 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x2cc 0x6b4 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x2cc 0x6b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE 0x2d0 0x6b8 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x2d0 0x6b8 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x2d0 0x6b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x2d4 0x6bc 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x2d4 0x6bc 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x2d4 0x6bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK 0x2d4 0x6bc 0x80c 0x7 0x1 -+#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x2d8 0x6c0 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x2d8 0x6c0 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x2d8 0x6c0 0x8f4 0x2 0x1 -+#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO19 0x2d8 0x6c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M 0x2d8 0x6c0 0x000 0x7 0x0 -+#define MX6QDL_PAD_SD1_CLK__SD1_CLK 0x2dc 0x6c4 0x928 0x0 0x1 -+#define MX6QDL_PAD_SD1_CLK__GPT_CLKIN 0x2dc 0x6c4 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x2dc 0x6c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_CMD__SD1_CMD 0x2e0 0x6c8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x2e0 0x6c8 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_CMD__GPT_COMPARE1 0x2e0 0x6c8 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x2e0 0x6c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x2e4 0x6cc 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x2e4 0x6cc 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x2e4 0x6cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x2e8 0x6d0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x2e8 0x6d0 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 0x2e8 0x6d0 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x2e8 0x6d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x2ec 0x6d4 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 0x2ec 0x6d4 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x2ec 0x6d4 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT2__WDOG1_B 0x2ec 0x6d4 0x000 0x4 0x0 -+#define MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x2ec 0x6d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x2ec 0x6d4 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x2f0 0x6d8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3 0x2f0 0x6d8 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x2f0 0x6d8 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x2f0 0x6d8 0x000 0x4 0x0 -+#define MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x2f0 0x6d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB 0x2f0 0x6d8 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD2_CLK__SD2_CLK 0x2f4 0x6dc 0x930 0x0 0x1 -+#define MX6QDL_PAD_SD2_CLK__KEY_COL5 0x2f4 0x6dc 0x8c0 0x2 0x3 -+#define MX6QDL_PAD_SD2_CLK__AUD4_RXFS 0x2f4 0x6dc 0x7a4 0x3 0x1 -+#define MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x2f4 0x6dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_CMD__SD2_CMD 0x2f8 0x6e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_CMD__KEY_ROW5 0x2f8 0x6e0 0x8cc 0x2 0x2 -+#define MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x2f8 0x6e0 0x7a0 0x3 0x1 -+#define MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x2f8 0x6e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x2fc 0x6e4 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x2fc 0x6e4 0x798 0x3 0x1 -+#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7 0x2fc 0x6e4 0x8d4 0x4 0x2 -+#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x2fc 0x6e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT 0x2fc 0x6e4 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x300 0x6e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x300 0x6e8 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x300 0x6e8 0x7ac 0x3 0x1 -+#define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x300 0x6e8 0x8c8 0x4 0x2 -+#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x300 0x6e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x304 0x6ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x304 0x6ec 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x304 0x6ec 0x79c 0x3 0x1 -+#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6 0x304 0x6ec 0x8d0 0x4 0x2 -+#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x304 0x6ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x308 0x6f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT3__KEY_COL6 0x308 0x6f0 0x8c4 0x2 0x2 -+#define MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x308 0x6f0 0x7a8 0x3 0x1 -+#define MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x308 0x6f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_CLK__SD3_CLK 0x30c 0x6f4 0x934 0x0 0x1 -+#define MX6QDL_PAD_SD3_CLK__UART2_RTS_B 0x30c 0x6f4 0x900 0x1 0x2 -+#define MX6QDL_PAD_SD3_CLK__UART2_CTS_B 0x30c 0x6f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x30c 0x6f4 0x7c8 0x2 0x2 -+#define MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x30c 0x6f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_CMD__SD3_CMD 0x310 0x6f8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_CMD__UART2_CTS_B 0x310 0x6f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_CMD__UART2_RTS_B 0x310 0x6f8 0x900 0x1 0x3 -+#define MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x310 0x6f8 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x310 0x6f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x314 0x6fc 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B 0x314 0x6fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B 0x314 0x6fc 0x8f8 0x1 0x2 -+#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x314 0x6fc 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04 0x314 0x6fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x318 0x700 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT1__UART1_RTS_B 0x318 0x700 0x8f8 0x1 0x3 -+#define MX6QDL_PAD_SD3_DAT1__UART1_CTS_B 0x318 0x700 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x318 0x700 0x7cc 0x2 0x1 -+#define MX6QDL_PAD_SD3_DAT1__GPIO7_IO05 0x318 0x700 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x31c 0x704 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x31c 0x704 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x320 0x708 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT3__UART3_CTS_B 0x320 0x708 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT3__UART3_RTS_B 0x320 0x708 0x908 0x1 0x4 -+#define MX6QDL_PAD_SD3_DAT3__GPIO7_IO07 0x320 0x708 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x324 0x70c 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x324 0x70c 0x904 0x1 0x4 -+#define MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA 0x324 0x70c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x324 0x70c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x328 0x710 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x328 0x710 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA 0x328 0x710 0x904 0x1 0x5 -+#define MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x328 0x710 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x32c 0x714 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x32c 0x714 0x8fc 0x1 0x2 -+#define MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA 0x32c 0x714 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x32c 0x714 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x330 0x718 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x330 0x718 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA 0x330 0x718 0x8fc 0x1 0x3 -+#define MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x330 0x718 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_RST__SD3_RESET 0x334 0x71c 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_RST__UART3_RTS_B 0x334 0x71c 0x908 0x1 0x5 -+#define MX6QDL_PAD_SD3_RST__UART3_CTS_B 0x334 0x71c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x334 0x71c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_CLK__SD4_CLK 0x338 0x720 0x938 0x0 0x1 -+#define MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x338 0x720 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x338 0x720 0x90c 0x2 0x2 -+#define MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x338 0x720 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x338 0x720 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_CMD__SD4_CMD 0x33c 0x724 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x33c 0x724 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x33c 0x724 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x33c 0x724 0x90c 0x2 0x3 -+#define MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x33c 0x724 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x340 0x728 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x340 0x728 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x340 0x728 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x344 0x72c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x344 0x72c 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x344 0x72c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x348 0x730 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x348 0x730 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x348 0x730 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x34c 0x734 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x34c 0x734 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x350 0x738 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x350 0x738 0x904 0x2 0x6 -+#define MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x350 0x738 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x350 0x738 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x354 0x73c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x354 0x73c 0x900 0x2 0x4 -+#define MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x354 0x73c 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x354 0x73c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x358 0x740 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x358 0x740 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x358 0x740 0x900 0x2 0x5 -+#define MX6QDL_PAD_SD4_DAT6__GPIO2_IO14 0x358 0x740 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x35c 0x744 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x35c 0x744 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x35c 0x744 0x904 0x2 0x7 -+#define MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x35c 0x744 0x000 0x5 0x0 - - #endif /* __DTS_IMX6DL_PINFUNC_H */ -diff --git a/arch/arm/boot/dts/imx6dl-sabreauto.dts b/arch/arm/boot/dts/imx6dl-sabreauto.dts -index 7adcec3..a6ce7b4 100644 ---- a/arch/arm/boot/dts/imx6dl-sabreauto.dts -+++ b/arch/arm/boot/dts/imx6dl-sabreauto.dts -@@ -15,17 +15,3 @@ - model = "Freescale i.MX6 DualLite/Solo SABRE Automotive Board"; - compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl"; - }; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- MX6DL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 -- MX6DL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 -- >; -- }; -- }; --}; -diff --git a/arch/arm/boot/dts/imx6dl-sabresd.dts b/arch/arm/boot/dts/imx6dl-sabresd.dts -index 7efb05d..1e45f2f 100644 ---- a/arch/arm/boot/dts/imx6dl-sabresd.dts -+++ b/arch/arm/boot/dts/imx6dl-sabresd.dts -@@ -15,21 +15,3 @@ - model = "Freescale i.MX6 DualLite SABRE Smart Device Board"; - compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl"; - }; -- --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- MX6DL_PAD_GPIO_4__GPIO1_IO04 0x80000000 -- MX6DL_PAD_GPIO_5__GPIO1_IO05 0x80000000 -- MX6DL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 -- MX6DL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 -- MX6DL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 -- MX6DL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 -- >; -- }; -- }; --}; -diff --git a/arch/arm/boot/dts/imx6dl-wandboard.dts b/arch/arm/boot/dts/imx6dl-wandboard.dts -index bfc59c3..e672891 100644 ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -10,6 +10,7 @@ - */ - /dts-v1/; - #include "imx6dl.dtsi" -+#include "imx6qdl-wandboard.dtsi" - - / { - model = "Wandboard i.MX6 Dual Lite Board"; -@@ -19,26 +20,3 @@ - reg = <0x10000000 0x40000000>; - }; - }; -- --&fec { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_enet_1>; -- phy-mode = "rgmii"; -- status = "okay"; --}; -- --&uart1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart1_1>; -- status = "okay"; --}; -- --&usbh1 { -- status = "okay"; --}; -- --&usdhc3 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_usdhc3_2>; -- status = "okay"; --}; -diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi -index 62dc781..9e8ae11 100644 ---- a/arch/arm/boot/dts/imx6dl.dtsi -+++ b/arch/arm/boot/dts/imx6dl.dtsi -@@ -8,8 +8,8 @@ - * - */ - --#include "imx6qdl.dtsi" - #include "imx6dl-pinfunc.h" -+#include "imx6qdl.dtsi" - - / { - cpus { -@@ -32,126 +32,15 @@ - }; - - soc { -+ ocram: sram@00900000 { -+ compatible = "mmio-sram"; -+ reg = <0x00900000 0x20000>; -+ clocks = <&clks 142>; -+ }; -+ - aips1: aips-bus@02000000 { - iomuxc: iomuxc@020e0000 { - compatible = "fsl,imx6dl-iomuxc"; -- reg = <0x020e0000 0x4000>; -- -- enet { -- pinctrl_enet_1: enetgrp-1 { -- fsl,pins = < -- MX6DL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -- MX6DL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6DL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6DL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6DL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6DL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6DL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- MX6DL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -- >; -- }; -- -- pinctrl_enet_2: enetgrp-2 { -- fsl,pins = < -- MX6DL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 -- MX6DL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 -- MX6DL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6DL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6DL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6DL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6DL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6DL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6DL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6DL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6DL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6DL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6DL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6DL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- >; -- }; -- }; -- -- uart1 { -- pinctrl_uart1_1: uart1grp-1 { -- fsl,pins = < -- MX6DL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -- MX6DL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -- >; -- }; -- }; -- -- uart4 { -- pinctrl_uart4_1: uart4grp-1 { -- fsl,pins = < -- MX6DL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- MX6DL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -- >; -- }; -- }; -- -- usbotg { -- pinctrl_usbotg_2: usbotggrp-2 { -- fsl,pins = < -- MX6DL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -- >; -- }; -- }; -- -- usdhc2 { -- pinctrl_usdhc2_1: usdhc2grp-1 { -- fsl,pins = < -- MX6DL_PAD_SD2_CMD__SD2_CMD 0x17059 -- MX6DL_PAD_SD2_CLK__SD2_CLK 0x10059 -- MX6DL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -- MX6DL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -- MX6DL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -- MX6DL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -- MX6DL_PAD_NANDF_D4__SD2_DATA4 0x17059 -- MX6DL_PAD_NANDF_D5__SD2_DATA5 0x17059 -- MX6DL_PAD_NANDF_D6__SD2_DATA6 0x17059 -- MX6DL_PAD_NANDF_D7__SD2_DATA7 0x17059 -- >; -- }; -- }; -- -- usdhc3 { -- pinctrl_usdhc3_1: usdhc3grp-1 { -- fsl,pins = < -- MX6DL_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6DL_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6DL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6DL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6DL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6DL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- MX6DL_PAD_SD3_DAT4__SD3_DATA4 0x17059 -- MX6DL_PAD_SD3_DAT5__SD3_DATA5 0x17059 -- MX6DL_PAD_SD3_DAT6__SD3_DATA6 0x17059 -- MX6DL_PAD_SD3_DAT7__SD3_DATA7 0x17059 -- >; -- }; -- -- pinctrl_usdhc3_2: usdhc3grp_2 { -- fsl,pins = < -- MX6DL_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6DL_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6DL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6DL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6DL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6DL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- >; -- }; -- }; -- -- - }; - - pxp: pxp@020f0000 { -@@ -182,3 +71,20 @@ - }; - }; - }; -+ -+&ldb { -+ clocks = <&clks 33>, <&clks 34>, -+ <&clks 39>, <&clks 40>, -+ <&clks 135>, <&clks 136>; -+ clock-names = "di0_pll", "di1_pll", -+ "di0_sel", "di1_sel", -+ "di0", "di1"; -+ -+ lvds-channel@0 { -+ crtcs = <&ipu1 0>, <&ipu1 1>; -+ }; -+ -+ lvds-channel@1 { -+ crtcs = <&ipu1 0>, <&ipu1 1>; -+ }; -+}; -diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts -index 4e54fde..edf1bd9 100644 ---- a/arch/arm/boot/dts/imx6q-arm2.dts -+++ b/arch/arm/boot/dts/imx6q-arm2.dts -@@ -57,7 +57,7 @@ - hog { - pinctrl_hog: hoggrp { - fsl,pins = < -- MX6Q_PAD_EIM_D25__GPIO3_IO25 0x80000000 -+ MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 - >; - }; - }; -@@ -65,8 +65,8 @@ - arm2 { - pinctrl_usdhc3_arm2: usdhc3grp-arm2 { - fsl,pins = < -- MX6Q_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 -- MX6Q_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 -+ MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 -+ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 - >; - }; - }; -@@ -97,6 +97,14 @@ - status = "okay"; - }; - -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2_2>; -+ fsl,dte-mode; -+ fsl,uart-has-rtscts; -+ status = "okay"; -+}; -+ - &uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4_1>; -diff --git a/arch/arm/boot/dts/imx6q-pinfunc.h b/arch/arm/boot/dts/imx6q-pinfunc.h -index faea6e1..9bbe82b 100644 ---- a/arch/arm/boot/dts/imx6q-pinfunc.h -+++ b/arch/arm/boot/dts/imx6q-pinfunc.h -@@ -14,1028 +14,1032 @@ - * The pin function ID is a tuple of - * <mux_reg conf_reg input_reg mux_mode input_val> - */ --#define MX6Q_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0 --#define MX6Q_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0 --#define MX6Q_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0 --#define MX6Q_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0 --#define MX6Q_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0 --#define MX6Q_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0 --#define MX6Q_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0 --#define MX6Q_PAD_SD2_DAT2__KEY_ROW6 0x050 0x364 0x8f8 0x4 0x0 --#define MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x050 0x364 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_DAT0__SD2_DATA0 0x054 0x368 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_DAT0__ECSPI5_MISO 0x054 0x368 0x82c 0x1 0x0 --#define MX6Q_PAD_SD2_DAT0__AUD4_RXD 0x054 0x368 0x7b4 0x3 0x0 --#define MX6Q_PAD_SD2_DAT0__KEY_ROW7 0x054 0x368 0x8fc 0x4 0x0 --#define MX6Q_PAD_SD2_DAT0__GPIO1_IO15 0x054 0x368 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_DAT0__DCIC2_OUT 0x054 0x368 0x000 0x6 0x0 --#define MX6Q_PAD_RGMII_TXC__USB_H2_DATA 0x058 0x36c 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x058 0x36c 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0 --#define MX6Q_PAD_RGMII_TXC__GPIO6_IO19 0x058 0x36c 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M 0x058 0x36c 0x000 0x7 0x0 --#define MX6Q_PAD_RGMII_TD0__HSI_TX_READY 0x05c 0x370 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x05c 0x370 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TD0__GPIO6_IO20 0x05c 0x370 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TD1__HSI_RX_FLAG 0x060 0x374 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x060 0x374 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TD1__GPIO6_IO21 0x060 0x374 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TD2__HSI_RX_DATA 0x064 0x378 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x064 0x378 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TD2__GPIO6_IO22 0x064 0x378 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TD3__HSI_RX_WAKE 0x068 0x37c 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x068 0x37c 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TD3__GPIO6_IO23 0x068 0x37c 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_RX_CTL__USB_H3_DATA 0x06c 0x380 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x06c 0x380 0x858 0x1 0x0 --#define MX6Q_PAD_RGMII_RX_CTL__GPIO6_IO24 0x06c 0x380 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_RD0__HSI_RX_READY 0x070 0x384 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x070 0x384 0x848 0x1 0x0 --#define MX6Q_PAD_RGMII_RD0__GPIO6_IO25 0x070 0x384 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x074 0x388 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x074 0x388 0x000 0x1 0x0 --#define MX6Q_PAD_RGMII_TX_CTL__GPIO6_IO26 0x074 0x388 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_TX_CTL__ENET_REF_CLK 0x074 0x388 0x83c 0x7 0x0 --#define MX6Q_PAD_RGMII_RD1__HSI_TX_FLAG 0x078 0x38c 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x078 0x38c 0x84c 0x1 0x0 --#define MX6Q_PAD_RGMII_RD1__GPIO6_IO27 0x078 0x38c 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_RD2__HSI_TX_DATA 0x07c 0x390 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x07c 0x390 0x850 0x1 0x0 --#define MX6Q_PAD_RGMII_RD2__GPIO6_IO28 0x07c 0x390 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_RD3__HSI_TX_WAKE 0x080 0x394 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x080 0x394 0x854 0x1 0x0 --#define MX6Q_PAD_RGMII_RD3__GPIO6_IO29 0x080 0x394 0x000 0x5 0x0 --#define MX6Q_PAD_RGMII_RXC__USB_H3_STROBE 0x084 0x398 0x000 0x0 0x0 --#define MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x084 0x398 0x844 0x1 0x0 --#define MX6Q_PAD_RGMII_RXC__GPIO6_IO30 0x084 0x398 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A25__EIM_ADDR25 0x088 0x39c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A25__ECSPI4_SS1 0x088 0x39c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A25__ECSPI2_RDY 0x088 0x39c 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_A25__IPU1_DI1_PIN12 0x088 0x39c 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_A25__IPU1_DI0_D1_CS 0x088 0x39c 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_A25__GPIO5_IO02 0x088 0x39c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x088 0x39c 0x88c 0x6 0x0 --#define MX6Q_PAD_EIM_EB2__EIM_EB2_B 0x08c 0x3a0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_EB2__ECSPI1_SS0 0x08c 0x3a0 0x800 0x1 0x0 --#define MX6Q_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x08c 0x3a0 0x8d4 0x3 0x0 --#define MX6Q_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x08c 0x3a0 0x890 0x4 0x0 --#define MX6Q_PAD_EIM_EB2__GPIO2_IO30 0x08c 0x3a0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_EB2__I2C2_SCL 0x08c 0x3a0 0x8a0 0x6 0x0 --#define MX6Q_PAD_EIM_EB2__SRC_BOOT_CFG30 0x08c 0x3a0 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D16__EIM_DATA16 0x090 0x3a4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D16__ECSPI1_SCLK 0x090 0x3a4 0x7f4 0x1 0x0 --#define MX6Q_PAD_EIM_D16__IPU1_DI0_PIN05 0x090 0x3a4 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D16__IPU2_CSI1_DATA18 0x090 0x3a4 0x8d0 0x3 0x0 --#define MX6Q_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x090 0x3a4 0x894 0x4 0x0 --#define MX6Q_PAD_EIM_D16__GPIO3_IO16 0x090 0x3a4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D16__I2C2_SDA 0x090 0x3a4 0x8a4 0x6 0x0 --#define MX6Q_PAD_EIM_D17__EIM_DATA17 0x094 0x3a8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D17__ECSPI1_MISO 0x094 0x3a8 0x7f8 0x1 0x0 --#define MX6Q_PAD_EIM_D17__IPU1_DI0_PIN06 0x094 0x3a8 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK 0x094 0x3a8 0x8e0 0x3 0x0 --#define MX6Q_PAD_EIM_D17__DCIC1_OUT 0x094 0x3a8 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D17__GPIO3_IO17 0x094 0x3a8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D17__I2C3_SCL 0x094 0x3a8 0x8a8 0x6 0x0 --#define MX6Q_PAD_EIM_D18__EIM_DATA18 0x098 0x3ac 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D18__ECSPI1_MOSI 0x098 0x3ac 0x7fc 0x1 0x0 --#define MX6Q_PAD_EIM_D18__IPU1_DI0_PIN07 0x098 0x3ac 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D18__IPU2_CSI1_DATA17 0x098 0x3ac 0x8cc 0x3 0x0 --#define MX6Q_PAD_EIM_D18__IPU1_DI1_D0_CS 0x098 0x3ac 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D18__GPIO3_IO18 0x098 0x3ac 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D18__I2C3_SDA 0x098 0x3ac 0x8ac 0x6 0x0 --#define MX6Q_PAD_EIM_D19__EIM_DATA19 0x09c 0x3b0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D19__ECSPI1_SS1 0x09c 0x3b0 0x804 0x1 0x0 --#define MX6Q_PAD_EIM_D19__IPU1_DI0_PIN08 0x09c 0x3b0 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D19__IPU2_CSI1_DATA16 0x09c 0x3b0 0x8c8 0x3 0x0 --#define MX6Q_PAD_EIM_D19__UART1_CTS_B 0x09c 0x3b0 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D19__UART1_RTS_B 0x09c 0x3b0 0x91c 0x4 0x0 --#define MX6Q_PAD_EIM_D19__GPIO3_IO19 0x09c 0x3b0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D19__EPIT1_OUT 0x09c 0x3b0 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D20__EIM_DATA20 0x0a0 0x3b4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D20__ECSPI4_SS0 0x0a0 0x3b4 0x824 0x1 0x0 --#define MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16 0x0a0 0x3b4 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D20__IPU2_CSI1_DATA15 0x0a0 0x3b4 0x8c4 0x3 0x0 --#define MX6Q_PAD_EIM_D20__UART1_RTS_B 0x0a0 0x3b4 0x91c 0x4 0x1 --#define MX6Q_PAD_EIM_D20__UART1_CTS_B 0x0a0 0x3b4 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D20__GPIO3_IO20 0x0a0 0x3b4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D20__EPIT2_OUT 0x0a0 0x3b4 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D21__EIM_DATA21 0x0a4 0x3b8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D21__ECSPI4_SCLK 0x0a4 0x3b8 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D21__IPU1_DI0_PIN17 0x0a4 0x3b8 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D21__IPU2_CSI1_DATA11 0x0a4 0x3b8 0x8b4 0x3 0x0 --#define MX6Q_PAD_EIM_D21__USB_OTG_OC 0x0a4 0x3b8 0x944 0x4 0x0 --#define MX6Q_PAD_EIM_D21__GPIO3_IO21 0x0a4 0x3b8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D21__I2C1_SCL 0x0a4 0x3b8 0x898 0x6 0x0 --#define MX6Q_PAD_EIM_D21__SPDIF_IN 0x0a4 0x3b8 0x914 0x7 0x0 --#define MX6Q_PAD_EIM_D22__EIM_DATA22 0x0a8 0x3bc 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D22__ECSPI4_MISO 0x0a8 0x3bc 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D22__IPU1_DI0_PIN01 0x0a8 0x3bc 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D22__IPU2_CSI1_DATA10 0x0a8 0x3bc 0x8b0 0x3 0x0 --#define MX6Q_PAD_EIM_D22__USB_OTG_PWR 0x0a8 0x3bc 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D22__GPIO3_IO22 0x0a8 0x3bc 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D22__SPDIF_OUT 0x0a8 0x3bc 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D23__EIM_DATA23 0x0ac 0x3c0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS 0x0ac 0x3c0 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D23__UART3_CTS_B 0x0ac 0x3c0 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D23__UART3_RTS_B 0x0ac 0x3c0 0x92c 0x2 0x0 --#define MX6Q_PAD_EIM_D23__UART1_DCD_B 0x0ac 0x3c0 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN 0x0ac 0x3c0 0x8d8 0x4 0x0 --#define MX6Q_PAD_EIM_D23__GPIO3_IO23 0x0ac 0x3c0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D23__IPU1_DI1_PIN02 0x0ac 0x3c0 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14 0x0ac 0x3c0 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_EB3__EIM_EB3_B 0x0b0 0x3c4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_EB3__ECSPI4_RDY 0x0b0 0x3c4 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_EB3__UART3_RTS_B 0x0b0 0x3c4 0x92c 0x2 0x1 --#define MX6Q_PAD_EIM_EB3__UART3_CTS_B 0x0b0 0x3c4 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_EB3__UART1_RI_B 0x0b0 0x3c4 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x0b0 0x3c4 0x8dc 0x4 0x0 --#define MX6Q_PAD_EIM_EB3__GPIO2_IO31 0x0b0 0x3c4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_EB3__IPU1_DI1_PIN03 0x0b0 0x3c4 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_EB3__SRC_BOOT_CFG31 0x0b0 0x3c4 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D24__EIM_DATA24 0x0b4 0x3c8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D24__ECSPI4_SS2 0x0b4 0x3c8 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D24__UART3_TX_DATA 0x0b4 0x3c8 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D24__UART3_RX_DATA 0x0b4 0x3c8 0x930 0x2 0x0 --#define MX6Q_PAD_EIM_D24__ECSPI1_SS2 0x0b4 0x3c8 0x808 0x3 0x0 --#define MX6Q_PAD_EIM_D24__ECSPI2_SS2 0x0b4 0x3c8 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D24__GPIO3_IO24 0x0b4 0x3c8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D24__AUD5_RXFS 0x0b4 0x3c8 0x7d8 0x6 0x0 --#define MX6Q_PAD_EIM_D24__UART1_DTR_B 0x0b4 0x3c8 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D25__EIM_DATA25 0x0b8 0x3cc 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D25__ECSPI4_SS3 0x0b8 0x3cc 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D25__UART3_RX_DATA 0x0b8 0x3cc 0x930 0x2 0x1 --#define MX6Q_PAD_EIM_D25__UART3_TX_DATA 0x0b8 0x3cc 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D25__ECSPI1_SS3 0x0b8 0x3cc 0x80c 0x3 0x0 --#define MX6Q_PAD_EIM_D25__ECSPI2_SS3 0x0b8 0x3cc 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D25__GPIO3_IO25 0x0b8 0x3cc 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D25__AUD5_RXC 0x0b8 0x3cc 0x7d4 0x6 0x0 --#define MX6Q_PAD_EIM_D25__UART1_DSR_B 0x0b8 0x3cc 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D26__EIM_DATA26 0x0bc 0x3d0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D26__IPU1_DI1_PIN11 0x0bc 0x3d0 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D26__IPU1_CSI0_DATA01 0x0bc 0x3d0 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D26__IPU2_CSI1_DATA14 0x0bc 0x3d0 0x8c0 0x3 0x0 --#define MX6Q_PAD_EIM_D26__UART2_TX_DATA 0x0bc 0x3d0 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x0bc 0x3d0 0x928 0x4 0x0 --#define MX6Q_PAD_EIM_D26__GPIO3_IO26 0x0bc 0x3d0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D26__IPU1_SISG2 0x0bc 0x3d0 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D26__IPU1_DISP1_DATA22 0x0bc 0x3d0 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D27__EIM_DATA27 0x0c0 0x3d4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D27__IPU1_DI1_PIN13 0x0c0 0x3d4 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D27__IPU1_CSI0_DATA00 0x0c0 0x3d4 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D27__IPU2_CSI1_DATA13 0x0c0 0x3d4 0x8bc 0x3 0x0 --#define MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x0c0 0x3d4 0x928 0x4 0x1 --#define MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x0c0 0x3d4 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D27__GPIO3_IO27 0x0c0 0x3d4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D27__IPU1_SISG3 0x0c0 0x3d4 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D27__IPU1_DISP1_DATA23 0x0c0 0x3d4 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D28__EIM_DATA28 0x0c4 0x3d8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D28__I2C1_SDA 0x0c4 0x3d8 0x89c 0x1 0x0 --#define MX6Q_PAD_EIM_D28__ECSPI4_MOSI 0x0c4 0x3d8 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D28__IPU2_CSI1_DATA12 0x0c4 0x3d8 0x8b8 0x3 0x0 --#define MX6Q_PAD_EIM_D28__UART2_CTS_B 0x0c4 0x3d8 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D28__UART2_RTS_B 0x0c4 0x3d8 0x924 0x4 0x0 --#define MX6Q_PAD_EIM_D28__GPIO3_IO28 0x0c4 0x3d8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG 0x0c4 0x3d8 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13 0x0c4 0x3d8 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D29__EIM_DATA29 0x0c8 0x3dc 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15 0x0c8 0x3dc 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 --#define MX6Q_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 --#define MX6Q_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 --#define MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_D30__EIM_DATA30 0x0cc 0x3e0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D30__IPU1_DISP1_DATA21 0x0cc 0x3e0 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11 0x0cc 0x3e0 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D30__IPU1_CSI0_DATA03 0x0cc 0x3e0 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_D30__UART3_CTS_B 0x0cc 0x3e0 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D30__UART3_RTS_B 0x0cc 0x3e0 0x92c 0x4 0x2 --#define MX6Q_PAD_EIM_D30__GPIO3_IO30 0x0cc 0x3e0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D30__USB_H1_OC 0x0cc 0x3e0 0x948 0x6 0x0 --#define MX6Q_PAD_EIM_D31__EIM_DATA31 0x0d0 0x3e4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_D31__IPU1_DISP1_DATA20 0x0d0 0x3e4 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12 0x0d0 0x3e4 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_D31__IPU1_CSI0_DATA02 0x0d0 0x3e4 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_D31__UART3_RTS_B 0x0d0 0x3e4 0x92c 0x4 0x3 --#define MX6Q_PAD_EIM_D31__UART3_CTS_B 0x0d0 0x3e4 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_D31__GPIO3_IO31 0x0d0 0x3e4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_D31__USB_H1_PWR 0x0d0 0x3e4 0x000 0x6 0x0 --#define MX6Q_PAD_EIM_A24__EIM_ADDR24 0x0d4 0x3e8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A24__IPU1_DISP1_DATA19 0x0d4 0x3e8 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A24__IPU2_CSI1_DATA19 0x0d4 0x3e8 0x8d4 0x2 0x1 --#define MX6Q_PAD_EIM_A24__IPU2_SISG2 0x0d4 0x3e8 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_A24__IPU1_SISG2 0x0d4 0x3e8 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_A24__GPIO5_IO04 0x0d4 0x3e8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A24__SRC_BOOT_CFG24 0x0d4 0x3e8 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A23__EIM_ADDR23 0x0d8 0x3ec 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A23__IPU1_DISP1_DATA18 0x0d8 0x3ec 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A23__IPU2_CSI1_DATA18 0x0d8 0x3ec 0x8d0 0x2 0x1 --#define MX6Q_PAD_EIM_A23__IPU2_SISG3 0x0d8 0x3ec 0x000 0x3 0x0 --#define MX6Q_PAD_EIM_A23__IPU1_SISG3 0x0d8 0x3ec 0x000 0x4 0x0 --#define MX6Q_PAD_EIM_A23__GPIO6_IO06 0x0d8 0x3ec 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A23__SRC_BOOT_CFG23 0x0d8 0x3ec 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A22__EIM_ADDR22 0x0dc 0x3f0 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A22__IPU1_DISP1_DATA17 0x0dc 0x3f0 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A22__IPU2_CSI1_DATA17 0x0dc 0x3f0 0x8cc 0x2 0x1 --#define MX6Q_PAD_EIM_A22__GPIO2_IO16 0x0dc 0x3f0 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A22__SRC_BOOT_CFG22 0x0dc 0x3f0 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A21__EIM_ADDR21 0x0e0 0x3f4 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A21__IPU1_DISP1_DATA16 0x0e0 0x3f4 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A21__IPU2_CSI1_DATA16 0x0e0 0x3f4 0x8c8 0x2 0x1 --#define MX6Q_PAD_EIM_A21__GPIO2_IO17 0x0e0 0x3f4 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A21__SRC_BOOT_CFG21 0x0e0 0x3f4 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A20__EIM_ADDR20 0x0e4 0x3f8 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A20__IPU1_DISP1_DATA15 0x0e4 0x3f8 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A20__IPU2_CSI1_DATA15 0x0e4 0x3f8 0x8c4 0x2 0x1 --#define MX6Q_PAD_EIM_A20__GPIO2_IO18 0x0e4 0x3f8 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A20__SRC_BOOT_CFG20 0x0e4 0x3f8 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A19__EIM_ADDR19 0x0e8 0x3fc 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A19__IPU1_DISP1_DATA14 0x0e8 0x3fc 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A19__IPU2_CSI1_DATA14 0x0e8 0x3fc 0x8c0 0x2 0x1 --#define MX6Q_PAD_EIM_A19__GPIO2_IO19 0x0e8 0x3fc 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A19__SRC_BOOT_CFG19 0x0e8 0x3fc 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A18__EIM_ADDR18 0x0ec 0x400 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A18__IPU1_DISP1_DATA13 0x0ec 0x400 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A18__IPU2_CSI1_DATA13 0x0ec 0x400 0x8bc 0x2 0x1 --#define MX6Q_PAD_EIM_A18__GPIO2_IO20 0x0ec 0x400 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A18__SRC_BOOT_CFG18 0x0ec 0x400 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A17__EIM_ADDR17 0x0f0 0x404 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A17__IPU1_DISP1_DATA12 0x0f0 0x404 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A17__IPU2_CSI1_DATA12 0x0f0 0x404 0x8b8 0x2 0x1 --#define MX6Q_PAD_EIM_A17__GPIO2_IO21 0x0f0 0x404 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A17__SRC_BOOT_CFG17 0x0f0 0x404 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_A16__EIM_ADDR16 0x0f4 0x408 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x0f4 0x408 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x0f4 0x408 0x8e0 0x2 0x1 --#define MX6Q_PAD_EIM_A16__GPIO2_IO22 0x0f4 0x408 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_A16__SRC_BOOT_CFG16 0x0f4 0x408 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_CS0__EIM_CS0_B 0x0f8 0x40c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_CS0__IPU1_DI1_PIN05 0x0f8 0x40c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 --#define MX6Q_PAD_EIM_CS0__GPIO2_IO23 0x0f8 0x40c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_CS1__EIM_CS1_B 0x0fc 0x410 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_CS1__IPU1_DI1_PIN06 0x0fc 0x410 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_CS1__ECSPI2_MOSI 0x0fc 0x410 0x818 0x2 0x0 --#define MX6Q_PAD_EIM_CS1__GPIO2_IO24 0x0fc 0x410 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_OE__EIM_OE_B 0x100 0x414 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_OE__IPU1_DI1_PIN07 0x100 0x414 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_OE__ECSPI2_MISO 0x100 0x414 0x814 0x2 0x0 --#define MX6Q_PAD_EIM_OE__GPIO2_IO25 0x100 0x414 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_RW__EIM_RW 0x104 0x418 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_RW__IPU1_DI1_PIN08 0x104 0x418 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_RW__ECSPI2_SS0 0x104 0x418 0x81c 0x2 0x0 --#define MX6Q_PAD_EIM_RW__GPIO2_IO26 0x104 0x418 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_RW__SRC_BOOT_CFG29 0x104 0x418 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_LBA__EIM_LBA_B 0x108 0x41c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_LBA__IPU1_DI1_PIN17 0x108 0x41c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_LBA__ECSPI2_SS1 0x108 0x41c 0x820 0x2 0x0 --#define MX6Q_PAD_EIM_LBA__GPIO2_IO27 0x108 0x41c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_LBA__SRC_BOOT_CFG26 0x108 0x41c 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_EB0__EIM_EB0_B 0x10c 0x420 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x10c 0x420 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_EB0__IPU2_CSI1_DATA11 0x10c 0x420 0x8b4 0x2 0x1 --#define MX6Q_PAD_EIM_EB0__CCM_PMIC_READY 0x10c 0x420 0x7f0 0x4 0x0 --#define MX6Q_PAD_EIM_EB0__GPIO2_IO28 0x10c 0x420 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_EB0__SRC_BOOT_CFG27 0x10c 0x420 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_EB1__EIM_EB1_B 0x110 0x424 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x110 0x424 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_EB1__IPU2_CSI1_DATA10 0x110 0x424 0x8b0 0x2 0x1 --#define MX6Q_PAD_EIM_EB1__GPIO2_IO29 0x110 0x424 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_EB1__SRC_BOOT_CFG28 0x110 0x424 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA0__EIM_AD00 0x114 0x428 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x114 0x428 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA0__IPU2_CSI1_DATA09 0x114 0x428 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA0__GPIO3_IO00 0x114 0x428 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA0__SRC_BOOT_CFG00 0x114 0x428 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA1__EIM_AD01 0x118 0x42c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x118 0x42c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA1__IPU2_CSI1_DATA08 0x118 0x42c 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA1__GPIO3_IO01 0x118 0x42c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA1__SRC_BOOT_CFG01 0x118 0x42c 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA2__EIM_AD02 0x11c 0x430 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x11c 0x430 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA2__IPU2_CSI1_DATA07 0x11c 0x430 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA2__GPIO3_IO02 0x11c 0x430 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA2__SRC_BOOT_CFG02 0x11c 0x430 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA3__EIM_AD03 0x120 0x434 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x120 0x434 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA3__IPU2_CSI1_DATA06 0x120 0x434 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA3__GPIO3_IO03 0x120 0x434 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA3__SRC_BOOT_CFG03 0x120 0x434 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA4__EIM_AD04 0x124 0x438 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x124 0x438 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA4__IPU2_CSI1_DATA05 0x124 0x438 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA4__GPIO3_IO04 0x124 0x438 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA4__SRC_BOOT_CFG04 0x124 0x438 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA5__EIM_AD05 0x128 0x43c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x128 0x43c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA5__IPU2_CSI1_DATA04 0x128 0x43c 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA5__GPIO3_IO05 0x128 0x43c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA5__SRC_BOOT_CFG05 0x128 0x43c 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA6__EIM_AD06 0x12c 0x440 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x12c 0x440 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA6__IPU2_CSI1_DATA03 0x12c 0x440 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA6__GPIO3_IO06 0x12c 0x440 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA6__SRC_BOOT_CFG06 0x12c 0x440 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA7__EIM_AD07 0x130 0x444 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x130 0x444 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA7__IPU2_CSI1_DATA02 0x130 0x444 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA7__GPIO3_IO07 0x130 0x444 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA7__SRC_BOOT_CFG07 0x130 0x444 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA8__EIM_AD08 0x134 0x448 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x134 0x448 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA8__IPU2_CSI1_DATA01 0x134 0x448 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA8__GPIO3_IO08 0x134 0x448 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA8__SRC_BOOT_CFG08 0x134 0x448 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA9__EIM_AD09 0x138 0x44c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x138 0x44c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA9__IPU2_CSI1_DATA00 0x138 0x44c 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA9__GPIO3_IO09 0x138 0x44c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA9__SRC_BOOT_CFG09 0x138 0x44c 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA10__EIM_AD10 0x13c 0x450 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA10__IPU1_DI1_PIN15 0x13c 0x450 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA10__IPU2_CSI1_DATA_EN 0x13c 0x450 0x8d8 0x2 0x1 --#define MX6Q_PAD_EIM_DA10__GPIO3_IO10 0x13c 0x450 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA10__SRC_BOOT_CFG10 0x13c 0x450 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA11__EIM_AD11 0x140 0x454 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA11__IPU1_DI1_PIN02 0x140 0x454 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA11__IPU2_CSI1_HSYNC 0x140 0x454 0x8dc 0x2 0x1 --#define MX6Q_PAD_EIM_DA11__GPIO3_IO11 0x140 0x454 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA11__SRC_BOOT_CFG11 0x140 0x454 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA12__EIM_AD12 0x144 0x458 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA12__IPU1_DI1_PIN03 0x144 0x458 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA12__IPU2_CSI1_VSYNC 0x144 0x458 0x8e4 0x2 0x1 --#define MX6Q_PAD_EIM_DA12__GPIO3_IO12 0x144 0x458 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA12__SRC_BOOT_CFG12 0x144 0x458 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA13__EIM_AD13 0x148 0x45c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA13__IPU1_DI1_D0_CS 0x148 0x45c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA13__GPIO3_IO13 0x148 0x45c 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA13__SRC_BOOT_CFG13 0x148 0x45c 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA14__EIM_AD14 0x14c 0x460 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA14__IPU1_DI1_D1_CS 0x14c 0x460 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA14__GPIO3_IO14 0x14c 0x460 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA14__SRC_BOOT_CFG14 0x14c 0x460 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_DA15__EIM_AD15 0x150 0x464 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN01 0x150 0x464 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_DA15__IPU1_DI1_PIN04 0x150 0x464 0x000 0x2 0x0 --#define MX6Q_PAD_EIM_DA15__GPIO3_IO15 0x150 0x464 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_DA15__SRC_BOOT_CFG15 0x150 0x464 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_WAIT__EIM_WAIT_B 0x154 0x468 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_WAIT__EIM_DTACK_B 0x154 0x468 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_WAIT__GPIO5_IO00 0x154 0x468 0x000 0x5 0x0 --#define MX6Q_PAD_EIM_WAIT__SRC_BOOT_CFG25 0x154 0x468 0x000 0x7 0x0 --#define MX6Q_PAD_EIM_BCLK__EIM_BCLK 0x158 0x46c 0x000 0x0 0x0 --#define MX6Q_PAD_EIM_BCLK__IPU1_DI1_PIN16 0x158 0x46c 0x000 0x1 0x0 --#define MX6Q_PAD_EIM_BCLK__GPIO6_IO31 0x158 0x46c 0x000 0x5 0x0 --#define MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x15c 0x470 0x000 0x0 0x0 --#define MX6Q_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x15c 0x470 0x000 0x1 0x0 --#define MX6Q_PAD_DI0_DISP_CLK__GPIO4_IO16 0x15c 0x470 0x000 0x5 0x0 --#define MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x160 0x474 0x000 0x0 0x0 --#define MX6Q_PAD_DI0_PIN15__IPU2_DI0_PIN15 0x160 0x474 0x000 0x1 0x0 --#define MX6Q_PAD_DI0_PIN15__AUD6_TXC 0x160 0x474 0x000 0x2 0x0 --#define MX6Q_PAD_DI0_PIN15__GPIO4_IO17 0x160 0x474 0x000 0x5 0x0 --#define MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x164 0x478 0x000 0x0 0x0 --#define MX6Q_PAD_DI0_PIN2__IPU2_DI0_PIN02 0x164 0x478 0x000 0x1 0x0 --#define MX6Q_PAD_DI0_PIN2__AUD6_TXD 0x164 0x478 0x000 0x2 0x0 --#define MX6Q_PAD_DI0_PIN2__GPIO4_IO18 0x164 0x478 0x000 0x5 0x0 --#define MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x168 0x47c 0x000 0x0 0x0 --#define MX6Q_PAD_DI0_PIN3__IPU2_DI0_PIN03 0x168 0x47c 0x000 0x1 0x0 --#define MX6Q_PAD_DI0_PIN3__AUD6_TXFS 0x168 0x47c 0x000 0x2 0x0 --#define MX6Q_PAD_DI0_PIN3__GPIO4_IO19 0x168 0x47c 0x000 0x5 0x0 --#define MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x16c 0x480 0x000 0x0 0x0 --#define MX6Q_PAD_DI0_PIN4__IPU2_DI0_PIN04 0x16c 0x480 0x000 0x1 0x0 --#define MX6Q_PAD_DI0_PIN4__AUD6_RXD 0x16c 0x480 0x000 0x2 0x0 --#define MX6Q_PAD_DI0_PIN4__SD1_WP 0x16c 0x480 0x94c 0x3 0x0 --#define MX6Q_PAD_DI0_PIN4__GPIO4_IO20 0x16c 0x480 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x170 0x484 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0x170 0x484 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK 0x170 0x484 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT0__GPIO4_IO21 0x170 0x484 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x174 0x488 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0x174 0x488 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI 0x174 0x488 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT1__GPIO4_IO22 0x174 0x488 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x178 0x48c 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0x178 0x48c 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO 0x178 0x48c 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT2__GPIO4_IO23 0x178 0x48c 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x17c 0x490 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0x17c 0x490 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT3__ECSPI3_SS0 0x17c 0x490 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT3__GPIO4_IO24 0x17c 0x490 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x180 0x494 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0x180 0x494 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT4__ECSPI3_SS1 0x180 0x494 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT4__GPIO4_IO25 0x180 0x494 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x184 0x498 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0x184 0x498 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT5__ECSPI3_SS2 0x184 0x498 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT5__AUD6_RXFS 0x184 0x498 0x000 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT5__GPIO4_IO26 0x184 0x498 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x188 0x49c 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0x188 0x49c 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT6__ECSPI3_SS3 0x188 0x49c 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT6__AUD6_RXC 0x188 0x49c 0x000 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT6__GPIO4_IO27 0x188 0x49c 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x18c 0x4a0 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0x18c 0x4a0 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT7__ECSPI3_RDY 0x18c 0x4a0 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT7__GPIO4_IO28 0x18c 0x4a0 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x190 0x4a4 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0x190 0x4a4 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT8__PWM1_OUT 0x190 0x4a4 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT8__WDOG1_B 0x190 0x4a4 0x000 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT8__GPIO4_IO29 0x190 0x4a4 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x194 0x4a8 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0x194 0x4a8 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT9__PWM2_OUT 0x194 0x4a8 0x000 0x2 0x0 --#define MX6Q_PAD_DISP0_DAT9__WDOG2_B 0x194 0x4a8 0x000 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT9__GPIO4_IO30 0x194 0x4a8 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x198 0x4ac 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0x198 0x4ac 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT10__GPIO4_IO31 0x198 0x4ac 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x19c 0x4b0 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0x19c 0x4b0 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT11__GPIO5_IO05 0x19c 0x4b0 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x1a0 0x4b4 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0x1a0 0x4b4 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT12__GPIO5_IO06 0x1a0 0x4b4 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x1a4 0x4b8 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0x1a4 0x4b8 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT13__AUD5_RXFS 0x1a4 0x4b8 0x7d8 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT13__GPIO5_IO07 0x1a4 0x4b8 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x1a8 0x4bc 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0x1a8 0x4bc 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT14__AUD5_RXC 0x1a8 0x4bc 0x7d4 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT14__GPIO5_IO08 0x1a8 0x4bc 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x1ac 0x4c0 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0x1ac 0x4c0 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT15__ECSPI1_SS1 0x1ac 0x4c0 0x804 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT15__ECSPI2_SS1 0x1ac 0x4c0 0x820 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT15__GPIO5_IO09 0x1ac 0x4c0 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x1b0 0x4c4 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 0x1b0 0x4c4 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT16__ECSPI2_MOSI 0x1b0 0x4c4 0x818 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT16__AUD5_TXC 0x1b0 0x4c4 0x7dc 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 0x1b0 0x4c4 0x90c 0x4 0x0 --#define MX6Q_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0 0x4c4 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x1b4 0x4c8 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 0x1b4 0x4c8 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT17__ECSPI2_MISO 0x1b4 0x4c8 0x814 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT17__AUD5_TXD 0x1b4 0x4c8 0x7d0 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 0x1b4 0x4c8 0x910 0x4 0x0 --#define MX6Q_PAD_DISP0_DAT17__GPIO5_IO11 0x1b4 0x4c8 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x1b8 0x4cc 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 0x1b8 0x4cc 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT18__ECSPI2_SS0 0x1b8 0x4cc 0x81c 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT18__AUD5_TXFS 0x1b8 0x4cc 0x7e0 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT18__AUD4_RXFS 0x1b8 0x4cc 0x7c0 0x4 0x0 --#define MX6Q_PAD_DISP0_DAT18__GPIO5_IO12 0x1b8 0x4cc 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT18__EIM_CS2_B 0x1b8 0x4cc 0x000 0x7 0x0 --#define MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x1bc 0x4d0 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 0x1bc 0x4d0 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT19__ECSPI2_SCLK 0x1bc 0x4d0 0x810 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT19__AUD5_RXD 0x1bc 0x4d0 0x7cc 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT19__AUD4_RXC 0x1bc 0x4d0 0x7bc 0x4 0x0 --#define MX6Q_PAD_DISP0_DAT19__GPIO5_IO13 0x1bc 0x4d0 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT19__EIM_CS3_B 0x1bc 0x4d0 0x000 0x7 0x0 --#define MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x1c0 0x4d4 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 0x1c0 0x4d4 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT20__ECSPI1_SCLK 0x1c0 0x4d4 0x7f4 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT20__AUD4_TXC 0x1c0 0x4d4 0x7c4 0x3 0x0 --#define MX6Q_PAD_DISP0_DAT20__GPIO5_IO14 0x1c0 0x4d4 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x1c4 0x4d8 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 0x1c4 0x4d8 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT21__ECSPI1_MOSI 0x1c4 0x4d8 0x7fc 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT21__AUD4_TXD 0x1c4 0x4d8 0x7b8 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT21__GPIO5_IO15 0x1c4 0x4d8 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x1c8 0x4dc 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 0x1c8 0x4dc 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT22__ECSPI1_MISO 0x1c8 0x4dc 0x7f8 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT22__AUD4_TXFS 0x1c8 0x4dc 0x7c8 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT22__GPIO5_IO16 0x1c8 0x4dc 0x000 0x5 0x0 --#define MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x1cc 0x4e0 0x000 0x0 0x0 --#define MX6Q_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 0x1cc 0x4e0 0x000 0x1 0x0 --#define MX6Q_PAD_DISP0_DAT23__ECSPI1_SS0 0x1cc 0x4e0 0x800 0x2 0x1 --#define MX6Q_PAD_DISP0_DAT23__AUD4_RXD 0x1cc 0x4e0 0x7b4 0x3 0x1 --#define MX6Q_PAD_DISP0_DAT23__GPIO5_IO17 0x1cc 0x4e0 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1d0 0x4e4 0x840 0x1 0x0 --#define MX6Q_PAD_ENET_MDIO__ESAI_RX_CLK 0x1d0 0x4e4 0x86c 0x2 0x0 --#define MX6Q_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT 0x1d0 0x4e4 0x000 0x4 0x0 --#define MX6Q_PAD_ENET_MDIO__GPIO1_IO22 0x1d0 0x4e4 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_MDIO__SPDIF_LOCK 0x1d0 0x4e4 0x000 0x6 0x0 --#define MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1d4 0x4e8 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0 --#define MX6Q_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0 --#define MX6Q_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x000 0x0 0x0 --#define MX6Q_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0 --#define MX6Q_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1 --#define MX6Q_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1d8 0x4ec 0x000 0x4 0x0 --#define MX6Q_PAD_ENET_RX_ER__GPIO1_IO24 0x1d8 0x4ec 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN 0x1dc 0x4f0 0x858 0x1 0x1 --#define MX6Q_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1dc 0x4f0 0x870 0x2 0x0 --#define MX6Q_PAD_ENET_CRS_DV__SPDIF_EXT_CLK 0x1dc 0x4f0 0x918 0x3 0x1 --#define MX6Q_PAD_ENET_CRS_DV__GPIO1_IO25 0x1dc 0x4f0 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_RXD1__MLB_SIG 0x1e0 0x4f4 0x908 0x0 0x0 --#define MX6Q_PAD_ENET_RXD1__ENET_RX_DATA1 0x1e0 0x4f4 0x84c 0x1 0x1 --#define MX6Q_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0 --#define MX6Q_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0 --#define MX6Q_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1 --#define MX6Q_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0 --#define MX6Q_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0 --#define MX6Q_PAD_ENET_RXD0__GPIO1_IO27 0x1e4 0x4f8 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 0x1e8 0x4fc 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1e8 0x4fc 0x880 0x2 0x0 --#define MX6Q_PAD_ENET_TX_EN__GPIO1_IO28 0x1e8 0x4fc 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_TXD1__MLB_CLK 0x1ec 0x500 0x900 0x0 0x0 --#define MX6Q_PAD_ENET_TXD1__ENET_TX_DATA1 0x1ec 0x500 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1ec 0x500 0x87c 0x2 0x0 --#define MX6Q_PAD_ENET_TXD1__ENET_1588_EVENT0_IN 0x1ec 0x500 0x000 0x4 0x0 --#define MX6Q_PAD_ENET_TXD1__GPIO1_IO29 0x1ec 0x500 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_TXD0__ENET_TX_DATA0 0x1f0 0x504 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1f0 0x504 0x884 0x2 0x0 --#define MX6Q_PAD_ENET_TXD0__GPIO1_IO30 0x1f0 0x504 0x000 0x5 0x0 --#define MX6Q_PAD_ENET_MDC__MLB_DATA 0x1f4 0x508 0x904 0x0 0x0 --#define MX6Q_PAD_ENET_MDC__ENET_MDC 0x1f4 0x508 0x000 0x1 0x0 --#define MX6Q_PAD_ENET_MDC__ESAI_TX5_RX0 0x1f4 0x508 0x888 0x2 0x0 --#define MX6Q_PAD_ENET_MDC__ENET_1588_EVENT1_IN 0x1f4 0x508 0x000 0x4 0x0 --#define MX6Q_PAD_ENET_MDC__GPIO1_IO31 0x1f4 0x508 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_COL0__ECSPI1_SCLK 0x1f8 0x5c8 0x7f4 0x0 0x2 --#define MX6Q_PAD_KEY_COL0__ENET_RX_DATA3 0x1f8 0x5c8 0x854 0x1 0x1 --#define MX6Q_PAD_KEY_COL0__AUD5_TXC 0x1f8 0x5c8 0x7dc 0x2 0x1 --#define MX6Q_PAD_KEY_COL0__KEY_COL0 0x1f8 0x5c8 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_COL0__UART4_TX_DATA 0x1f8 0x5c8 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_COL0__UART4_RX_DATA 0x1f8 0x5c8 0x938 0x4 0x0 --#define MX6Q_PAD_KEY_COL0__GPIO4_IO06 0x1f8 0x5c8 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_COL0__DCIC1_OUT 0x1f8 0x5c8 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_ROW0__ECSPI1_MOSI 0x1fc 0x5cc 0x7fc 0x0 0x2 --#define MX6Q_PAD_KEY_ROW0__ENET_TX_DATA3 0x1fc 0x5cc 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_ROW0__AUD5_TXD 0x1fc 0x5cc 0x7d0 0x2 0x1 --#define MX6Q_PAD_KEY_ROW0__KEY_ROW0 0x1fc 0x5cc 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_ROW0__UART4_RX_DATA 0x1fc 0x5cc 0x938 0x4 0x1 --#define MX6Q_PAD_KEY_ROW0__UART4_TX_DATA 0x1fc 0x5cc 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_ROW0__GPIO4_IO07 0x1fc 0x5cc 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_ROW0__DCIC2_OUT 0x1fc 0x5cc 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_COL1__ECSPI1_MISO 0x200 0x5d0 0x7f8 0x0 0x2 --#define MX6Q_PAD_KEY_COL1__ENET_MDIO 0x200 0x5d0 0x840 0x1 0x1 --#define MX6Q_PAD_KEY_COL1__AUD5_TXFS 0x200 0x5d0 0x7e0 0x2 0x1 --#define MX6Q_PAD_KEY_COL1__KEY_COL1 0x200 0x5d0 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_COL1__UART5_TX_DATA 0x200 0x5d0 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_COL1__UART5_RX_DATA 0x200 0x5d0 0x940 0x4 0x0 --#define MX6Q_PAD_KEY_COL1__GPIO4_IO08 0x200 0x5d0 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_COL1__SD1_VSELECT 0x200 0x5d0 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_ROW1__ECSPI1_SS0 0x204 0x5d4 0x800 0x0 0x2 --#define MX6Q_PAD_KEY_ROW1__ENET_COL 0x204 0x5d4 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_ROW1__AUD5_RXD 0x204 0x5d4 0x7cc 0x2 0x1 --#define MX6Q_PAD_KEY_ROW1__KEY_ROW1 0x204 0x5d4 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_ROW1__UART5_RX_DATA 0x204 0x5d4 0x940 0x4 0x1 --#define MX6Q_PAD_KEY_ROW1__UART5_TX_DATA 0x204 0x5d4 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_ROW1__GPIO4_IO09 0x204 0x5d4 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_ROW1__SD2_VSELECT 0x204 0x5d4 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_COL2__ECSPI1_SS1 0x208 0x5d8 0x804 0x0 0x2 --#define MX6Q_PAD_KEY_COL2__ENET_RX_DATA2 0x208 0x5d8 0x850 0x1 0x1 --#define MX6Q_PAD_KEY_COL2__FLEXCAN1_TX 0x208 0x5d8 0x000 0x2 0x0 --#define MX6Q_PAD_KEY_COL2__KEY_COL2 0x208 0x5d8 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_COL2__ENET_MDC 0x208 0x5d8 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_COL2__GPIO4_IO10 0x208 0x5d8 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE 0x208 0x5d8 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_ROW2__ECSPI1_SS2 0x20c 0x5dc 0x808 0x0 0x1 --#define MX6Q_PAD_KEY_ROW2__ENET_TX_DATA2 0x20c 0x5dc 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_ROW2__FLEXCAN1_RX 0x20c 0x5dc 0x7e4 0x2 0x0 --#define MX6Q_PAD_KEY_ROW2__KEY_ROW2 0x20c 0x5dc 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_ROW2__SD2_VSELECT 0x20c 0x5dc 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_ROW2__GPIO4_IO11 0x20c 0x5dc 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x20c 0x5dc 0x88c 0x6 0x1 --#define MX6Q_PAD_KEY_COL3__ECSPI1_SS3 0x210 0x5e0 0x80c 0x0 0x1 --#define MX6Q_PAD_KEY_COL3__ENET_CRS 0x210 0x5e0 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x210 0x5e0 0x890 0x2 0x1 --#define MX6Q_PAD_KEY_COL3__KEY_COL3 0x210 0x5e0 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_COL3__I2C2_SCL 0x210 0x5e0 0x8a0 0x4 0x1 --#define MX6Q_PAD_KEY_COL3__GPIO4_IO12 0x210 0x5e0 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_COL3__SPDIF_IN 0x210 0x5e0 0x914 0x6 0x2 --#define MX6Q_PAD_KEY_ROW3__ASRC_EXT_CLK 0x214 0x5e4 0x7b0 0x1 0x0 --#define MX6Q_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x214 0x5e4 0x894 0x2 0x1 --#define MX6Q_PAD_KEY_ROW3__KEY_ROW3 0x214 0x5e4 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_ROW3__I2C2_SDA 0x214 0x5e4 0x8a4 0x4 0x1 --#define MX6Q_PAD_KEY_ROW3__GPIO4_IO13 0x214 0x5e4 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_ROW3__SD1_VSELECT 0x214 0x5e4 0x000 0x6 0x0 --#define MX6Q_PAD_KEY_COL4__FLEXCAN2_TX 0x218 0x5e8 0x000 0x0 0x0 --#define MX6Q_PAD_KEY_COL4__IPU1_SISG4 0x218 0x5e8 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_COL4__USB_OTG_OC 0x218 0x5e8 0x944 0x2 0x1 --#define MX6Q_PAD_KEY_COL4__KEY_COL4 0x218 0x5e8 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_COL4__UART5_RTS_B 0x218 0x5e8 0x93c 0x4 0x0 --#define MX6Q_PAD_KEY_COL4__UART5_CTS_B 0x218 0x5e8 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_COL4__GPIO4_IO14 0x218 0x5e8 0x000 0x5 0x0 --#define MX6Q_PAD_KEY_ROW4__FLEXCAN2_RX 0x21c 0x5ec 0x7e8 0x0 0x0 --#define MX6Q_PAD_KEY_ROW4__IPU1_SISG5 0x21c 0x5ec 0x000 0x1 0x0 --#define MX6Q_PAD_KEY_ROW4__USB_OTG_PWR 0x21c 0x5ec 0x000 0x2 0x0 --#define MX6Q_PAD_KEY_ROW4__KEY_ROW4 0x21c 0x5ec 0x000 0x3 0x0 --#define MX6Q_PAD_KEY_ROW4__UART5_CTS_B 0x21c 0x5ec 0x000 0x4 0x0 --#define MX6Q_PAD_KEY_ROW4__UART5_RTS_B 0x21c 0x5ec 0x93c 0x4 0x1 --#define MX6Q_PAD_KEY_ROW4__GPIO4_IO15 0x21c 0x5ec 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_0__CCM_CLKO1 0x220 0x5f0 0x000 0x0 0x0 --#define MX6Q_PAD_GPIO_0__KEY_COL5 0x220 0x5f0 0x8e8 0x2 0x0 --#define MX6Q_PAD_GPIO_0__ASRC_EXT_CLK 0x220 0x5f0 0x7b0 0x3 0x1 --#define MX6Q_PAD_GPIO_0__EPIT1_OUT 0x220 0x5f0 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_0__GPIO1_IO00 0x220 0x5f0 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_0__USB_H1_PWR 0x220 0x5f0 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_0__SNVS_VIO_5 0x220 0x5f0 0x000 0x7 0x0 --#define MX6Q_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1 --#define MX6Q_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0 --#define MX6Q_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_9__ESAI_RX_FS 0x228 0x5f8 0x85c 0x0 0x1 --#define MX6Q_PAD_GPIO_9__WDOG1_B 0x228 0x5f8 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_9__KEY_COL6 0x228 0x5f8 0x8ec 0x2 0x0 --#define MX6Q_PAD_GPIO_9__CCM_REF_EN_B 0x228 0x5f8 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_9__PWM1_OUT 0x228 0x5f8 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_9__GPIO1_IO09 0x228 0x5f8 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_9__SD1_WP 0x228 0x5f8 0x94c 0x6 0x1 --#define MX6Q_PAD_GPIO_3__ESAI_RX_HF_CLK 0x22c 0x5fc 0x864 0x0 0x1 --#define MX6Q_PAD_GPIO_3__I2C3_SCL 0x22c 0x5fc 0x8a8 0x2 0x1 --#define MX6Q_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x22c 0x5fc 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_3__CCM_CLKO2 0x22c 0x5fc 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_3__GPIO1_IO03 0x22c 0x5fc 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_3__USB_H1_OC 0x22c 0x5fc 0x948 0x6 0x1 --#define MX6Q_PAD_GPIO_3__MLB_CLK 0x22c 0x5fc 0x900 0x7 0x1 --#define MX6Q_PAD_GPIO_6__ESAI_TX_CLK 0x230 0x600 0x870 0x0 0x1 --#define MX6Q_PAD_GPIO_6__I2C3_SDA 0x230 0x600 0x8ac 0x2 0x1 --#define MX6Q_PAD_GPIO_6__GPIO1_IO06 0x230 0x600 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_6__SD2_LCTL 0x230 0x600 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_6__MLB_SIG 0x230 0x600 0x908 0x7 0x1 --#define MX6Q_PAD_GPIO_2__ESAI_TX_FS 0x234 0x604 0x860 0x0 0x1 --#define MX6Q_PAD_GPIO_2__KEY_ROW6 0x234 0x604 0x8f8 0x2 0x1 --#define MX6Q_PAD_GPIO_2__GPIO1_IO02 0x234 0x604 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_2__SD2_WP 0x234 0x604 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_2__MLB_DATA 0x234 0x604 0x904 0x7 0x1 --#define MX6Q_PAD_GPIO_4__ESAI_TX_HF_CLK 0x238 0x608 0x868 0x0 0x1 --#define MX6Q_PAD_GPIO_4__KEY_COL7 0x238 0x608 0x8f0 0x2 0x1 --#define MX6Q_PAD_GPIO_4__GPIO1_IO04 0x238 0x608 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_4__SD2_CD_B 0x238 0x608 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_5__ESAI_TX2_RX3 0x23c 0x60c 0x87c 0x0 0x1 --#define MX6Q_PAD_GPIO_5__KEY_ROW7 0x23c 0x60c 0x8fc 0x2 0x1 --#define MX6Q_PAD_GPIO_5__CCM_CLKO1 0x23c 0x60c 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_5__GPIO1_IO05 0x23c 0x60c 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_5__I2C3_SCL 0x23c 0x60c 0x8a8 0x6 0x2 --#define MX6Q_PAD_GPIO_5__ARM_EVENTI 0x23c 0x60c 0x000 0x7 0x0 --#define MX6Q_PAD_GPIO_7__ESAI_TX4_RX1 0x240 0x610 0x884 0x0 0x1 --#define MX6Q_PAD_GPIO_7__ECSPI5_RDY 0x240 0x610 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_7__EPIT1_OUT 0x240 0x610 0x000 0x2 0x0 --#define MX6Q_PAD_GPIO_7__FLEXCAN1_TX 0x240 0x610 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_7__UART2_TX_DATA 0x240 0x610 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_7__UART2_RX_DATA 0x240 0x610 0x928 0x4 0x2 --#define MX6Q_PAD_GPIO_7__GPIO1_IO07 0x240 0x610 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_7__SPDIF_LOCK 0x240 0x610 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_7__USB_OTG_HOST_MODE 0x240 0x610 0x000 0x7 0x0 --#define MX6Q_PAD_GPIO_8__ESAI_TX5_RX0 0x244 0x614 0x888 0x0 0x1 --#define MX6Q_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x244 0x614 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_8__EPIT2_OUT 0x244 0x614 0x000 0x2 0x0 --#define MX6Q_PAD_GPIO_8__FLEXCAN1_RX 0x244 0x614 0x7e4 0x3 0x1 --#define MX6Q_PAD_GPIO_8__UART2_RX_DATA 0x244 0x614 0x928 0x4 0x3 --#define MX6Q_PAD_GPIO_8__UART2_TX_DATA 0x244 0x614 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_8__GPIO1_IO08 0x244 0x614 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_8__SPDIF_SR_CLK 0x244 0x614 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE 0x244 0x614 0x000 0x7 0x0 --#define MX6Q_PAD_GPIO_16__ESAI_TX3_RX2 0x248 0x618 0x880 0x0 0x1 --#define MX6Q_PAD_GPIO_16__ENET_1588_EVENT2_IN 0x248 0x618 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_16__ENET_REF_CLK 0x248 0x618 0x83c 0x2 0x1 --#define MX6Q_PAD_GPIO_16__SD1_LCTL 0x248 0x618 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_16__SPDIF_IN 0x248 0x618 0x914 0x4 0x3 --#define MX6Q_PAD_GPIO_16__GPIO7_IO11 0x248 0x618 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_16__I2C3_SDA 0x248 0x618 0x8ac 0x6 0x2 --#define MX6Q_PAD_GPIO_16__JTAG_DE_B 0x248 0x618 0x000 0x7 0x0 --#define MX6Q_PAD_GPIO_17__ESAI_TX0 0x24c 0x61c 0x874 0x0 0x0 --#define MX6Q_PAD_GPIO_17__ENET_1588_EVENT3_IN 0x24c 0x61c 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_17__CCM_PMIC_READY 0x24c 0x61c 0x7f0 0x2 0x1 --#define MX6Q_PAD_GPIO_17__SDMA_EXT_EVENT0 0x24c 0x61c 0x90c 0x3 0x1 --#define MX6Q_PAD_GPIO_17__SPDIF_OUT 0x24c 0x61c 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_17__GPIO7_IO12 0x24c 0x61c 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_18__ESAI_TX1 0x250 0x620 0x878 0x0 0x0 --#define MX6Q_PAD_GPIO_18__ENET_RX_CLK 0x250 0x620 0x844 0x1 0x1 --#define MX6Q_PAD_GPIO_18__SD3_VSELECT 0x250 0x620 0x000 0x2 0x0 --#define MX6Q_PAD_GPIO_18__SDMA_EXT_EVENT1 0x250 0x620 0x910 0x3 0x1 --#define MX6Q_PAD_GPIO_18__ASRC_EXT_CLK 0x250 0x620 0x7b0 0x4 0x2 --#define MX6Q_PAD_GPIO_18__GPIO7_IO13 0x250 0x620 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_18__SNVS_VIO_5_CTL 0x250 0x620 0x000 0x6 0x0 --#define MX6Q_PAD_GPIO_19__KEY_COL5 0x254 0x624 0x8e8 0x0 0x1 --#define MX6Q_PAD_GPIO_19__ENET_1588_EVENT0_OUT 0x254 0x624 0x000 0x1 0x0 --#define MX6Q_PAD_GPIO_19__SPDIF_OUT 0x254 0x624 0x000 0x2 0x0 --#define MX6Q_PAD_GPIO_19__CCM_CLKO1 0x254 0x624 0x000 0x3 0x0 --#define MX6Q_PAD_GPIO_19__ECSPI1_RDY 0x254 0x624 0x000 0x4 0x0 --#define MX6Q_PAD_GPIO_19__GPIO4_IO05 0x254 0x624 0x000 0x5 0x0 --#define MX6Q_PAD_GPIO_19__ENET_TX_ER 0x254 0x624 0x000 0x6 0x0 --#define MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x258 0x628 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_PIXCLK__GPIO5_IO18 0x258 0x628 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_PIXCLK__ARM_EVENTO 0x258 0x628 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x25c 0x62c 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_MCLK__CCM_CLKO1 0x25c 0x62c 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_MCLK__GPIO5_IO19 0x25c 0x62c 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x25c 0x62c 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x260 0x630 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DATA_EN__EIM_DATA00 0x260 0x630 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DATA_EN__GPIO5_IO20 0x260 0x630 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x260 0x630 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x264 0x634 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_VSYNC__EIM_DATA01 0x264 0x634 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_VSYNC__GPIO5_IO21 0x264 0x634 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_VSYNC__ARM_TRACE00 0x264 0x634 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x268 0x638 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT4__EIM_DATA02 0x268 0x638 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT4__ECSPI1_SCLK 0x268 0x638 0x7f4 0x2 0x3 --#define MX6Q_PAD_CSI0_DAT4__KEY_COL5 0x268 0x638 0x8e8 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT4__AUD3_TXC 0x268 0x638 0x000 0x4 0x0 --#define MX6Q_PAD_CSI0_DAT4__GPIO5_IO22 0x268 0x638 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT4__ARM_TRACE01 0x268 0x638 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x26c 0x63c 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT5__EIM_DATA03 0x26c 0x63c 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT5__ECSPI1_MOSI 0x26c 0x63c 0x7fc 0x2 0x3 --#define MX6Q_PAD_CSI0_DAT5__KEY_ROW5 0x26c 0x63c 0x8f4 0x3 0x1 --#define MX6Q_PAD_CSI0_DAT5__AUD3_TXD 0x26c 0x63c 0x000 0x4 0x0 --#define MX6Q_PAD_CSI0_DAT5__GPIO5_IO23 0x26c 0x63c 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT5__ARM_TRACE02 0x26c 0x63c 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x270 0x640 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT6__EIM_DATA04 0x270 0x640 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT6__ECSPI1_MISO 0x270 0x640 0x7f8 0x2 0x3 --#define MX6Q_PAD_CSI0_DAT6__KEY_COL6 0x270 0x640 0x8ec 0x3 0x1 --#define MX6Q_PAD_CSI0_DAT6__AUD3_TXFS 0x270 0x640 0x000 0x4 0x0 --#define MX6Q_PAD_CSI0_DAT6__GPIO5_IO24 0x270 0x640 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT6__ARM_TRACE03 0x270 0x640 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x274 0x644 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT7__EIM_DATA05 0x274 0x644 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT7__ECSPI1_SS0 0x274 0x644 0x800 0x2 0x3 --#define MX6Q_PAD_CSI0_DAT7__KEY_ROW6 0x274 0x644 0x8f8 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT7__AUD3_RXD 0x274 0x644 0x000 0x4 0x0 --#define MX6Q_PAD_CSI0_DAT7__GPIO5_IO25 0x274 0x644 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT7__ARM_TRACE04 0x274 0x644 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x278 0x648 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT8__EIM_DATA06 0x278 0x648 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT8__ECSPI2_SCLK 0x278 0x648 0x810 0x2 0x2 --#define MX6Q_PAD_CSI0_DAT8__KEY_COL7 0x278 0x648 0x8f0 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT8__I2C1_SDA 0x278 0x648 0x89c 0x4 0x1 --#define MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 0x278 0x648 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT8__ARM_TRACE05 0x278 0x648 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x27c 0x64c 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT9__EIM_DATA07 0x27c 0x64c 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT9__ECSPI2_MOSI 0x27c 0x64c 0x818 0x2 0x2 --#define MX6Q_PAD_CSI0_DAT9__KEY_ROW7 0x27c 0x64c 0x8fc 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT9__I2C1_SCL 0x27c 0x64c 0x898 0x4 0x1 --#define MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 0x27c 0x64c 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT9__ARM_TRACE06 0x27c 0x64c 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x280 0x650 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT10__AUD3_RXC 0x280 0x650 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT10__ECSPI2_MISO 0x280 0x650 0x814 0x2 0x2 --#define MX6Q_PAD_CSI0_DAT10__UART1_TX_DATA 0x280 0x650 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT10__UART1_RX_DATA 0x280 0x650 0x920 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT10__GPIO5_IO28 0x280 0x650 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT10__ARM_TRACE07 0x280 0x650 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x284 0x654 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT11__AUD3_RXFS 0x284 0x654 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT11__ECSPI2_SS0 0x284 0x654 0x81c 0x2 0x2 --#define MX6Q_PAD_CSI0_DAT11__UART1_RX_DATA 0x284 0x654 0x920 0x3 0x1 --#define MX6Q_PAD_CSI0_DAT11__UART1_TX_DATA 0x284 0x654 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT11__GPIO5_IO29 0x284 0x654 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT11__ARM_TRACE08 0x284 0x654 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x288 0x658 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT12__EIM_DATA08 0x288 0x658 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT12__UART4_TX_DATA 0x288 0x658 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT12__UART4_RX_DATA 0x288 0x658 0x938 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT12__GPIO5_IO30 0x288 0x658 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT12__ARM_TRACE09 0x288 0x658 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x28c 0x65c 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT13__EIM_DATA09 0x28c 0x65c 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT13__UART4_RX_DATA 0x28c 0x65c 0x938 0x3 0x3 --#define MX6Q_PAD_CSI0_DAT13__UART4_TX_DATA 0x28c 0x65c 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT13__GPIO5_IO31 0x28c 0x65c 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT13__ARM_TRACE10 0x28c 0x65c 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x290 0x660 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT14__EIM_DATA10 0x290 0x660 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT14__UART5_TX_DATA 0x290 0x660 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT14__UART5_RX_DATA 0x290 0x660 0x940 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT14__GPIO6_IO00 0x290 0x660 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT14__ARM_TRACE11 0x290 0x660 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x294 0x664 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT15__EIM_DATA11 0x294 0x664 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT15__UART5_RX_DATA 0x294 0x664 0x940 0x3 0x3 --#define MX6Q_PAD_CSI0_DAT15__UART5_TX_DATA 0x294 0x664 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT15__GPIO6_IO01 0x294 0x664 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT15__ARM_TRACE12 0x294 0x664 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x298 0x668 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT16__EIM_DATA12 0x298 0x668 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT16__UART4_RTS_B 0x298 0x668 0x934 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT16__UART4_CTS_B 0x298 0x668 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT16__GPIO6_IO02 0x298 0x668 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT16__ARM_TRACE13 0x298 0x668 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x29c 0x66c 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT17__EIM_DATA13 0x29c 0x66c 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT17__UART4_CTS_B 0x29c 0x66c 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT17__UART4_RTS_B 0x29c 0x66c 0x934 0x3 0x1 --#define MX6Q_PAD_CSI0_DAT17__GPIO6_IO03 0x29c 0x66c 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT17__ARM_TRACE14 0x29c 0x66c 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x2a0 0x670 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT18__EIM_DATA14 0x2a0 0x670 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT18__UART5_RTS_B 0x2a0 0x670 0x93c 0x3 0x2 --#define MX6Q_PAD_CSI0_DAT18__UART5_CTS_B 0x2a0 0x670 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT18__GPIO6_IO04 0x2a0 0x670 0x000 0x5 0x0 --#define MX6Q_PAD_CSI0_DAT18__ARM_TRACE15 0x2a0 0x670 0x000 0x7 0x0 --#define MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x2a4 0x674 0x000 0x0 0x0 --#define MX6Q_PAD_CSI0_DAT19__EIM_DATA15 0x2a4 0x674 0x000 0x1 0x0 --#define MX6Q_PAD_CSI0_DAT19__UART5_CTS_B 0x2a4 0x674 0x000 0x3 0x0 --#define MX6Q_PAD_CSI0_DAT19__UART5_RTS_B 0x2a4 0x674 0x93c 0x3 0x3 --#define MX6Q_PAD_CSI0_DAT19__GPIO6_IO05 0x2a4 0x674 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT7__SD3_DATA7 0x2a8 0x690 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT7__UART1_TX_DATA 0x2a8 0x690 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT7__UART1_RX_DATA 0x2a8 0x690 0x920 0x1 0x2 --#define MX6Q_PAD_SD3_DAT7__GPIO6_IO17 0x2a8 0x690 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT6__SD3_DATA6 0x2ac 0x694 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT6__UART1_RX_DATA 0x2ac 0x694 0x920 0x1 0x3 --#define MX6Q_PAD_SD3_DAT6__UART1_TX_DATA 0x2ac 0x694 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT6__GPIO6_IO18 0x2ac 0x694 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT5__SD3_DATA5 0x2b0 0x698 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT5__UART2_TX_DATA 0x2b0 0x698 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT5__UART2_RX_DATA 0x2b0 0x698 0x928 0x1 0x4 --#define MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x2b0 0x698 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT4__SD3_DATA4 0x2b4 0x69c 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT4__UART2_RX_DATA 0x2b4 0x69c 0x928 0x1 0x5 --#define MX6Q_PAD_SD3_DAT4__UART2_TX_DATA 0x2b4 0x69c 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT4__GPIO7_IO01 0x2b4 0x69c 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_CMD__SD3_CMD 0x2b8 0x6a0 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_CMD__UART2_CTS_B 0x2b8 0x6a0 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_CMD__UART2_RTS_B 0x2b8 0x6a0 0x924 0x1 0x2 --#define MX6Q_PAD_SD3_CMD__FLEXCAN1_TX 0x2b8 0x6a0 0x000 0x2 0x0 --#define MX6Q_PAD_SD3_CMD__GPIO7_IO02 0x2b8 0x6a0 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_CLK__SD3_CLK 0x2bc 0x6a4 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_CLK__UART2_RTS_B 0x2bc 0x6a4 0x924 0x1 0x3 --#define MX6Q_PAD_SD3_CLK__UART2_CTS_B 0x2bc 0x6a4 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_CLK__FLEXCAN1_RX 0x2bc 0x6a4 0x7e4 0x2 0x2 --#define MX6Q_PAD_SD3_CLK__GPIO7_IO03 0x2bc 0x6a4 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT0__SD3_DATA0 0x2c0 0x6a8 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT0__UART1_CTS_B 0x2c0 0x6a8 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT0__UART1_RTS_B 0x2c0 0x6a8 0x91c 0x1 0x2 --#define MX6Q_PAD_SD3_DAT0__FLEXCAN2_TX 0x2c0 0x6a8 0x000 0x2 0x0 --#define MX6Q_PAD_SD3_DAT0__GPIO7_IO04 0x2c0 0x6a8 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT1__SD3_DATA1 0x2c4 0x6ac 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT1__UART1_RTS_B 0x2c4 0x6ac 0x91c 0x1 0x3 --#define MX6Q_PAD_SD3_DAT1__UART1_CTS_B 0x2c4 0x6ac 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT1__FLEXCAN2_RX 0x2c4 0x6ac 0x7e8 0x2 0x1 --#define MX6Q_PAD_SD3_DAT1__GPIO7_IO05 0x2c4 0x6ac 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT2__SD3_DATA2 0x2c8 0x6b0 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT2__GPIO7_IO06 0x2c8 0x6b0 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_DAT3__SD3_DATA3 0x2cc 0x6b4 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_DAT3__UART3_CTS_B 0x2cc 0x6b4 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_DAT3__UART3_RTS_B 0x2cc 0x6b4 0x92c 0x1 0x4 --#define MX6Q_PAD_SD3_DAT3__GPIO7_IO07 0x2cc 0x6b4 0x000 0x5 0x0 --#define MX6Q_PAD_SD3_RST__SD3_RESET 0x2d0 0x6b8 0x000 0x0 0x0 --#define MX6Q_PAD_SD3_RST__UART3_RTS_B 0x2d0 0x6b8 0x92c 0x1 0x5 --#define MX6Q_PAD_SD3_RST__UART3_CTS_B 0x2d0 0x6b8 0x000 0x1 0x0 --#define MX6Q_PAD_SD3_RST__GPIO7_IO08 0x2d0 0x6b8 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CLE__NAND_CLE 0x2d4 0x6bc 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_CLE__IPU2_SISG4 0x2d4 0x6bc 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_CLE__GPIO6_IO07 0x2d4 0x6bc 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_ALE__NAND_ALE 0x2d8 0x6c0 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_ALE__SD4_RESET 0x2d8 0x6c0 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_ALE__GPIO6_IO08 0x2d8 0x6c0 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_WP_B__NAND_WP_B 0x2dc 0x6c4 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_WP_B__IPU2_SISG5 0x2dc 0x6c4 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_WP_B__GPIO6_IO09 0x2dc 0x6c4 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_RB0__NAND_READY_B 0x2e0 0x6c8 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_RB0__IPU2_DI0_PIN01 0x2e0 0x6c8 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_RB0__GPIO6_IO10 0x2e0 0x6c8 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CS0__NAND_CE0_B 0x2e4 0x6cc 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_CS0__GPIO6_IO11 0x2e4 0x6cc 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CS1__NAND_CE1_B 0x2e8 0x6d0 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_CS1__SD4_VSELECT 0x2e8 0x6d0 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_CS1__SD3_VSELECT 0x2e8 0x6d0 0x000 0x2 0x0 --#define MX6Q_PAD_NANDF_CS1__GPIO6_IO14 0x2e8 0x6d0 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CS2__NAND_CE2_B 0x2ec 0x6d4 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_CS2__IPU1_SISG0 0x2ec 0x6d4 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_CS2__ESAI_TX0 0x2ec 0x6d4 0x874 0x2 0x1 --#define MX6Q_PAD_NANDF_CS2__EIM_CRE 0x2ec 0x6d4 0x000 0x3 0x0 --#define MX6Q_PAD_NANDF_CS2__CCM_CLKO2 0x2ec 0x6d4 0x000 0x4 0x0 --#define MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x2ec 0x6d4 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CS2__IPU2_SISG0 0x2ec 0x6d4 0x000 0x6 0x0 --#define MX6Q_PAD_NANDF_CS3__NAND_CE3_B 0x2f0 0x6d8 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_CS3__IPU1_SISG1 0x2f0 0x6d8 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_CS3__ESAI_TX1 0x2f0 0x6d8 0x878 0x2 0x1 --#define MX6Q_PAD_NANDF_CS3__EIM_ADDR26 0x2f0 0x6d8 0x000 0x3 0x0 --#define MX6Q_PAD_NANDF_CS3__GPIO6_IO16 0x2f0 0x6d8 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_CS3__IPU2_SISG1 0x2f0 0x6d8 0x000 0x6 0x0 --#define MX6Q_PAD_SD4_CMD__SD4_CMD 0x2f4 0x6dc 0x000 0x0 0x0 --#define MX6Q_PAD_SD4_CMD__NAND_RE_B 0x2f4 0x6dc 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_CMD__UART3_TX_DATA 0x2f4 0x6dc 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_CMD__UART3_RX_DATA 0x2f4 0x6dc 0x930 0x2 0x2 --#define MX6Q_PAD_SD4_CMD__GPIO7_IO09 0x2f4 0x6dc 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_CLK__SD4_CLK 0x2f8 0x6e0 0x000 0x0 0x0 --#define MX6Q_PAD_SD4_CLK__NAND_WE_B 0x2f8 0x6e0 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_CLK__UART3_RX_DATA 0x2f8 0x6e0 0x930 0x2 0x3 --#define MX6Q_PAD_SD4_CLK__UART3_TX_DATA 0x2f8 0x6e0 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_CLK__GPIO7_IO10 0x2f8 0x6e0 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D0__NAND_DATA00 0x2fc 0x6e4 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D0__SD1_DATA4 0x2fc 0x6e4 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D0__GPIO2_IO00 0x2fc 0x6e4 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D1__NAND_DATA01 0x300 0x6e8 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D1__SD1_DATA5 0x300 0x6e8 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D1__GPIO2_IO01 0x300 0x6e8 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D2__NAND_DATA02 0x304 0x6ec 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D2__SD1_DATA6 0x304 0x6ec 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D2__GPIO2_IO02 0x304 0x6ec 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D3__NAND_DATA03 0x308 0x6f0 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D3__SD1_DATA7 0x308 0x6f0 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D3__GPIO2_IO03 0x308 0x6f0 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D4__NAND_DATA04 0x30c 0x6f4 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D4__SD2_DATA4 0x30c 0x6f4 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D4__GPIO2_IO04 0x30c 0x6f4 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D5__NAND_DATA05 0x310 0x6f8 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D5__SD2_DATA5 0x310 0x6f8 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D5__GPIO2_IO05 0x310 0x6f8 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D6__NAND_DATA06 0x314 0x6fc 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D6__SD2_DATA6 0x314 0x6fc 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D6__GPIO2_IO06 0x314 0x6fc 0x000 0x5 0x0 --#define MX6Q_PAD_NANDF_D7__NAND_DATA07 0x318 0x700 0x000 0x0 0x0 --#define MX6Q_PAD_NANDF_D7__SD2_DATA7 0x318 0x700 0x000 0x1 0x0 --#define MX6Q_PAD_NANDF_D7__GPIO2_IO07 0x318 0x700 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT0__SD4_DATA0 0x31c 0x704 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT0__NAND_DQS 0x31c 0x704 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT0__GPIO2_IO08 0x31c 0x704 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT1__SD4_DATA1 0x320 0x708 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT1__PWM3_OUT 0x320 0x708 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT1__GPIO2_IO09 0x320 0x708 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT2__SD4_DATA2 0x324 0x70c 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT2__PWM4_OUT 0x324 0x70c 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT2__GPIO2_IO10 0x324 0x70c 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT3__SD4_DATA3 0x328 0x710 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT3__GPIO2_IO11 0x328 0x710 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT4__SD4_DATA4 0x32c 0x714 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT4__UART2_RX_DATA 0x32c 0x714 0x928 0x2 0x6 --#define MX6Q_PAD_SD4_DAT4__UART2_TX_DATA 0x32c 0x714 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT4__GPIO2_IO12 0x32c 0x714 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT5__SD4_DATA5 0x330 0x718 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT5__UART2_RTS_B 0x330 0x718 0x924 0x2 0x4 --#define MX6Q_PAD_SD4_DAT5__UART2_CTS_B 0x330 0x718 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT5__GPIO2_IO13 0x330 0x718 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT6__SD4_DATA6 0x334 0x71c 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT6__UART2_CTS_B 0x334 0x71c 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT6__UART2_RTS_B 0x334 0x71c 0x924 0x2 0x5 --#define MX6Q_PAD_SD4_DAT6__GPIO2_IO14 0x334 0x71c 0x000 0x5 0x0 --#define MX6Q_PAD_SD4_DAT7__SD4_DATA7 0x338 0x720 0x000 0x1 0x0 --#define MX6Q_PAD_SD4_DAT7__UART2_TX_DATA 0x338 0x720 0x000 0x2 0x0 --#define MX6Q_PAD_SD4_DAT7__UART2_RX_DATA 0x338 0x720 0x928 0x2 0x7 --#define MX6Q_PAD_SD4_DAT7__GPIO2_IO15 0x338 0x720 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT1__SD1_DATA1 0x33c 0x724 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_DAT1__ECSPI5_SS0 0x33c 0x724 0x834 0x1 0x1 --#define MX6Q_PAD_SD1_DAT1__PWM3_OUT 0x33c 0x724 0x000 0x2 0x0 --#define MX6Q_PAD_SD1_DAT1__GPT_CAPTURE2 0x33c 0x724 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_DAT1__GPIO1_IO17 0x33c 0x724 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT0__SD1_DATA0 0x340 0x728 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_DAT0__ECSPI5_MISO 0x340 0x728 0x82c 0x1 0x1 --#define MX6Q_PAD_SD1_DAT0__GPT_CAPTURE1 0x340 0x728 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_DAT0__GPIO1_IO16 0x340 0x728 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT3__SD1_DATA3 0x344 0x72c 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_DAT3__ECSPI5_SS2 0x344 0x72c 0x000 0x1 0x0 --#define MX6Q_PAD_SD1_DAT3__GPT_COMPARE3 0x344 0x72c 0x000 0x2 0x0 --#define MX6Q_PAD_SD1_DAT3__PWM1_OUT 0x344 0x72c 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_DAT3__WDOG2_B 0x344 0x72c 0x000 0x4 0x0 --#define MX6Q_PAD_SD1_DAT3__GPIO1_IO21 0x344 0x72c 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT3__WDOG2_RESET_B_DEB 0x344 0x72c 0x000 0x6 0x0 --#define MX6Q_PAD_SD1_CMD__SD1_CMD 0x348 0x730 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_CMD__ECSPI5_MOSI 0x348 0x730 0x830 0x1 0x0 --#define MX6Q_PAD_SD1_CMD__PWM4_OUT 0x348 0x730 0x000 0x2 0x0 --#define MX6Q_PAD_SD1_CMD__GPT_COMPARE1 0x348 0x730 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_CMD__GPIO1_IO18 0x348 0x730 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT2__SD1_DATA2 0x34c 0x734 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_DAT2__ECSPI5_SS1 0x34c 0x734 0x838 0x1 0x1 --#define MX6Q_PAD_SD1_DAT2__GPT_COMPARE2 0x34c 0x734 0x000 0x2 0x0 --#define MX6Q_PAD_SD1_DAT2__PWM2_OUT 0x34c 0x734 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_DAT2__WDOG1_B 0x34c 0x734 0x000 0x4 0x0 --#define MX6Q_PAD_SD1_DAT2__GPIO1_IO19 0x34c 0x734 0x000 0x5 0x0 --#define MX6Q_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x34c 0x734 0x000 0x6 0x0 --#define MX6Q_PAD_SD1_CLK__SD1_CLK 0x350 0x738 0x000 0x0 0x0 --#define MX6Q_PAD_SD1_CLK__ECSPI5_SCLK 0x350 0x738 0x828 0x1 0x0 --#define MX6Q_PAD_SD1_CLK__GPT_CLKIN 0x350 0x738 0x000 0x3 0x0 --#define MX6Q_PAD_SD1_CLK__GPIO1_IO20 0x350 0x738 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_CLK__SD2_CLK 0x354 0x73c 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_CLK__ECSPI5_SCLK 0x354 0x73c 0x828 0x1 0x1 --#define MX6Q_PAD_SD2_CLK__KEY_COL5 0x354 0x73c 0x8e8 0x2 0x3 --#define MX6Q_PAD_SD2_CLK__AUD4_RXFS 0x354 0x73c 0x7c0 0x3 0x1 --#define MX6Q_PAD_SD2_CLK__GPIO1_IO10 0x354 0x73c 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_CMD__SD2_CMD 0x358 0x740 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_CMD__ECSPI5_MOSI 0x358 0x740 0x830 0x1 0x1 --#define MX6Q_PAD_SD2_CMD__KEY_ROW5 0x358 0x740 0x8f4 0x2 0x2 --#define MX6Q_PAD_SD2_CMD__AUD4_RXC 0x358 0x740 0x7bc 0x3 0x1 --#define MX6Q_PAD_SD2_CMD__GPIO1_IO11 0x358 0x740 0x000 0x5 0x0 --#define MX6Q_PAD_SD2_DAT3__SD2_DATA3 0x35c 0x744 0x000 0x0 0x0 --#define MX6Q_PAD_SD2_DAT3__ECSPI5_SS3 0x35c 0x744 0x000 0x1 0x0 --#define MX6Q_PAD_SD2_DAT3__KEY_COL6 0x35c 0x744 0x8ec 0x2 0x2 --#define MX6Q_PAD_SD2_DAT3__AUD4_TXC 0x35c 0x744 0x7c4 0x3 0x1 --#define MX6Q_PAD_SD2_DAT3__GPIO1_IO12 0x35c 0x744 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x04c 0x360 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT1__ECSPI5_SS0 0x04c 0x360 0x834 0x1 0x0 -+#define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x04c 0x360 0x7c8 0x3 0x0 -+#define MX6QDL_PAD_SD2_DAT1__KEY_COL7 0x04c 0x360 0x8f0 0x4 0x0 -+#define MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x04c 0x360 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x050 0x364 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT2__ECSPI5_SS1 0x050 0x364 0x838 0x1 0x0 -+#define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x050 0x364 0x7b8 0x3 0x0 -+#define MX6QDL_PAD_SD2_DAT2__KEY_ROW6 0x050 0x364 0x8f8 0x4 0x0 -+#define MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x050 0x364 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x054 0x368 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT0__ECSPI5_MISO 0x054 0x368 0x82c 0x1 0x0 -+#define MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x054 0x368 0x7b4 0x3 0x0 -+#define MX6QDL_PAD_SD2_DAT0__KEY_ROW7 0x054 0x368 0x8fc 0x4 0x0 -+#define MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x054 0x368 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT0__DCIC2_OUT 0x054 0x368 0x000 0x6 0x0 -+#define MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x058 0x36c 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x058 0x36c 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0 -+#define MX6QDL_PAD_RGMII_TXC__GPIO6_IO19 0x058 0x36c 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M 0x058 0x36c 0x000 0x7 0x0 -+#define MX6QDL_PAD_RGMII_TD0__HSI_TX_READY 0x05c 0x370 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x05c 0x370 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x05c 0x370 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD1__HSI_RX_FLAG 0x060 0x374 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x060 0x374 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x060 0x374 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD2__HSI_RX_DATA 0x064 0x378 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x064 0x378 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x064 0x378 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TD3__HSI_RX_WAKE 0x068 0x37c 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x068 0x37c 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x068 0x37c 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x06c 0x380 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x06c 0x380 0x858 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RX_CTL__GPIO6_IO24 0x06c 0x380 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD0__HSI_RX_READY 0x070 0x384 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x070 0x384 0x848 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x070 0x384 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x074 0x388 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x074 0x388 0x000 0x1 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x074 0x388 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_TX_CTL__ENET_REF_CLK 0x074 0x388 0x83c 0x7 0x0 -+#define MX6QDL_PAD_RGMII_RD1__HSI_TX_FLAG 0x078 0x38c 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x078 0x38c 0x84c 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 0x078 0x38c 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD2__HSI_TX_DATA 0x07c 0x390 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x07c 0x390 0x850 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 0x07c 0x390 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RD3__HSI_TX_WAKE 0x080 0x394 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x080 0x394 0x854 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 0x080 0x394 0x000 0x5 0x0 -+#define MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x084 0x398 0x000 0x0 0x0 -+#define MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x084 0x398 0x844 0x1 0x0 -+#define MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x084 0x398 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A25__EIM_ADDR25 0x088 0x39c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A25__ECSPI4_SS1 0x088 0x39c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A25__ECSPI2_RDY 0x088 0x39c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_A25__IPU1_DI1_PIN12 0x088 0x39c 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_A25__IPU1_DI0_D1_CS 0x088 0x39c 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x088 0x39c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x088 0x39c 0x88c 0x6 0x0 -+#define MX6QDL_PAD_EIM_EB2__EIM_EB2_B 0x08c 0x3a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB2__ECSPI1_SS0 0x08c 0x3a0 0x800 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x08c 0x3a0 0x8d4 0x3 0x0 -+#define MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x08c 0x3a0 0x890 0x4 0x0 -+#define MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x08c 0x3a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x08c 0x3a0 0x8a0 0x6 0x0 -+#define MX6QDL_PAD_EIM_EB2__SRC_BOOT_CFG30 0x08c 0x3a0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D16__EIM_DATA16 0x090 0x3a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x090 0x3a4 0x7f4 0x1 0x0 -+#define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 0x090 0x3a4 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x090 0x3a4 0x8d0 0x3 0x0 -+#define MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x090 0x3a4 0x894 0x4 0x0 -+#define MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x090 0x3a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D16__I2C2_SDA 0x090 0x3a4 0x8a4 0x6 0x0 -+#define MX6QDL_PAD_EIM_D17__EIM_DATA17 0x094 0x3a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x094 0x3a8 0x7f8 0x1 0x0 -+#define MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06 0x094 0x3a8 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D17__IPU2_CSI1_PIXCLK 0x094 0x3a8 0x8e0 0x3 0x0 -+#define MX6QDL_PAD_EIM_D17__DCIC1_OUT 0x094 0x3a8 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x094 0x3a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D17__I2C3_SCL 0x094 0x3a8 0x8a8 0x6 0x0 -+#define MX6QDL_PAD_EIM_D18__EIM_DATA18 0x098 0x3ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x098 0x3ac 0x7fc 0x1 0x0 -+#define MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07 0x098 0x3ac 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x098 0x3ac 0x8cc 0x3 0x0 -+#define MX6QDL_PAD_EIM_D18__IPU1_DI1_D0_CS 0x098 0x3ac 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x098 0x3ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D18__I2C3_SDA 0x098 0x3ac 0x8ac 0x6 0x0 -+#define MX6QDL_PAD_EIM_D19__EIM_DATA19 0x09c 0x3b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D19__ECSPI1_SS1 0x09c 0x3b0 0x804 0x1 0x0 -+#define MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08 0x09c 0x3b0 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x09c 0x3b0 0x8c8 0x3 0x0 -+#define MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x09c 0x3b0 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x09c 0x3b0 0x91c 0x4 0x0 -+#define MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x09c 0x3b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D19__EPIT1_OUT 0x09c 0x3b0 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D20__EIM_DATA20 0x0a0 0x3b4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D20__ECSPI4_SS0 0x0a0 0x3b4 0x824 0x1 0x0 -+#define MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16 0x0a0 0x3b4 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x0a0 0x3b4 0x8c4 0x3 0x0 -+#define MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x0a0 0x3b4 0x91c 0x4 0x1 -+#define MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x0a0 0x3b4 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x0a0 0x3b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D20__EPIT2_OUT 0x0a0 0x3b4 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D21__EIM_DATA21 0x0a4 0x3b8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x0a4 0x3b8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17 0x0a4 0x3b8 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D21__IPU2_CSI1_DATA11 0x0a4 0x3b8 0x8b4 0x3 0x0 -+#define MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x0a4 0x3b8 0x944 0x4 0x0 -+#define MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x0a4 0x3b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D21__I2C1_SCL 0x0a4 0x3b8 0x898 0x6 0x0 -+#define MX6QDL_PAD_EIM_D21__SPDIF_IN 0x0a4 0x3b8 0x914 0x7 0x0 -+#define MX6QDL_PAD_EIM_D22__EIM_DATA22 0x0a8 0x3bc 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x0a8 0x3bc 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D22__IPU1_DI0_PIN01 0x0a8 0x3bc 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D22__IPU2_CSI1_DATA10 0x0a8 0x3bc 0x8b0 0x3 0x0 -+#define MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x0a8 0x3bc 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0a8 0x3bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D22__SPDIF_OUT 0x0a8 0x3bc 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D23__EIM_DATA23 0x0ac 0x3c0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI0_D0_CS 0x0ac 0x3c0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x0ac 0x3c0 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x0ac 0x3c0 0x92c 0x2 0x0 -+#define MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x0ac 0x3c0 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU2_CSI1_DATA_EN 0x0ac 0x3c0 0x8d8 0x4 0x0 -+#define MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x0ac 0x3c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN02 0x0ac 0x3c0 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D23__IPU1_DI1_PIN14 0x0ac 0x3c0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB3__EIM_EB3_B 0x0b0 0x3c4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB3__ECSPI4_RDY 0x0b0 0x3c4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x0b0 0x3c4 0x92c 0x2 0x1 -+#define MX6QDL_PAD_EIM_EB3__UART3_CTS_B 0x0b0 0x3c4 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_EB3__UART1_RI_B 0x0b0 0x3c4 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x0b0 0x3c4 0x8dc 0x4 0x0 -+#define MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x0b0 0x3c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB3__IPU1_DI1_PIN03 0x0b0 0x3c4 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_EB3__SRC_BOOT_CFG31 0x0b0 0x3c4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D24__EIM_DATA24 0x0b4 0x3c8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI4_SS2 0x0b4 0x3c8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x0b4 0x3c8 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x0b4 0x3c8 0x930 0x2 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI1_SS2 0x0b4 0x3c8 0x808 0x3 0x0 -+#define MX6QDL_PAD_EIM_D24__ECSPI2_SS2 0x0b4 0x3c8 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x0b4 0x3c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x0b4 0x3c8 0x7d8 0x6 0x0 -+#define MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x0b4 0x3c8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D25__EIM_DATA25 0x0b8 0x3cc 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI4_SS3 0x0b8 0x3cc 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x0b8 0x3cc 0x930 0x2 0x1 -+#define MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x0b8 0x3cc 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI1_SS3 0x0b8 0x3cc 0x80c 0x3 0x0 -+#define MX6QDL_PAD_EIM_D25__ECSPI2_SS3 0x0b8 0x3cc 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x0b8 0x3cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D25__AUD5_RXC 0x0b8 0x3cc 0x7d4 0x6 0x0 -+#define MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x0b8 0x3cc 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D26__EIM_DATA26 0x0bc 0x3d0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_DI1_PIN11 0x0bc 0x3d0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_CSI0_DATA01 0x0bc 0x3d0 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x0bc 0x3d0 0x8c0 0x3 0x0 -+#define MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x0bc 0x3d0 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x0bc 0x3d0 0x928 0x4 0x0 -+#define MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0bc 0x3d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_SISG2 0x0bc 0x3d0 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x0bc 0x3d0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D27__EIM_DATA27 0x0c0 0x3d4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_DI1_PIN13 0x0c0 0x3d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_CSI0_DATA00 0x0c0 0x3d4 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x0c0 0x3d4 0x8bc 0x3 0x0 -+#define MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x0c0 0x3d4 0x928 0x4 0x1 -+#define MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x0c0 0x3d4 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0c0 0x3d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_SISG3 0x0c0 0x3d4 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x0c0 0x3d4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D28__EIM_DATA28 0x0c4 0x3d8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D28__I2C1_SDA 0x0c4 0x3d8 0x89c 0x1 0x0 -+#define MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x0c4 0x3d8 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU2_CSI1_DATA12 0x0c4 0x3d8 0x8b8 0x3 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x0c4 0x3d8 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_RTS_B 0x0c4 0x3d8 0x924 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x0c4 0x3d8 0x924 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__UART2_DTE_RTS_B 0x0c4 0x3d8 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0c4 0x3d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU1_EXT_TRIG 0x0c4 0x3d8 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_D28__IPU1_DI0_PIN13 0x0c4 0x3d8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D29__EIM_DATA29 0x0c8 0x3dc 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU1_DI1_PIN15 0x0c8 0x3dc 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x0c8 0x3dc 0x824 0x2 0x1 -+#define MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x0c8 0x3dc 0x924 0x4 0x1 -+#define MX6QDL_PAD_EIM_D29__UART2_CTS_B 0x0c8 0x3dc 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x0c8 0x3dc 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D29__UART2_DTE_CTS_B 0x0c8 0x3dc 0x924 0x4 0x1 -+#define MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0c8 0x3dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x0c8 0x3dc 0x8e4 0x6 0x0 -+#define MX6QDL_PAD_EIM_D29__IPU1_DI0_PIN14 0x0c8 0x3dc 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_D30__EIM_DATA30 0x0cc 0x3e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x0cc 0x3e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_DI0_PIN11 0x0cc 0x3e0 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D30__IPU1_CSI0_DATA03 0x0cc 0x3e0 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x0cc 0x3e0 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x0cc 0x3e0 0x92c 0x4 0x2 -+#define MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0cc 0x3e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D30__USB_H1_OC 0x0cc 0x3e0 0x948 0x6 0x0 -+#define MX6QDL_PAD_EIM_D31__EIM_DATA31 0x0d0 0x3e4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x0d0 0x3e4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_DI0_PIN12 0x0d0 0x3e4 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_D31__IPU1_CSI0_DATA02 0x0d0 0x3e4 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x0d0 0x3e4 0x92c 0x4 0x3 -+#define MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x0d0 0x3e4 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0d0 0x3e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_D31__USB_H1_PWR 0x0d0 0x3e4 0x000 0x6 0x0 -+#define MX6QDL_PAD_EIM_A24__EIM_ADDR24 0x0d4 0x3e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x0d4 0x3e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU2_CSI1_DATA19 0x0d4 0x3e8 0x8d4 0x2 0x1 -+#define MX6QDL_PAD_EIM_A24__IPU2_SISG2 0x0d4 0x3e8 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_A24__IPU1_SISG2 0x0d4 0x3e8 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x0d4 0x3e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A24__SRC_BOOT_CFG24 0x0d4 0x3e8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A23__EIM_ADDR23 0x0d8 0x3ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x0d8 0x3ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU2_CSI1_DATA18 0x0d8 0x3ec 0x8d0 0x2 0x1 -+#define MX6QDL_PAD_EIM_A23__IPU2_SISG3 0x0d8 0x3ec 0x000 0x3 0x0 -+#define MX6QDL_PAD_EIM_A23__IPU1_SISG3 0x0d8 0x3ec 0x000 0x4 0x0 -+#define MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x0d8 0x3ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A23__SRC_BOOT_CFG23 0x0d8 0x3ec 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A22__EIM_ADDR22 0x0dc 0x3f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x0dc 0x3f0 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A22__IPU2_CSI1_DATA17 0x0dc 0x3f0 0x8cc 0x2 0x1 -+#define MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x0dc 0x3f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A22__SRC_BOOT_CFG22 0x0dc 0x3f0 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A21__EIM_ADDR21 0x0e0 0x3f4 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x0e0 0x3f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A21__IPU2_CSI1_DATA16 0x0e0 0x3f4 0x8c8 0x2 0x1 -+#define MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x0e0 0x3f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A21__SRC_BOOT_CFG21 0x0e0 0x3f4 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A20__EIM_ADDR20 0x0e4 0x3f8 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x0e4 0x3f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A20__IPU2_CSI1_DATA15 0x0e4 0x3f8 0x8c4 0x2 0x1 -+#define MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x0e4 0x3f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A20__SRC_BOOT_CFG20 0x0e4 0x3f8 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A19__EIM_ADDR19 0x0e8 0x3fc 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x0e8 0x3fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A19__IPU2_CSI1_DATA14 0x0e8 0x3fc 0x8c0 0x2 0x1 -+#define MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x0e8 0x3fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A19__SRC_BOOT_CFG19 0x0e8 0x3fc 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A18__EIM_ADDR18 0x0ec 0x400 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x0ec 0x400 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A18__IPU2_CSI1_DATA13 0x0ec 0x400 0x8bc 0x2 0x1 -+#define MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x0ec 0x400 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A18__SRC_BOOT_CFG18 0x0ec 0x400 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A17__EIM_ADDR17 0x0f0 0x404 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x0f0 0x404 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x0f0 0x404 0x8b8 0x2 0x1 -+#define MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x0f0 0x404 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A17__SRC_BOOT_CFG17 0x0f0 0x404 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_A16__EIM_ADDR16 0x0f4 0x408 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x0f4 0x408 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x0f4 0x408 0x8e0 0x2 0x1 -+#define MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x0f4 0x408 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_A16__SRC_BOOT_CFG16 0x0f4 0x408 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0x0f8 0x40c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_CS0__IPU1_DI1_PIN05 0x0f8 0x40c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 -+#define MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x0f8 0x40c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_CS1__EIM_CS1_B 0x0fc 0x410 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_CS1__IPU1_DI1_PIN06 0x0fc 0x410 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x0fc 0x410 0x818 0x2 0x0 -+#define MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x0fc 0x410 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_OE__EIM_OE_B 0x100 0x414 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_OE__IPU1_DI1_PIN07 0x100 0x414 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100 0x414 0x814 0x2 0x0 -+#define MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x100 0x414 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_RW__EIM_RW 0x104 0x418 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_RW__IPU1_DI1_PIN08 0x104 0x418 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_RW__ECSPI2_SS0 0x104 0x418 0x81c 0x2 0x0 -+#define MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x104 0x418 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_RW__SRC_BOOT_CFG29 0x104 0x418 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_LBA__EIM_LBA_B 0x108 0x41c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_LBA__IPU1_DI1_PIN17 0x108 0x41c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 0x108 0x41c 0x820 0x2 0x0 -+#define MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x108 0x41c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_LBA__SRC_BOOT_CFG26 0x108 0x41c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB0__EIM_EB0_B 0x10c 0x420 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x10c 0x420 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB0__IPU2_CSI1_DATA11 0x10c 0x420 0x8b4 0x2 0x1 -+#define MX6QDL_PAD_EIM_EB0__CCM_PMIC_READY 0x10c 0x420 0x7f0 0x4 0x0 -+#define MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x10c 0x420 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB0__SRC_BOOT_CFG27 0x10c 0x420 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_EB1__EIM_EB1_B 0x110 0x424 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x110 0x424 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_EB1__IPU2_CSI1_DATA10 0x110 0x424 0x8b0 0x2 0x1 -+#define MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x110 0x424 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_EB1__SRC_BOOT_CFG28 0x110 0x424 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA0__EIM_AD00 0x114 0x428 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x114 0x428 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA0__IPU2_CSI1_DATA09 0x114 0x428 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x114 0x428 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA0__SRC_BOOT_CFG00 0x114 0x428 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA1__EIM_AD01 0x118 0x42c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x118 0x42c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA1__IPU2_CSI1_DATA08 0x118 0x42c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x118 0x42c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA1__SRC_BOOT_CFG01 0x118 0x42c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA2__EIM_AD02 0x11c 0x430 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x11c 0x430 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA2__IPU2_CSI1_DATA07 0x11c 0x430 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x11c 0x430 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA2__SRC_BOOT_CFG02 0x11c 0x430 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA3__EIM_AD03 0x120 0x434 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x120 0x434 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA3__IPU2_CSI1_DATA06 0x120 0x434 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x120 0x434 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA3__SRC_BOOT_CFG03 0x120 0x434 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA4__EIM_AD04 0x124 0x438 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x124 0x438 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA4__IPU2_CSI1_DATA05 0x124 0x438 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x124 0x438 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA4__SRC_BOOT_CFG04 0x124 0x438 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA5__EIM_AD05 0x128 0x43c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x128 0x43c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA5__IPU2_CSI1_DATA04 0x128 0x43c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x128 0x43c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA5__SRC_BOOT_CFG05 0x128 0x43c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA6__EIM_AD06 0x12c 0x440 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x12c 0x440 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA6__IPU2_CSI1_DATA03 0x12c 0x440 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x12c 0x440 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA6__SRC_BOOT_CFG06 0x12c 0x440 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA7__EIM_AD07 0x130 0x444 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x130 0x444 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA7__IPU2_CSI1_DATA02 0x130 0x444 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x130 0x444 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA7__SRC_BOOT_CFG07 0x130 0x444 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA8__EIM_AD08 0x134 0x448 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x134 0x448 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA8__IPU2_CSI1_DATA01 0x134 0x448 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x134 0x448 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA8__SRC_BOOT_CFG08 0x134 0x448 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA9__EIM_AD09 0x138 0x44c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x138 0x44c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA9__IPU2_CSI1_DATA00 0x138 0x44c 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x138 0x44c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA9__SRC_BOOT_CFG09 0x138 0x44c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA10__EIM_AD10 0x13c 0x450 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x13c 0x450 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA10__IPU2_CSI1_DATA_EN 0x13c 0x450 0x8d8 0x2 0x1 -+#define MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x13c 0x450 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA10__SRC_BOOT_CFG10 0x13c 0x450 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA11__EIM_AD11 0x140 0x454 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x140 0x454 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA11__IPU2_CSI1_HSYNC 0x140 0x454 0x8dc 0x2 0x1 -+#define MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x140 0x454 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA11__SRC_BOOT_CFG11 0x140 0x454 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA12__EIM_AD12 0x144 0x458 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x144 0x458 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA12__IPU2_CSI1_VSYNC 0x144 0x458 0x8e4 0x2 0x1 -+#define MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x144 0x458 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA12__SRC_BOOT_CFG12 0x144 0x458 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA13__EIM_AD13 0x148 0x45c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA13__IPU1_DI1_D0_CS 0x148 0x45c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x148 0x45c 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA13__SRC_BOOT_CFG13 0x148 0x45c 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA14__EIM_AD14 0x14c 0x460 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA14__IPU1_DI1_D1_CS 0x14c 0x460 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x14c 0x460 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA14__SRC_BOOT_CFG14 0x14c 0x460 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_DA15__EIM_AD15 0x150 0x464 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN01 0x150 0x464 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_DA15__IPU1_DI1_PIN04 0x150 0x464 0x000 0x2 0x0 -+#define MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x150 0x464 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_DA15__SRC_BOOT_CFG15 0x150 0x464 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0x154 0x468 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_WAIT__EIM_DTACK_B 0x154 0x468 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x154 0x468 0x000 0x5 0x0 -+#define MX6QDL_PAD_EIM_WAIT__SRC_BOOT_CFG25 0x154 0x468 0x000 0x7 0x0 -+#define MX6QDL_PAD_EIM_BCLK__EIM_BCLK 0x158 0x46c 0x000 0x0 0x0 -+#define MX6QDL_PAD_EIM_BCLK__IPU1_DI1_PIN16 0x158 0x46c 0x000 0x1 0x0 -+#define MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x158 0x46c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x15c 0x470 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x15c 0x470 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x15c 0x470 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x160 0x474 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0x160 0x474 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x160 0x474 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x160 0x474 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x164 0x478 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0x164 0x478 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x164 0x478 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x164 0x478 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x168 0x47c 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0x168 0x47c 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x168 0x47c 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x168 0x47c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x16c 0x480 0x000 0x0 0x0 -+#define MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04 0x16c 0x480 0x000 0x1 0x0 -+#define MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x16c 0x480 0x000 0x2 0x0 -+#define MX6QDL_PAD_DI0_PIN4__SD1_WP 0x16c 0x480 0x94c 0x3 0x0 -+#define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x16c 0x480 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x170 0x484 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0x170 0x484 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x170 0x484 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x170 0x484 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x174 0x488 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0x174 0x488 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x174 0x488 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT1__GPIO4_IO22 0x174 0x488 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x178 0x48c 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0x178 0x48c 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x178 0x48c 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT2__GPIO4_IO23 0x178 0x48c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x17c 0x490 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0x17c 0x490 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__ECSPI3_SS0 0x17c 0x490 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x17c 0x490 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x180 0x494 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0x180 0x494 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__ECSPI3_SS1 0x180 0x494 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x180 0x494 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x184 0x498 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0x184 0x498 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__ECSPI3_SS2 0x184 0x498 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__AUD6_RXFS 0x184 0x498 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x184 0x498 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x188 0x49c 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0x188 0x49c 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__ECSPI3_SS3 0x188 0x49c 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__AUD6_RXC 0x188 0x49c 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x188 0x49c 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x18c 0x4a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0x18c 0x4a0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__ECSPI3_RDY 0x18c 0x4a0 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x18c 0x4a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x190 0x4a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0x190 0x4a4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x190 0x4a4 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x190 0x4a4 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x190 0x4a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x194 0x4a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0x194 0x4a8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x194 0x4a8 0x000 0x2 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__WDOG2_B 0x194 0x4a8 0x000 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x194 0x4a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x198 0x4ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0x198 0x4ac 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x198 0x4ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x19c 0x4b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0x19c 0x4b0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x19c 0x4b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x1a0 0x4b4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0x1a0 0x4b4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1a0 0x4b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x1a4 0x4b8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0x1a4 0x4b8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x1a4 0x4b8 0x7d8 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1a4 0x4b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x1a8 0x4bc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0x1a8 0x4bc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x1a8 0x4bc 0x7d4 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1a8 0x4bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x1ac 0x4c0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0x1ac 0x4c0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT15__ECSPI1_SS1 0x1ac 0x4c0 0x804 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT15__ECSPI2_SS1 0x1ac 0x4c0 0x820 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1ac 0x4c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x1b0 0x4c4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 0x1b0 0x4c4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x1b0 0x4c4 0x818 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x1b0 0x4c4 0x7dc 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__SDMA_EXT_EVENT0 0x1b0 0x4c4 0x90c 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0 0x4c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x1b4 0x4c8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 0x1b4 0x4c8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x1b4 0x4c8 0x814 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x1b4 0x4c8 0x7d0 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__SDMA_EXT_EVENT1 0x1b4 0x4c8 0x910 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b4 0x4c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x1b8 0x4cc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 0x1b8 0x4cc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__ECSPI2_SS0 0x1b8 0x4cc 0x81c 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x1b8 0x4cc 0x7e0 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__AUD4_RXFS 0x1b8 0x4cc 0x7c0 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b8 0x4cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT18__EIM_CS2_B 0x1b8 0x4cc 0x000 0x7 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x1bc 0x4d0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 0x1bc 0x4d0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x1bc 0x4d0 0x810 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x1bc 0x4d0 0x7cc 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__AUD4_RXC 0x1bc 0x4d0 0x7bc 0x4 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1bc 0x4d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT19__EIM_CS3_B 0x1bc 0x4d0 0x000 0x7 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x1c0 0x4d4 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 0x1c0 0x4d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__ECSPI1_SCLK 0x1c0 0x4d4 0x7f4 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x1c0 0x4d4 0x7c4 0x3 0x0 -+#define MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1c0 0x4d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x1c4 0x4d8 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 0x1c4 0x4d8 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT21__ECSPI1_MOSI 0x1c4 0x4d8 0x7fc 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x1c4 0x4d8 0x7b8 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1c4 0x4d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x1c8 0x4dc 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 0x1c8 0x4dc 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT22__ECSPI1_MISO 0x1c8 0x4dc 0x7f8 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x1c8 0x4dc 0x7c8 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1c8 0x4dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x1cc 0x4e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 0x1cc 0x4e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_DISP0_DAT23__ECSPI1_SS0 0x1cc 0x4e0 0x800 0x2 0x1 -+#define MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x1cc 0x4e0 0x7b4 0x3 0x1 -+#define MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1cc 0x4e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1d0 0x4e4 0x840 0x1 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1d0 0x4e4 0x86c 0x2 0x0 -+#define MX6QDL_PAD_ENET_MDIO__ENET_1588_EVENT1_OUT 0x1d0 0x4e4 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_MDIO__GPIO1_IO22 0x1d0 0x4e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDIO__SPDIF_LOCK 0x1d0 0x4e4 0x000 0x6 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1d4 0x4e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__ESAI_RX_FS 0x1d4 0x4e8 0x85c 0x2 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1d4 0x4e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_REF_CLK__SPDIF_SR_CLK 0x1d4 0x4e8 0x000 0x6 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1d8 0x4ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1d8 0x4ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__ESAI_RX_HF_CLK 0x1d8 0x4ec 0x864 0x2 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1d8 0x4ec 0x914 0x3 0x1 -+#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1d8 0x4ec 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1d8 0x4ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1dc 0x4f0 0x858 0x1 0x1 -+#define MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1dc 0x4f0 0x870 0x2 0x0 -+#define MX6QDL_PAD_ENET_CRS_DV__SPDIF_EXT_CLK 0x1dc 0x4f0 0x918 0x3 0x1 -+#define MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1dc 0x4f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_RXD1__MLB_SIG 0x1e0 0x4f4 0x908 0x0 0x0 -+#define MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1e0 0x4f4 0x84c 0x1 0x1 -+#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0 -+#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1 -+#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0 -+#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0 -+#define MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1e4 0x4f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1e8 0x4fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1e8 0x4fc 0x880 0x2 0x0 -+#define MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1e8 0x4fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x1ec 0x500 0x900 0x0 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1ec 0x500 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1ec 0x500 0x87c 0x2 0x0 -+#define MX6QDL_PAD_ENET_TXD1__ENET_1588_EVENT0_IN 0x1ec 0x500 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1ec 0x500 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1f0 0x504 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1f0 0x504 0x884 0x2 0x0 -+#define MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1f0 0x504 0x000 0x5 0x0 -+#define MX6QDL_PAD_ENET_MDC__MLB_DATA 0x1f4 0x508 0x904 0x0 0x0 -+#define MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1f4 0x508 0x000 0x1 0x0 -+#define MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1f4 0x508 0x888 0x2 0x0 -+#define MX6QDL_PAD_ENET_MDC__ENET_1588_EVENT1_IN 0x1f4 0x508 0x000 0x4 0x0 -+#define MX6QDL_PAD_ENET_MDC__GPIO1_IO31 0x1f4 0x508 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x1f8 0x5c8 0x7f4 0x0 0x2 -+#define MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1f8 0x5c8 0x854 0x1 0x1 -+#define MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x1f8 0x5c8 0x7dc 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL0__KEY_COL0 0x1f8 0x5c8 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1f8 0x5c8 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1f8 0x5c8 0x938 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1f8 0x5c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL0__DCIC1_OUT 0x1f8 0x5c8 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x1fc 0x5cc 0x7fc 0x0 0x2 -+#define MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1fc 0x5cc 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x1fc 0x5cc 0x7d0 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW0__KEY_ROW0 0x1fc 0x5cc 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1fc 0x5cc 0x938 0x4 0x1 -+#define MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1fc 0x5cc 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1fc 0x5cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW0__DCIC2_OUT 0x1fc 0x5cc 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x200 0x5d0 0x7f8 0x0 0x2 -+#define MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x200 0x5d0 0x840 0x1 0x1 -+#define MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x200 0x5d0 0x7e0 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL1__KEY_COL1 0x200 0x5d0 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x200 0x5d0 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x200 0x5d0 0x940 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x200 0x5d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL1__SD1_VSELECT 0x200 0x5d0 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x204 0x5d4 0x800 0x0 0x2 -+#define MX6QDL_PAD_KEY_ROW1__ENET_COL 0x204 0x5d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x204 0x5d4 0x7cc 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW1__KEY_ROW1 0x204 0x5d4 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x204 0x5d4 0x940 0x4 0x1 -+#define MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x204 0x5d4 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x204 0x5d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x204 0x5d4 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x208 0x5d8 0x804 0x0 0x2 -+#define MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x208 0x5d8 0x850 0x1 0x1 -+#define MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x208 0x5d8 0x000 0x2 0x0 -+#define MX6QDL_PAD_KEY_COL2__KEY_COL2 0x208 0x5d8 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL2__ENET_MDC 0x208 0x5d8 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x208 0x5d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL2__USB_H1_PWR_CTL_WAKE 0x208 0x5d8 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_ROW2__ECSPI1_SS2 0x20c 0x5dc 0x808 0x0 0x1 -+#define MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x20c 0x5dc 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x20c 0x5dc 0x7e4 0x2 0x0 -+#define MX6QDL_PAD_KEY_ROW2__KEY_ROW2 0x20c 0x5dc 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW2__SD2_VSELECT 0x20c 0x5dc 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x20c 0x5dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x20c 0x5dc 0x88c 0x6 0x1 -+#define MX6QDL_PAD_KEY_COL3__ECSPI1_SS3 0x210 0x5e0 0x80c 0x0 0x1 -+#define MX6QDL_PAD_KEY_COL3__ENET_CRS 0x210 0x5e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x210 0x5e0 0x890 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL3__KEY_COL3 0x210 0x5e0 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x210 0x5e0 0x8a0 0x4 0x1 -+#define MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x210 0x5e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x210 0x5e0 0x914 0x6 0x2 -+#define MX6QDL_PAD_KEY_ROW3__ASRC_EXT_CLK 0x214 0x5e4 0x7b0 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x214 0x5e4 0x894 0x2 0x1 -+#define MX6QDL_PAD_KEY_ROW3__KEY_ROW3 0x214 0x5e4 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x214 0x5e4 0x8a4 0x4 0x1 -+#define MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x214 0x5e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW3__SD1_VSELECT 0x214 0x5e4 0x000 0x6 0x0 -+#define MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x218 0x5e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_KEY_COL4__IPU1_SISG4 0x218 0x5e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x218 0x5e8 0x944 0x2 0x1 -+#define MX6QDL_PAD_KEY_COL4__KEY_COL4 0x218 0x5e8 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_COL4__UART5_RTS_B 0x218 0x5e8 0x93c 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL4__UART5_CTS_B 0x218 0x5e8 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x218 0x5e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x21c 0x5ec 0x7e8 0x0 0x0 -+#define MX6QDL_PAD_KEY_ROW4__IPU1_SISG5 0x21c 0x5ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x21c 0x5ec 0x000 0x2 0x0 -+#define MX6QDL_PAD_KEY_ROW4__KEY_ROW4 0x21c 0x5ec 0x000 0x3 0x0 -+#define MX6QDL_PAD_KEY_ROW4__UART5_CTS_B 0x21c 0x5ec 0x000 0x4 0x0 -+#define MX6QDL_PAD_KEY_ROW4__UART5_RTS_B 0x21c 0x5ec 0x93c 0x4 0x1 -+#define MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x21c 0x5ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x220 0x5f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_GPIO_0__KEY_COL5 0x220 0x5f0 0x8e8 0x2 0x0 -+#define MX6QDL_PAD_GPIO_0__ASRC_EXT_CLK 0x220 0x5f0 0x7b0 0x3 0x1 -+#define MX6QDL_PAD_GPIO_0__EPIT1_OUT 0x220 0x5f0 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x220 0x5f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x220 0x5f0 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_0__SNVS_VIO_5 0x220 0x5f0 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_1__ESAI_RX_CLK 0x224 0x5f4 0x86c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_1__WDOG2_B 0x224 0x5f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_1__KEY_ROW5 0x224 0x5f4 0x8f4 0x2 0x0 -+#define MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x224 0x5f4 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_1__PWM2_OUT 0x224 0x5f4 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x224 0x5f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_1__SD1_CD_B 0x224 0x5f4 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x228 0x5f8 0x85c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_9__WDOG1_B 0x228 0x5f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_9__KEY_COL6 0x228 0x5f8 0x8ec 0x2 0x0 -+#define MX6QDL_PAD_GPIO_9__CCM_REF_EN_B 0x228 0x5f8 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_9__PWM1_OUT 0x228 0x5f8 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x228 0x5f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_9__SD1_WP 0x228 0x5f8 0x94c 0x6 0x1 -+#define MX6QDL_PAD_GPIO_3__ESAI_RX_HF_CLK 0x22c 0x5fc 0x864 0x0 0x1 -+#define MX6QDL_PAD_GPIO_3__I2C3_SCL 0x22c 0x5fc 0x8a8 0x2 0x1 -+#define MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x22c 0x5fc 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x22c 0x5fc 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x22c 0x5fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_3__USB_H1_OC 0x22c 0x5fc 0x948 0x6 0x1 -+#define MX6QDL_PAD_GPIO_3__MLB_CLK 0x22c 0x5fc 0x900 0x7 0x1 -+#define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK 0x230 0x600 0x870 0x0 0x1 -+#define MX6QDL_PAD_GPIO_6__I2C3_SDA 0x230 0x600 0x8ac 0x2 0x1 -+#define MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x230 0x600 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_6__SD2_LCTL 0x230 0x600 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_6__MLB_SIG 0x230 0x600 0x908 0x7 0x1 -+#define MX6QDL_PAD_GPIO_2__ESAI_TX_FS 0x234 0x604 0x860 0x0 0x1 -+#define MX6QDL_PAD_GPIO_2__KEY_ROW6 0x234 0x604 0x8f8 0x2 0x1 -+#define MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x234 0x604 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_2__SD2_WP 0x234 0x604 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_2__MLB_DATA 0x234 0x604 0x904 0x7 0x1 -+#define MX6QDL_PAD_GPIO_4__ESAI_TX_HF_CLK 0x238 0x608 0x868 0x0 0x1 -+#define MX6QDL_PAD_GPIO_4__KEY_COL7 0x238 0x608 0x8f0 0x2 0x1 -+#define MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x238 0x608 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_4__SD2_CD_B 0x238 0x608 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x23c 0x60c 0x87c 0x0 0x1 -+#define MX6QDL_PAD_GPIO_5__KEY_ROW7 0x23c 0x60c 0x8fc 0x2 0x1 -+#define MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x23c 0x60c 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x23c 0x60c 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_5__I2C3_SCL 0x23c 0x60c 0x8a8 0x6 0x2 -+#define MX6QDL_PAD_GPIO_5__ARM_EVENTI 0x23c 0x60c 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_7__ESAI_TX4_RX1 0x240 0x610 0x884 0x0 0x1 -+#define MX6QDL_PAD_GPIO_7__ECSPI5_RDY 0x240 0x610 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_7__EPIT1_OUT 0x240 0x610 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x240 0x610 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x240 0x610 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_7__UART2_RX_DATA 0x240 0x610 0x928 0x4 0x2 -+#define MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x240 0x610 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_7__SPDIF_LOCK 0x240 0x610 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_7__USB_OTG_HOST_MODE 0x240 0x610 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_8__ESAI_TX5_RX0 0x244 0x614 0x888 0x0 0x1 -+#define MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x244 0x614 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_8__EPIT2_OUT 0x244 0x614 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x244 0x614 0x7e4 0x3 0x1 -+#define MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x244 0x614 0x928 0x4 0x3 -+#define MX6QDL_PAD_GPIO_8__UART2_TX_DATA 0x244 0x614 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x244 0x614 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_8__SPDIF_SR_CLK 0x244 0x614 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_8__USB_OTG_PWR_CTL_WAKE 0x244 0x614 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_16__ESAI_TX3_RX2 0x248 0x618 0x880 0x0 0x1 -+#define MX6QDL_PAD_GPIO_16__ENET_1588_EVENT2_IN 0x248 0x618 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x248 0x618 0x83c 0x2 0x1 -+#define MX6QDL_PAD_GPIO_16__SD1_LCTL 0x248 0x618 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_16__SPDIF_IN 0x248 0x618 0x914 0x4 0x3 -+#define MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x248 0x618 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_16__I2C3_SDA 0x248 0x618 0x8ac 0x6 0x2 -+#define MX6QDL_PAD_GPIO_16__JTAG_DE_B 0x248 0x618 0x000 0x7 0x0 -+#define MX6QDL_PAD_GPIO_17__ESAI_TX0 0x24c 0x61c 0x874 0x0 0x0 -+#define MX6QDL_PAD_GPIO_17__ENET_1588_EVENT3_IN 0x24c 0x61c 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_17__CCM_PMIC_READY 0x24c 0x61c 0x7f0 0x2 0x1 -+#define MX6QDL_PAD_GPIO_17__SDMA_EXT_EVENT0 0x24c 0x61c 0x90c 0x3 0x1 -+#define MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x24c 0x61c 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x24c 0x61c 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_18__ESAI_TX1 0x250 0x620 0x878 0x0 0x0 -+#define MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x250 0x620 0x844 0x1 0x1 -+#define MX6QDL_PAD_GPIO_18__SD3_VSELECT 0x250 0x620 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_18__SDMA_EXT_EVENT1 0x250 0x620 0x910 0x3 0x1 -+#define MX6QDL_PAD_GPIO_18__ASRC_EXT_CLK 0x250 0x620 0x7b0 0x4 0x2 -+#define MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x250 0x620 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_18__SNVS_VIO_5_CTL 0x250 0x620 0x000 0x6 0x0 -+#define MX6QDL_PAD_GPIO_19__KEY_COL5 0x254 0x624 0x8e8 0x0 0x1 -+#define MX6QDL_PAD_GPIO_19__ENET_1588_EVENT0_OUT 0x254 0x624 0x000 0x1 0x0 -+#define MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x254 0x624 0x000 0x2 0x0 -+#define MX6QDL_PAD_GPIO_19__CCM_CLKO1 0x254 0x624 0x000 0x3 0x0 -+#define MX6QDL_PAD_GPIO_19__ECSPI1_RDY 0x254 0x624 0x000 0x4 0x0 -+#define MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x254 0x624 0x000 0x5 0x0 -+#define MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x254 0x624 0x000 0x6 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x258 0x628 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x258 0x628 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x258 0x628 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x25c 0x62c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x25c 0x62c 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x25c 0x62c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x25c 0x62c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x260 0x630 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x260 0x630 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x260 0x630 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x260 0x630 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x264 0x634 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x264 0x634 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x264 0x634 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x264 0x634 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x268 0x638 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x268 0x638 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x268 0x638 0x7f4 0x2 0x3 -+#define MX6QDL_PAD_CSI0_DAT4__KEY_COL5 0x268 0x638 0x8e8 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x268 0x638 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x268 0x638 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x268 0x638 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x26c 0x63c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x26c 0x63c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x26c 0x63c 0x7fc 0x2 0x3 -+#define MX6QDL_PAD_CSI0_DAT5__KEY_ROW5 0x26c 0x63c 0x8f4 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x26c 0x63c 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x26c 0x63c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x26c 0x63c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x270 0x640 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x270 0x640 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x270 0x640 0x7f8 0x2 0x3 -+#define MX6QDL_PAD_CSI0_DAT6__KEY_COL6 0x270 0x640 0x8ec 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x270 0x640 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24 0x270 0x640 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x270 0x640 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x274 0x644 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x274 0x644 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0 0x274 0x644 0x800 0x2 0x3 -+#define MX6QDL_PAD_CSI0_DAT7__KEY_ROW6 0x274 0x644 0x8f8 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x274 0x644 0x000 0x4 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x274 0x644 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x274 0x644 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x278 0x648 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x278 0x648 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x278 0x648 0x810 0x2 0x2 -+#define MX6QDL_PAD_CSI0_DAT8__KEY_COL7 0x278 0x648 0x8f0 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x278 0x648 0x89c 0x4 0x1 -+#define MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x278 0x648 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x278 0x648 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x27c 0x64c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x27c 0x64c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x27c 0x64c 0x818 0x2 0x2 -+#define MX6QDL_PAD_CSI0_DAT9__KEY_ROW7 0x27c 0x64c 0x8fc 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x27c 0x64c 0x898 0x4 0x1 -+#define MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x27c 0x64c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x27c 0x64c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x280 0x650 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x280 0x650 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x280 0x650 0x814 0x2 0x2 -+#define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x280 0x650 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x280 0x650 0x920 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x280 0x650 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x280 0x650 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x284 0x654 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x284 0x654 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x284 0x654 0x81c 0x2 0x2 -+#define MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x284 0x654 0x920 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x284 0x654 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x284 0x654 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x284 0x654 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x288 0x658 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x288 0x658 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x288 0x658 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__UART4_RX_DATA 0x288 0x658 0x938 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x288 0x658 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x288 0x658 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x28c 0x65c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x28c 0x65c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x28c 0x65c 0x938 0x3 0x3 -+#define MX6QDL_PAD_CSI0_DAT13__UART4_TX_DATA 0x28c 0x65c 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x28c 0x65c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x28c 0x65c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x290 0x660 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x290 0x660 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x290 0x660 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__UART5_RX_DATA 0x290 0x660 0x940 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x290 0x660 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x290 0x660 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x294 0x664 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x294 0x664 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x294 0x664 0x940 0x3 0x3 -+#define MX6QDL_PAD_CSI0_DAT15__UART5_TX_DATA 0x294 0x664 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x294 0x664 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x294 0x664 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x298 0x668 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x298 0x668 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x298 0x668 0x934 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__UART4_CTS_B 0x298 0x668 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x298 0x668 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x298 0x668 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x29c 0x66c 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x29c 0x66c 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x29c 0x66c 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__UART4_RTS_B 0x29c 0x66c 0x934 0x3 0x1 -+#define MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x29c 0x66c 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x29c 0x66c 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x2a0 0x670 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x2a0 0x670 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x2a0 0x670 0x93c 0x3 0x2 -+#define MX6QDL_PAD_CSI0_DAT18__UART5_CTS_B 0x2a0 0x670 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x2a0 0x670 0x000 0x5 0x0 -+#define MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x2a0 0x670 0x000 0x7 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x2a4 0x674 0x000 0x0 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x2a4 0x674 0x000 0x1 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x2a4 0x674 0x000 0x3 0x0 -+#define MX6QDL_PAD_CSI0_DAT19__UART5_RTS_B 0x2a4 0x674 0x93c 0x3 0x3 -+#define MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x2a4 0x674 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x2a8 0x690 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x2a8 0x690 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT7__UART1_RX_DATA 0x2a8 0x690 0x920 0x1 0x2 -+#define MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x2a8 0x690 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x2ac 0x694 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x2ac 0x694 0x920 0x1 0x3 -+#define MX6QDL_PAD_SD3_DAT6__UART1_TX_DATA 0x2ac 0x694 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x2ac 0x694 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x2b0 0x698 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x2b0 0x698 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT5__UART2_RX_DATA 0x2b0 0x698 0x928 0x1 0x4 -+#define MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x2b0 0x698 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x2b4 0x69c 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x2b4 0x69c 0x928 0x1 0x5 -+#define MX6QDL_PAD_SD3_DAT4__UART2_TX_DATA 0x2b4 0x69c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x2b4 0x69c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_CMD__SD3_CMD 0x2b8 0x6a0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_CMD__UART2_CTS_B 0x2b8 0x6a0 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_CMD__UART2_RTS_B 0x2b8 0x6a0 0x924 0x1 0x2 -+#define MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x2b8 0x6a0 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD3_CMD__GPIO7_IO02 0x2b8 0x6a0 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_CLK__SD3_CLK 0x2bc 0x6a4 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_CLK__UART2_RTS_B 0x2bc 0x6a4 0x924 0x1 0x3 -+#define MX6QDL_PAD_SD3_CLK__UART2_CTS_B 0x2bc 0x6a4 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x2bc 0x6a4 0x7e4 0x2 0x2 -+#define MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x2bc 0x6a4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x2c0 0x6a8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT0__UART1_CTS_B 0x2c0 0x6a8 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT0__UART1_RTS_B 0x2c0 0x6a8 0x91c 0x1 0x2 -+#define MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x2c0 0x6a8 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD3_DAT0__GPIO7_IO04 0x2c0 0x6a8 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x2c4 0x6ac 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT1__UART1_RTS_B 0x2c4 0x6ac 0x91c 0x1 0x3 -+#define MX6QDL_PAD_SD3_DAT1__UART1_CTS_B 0x2c4 0x6ac 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x2c4 0x6ac 0x7e8 0x2 0x1 -+#define MX6QDL_PAD_SD3_DAT1__GPIO7_IO05 0x2c4 0x6ac 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x2c8 0x6b0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x2c8 0x6b0 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x2cc 0x6b4 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_DAT3__UART3_CTS_B 0x2cc 0x6b4 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_DAT3__UART3_RTS_B 0x2cc 0x6b4 0x92c 0x1 0x4 -+#define MX6QDL_PAD_SD3_DAT3__GPIO7_IO07 0x2cc 0x6b4 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD3_RST__SD3_RESET 0x2d0 0x6b8 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD3_RST__UART3_RTS_B 0x2d0 0x6b8 0x92c 0x1 0x5 -+#define MX6QDL_PAD_SD3_RST__UART3_CTS_B 0x2d0 0x6b8 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x2d0 0x6b8 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x2d4 0x6bc 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CLE__IPU2_SISG4 0x2d4 0x6bc 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x2d4 0x6bc 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x2d8 0x6c0 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x2d8 0x6c0 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x2d8 0x6c0 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x2dc 0x6c4 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__IPU2_SISG5 0x2dc 0x6c4 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x2dc 0x6c4 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x2e0 0x6c8 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_RB0__IPU2_DI0_PIN01 0x2e0 0x6c8 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x2e0 0x6c8 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x2e4 0x6cc 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x2e4 0x6cc 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0x2e8 0x6d0 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS1__SD4_VSELECT 0x2e8 0x6d0 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x2e8 0x6d0 0x000 0x2 0x0 -+#define MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x2e8 0x6d0 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0x2ec 0x6d4 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS2__IPU1_SISG0 0x2ec 0x6d4 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x2ec 0x6d4 0x874 0x2 0x1 -+#define MX6QDL_PAD_NANDF_CS2__EIM_CRE 0x2ec 0x6d4 0x000 0x3 0x0 -+#define MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x2ec 0x6d4 0x000 0x4 0x0 -+#define MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x2ec 0x6d4 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS2__IPU2_SISG0 0x2ec 0x6d4 0x000 0x6 0x0 -+#define MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0x2f0 0x6d8 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_CS3__IPU1_SISG1 0x2f0 0x6d8 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x2f0 0x6d8 0x878 0x2 0x1 -+#define MX6QDL_PAD_NANDF_CS3__EIM_ADDR26 0x2f0 0x6d8 0x000 0x3 0x0 -+#define MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x2f0 0x6d8 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_CS3__IPU2_SISG1 0x2f0 0x6d8 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD4_CMD__SD4_CMD 0x2f4 0x6dc 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x2f4 0x6dc 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x2f4 0x6dc 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x2f4 0x6dc 0x930 0x2 0x2 -+#define MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x2f4 0x6dc 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_CLK__SD4_CLK 0x2f8 0x6e0 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x2f8 0x6e0 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x2f8 0x6e0 0x930 0x2 0x3 -+#define MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x2f8 0x6e0 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x2f8 0x6e0 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x2fc 0x6e4 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x2fc 0x6e4 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x2fc 0x6e4 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x300 0x6e8 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x300 0x6e8 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x300 0x6e8 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x304 0x6ec 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x304 0x6ec 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x304 0x6ec 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x308 0x6f0 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x308 0x6f0 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x308 0x6f0 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x30c 0x6f4 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x30c 0x6f4 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30c 0x6f4 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x310 0x6f8 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x310 0x6f8 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x310 0x6f8 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x314 0x6fc 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x314 0x6fc 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x314 0x6fc 0x000 0x5 0x0 -+#define MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x318 0x700 0x000 0x0 0x0 -+#define MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x318 0x700 0x000 0x1 0x0 -+#define MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x318 0x700 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x31c 0x704 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x31c 0x704 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x31c 0x704 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x320 0x708 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x320 0x708 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x320 0x708 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x324 0x70c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x324 0x70c 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x324 0x70c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x328 0x710 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x328 0x710 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x32c 0x714 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x32c 0x714 0x928 0x2 0x6 -+#define MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x32c 0x714 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x32c 0x714 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x330 0x718 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x330 0x718 0x924 0x2 0x4 -+#define MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x330 0x718 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x330 0x718 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x334 0x71c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x334 0x71c 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x334 0x71c 0x924 0x2 0x5 -+#define MX6QDL_PAD_SD4_DAT6__GPIO2_IO14 0x334 0x71c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x338 0x720 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x338 0x720 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x338 0x720 0x928 0x2 0x7 -+#define MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x338 0x720 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x33c 0x724 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT1__ECSPI5_SS0 0x33c 0x724 0x834 0x1 0x1 -+#define MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x33c 0x724 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT1__GPT_CAPTURE2 0x33c 0x724 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x33c 0x724 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x340 0x728 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x340 0x728 0x82c 0x1 0x1 -+#define MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x340 0x728 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x340 0x728 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x344 0x72c 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT3__ECSPI5_SS2 0x344 0x72c 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD1_DAT3__GPT_COMPARE3 0x344 0x72c 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x344 0x72c 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x344 0x72c 0x000 0x4 0x0 -+#define MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x344 0x72c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT3__WDOG2_RESET_B_DEB 0x344 0x72c 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD1_CMD__SD1_CMD 0x348 0x730 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x348 0x730 0x830 0x1 0x0 -+#define MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x348 0x730 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_CMD__GPT_COMPARE1 0x348 0x730 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x348 0x730 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x34c 0x734 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_DAT2__ECSPI5_SS1 0x34c 0x734 0x838 0x1 0x1 -+#define MX6QDL_PAD_SD1_DAT2__GPT_COMPARE2 0x34c 0x734 0x000 0x2 0x0 -+#define MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x34c 0x734 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_DAT2__WDOG1_B 0x34c 0x734 0x000 0x4 0x0 -+#define MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x34c 0x734 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x34c 0x734 0x000 0x6 0x0 -+#define MX6QDL_PAD_SD1_CLK__SD1_CLK 0x350 0x738 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x350 0x738 0x828 0x1 0x0 -+#define MX6QDL_PAD_SD1_CLK__GPT_CLKIN 0x350 0x738 0x000 0x3 0x0 -+#define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x350 0x738 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_CLK__SD2_CLK 0x354 0x73c 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_CLK__ECSPI5_SCLK 0x354 0x73c 0x828 0x1 0x1 -+#define MX6QDL_PAD_SD2_CLK__KEY_COL5 0x354 0x73c 0x8e8 0x2 0x3 -+#define MX6QDL_PAD_SD2_CLK__AUD4_RXFS 0x354 0x73c 0x7c0 0x3 0x1 -+#define MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x354 0x73c 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_CMD__SD2_CMD 0x358 0x740 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_CMD__ECSPI5_MOSI 0x358 0x740 0x830 0x1 0x1 -+#define MX6QDL_PAD_SD2_CMD__KEY_ROW5 0x358 0x740 0x8f4 0x2 0x2 -+#define MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x358 0x740 0x7bc 0x3 0x1 -+#define MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x358 0x740 0x000 0x5 0x0 -+#define MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x35c 0x744 0x000 0x0 0x0 -+#define MX6QDL_PAD_SD2_DAT3__ECSPI5_SS3 0x35c 0x744 0x000 0x1 0x0 -+#define MX6QDL_PAD_SD2_DAT3__KEY_COL6 0x35c 0x744 0x8ec 0x2 0x2 -+#define MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x35c 0x744 0x7c4 0x3 0x1 -+#define MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x35c 0x744 0x000 0x5 0x0 - - #endif /* __DTS_IMX6Q_PINFUNC_H */ -diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts -index 49d6f28..334b924 100644 ---- a/arch/arm/boot/dts/imx6q-sabreauto.dts -+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts -@@ -20,16 +20,6 @@ - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; - }; - --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- MX6Q_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 -- MX6Q_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 -- >; -- }; -- }; -+&sata { -+ status = "okay"; - }; -diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts -index 6a00066..3530280 100644 ---- a/arch/arm/boot/dts/imx6q-sabrelite.dts -+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts -@@ -65,6 +65,10 @@ - }; - }; - -+&sata { -+ status = "okay"; -+}; -+ - &ecspi1 { - fsl,spi-num-chipselects = <1>; - cs-gpios = <&gpio3 19 0>; -@@ -91,14 +95,14 @@ - hog { - pinctrl_hog: hoggrp { - fsl,pins = < -- MX6Q_PAD_NANDF_D6__GPIO2_IO06 0x80000000 -- MX6Q_PAD_NANDF_D7__GPIO2_IO07 0x80000000 -- MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 -- MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 -- MX6Q_PAD_EIM_D23__GPIO3_IO23 0x80000000 -- MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 -- MX6Q_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 -- MX6Q_PAD_GPIO_0__CCM_CLKO1 0x80000000 -+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 -+ MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 -+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000 - >; - }; - }; -@@ -163,7 +167,7 @@ - codec: sgtl5000@0a { - compatible = "fsl,sgtl5000"; - reg = <0x0a>; -- clocks = <&clks 169>; -+ clocks = <&clks 201>; - VDDA-supply = <®_2p5v>; - VDDIO-supply = <®_3p3v>; - }; -diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts -index 4420513..9cbdfe7 100644 ---- a/arch/arm/boot/dts/imx6q-sabresd.dts -+++ b/arch/arm/boot/dts/imx6q-sabresd.dts -@@ -20,20 +20,6 @@ - compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; - }; - --&iomuxc { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_hog>; -- -- hog { -- pinctrl_hog: hoggrp { -- fsl,pins = < -- MX6Q_PAD_GPIO_4__GPIO1_IO04 0x80000000 -- MX6Q_PAD_GPIO_5__GPIO1_IO05 0x80000000 -- MX6Q_PAD_NANDF_D0__GPIO2_IO00 0x80000000 -- MX6Q_PAD_NANDF_D1__GPIO2_IO01 0x80000000 -- MX6Q_PAD_NANDF_D2__GPIO2_IO02 0x80000000 -- MX6Q_PAD_NANDF_D3__GPIO2_IO03 0x80000000 -- >; -- }; -- }; -+&sata { -+ status = "okay"; - }; -diff --git a/arch/arm/boot/dts/imx6q-wandboard.dts b/arch/arm/boot/dts/imx6q-wandboard.dts -new file mode 100644 -index 0000000..36be17f ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-wandboard.dts -@@ -0,0 +1,26 @@ -+/* -+ * Copyright 2013 Freescale Semiconductor, Inc. -+ * -+ * Author: Fabio Estevam fabio.estevam@freescale.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-wandboard.dtsi" -+ -+/ { -+ model = "Wandboard i.MX6 Quad Board"; -+ compatible = "wand,imx6q-wandboard", "fsl,imx6q"; -+ -+ memory { -+ reg = <0x10000000 0x80000000>; -+ }; -+}; -+ -+&sata { -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi -index dc54a72..f024ef2 100644 ---- a/arch/arm/boot/dts/imx6q.dtsi -+++ b/arch/arm/boot/dts/imx6q.dtsi -@@ -8,8 +8,8 @@ - * - */ - --#include "imx6qdl.dtsi" - #include "imx6q-pinfunc.h" -+#include "imx6qdl.dtsi" - - / { - cpus { -@@ -61,6 +61,12 @@ - }; - - soc { -+ ocram: sram@00900000 { -+ compatible = "mmio-sram"; -+ reg = <0x00900000 0x40000>; -+ clocks = <&clks 142>; -+ }; -+ - aips-bus@02000000 { /* AIPS1 */ - spba-bus@02000000 { - ecspi5: ecspi@02018000 { -@@ -77,261 +83,54 @@ - - iomuxc: iomuxc@020e0000 { - compatible = "fsl,imx6q-iomuxc"; -- reg = <0x020e0000 0x4000>; - -- /* shared pinctrl settings */ -- audmux { -- pinctrl_audmux_1: audmux-1 { -- fsl,pins = < -- MX6Q_PAD_SD2_DAT0__AUD4_RXD 0x80000000 -- MX6Q_PAD_SD2_DAT3__AUD4_TXC 0x80000000 -- MX6Q_PAD_SD2_DAT2__AUD4_TXD 0x80000000 -- MX6Q_PAD_SD2_DAT1__AUD4_TXFS 0x80000000 -- >; -- }; -- -- pinctrl_audmux_2: audmux-2 { -- fsl,pins = < -- MX6Q_PAD_CSI0_DAT7__AUD3_RXD 0x80000000 -- MX6Q_PAD_CSI0_DAT4__AUD3_TXC 0x80000000 -- MX6Q_PAD_CSI0_DAT5__AUD3_TXD 0x80000000 -- MX6Q_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000 -- >; -- }; -- }; -- -- ecspi1 { -- pinctrl_ecspi1_1: ecspi1grp-1 { -- fsl,pins = < -- MX6Q_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -- MX6Q_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -- MX6Q_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -- >; -- }; -- }; -- -- ecspi3 { -- pinctrl_ecspi3_1: ecspi3grp-1 { -- fsl,pins = < -- MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 -- MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 -- MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -- >; -- }; -- }; -- -- enet { -- pinctrl_enet_1: enetgrp-1 { -- fsl,pins = < -- MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -- MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -- MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- MX6Q_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -- >; -- }; -- -- pinctrl_enet_2: enetgrp-2 { -- fsl,pins = < -- MX6Q_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 -- MX6Q_PAD_KEY_COL2__ENET_MDC 0x1b0b0 -- MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -- MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -- MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -- MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -- MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -- MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -- MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -- MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -- MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -- MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -- MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -- MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -- MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -- >; -- }; -- }; -- -- gpmi-nand { -- pinctrl_gpmi_nand_1: gpmi-nand-1 { -- fsl,pins = < -- MX6Q_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -- MX6Q_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -- MX6Q_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -- MX6Q_PAD_NANDF_RB0__NAND_READY_B 0xb000 -- MX6Q_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -- MX6Q_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -- MX6Q_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1 -- MX6Q_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1 -- MX6Q_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -- MX6Q_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -- MX6Q_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -- MX6Q_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -- MX6Q_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -- MX6Q_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -- MX6Q_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -- MX6Q_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -- MX6Q_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -- MX6Q_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -- MX6Q_PAD_SD4_DAT0__NAND_DQS 0x00b1 -- >; -- }; -- }; -- -- i2c1 { -- pinctrl_i2c1_1: i2c1grp-1 { -- fsl,pins = < -- MX6Q_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -- MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -- >; -- }; -- }; -- -- i2c2 { -- pinctrl_i2c2_1: i2c2grp-1 { -- fsl,pins = < -- MX6Q_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 -- MX6Q_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 -- >; -- }; -- }; -- -- i2c3 { -- pinctrl_i2c3_1: i2c3grp-1 { -- fsl,pins = < -- MX6Q_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 -- MX6Q_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 -- >; -- }; -- }; -- -- uart1 { -- pinctrl_uart1_1: uart1grp-1 { -- fsl,pins = < -- MX6Q_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -- MX6Q_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -- >; -- }; -- }; -- -- uart2 { -- pinctrl_uart2_1: uart2grp-1 { -- fsl,pins = < -- MX6Q_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 -- MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 -- >; -- }; -- }; -- -- uart4 { -- pinctrl_uart4_1: uart4grp-1 { -- fsl,pins = < -- MX6Q_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -- MX6Q_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -- >; -- }; -- }; -- -- usbotg { -- pinctrl_usbotg_1: usbotggrp-1 { -- fsl,pins = < -- MX6Q_PAD_GPIO_1__USB_OTG_ID 0x17059 -- >; -- }; -- -- pinctrl_usbotg_2: usbotggrp-2 { -- fsl,pins = < -- MX6Q_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -- >; -- }; -- }; -- -- usdhc2 { -- pinctrl_usdhc2_1: usdhc2grp-1 { -- fsl,pins = < -- MX6Q_PAD_SD2_CMD__SD2_CMD 0x17059 -- MX6Q_PAD_SD2_CLK__SD2_CLK 0x10059 -- MX6Q_PAD_SD2_DAT0__SD2_DATA0 0x17059 -- MX6Q_PAD_SD2_DAT1__SD2_DATA1 0x17059 -- MX6Q_PAD_SD2_DAT2__SD2_DATA2 0x17059 -- MX6Q_PAD_SD2_DAT3__SD2_DATA3 0x17059 -- MX6Q_PAD_NANDF_D4__SD2_DATA4 0x17059 -- MX6Q_PAD_NANDF_D5__SD2_DATA5 0x17059 -- MX6Q_PAD_NANDF_D6__SD2_DATA6 0x17059 -- MX6Q_PAD_NANDF_D7__SD2_DATA7 0x17059 -- >; -- }; -- }; -- -- usdhc3 { -- pinctrl_usdhc3_1: usdhc3grp-1 { -- fsl,pins = < -- MX6Q_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6Q_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6Q_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6Q_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6Q_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6Q_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- MX6Q_PAD_SD3_DAT4__SD3_DATA4 0x17059 -- MX6Q_PAD_SD3_DAT5__SD3_DATA5 0x17059 -- MX6Q_PAD_SD3_DAT6__SD3_DATA6 0x17059 -- MX6Q_PAD_SD3_DAT7__SD3_DATA7 0x17059 -- >; -- }; -- -- pinctrl_usdhc3_2: usdhc3grp-2 { -- fsl,pins = < -- MX6Q_PAD_SD3_CMD__SD3_CMD 0x17059 -- MX6Q_PAD_SD3_CLK__SD3_CLK 0x10059 -- MX6Q_PAD_SD3_DAT0__SD3_DATA0 0x17059 -- MX6Q_PAD_SD3_DAT1__SD3_DATA1 0x17059 -- MX6Q_PAD_SD3_DAT2__SD3_DATA2 0x17059 -- MX6Q_PAD_SD3_DAT3__SD3_DATA3 0x17059 -- >; -- }; -- }; -- -- usdhc4 { -- pinctrl_usdhc4_1: usdhc4grp-1 { -- fsl,pins = < -- MX6Q_PAD_SD4_CMD__SD4_CMD 0x17059 -- MX6Q_PAD_SD4_CLK__SD4_CLK 0x10059 -- MX6Q_PAD_SD4_DAT0__SD4_DATA0 0x17059 -- MX6Q_PAD_SD4_DAT1__SD4_DATA1 0x17059 -- MX6Q_PAD_SD4_DAT2__SD4_DATA2 0x17059 -- MX6Q_PAD_SD4_DAT3__SD4_DATA3 0x17059 -- MX6Q_PAD_SD4_DAT4__SD4_DATA4 0x17059 -- MX6Q_PAD_SD4_DAT5__SD4_DATA5 0x17059 -- MX6Q_PAD_SD4_DAT6__SD4_DATA6 0x17059 -- MX6Q_PAD_SD4_DAT7__SD4_DATA7 0x17059 -- >; -- }; -- -- pinctrl_usdhc4_2: usdhc4grp-2 { -- fsl,pins = < -- MX6Q_PAD_SD4_CMD__SD4_CMD 0x17059 -- MX6Q_PAD_SD4_CLK__SD4_CLK 0x10059 -- MX6Q_PAD_SD4_DAT0__SD4_DATA0 0x17059 -- MX6Q_PAD_SD4_DAT1__SD4_DATA1 0x17059 -- MX6Q_PAD_SD4_DAT2__SD4_DATA2 0x17059 -- MX6Q_PAD_SD4_DAT3__SD4_DATA3 0x17059 -+ ipu2 { -+ pinctrl_ipu2_1: ipu2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10 -+ MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0x10 -+ MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0x10 -+ MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0x10 -+ MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04 0x80000000 -+ MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0x10 -+ MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0x10 -+ MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0x10 -+ MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0x10 -+ MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0x10 -+ MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0x10 -+ MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0x10 -+ MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0x10 -+ MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0x10 -+ MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0x10 -+ MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0x10 -+ MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0x10 -+ MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0x10 -+ MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0x10 -+ MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0x10 -+ MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0x10 -+ MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 0x10 -+ MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 0x10 -+ MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 0x10 -+ MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 0x10 -+ MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 0x10 -+ MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 0x10 -+ MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 0x10 -+ MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 0x10 - >; - }; - }; - }; - }; - -+ sata: sata@02200000 { -+ compatible = "fsl,imx6q-ahci"; -+ reg = <0x02200000 0x4000>; -+ interrupts = <0 39 0x04>; -+ clocks = <&clks 154>, <&clks 187>, <&clks 105>; -+ clock-names = "sata", "sata_ref", "ahb"; -+ status = "disabled"; -+ }; -+ - ipu2: ipu@02800000 { - #crtc-cells = <1>; - compatible = "fsl,imx6q-ipu"; -diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi -index 4d237cf..1cbbc51 100644 ---- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi -@@ -16,6 +16,22 @@ - }; - }; - -+&ecspi1 { -+ fsl,spi-num-chipselects = <1>; -+ cs-gpios = <&gpio3 19 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_sabreauto>; -+ status = "disabled"; /* pin conflict with WEIM NOR */ -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25p32"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ }; -+}; -+ - &fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_2>; -@@ -23,6 +39,34 @@ - status = "okay"; - }; - -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand_1>; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 -+ MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x80000000 -+ >; -+ }; -+ }; -+ -+ ecspi1 { -+ pinctrl_ecspi1_sabreauto: ecspi1-sabreauto { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 -+ >; -+ }; -+ }; -+}; -+ - &uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4_1>; -@@ -36,3 +80,22 @@ - wp-gpios = <&gpio1 13 0>; - status = "okay"; - }; -+ -+&weim { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_weim_nor_1 &pinctrl_weim_cs0_1>; -+ #address-cells = <2>; -+ #size-cells = <1>; -+ ranges = <0 0 0x08000000 0x08000000>; -+ status = "disabled"; /* pin conflict with SPI NOR */ -+ -+ nor@0,0 { -+ compatible = "cfi-flash"; -+ reg = <0 0 0x02000000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ bank-width = <2>; -+ fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 -+ 0x0000c000 0x1404a38e 0x00000000>; -+ }; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi -index e21f6a8..39eafc2 100644 ---- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi -@@ -26,6 +26,22 @@ - gpio = <&gpio3 22 0>; - enable-active-high; - }; -+ -+ reg_usb_h1_vbus: usb_h1_vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_h1_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio1 29 0>; -+ enable-active-high; -+ }; -+ -+ reg_audio: wm8962_supply { -+ compatible = "regulator-fixed"; -+ regulator-name = "wm8962-supply"; -+ gpio = <&gpio4 10 0>; -+ enable-active-high; -+ }; - }; - - gpio-keys { -@@ -34,15 +50,58 @@ - volume-up { - label = "Volume Up"; - gpios = <&gpio1 4 0>; -+ gpio-key,wakeup; - linux,code = <115>; /* KEY_VOLUMEUP */ - }; - - volume-down { - label = "Volume Down"; - gpios = <&gpio1 5 0>; -+ gpio-key,wakeup; - linux,code = <114>; /* KEY_VOLUMEDOWN */ - }; - }; -+ -+ sound { -+ compatible = "fsl,imx6q-sabresd-wm8962", -+ "fsl,imx-audio-wm8962"; -+ model = "wm8962-audio"; -+ ssi-controller = <&ssi2>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "Headphone Jack", "HPOUTL", -+ "Headphone Jack", "HPOUTR", -+ "Ext Spk", "SPKOUTL", -+ "Ext Spk", "SPKOUTR", -+ "MICBIAS", "AMIC", -+ "IN3R", "MICBIAS", -+ "DMIC", "MICBIAS", -+ "DMICDAT", "DMIC"; -+ mux-int-port = <2>; -+ mux-ext-port = <3>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux_2>; -+ status = "okay"; -+}; -+ -+&ecspi1 { -+ fsl,spi-num-chipselects = <1>; -+ cs-gpios = <&gpio4 9 0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi1_2>; -+ status = "okay"; -+ -+ flash: m25p80@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "st,m25p32"; -+ spi-max-frequency = <20000000>; -+ reg = <0>; -+ }; - }; - - &fec { -@@ -52,6 +111,102 @@ - status = "okay"; - }; - -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1_2>; -+ status = "okay"; -+ -+ codec: wm8962@1a { -+ compatible = "wlf,wm8962"; -+ reg = <0x1a>; -+ clocks = <&clks 201>; -+ DCVDD-supply = <®_audio>; -+ DBVDD-supply = <®_audio>; -+ AVDD-supply = <®_audio>; -+ CPVDD-supply = <®_audio>; -+ MICVDD-supply = <®_audio>; -+ PLLVDD-supply = <®_audio>; -+ SPKVDD1-supply = <®_audio>; -+ SPKVDD2-supply = <®_audio>; -+ gpio-cfg = < -+ 0x0000 /* 0:Default */ -+ 0x0000 /* 1:Default */ -+ 0x0013 /* 2:FN_DMICCLK */ -+ 0x0000 /* 3:Default */ -+ 0x8014 /* 4:FN_DMICCDAT */ -+ 0x0000 /* 5:Default */ -+ >; -+ }; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3_2>; -+ status = "okay"; -+ -+ egalax_ts@04 { -+ compatible = "eeti,egalax_ts"; -+ reg = <0x04>; -+ interrupt-parent = <&gpio6>; -+ interrupts = <7 2>; -+ wakeup-gpios = <&gpio6 7 0>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 -+ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 -+ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 -+ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 -+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 -+ MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 -+ >; -+ }; -+ }; -+}; -+ -+&ldb { -+ status = "okay"; -+ -+ lvds-channel@1 { -+ fsl,data-mapping = "spwg"; -+ fsl,data-width = <18>; -+ status = "okay"; -+ -+ display-timings { -+ native-mode = <&timing0>; -+ timing0: hsd100pxn1 { -+ clock-frequency = <65000000>; -+ hactive = <1024>; -+ vactive = <768>; -+ hback-porch = <220>; -+ hfront-porch = <40>; -+ vback-porch = <21>; -+ vfront-porch = <7>; -+ hsync-len = <60>; -+ vsync-len = <10>; -+ }; -+ }; -+ }; -+}; -+ -+&ssi2 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ - &uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_1>; -@@ -59,6 +214,7 @@ - }; - - &usbh1 { -+ vbus-supply = <®_usb_h1_vbus>; - status = "okay"; - }; - -diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -new file mode 100644 -index 0000000..a55113e ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -@@ -0,0 +1,137 @@ -+/* -+ * Copyright 2013 Freescale Semiconductor, Inc. -+ * -+ * Author: Fabio Estevam fabio.estevam@freescale.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+/ { -+ regulators { -+ compatible = "simple-bus"; -+ -+ reg_2p5v: 2p5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "2P5V"; -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; -+ regulator-always-on; -+ }; -+ -+ reg_3p3v: 3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ -+ sound { -+ compatible = "fsl,imx6-wandboard-sgtl5000", -+ "fsl,imx-audio-sgtl5000"; -+ model = "imx6-wandboard-sgtl5000"; -+ ssi-controller = <&ssi1>; -+ audio-codec = <&codec>; -+ audio-routing = -+ "MIC_IN", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HP_OUT"; -+ mux-int-port = <1>; -+ mux-ext-port = <3>; -+ }; -+}; -+ -+&audmux { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_audmux_2>; -+ status = "okay"; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2_2>; -+ status = "okay"; -+ -+ codec: sgtl5000@0a { -+ compatible = "fsl,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&clks 201>; -+ VDDA-supply = <®_2p5v>; -+ VDDIO-supply = <®_3p3v>; -+ }; -+}; -+ -+&iomuxc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hog>; -+ -+ hog { -+ pinctrl_hog: hoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 -+ MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 -+ MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000 /* WL_REF_ON */ -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* WL_RST_N */ -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* WL_REG_ON */ -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* WL_HOST_WAKE */ -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* WL_WAKE */ -+ >; -+ }; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet_1>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ -+&ssi1 { -+ fsl,mode = "i2s-slave"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1_1>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3_2>; -+ fsl,uart-has-rtscts; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&usdhc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1_2>; -+ cd-gpios = <&gpio1 2 0>; -+ status = "okay"; -+}; -+ -+&usdhc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc2_2>; -+ non-removable; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc3_2>; -+ cd-gpios = <&gpio3 9 0>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi -index 9e8296e..ccd55c2 100644 ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -14,11 +14,6 @@ - - / { - aliases { -- serial0 = &uart1; -- serial1 = &uart2; -- serial2 = &uart3; -- serial3 = &uart4; -- serial4 = &uart5; - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; -@@ -26,6 +21,18 @@ - gpio4 = &gpio5; - gpio5 = &gpio6; - gpio6 = &gpio7; -+ i2c0 = &i2c1; -+ i2c1 = &i2c2; -+ i2c2 = &i2c3; -+ serial0 = &uart1; -+ serial1 = &uart2; -+ serial2 = &uart3; -+ serial3 = &uart4; -+ serial4 = &uart5; -+ spi0 = &ecspi1; -+ spi1 = &ecspi2; -+ spi2 = &ecspi3; -+ spi3 = &ecspi4; - }; - - intc: interrupt-controller@00a01000 { -@@ -81,15 +88,14 @@ - #size-cells = <1>; - reg = <0x00112000 0x2000>, <0x00114000 0x2000>; - reg-names = "gpmi-nand", "bch"; -- interrupts = <0 13 0x04>, <0 15 0x04>; -- interrupt-names = "gpmi-dma", "bch"; -+ interrupts = <0 15 0x04>; -+ interrupt-names = "bch"; - clocks = <&clks 152>, <&clks 153>, <&clks 151>, - <&clks 150>, <&clks 149>; - clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", - "gpmi_bch_apb", "per1_bch"; - dmas = <&dma_apbh 0>; - dma-names = "rx-tx"; -- fsl,gpmi-dma-channel = <0>; - status = "disabled"; - }; - -@@ -106,6 +112,8 @@ - interrupts = <0 92 0x04>; - cache-unified; - cache-level = <2>; -+ arm,tag-latency = <4 2 3>; -+ arm,data-latency = <4 2 3>; - }; - - pmu { -@@ -182,6 +190,8 @@ - interrupts = <0 26 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; -+ dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - -@@ -195,6 +205,9 @@ - reg = <0x02028000 0x4000>; - interrupts = <0 46 0x04>; - clocks = <&clks 178>; -+ dmas = <&sdma 37 1 0>, -+ <&sdma 38 1 0>; -+ dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <38 37>; - status = "disabled"; -@@ -205,6 +218,9 @@ - reg = <0x0202c000 0x4000>; - interrupts = <0 47 0x04>; - clocks = <&clks 179>; -+ dmas = <&sdma 41 1 0>, -+ <&sdma 42 1 0>; -+ dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <42 41>; - status = "disabled"; -@@ -215,6 +231,9 @@ - reg = <0x02030000 0x4000>; - interrupts = <0 48 0x04>; - clocks = <&clks 180>; -+ dmas = <&sdma 45 1 0>, -+ <&sdma 46 1 0>; -+ dma-names = "rx", "tx"; - fsl,fifo-depth = <15>; - fsl,ssi-dma-events = <46 45>; - status = "disabled"; -@@ -276,17 +295,23 @@ - }; - - can1: flexcan@02090000 { -+ compatible = "fsl,imx6q-flexcan"; - reg = <0x02090000 0x4000>; - interrupts = <0 110 0x04>; -+ clocks = <&clks 108>, <&clks 109>; -+ clock-names = "ipg", "per"; - }; - - can2: flexcan@02094000 { -+ compatible = "fsl,imx6q-flexcan"; - reg = <0x02094000 0x4000>; - interrupts = <0 111 0x04>; -+ clocks = <&clks 110>, <&clks 111>; -+ clock-names = "ipg", "per"; - }; - - gpt: gpt@02098000 { -- compatible = "fsl,imx6q-gpt"; -+ compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; - reg = <0x02098000 0x4000>; - interrupts = <0 55 0x04>; - clocks = <&clks 119>, <&clks 120>; -@@ -489,6 +514,13 @@ - }; - }; - -+ tempmon: tempmon { -+ compatible = "fsl,imx6q-tempmon"; -+ interrupts = <0 49 0x04>; -+ fsl,tempmon = <&anatop>; -+ fsl,tempmon-data = <&ocotp>; -+ }; -+ - usbphy1: usbphy@020c9000 { - compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; - reg = <0x020c9000 0x1000>; -@@ -544,6 +576,713 @@ - reg = <0x020e0000 0x38>; - }; - -+ iomuxc: iomuxc@020e0000 { -+ compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; -+ reg = <0x020e0000 0x4000>; -+ -+ audmux { -+ pinctrl_audmux_1: audmux-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x80000000 -+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x80000000 -+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x80000000 -+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x80000000 -+ >; -+ }; -+ -+ pinctrl_audmux_2: audmux-2 { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000 -+ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000 -+ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000 -+ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000 -+ >; -+ }; -+ -+ pinctrl_audmux_3: audmux-3 { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x80000000 -+ MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000 -+ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000 -+ >; -+ }; -+ }; -+ -+ ecspi1 { -+ pinctrl_ecspi1_1: ecspi1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 -+ >; -+ }; -+ -+ pinctrl_ecspi1_2: ecspi1grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 -+ MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 -+ MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 -+ >; -+ }; -+ }; -+ -+ ecspi3 { -+ pinctrl_ecspi3_1: ecspi3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 -+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 -+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -+ >; -+ }; -+ }; -+ -+ enet { -+ pinctrl_enet_1: enetgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ >; -+ }; -+ -+ pinctrl_enet_2: enetgrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_enet_3: enetgrp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 -+ >; -+ }; -+ }; -+ -+ esai { -+ pinctrl_esai_1: esaigrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030 -+ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 -+ MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030 -+ MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030 -+ MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1b030 -+ MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030 -+ MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030 -+ MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x1b030 -+ MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030 -+ >; -+ }; -+ -+ pinctrl_esai_2: esaigrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 -+ MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030 -+ MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030 -+ MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x1b030 -+ MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030 -+ MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030 -+ MX6QDL_PAD_GPIO_17__ESAI_TX0 0x1b030 -+ MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030 -+ MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1b030 -+ MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x1b030 -+ >; -+ }; -+ }; -+ -+ flexcan1 { -+ pinctrl_flexcan1_1: flexcan1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 -+ >; -+ }; -+ -+ pinctrl_flexcan1_2: flexcan1grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 -+ >; -+ }; -+ }; -+ -+ flexcan2 { -+ pinctrl_flexcan2_1: flexcan2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 -+ MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 -+ >; -+ }; -+ }; -+ -+ gpmi-nand { -+ pinctrl_gpmi_nand_1: gpmi-nand-1 { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 -+ >; -+ }; -+ }; -+ -+ hdmi_hdcp { -+ pinctrl_hdmi_hdcp_1: hdmihdcpgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_hdmi_hdcp_2: hdmihdcpgrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_hdmi_hdcp_3: hdmihdcpgrp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 -+ >; -+ }; -+ }; -+ -+ hdmi_cec { -+ pinctrl_hdmi_cec_1: hdmicecgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 -+ >; -+ }; -+ -+ pinctrl_hdmi_cec_2: hdmicecgrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 -+ >; -+ }; -+ }; -+ -+ i2c1 { -+ pinctrl_i2c1_1: i2c1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c1_2: i2c1grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 -+ >; -+ }; -+ }; -+ -+ i2c2 { -+ pinctrl_i2c2_1: i2c2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2_2: i2c2grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c2_3: i2c2grp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ }; -+ -+ i2c3 { -+ pinctrl_i2c3_1: i2c3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3_2: i2c3grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3_3: i2c3grp-3 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3_4: i2c3grp-4 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ }; -+ -+ ipu1 { -+ pinctrl_ipu1_1: ipu1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 -+ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 -+ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 -+ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 -+ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 -+ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 -+ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 -+ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 -+ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 -+ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 -+ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 -+ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 -+ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 -+ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 -+ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 -+ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 -+ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 -+ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 -+ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 -+ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 -+ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 -+ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 -+ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 -+ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 -+ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 -+ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 -+ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 -+ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 -+ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 -+ >; -+ }; -+ -+ pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */ -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 -+ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 -+ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 -+ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 -+ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 -+ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 -+ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 -+ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 -+ MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 -+ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 -+ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 -+ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 -+ >; -+ }; -+ -+ pinctrl_ipu1_3: ipu1grp-3 { /* parallel port 16-bit */ -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 -+ MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000 -+ MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000 -+ MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000 -+ MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000 -+ MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000 -+ MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000 -+ MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000 -+ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 -+ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 -+ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 -+ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 -+ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 -+ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 -+ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 -+ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 -+ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 -+ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 -+ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 -+ >; -+ }; -+ }; -+ -+ mlb { -+ pinctrl_mlb_1: mlbgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__MLB_CLK 0x71 -+ MX6QDL_PAD_GPIO_6__MLB_SIG 0x71 -+ MX6QDL_PAD_GPIO_2__MLB_DATA 0x71 -+ >; -+ }; -+ -+ pinctrl_mlb_2: mlbgrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x71 -+ MX6QDL_PAD_GPIO_6__MLB_SIG 0x71 -+ MX6QDL_PAD_GPIO_2__MLB_DATA 0x71 -+ >; -+ }; -+ }; -+ -+ pwm0 { -+ pinctrl_pwm0_1: pwm0grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ pwm3 { -+ pinctrl_pwm3_1: pwm3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ spdif { -+ pinctrl_spdif_1: spdifgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_spdif_2: spdifgrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 -+ MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 -+ >; -+ }; -+ }; -+ -+ uart1 { -+ pinctrl_uart1_1: uart1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ uart2 { -+ pinctrl_uart2_1: uart2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2_2: uart2grp-2 { /* DTE mode */ -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ uart3 { -+ pinctrl_uart3_1: uart3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3_2: uart3grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ uart4 { -+ pinctrl_uart4_1: uart4grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 -+ >; -+ }; -+ }; -+ -+ usbotg { -+ pinctrl_usbotg_1: usbotggrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_usbotg_2: usbotggrp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 -+ >; -+ }; -+ }; -+ -+ usbh2 { -+ pinctrl_usbh2_1: usbh2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030 -+ MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030 -+ >; -+ }; -+ -+ pinctrl_usbh2_2: usbh2grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030 -+ >; -+ }; -+ }; -+ -+ usbh3 { -+ pinctrl_usbh3_1: usbh3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030 -+ MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030 -+ >; -+ }; -+ -+ pinctrl_usbh3_2: usbh3grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030 -+ >; -+ }; -+ }; -+ -+ usdhc1 { -+ pinctrl_usdhc1_1: usdhc1grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 -+ MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17059 -+ MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17059 -+ MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17059 -+ MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc1_2: usdhc1grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 -+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 -+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 -+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 -+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 -+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 -+ >; -+ }; -+ }; -+ -+ usdhc2 { -+ pinctrl_usdhc2_1: usdhc2grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 -+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 -+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -+ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 -+ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 -+ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 -+ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc2_2: usdhc2grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 -+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 -+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -+ >; -+ }; -+ }; -+ -+ usdhc3 { -+ pinctrl_usdhc3_1: usdhc3grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 -+ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 -+ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 -+ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_2: usdhc3grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ >; -+ }; -+ }; -+ -+ usdhc4 { -+ pinctrl_usdhc4_1: usdhc4grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 -+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 -+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 -+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 -+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 -+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 -+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 -+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 -+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 -+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc4_2: usdhc4grp-2 { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 -+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 -+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 -+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 -+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 -+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 -+ >; -+ }; -+ }; -+ -+ weim { -+ pinctrl_weim_cs0_1: weim_cs0grp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_weim_nor_1: weim_norgrp-1 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 -+ MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 -+ MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 -+ /* data */ -+ MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0 -+ MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0 -+ MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0 -+ MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0 -+ MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0 -+ MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0 -+ MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0 -+ MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0 -+ MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0 -+ MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0 -+ MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0 -+ MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0 -+ MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0 -+ MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0 -+ MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0 -+ MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0 -+ /* address */ -+ MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1 -+ MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1 -+ MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1 -+ MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1 -+ MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1 -+ MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1 -+ MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1 -+ MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1 -+ MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 -+ MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 -+ MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 -+ MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 -+ MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 -+ MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 -+ MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 -+ MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 -+ MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 -+ MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 -+ MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 -+ MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 -+ MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 -+ MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 -+ MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 -+ MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 -+ >; -+ }; -+ }; -+ }; -+ - ldb: ldb@020e0008 { - #address-cells = <1>; - #size-cells = <0>; -@@ -553,13 +1292,11 @@ - - lvds-channel@0 { - reg = <0>; -- crtcs = <&ipu1 0>; - status = "disabled"; - }; - - lvds-channel@1 { - reg = <1>; -- crtcs = <&ipu1 1>; - status = "disabled"; - }; - }; -@@ -580,6 +1317,7 @@ - interrupts = <0 2 0x04>; - clocks = <&clks 155>, <&clks 155>; - clock-names = "ipg", "ahb"; -+ #dma-cells = <3>; - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; - }; - }; -@@ -638,7 +1376,7 @@ - status = "disabled"; - }; - -- usbmisc: usbmisc: usbmisc@02184800 { -+ usbmisc: usbmisc@02184800 { - #index-cells = <1>; - compatible = "fsl,imx6q-usbmisc"; - reg = <0x02184800 0x200>; -@@ -742,21 +1480,18 @@ - reg = <0x021b4000 0x4000>; - }; - -- weim@021b8000 { -+ weim: weim@021b8000 { -+ compatible = "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - interrupts = <0 14 0x04>; -+ clocks = <&clks 196>; - }; - -- ocotp@021bc000 { -- compatible = "fsl,imx6q-ocotp"; -+ ocotp: ocotp@021bc000 { -+ compatible = "fsl,imx6q-ocotp", "syscon"; - reg = <0x021bc000 0x4000>; - }; - -- ocotp@021c0000 { -- reg = <0x021c0000 0x4000>; -- interrupts = <0 21 0x04>; -- }; -- - tzasc@021d0000 { /* TZASC1 */ - reg = <0x021d0000 0x4000>; - interrupts = <0 108 0x04>; -@@ -792,6 +1527,8 @@ - interrupts = <0 27 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; -+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - -@@ -801,6 +1538,8 @@ - interrupts = <0 28 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; -+ dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - -@@ -810,6 +1549,8 @@ - interrupts = <0 29 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; -+ dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - -@@ -819,6 +1560,8 @@ - interrupts = <0 30 0x04>; - clocks = <&clks 160>, <&clks 161>; - clock-names = "ipg", "per"; -+ dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - }; diff --git a/src/patches/kernel/wandboard/dts/0002-ARM-dts-imx6qdl-wandboard-add-gpio-lines-to-wandboar.patch b/src/patches/kernel/wandboard/dts/0002-ARM-dts-imx6qdl-wandboard-add-gpio-lines-to-wandboar.patch deleted file mode 100644 index 009db26..0000000 --- a/src/patches/kernel/wandboard/dts/0002-ARM-dts-imx6qdl-wandboard-add-gpio-lines-to-wandboar.patch +++ /dev/null @@ -1,41 +0,0 @@ -From df41a18b5ac1401c96dcbce99baa50e339494eba Mon Sep 17 00:00:00 2001 -From: Mike Panetta panetta.mike@gmail.com -Date: Tue, 30 Jul 2013 20:33:26 -0400 -Subject: [PATCH 2/5] ARM: dts: imx6qdl-wandboard: add gpio lines to wandboard - -Signed-off-by: Mike Panetta panetta.mike@gmail.com ---- - arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -index 35f5479..a302e95 100644 ---- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -@@ -92,6 +92,23 @@ - >; - }; - }; -+ -+ gpio { -+ pinctrl_gpio: gpiogrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x80000000 /* GPIO3_12 EDM pin 255 */ -+ MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x80000000 /* GPIO3_11 EDM pin 256 */ -+ MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x80000000 /* GPIO3_10 EDM pin 257 */ -+ MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x80000000 /* GPIO3_27 EDM pin 258 */ -+ MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* GPIO3_26 EDM pin 259 */ -+ MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000 /* GPIO6_31 EDM pin 260 */ -+ MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000 /* GPIO3_8 EDM pin 261 */ -+ MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x80000000 /* GPIO1_24 EDM pin 262 */ -+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* GPIO4_5 EDM pin 263 */ -+ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 /* GPIO7_8 EDM pin 264 */ -+ >; -+ }; -+ }; - }; - - &fec { --- -1.8.4.rc3 - diff --git a/src/patches/kernel/wandboard/dts/0003-ARM-dts-imx6qdl-wandboard-Add-support-for-i2c1.patch b/src/patches/kernel/wandboard/dts/0003-ARM-dts-imx6qdl-wandboard-Add-support-for-i2c1.patch deleted file mode 100644 index 7c4e5dd..0000000 --- a/src/patches/kernel/wandboard/dts/0003-ARM-dts-imx6qdl-wandboard-Add-support-for-i2c1.patch +++ /dev/null @@ -1,33 +0,0 @@ -From aefbac1e9377311240656ae5061346acb8612e1b Mon Sep 17 00:00:00 2001 -From: Michael Panetta panetta.mike@gmail.com -Date: Tue, 6 Aug 2013 21:32:50 -0400 -Subject: [PATCH 3/5] ARM: dts: imx6qdl-wandboard: Add support for i2c1. - -This patch adds support for i2c1 to the wandboard common dtsi file. - -Signed-off-by: Michael Panetta panetta.mike@gmail.com ---- - arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -index a302e95..d429c0b 100644 ---- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -@@ -58,6 +58,13 @@ - status = "okay"; - }; - -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1_1>; -+ status = "okay"; -+}; -+ - &i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; --- -1.8.4.rc3 - diff --git a/src/patches/kernel/wandboard/dts/0004-ARM-dts-wandboard-add-binding-for-wand-rfkill-driver.patch b/src/patches/kernel/wandboard/dts/0004-ARM-dts-wandboard-add-binding-for-wand-rfkill-driver.patch deleted file mode 100644 index 54bb388..0000000 --- a/src/patches/kernel/wandboard/dts/0004-ARM-dts-wandboard-add-binding-for-wand-rfkill-driver.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 1305ac7e9308dcd59c3acc205bc95097cad87ed5 Mon Sep 17 00:00:00 2001 -From: Vladimir Ermakov vooon341@gmail.com -Date: Fri, 16 Aug 2013 06:52:26 +0400 -Subject: [PATCH 5/5] ARM: dts: wandboard: add binding for wand-rfkill driver - -Required gpios pincontrol selected in hog. Add binding only. -Disabled non-removable, because after unblocking need to redetect SDIO device. - -Signed-off-by: Vladimir Ermakov vooon341@gmail.com ---- - arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 18 +++++++++++++++++- - 1 file changed, 17 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -index 737805b..c1ef3bd 100644 ---- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi -@@ -50,6 +50,22 @@ - spdif-controller = <&spdif>; - spdif-out; - }; -+ -+ rfkill { -+ compatible = "wand,imx6qdl-wandboard-rfkill"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <>; -+ -+ bluetooth-on = <&gpio3 13 0>; -+ bluetooth-wake = <&gpio3 14 0>; -+ bluetooth-host-wake = <&gpio3 15 0>; -+ -+ wifi-ref-on = <&gpio2 29 0>; -+ wifi-rst-n = <&gpio5 2 0>; -+ wifi-reg-on = <&gpio1 26 0>; -+ wifi-host-wake = <&gpio1 29 0>; -+ wifi-wake = <&gpio1 30 0>; -+ }; - }; - - &audmux { -@@ -175,7 +191,7 @@ - &usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2_2>; -- non-removable; -+ //non-removable; - status = "okay"; - }; - --- -1.8.4.rc3 - diff --git a/src/patches/kernel/wandboard/dts/0005-ARM-dts-imx6qdl-add-pcie-device-node.patch b/src/patches/kernel/wandboard/dts/0005-ARM-dts-imx6qdl-add-pcie-device-node.patch deleted file mode 100644 index e78d9ba..0000000 --- a/src/patches/kernel/wandboard/dts/0005-ARM-dts-imx6qdl-add-pcie-device-node.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 3a57291fa4ca7f7647d826f5b47082ef306d839f Mon Sep 17 00:00:00 2001 -From: Sean Cross xobs@kosagi.com -Date: Thu, 26 Sep 2013 10:51:09 +0800 -Subject: [PATCH] ARM: dts: imx6qdl: add pcie device node - -Add pcie device node for imx6qdl. - -Signed-off-by: Sean Cross xobs@kosagi.com -Signed-off-by: Shawn Guo shawn.guo@linaro.org ---- - arch/arm/boot/dts/imx6qdl.dtsi | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl.dtsi -+++ b/arch/arm/boot/dts/imx6qdl.dtsi -@@ -108,6 +108,22 @@ - cache-level = <2>; - }; - -+ pcie: pcie@0x01000000 { -+ compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; -+ reg = <0x01ffc000 0x4000>; /* DBI */ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ device_type = "pci"; -+ ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ -+ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ -+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ -+ num-lanes = <1>; -+ interrupts = <0 123 0x04>; -+ clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; -+ clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; -+ status = "disabled"; -+ }; -+ - pmu { - compatible = "arm,cortex-a9-pmu"; - interrupts = <0 94 0x04>; diff --git a/src/patches/kernel/wandboard/imx/0001-i2c-imx-retry-on-NAK.patch b/src/patches/kernel/wandboard/imx/0001-i2c-imx-retry-on-NAK.patch deleted file mode 100644 index e876c6e..0000000 --- a/src/patches/kernel/wandboard/imx/0001-i2c-imx-retry-on-NAK.patch +++ /dev/null @@ -1,38 +0,0 @@ -From: Tim Harvey tharvey@gateworks.com -Subject: [PATCH] i2c: imx: retry on NAK - -In case of busy i2c try again to get ACK. - -Signed-off-by: Tim Harvey tharvey@gateworks.com -Tested-by: Luka Perkov luka@openwrt.org ---- - drivers/i2c/busses/i2c-imx.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/i2c/busses/i2c-imx.c -+++ b/drivers/i2c/busses/i2c-imx.c -@@ -62,6 +62,7 @@ - - /* Default value */ - #define IMX_I2C_BIT_RATE 100000 /* 100kHz */ -+#define IMX_I2C_MAX_RETRIES 3 /* number of retries to attempt */ - - /* IMX I2C registers */ - #define IMX_I2C_IADR 0x00 /* i2c slave address */ -@@ -198,7 +199,7 @@ static int i2c_imx_acked(struct imx_i2c_ - { - if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) { - dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__); -- return -EIO; /* No ACK */ -+ return -EAGAIN; /* try again */ - } - - dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__); -@@ -533,6 +534,7 @@ static int __init i2c_imx_probe(struct p - i2c_imx->adapter.dev.parent = &pdev->dev; - i2c_imx->adapter.nr = pdev->id; - i2c_imx->adapter.dev.of_node = pdev->dev.of_node; -+ i2c_imx->adapter.retries = IMX_I2C_MAX_RETRIES; - i2c_imx->base = base; - - pinctrl = devm_pinctrl_get_select_default(&pdev->dev); diff --git a/src/patches/kernel/wandboard/imx/0002-i.MX6-Wandboard-add-CKO1-clock-output.patch b/src/patches/kernel/wandboard/imx/0002-i.MX6-Wandboard-add-CKO1-clock-output.patch deleted file mode 100644 index b24c7ad..0000000 --- a/src/patches/kernel/wandboard/imx/0002-i.MX6-Wandboard-add-CKO1-clock-output.patch +++ /dev/null @@ -1,29 +0,0 @@ -From fc69065e84165aef5ba7a837d9d2e668bd03b146 Mon Sep 17 00:00:00 2001 -From: Vladimir Ermakov vooon341@gmail.com -Date: Wed, 10 Jul 2013 03:03:51 +0400 -Subject: [PATCH 7/8] i.MX6 Wandboard add CKO1 clock output - -stgl5000 uses clock from imx CKO1 pad. - -Signed-off-by: Vladimir Ermakov vooon341@gmail.com ---- - arch/arm/mach-imx/mach-imx6q.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c -index 5536fd8..bf9a30b 100644 ---- a/arch/arm/mach-imx/mach-imx6q.c -+++ b/arch/arm/mach-imx/mach-imx6q.c -@@ -166,6 +166,9 @@ static void __init imx6q_init_machine(void) - if (of_machine_is_compatible("fsl,imx6q-sabrelite")) - imx6q_sabrelite_init(); - -+ if (of_machine_is_compatible("wand,imx6q-wandboard")) -+ imx6q_sabrelite_cko1_setup(); -+ - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - - imx_anatop_init(); --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0003-thermal-add-imx-thermal-driver-support.patch b/src/patches/kernel/wandboard/imx/0003-thermal-add-imx-thermal-driver-support.patch deleted file mode 100644 index a0a7cec..0000000 --- a/src/patches/kernel/wandboard/imx/0003-thermal-add-imx-thermal-driver-support.patch +++ /dev/null @@ -1,489 +0,0 @@ -From 744af645bfdb0bfe73fa28df06da48783f85e6a9 Mon Sep 17 00:00:00 2001 -From: Shawn Guo shawn.guo@linaro.org -Date: Mon, 24 Jun 2013 14:30:44 +0800 -Subject: [PATCH 5/5] thermal: add imx thermal driver support - -This is based on the initial imx thermal work done by -Rob Lee rob.lee@linaro.org (Not sure if the email address is still -valid). Since he is no longer interested in the work and I have -rewritten a significant amount of the code, I just took the authorship -over from him. - -It adds the imx thermal support using Temperature Monitor (TEMPMON) -block found on some Freescale i.MX SoCs. The driver uses syscon regmap -interface to access TEMPMON control registers and calibration data, and -supports cpufreq as the cooling device. - -Signed-off-by: Shawn Guo shawn.guo@linaro.org ---- - .../devicetree/bindings/thermal/imx-thermal.txt | 17 + - drivers/thermal/Kconfig | 11 + - drivers/thermal/Makefile | 1 + - drivers/thermal/imx_thermal.c | 397 ++++++++++++++++++++ - 4 files changed, 426 insertions(+) - create mode 100644 Documentation/devicetree/bindings/thermal/imx-thermal.txt - create mode 100644 drivers/thermal/imx_thermal.c - -diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.txt b/Documentation/devicetree/bindings/thermal/imx-thermal.txt -new file mode 100644 -index 0000000..541c25e ---- /dev/null -+++ b/Documentation/devicetree/bindings/thermal/imx-thermal.txt -@@ -0,0 +1,17 @@ -+* Temperature Monitor (TEMPMON) on Freescale i.MX SoCs -+ -+Required properties: -+- compatible : "fsl,imx6q-thermal" -+- fsl,tempmon : phandle pointer to system controller that contains TEMPMON -+ control registers, e.g. ANATOP on imx6q. -+- fsl,tempmon-data : phandle pointer to fuse controller that contains TEMPMON -+ calibration data, e.g. OCOTP on imx6q. The details about calibration data -+ can be found in SoC Reference Manual. -+ -+Example: -+ -+tempmon { -+ compatible = "fsl,imx6q-tempmon"; -+ fsl,tempmon = <&anatop>; -+ fsl,tempmon-data = <&ocotp>; -+}; -diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig -index 5e3c025..e91d78f 100644 ---- a/drivers/thermal/Kconfig -+++ b/drivers/thermal/Kconfig -@@ -91,6 +91,17 @@ config THERMAL_EMULATION - because userland can easily disable the thermal policy by simply - flooding this sysfs node with low temperature values. - -+config IMX_THERMAL -+ tristate "Temperature sensor driver for Freescale i.MX SoCs" -+ depends on CPU_THERMAL -+ depends on MFD_SYSCON -+ depends on OF -+ help -+ Support for Temperature Monitor (TEMPMON) found on Freescale i.MX SoCs. -+ It supports one critical trip point and one passive trip point. The -+ cpufreq is used as the cooling device to throttle CPUs when the -+ passive trip is crossed. -+ - config SPEAR_THERMAL - bool "SPEAr thermal sensor driver" - depends on PLAT_SPEAR -diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile -index c054d41..6910b2d 100644 ---- a/drivers/thermal/Makefile -+++ b/drivers/thermal/Makefile -@@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_THERMAL) += exynos_thermal.o - obj-$(CONFIG_DOVE_THERMAL) += dove_thermal.o - obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o - obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o -+obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o - obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o - obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o - -diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c -new file mode 100644 -index 0000000..d16c33c ---- /dev/null -+++ b/drivers/thermal/imx_thermal.c -@@ -0,0 +1,397 @@ -+/* -+ * Copyright 2013 Freescale Semiconductor, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/cpu_cooling.h> -+#include <linux/cpufreq.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/init.h> -+#include <linux/io.h> -+#include <linux/kernel.h> -+#include <linux/mfd/syscon.h> -+#include <linux/module.h> -+#include <linux/of.h> -+#include <linux/platform_device.h> -+#include <linux/regmap.h> -+#include <linux/slab.h> -+#include <linux/thermal.h> -+#include <linux/types.h> -+ -+#define REG_SET 0x4 -+#define REG_CLR 0x8 -+#define REG_TOG 0xc -+ -+#define MISC0 0x0150 -+#define MISC0_REFTOP_SELBIASOFF (1 << 3) -+ -+#define TEMPSENSE0 0x0180 -+#define TEMPSENSE0_TEMP_CNT_SHIFT 8 -+#define TEMPSENSE0_TEMP_CNT_MASK (0xfff << TEMPSENSE0_TEMP_CNT_SHIFT) -+#define TEMPSENSE0_FINISHED (1 << 2) -+#define TEMPSENSE0_MEASURE_TEMP (1 << 1) -+#define TEMPSENSE0_POWER_DOWN (1 << 0) -+ -+#define TEMPSENSE1 0x0190 -+#define TEMPSENSE1_MEASURE_FREQ 0xffff -+ -+#define OCOTP_ANA1 0x04e0 -+ -+/* The driver supports 1 passive trip point and 1 critical trip point */ -+enum imx_thermal_trip { -+ IMX_TRIP_PASSIVE, -+ IMX_TRIP_CRITICAL, -+ IMX_TRIP_NUM, -+}; -+ -+/* -+ * It defines the temperature in millicelsius for passive trip point -+ * that will trigger cooling action when crossed. -+ */ -+#define IMX_TEMP_PASSIVE 85000 -+ -+/* -+ * The maximum die temperature on imx parts is 105C, let's give some cushion -+ * for noise and possible temperature rise between measurements. -+ */ -+#define IMX_TEMP_CRITICAL 100000 -+ -+#define IMX_POLLING_DELAY 2000 /* millisecond */ -+#define IMX_PASSIVE_DELAY 1000 -+ -+struct imx_thermal_data { -+ struct thermal_zone_device *tz; -+ struct thermal_cooling_device *cdev; -+ enum thermal_device_mode mode; -+ struct regmap *tempmon; -+ int c1, c2; /* See formula in imx_get_sensor_data() */ -+}; -+ -+static int imx_get_temp(struct thermal_zone_device *tz, unsigned long *temp) -+{ -+ struct imx_thermal_data *data = tz->devdata; -+ struct regmap *map = data->tempmon; -+ static unsigned long last_temp; -+ unsigned int n_meas; -+ u32 val; -+ -+ /* -+ * Every time we measure the temperature, we will power on the -+ * temperature sensor, enable measurements, take a reading, -+ * disable measurements, power off the temperature sensor. -+ */ -+ regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); -+ regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); -+ -+ /* -+ * According to the temp sensor designers, it may require up to ~17us -+ * to complete a measurement. -+ */ -+ usleep_range(20, 50); -+ -+ regmap_read(map, TEMPSENSE0, &val); -+ regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); -+ regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); -+ -+ if ((val & TEMPSENSE0_FINISHED) == 0) { -+ dev_dbg(&tz->device, "temp measurement never finished\n"); -+ return -EAGAIN; -+ } -+ -+ n_meas = (val & TEMPSENSE0_TEMP_CNT_MASK) >> TEMPSENSE0_TEMP_CNT_SHIFT; -+ -+ /* See imx_get_sensor_data() for formula derivation */ -+ *temp = data->c2 + data->c1 * n_meas; -+ -+ if (*temp != last_temp) { -+ dev_dbg(&tz->device, "millicelsius: %ld\n", *temp); -+ last_temp = *temp; -+ } -+ -+ return 0; -+} -+ -+static int imx_get_mode(struct thermal_zone_device *tz, -+ enum thermal_device_mode *mode) -+{ -+ struct imx_thermal_data *data = tz->devdata; -+ -+ *mode = data->mode; -+ -+ return 0; -+} -+ -+static int imx_set_mode(struct thermal_zone_device *tz, -+ enum thermal_device_mode mode) -+{ -+ struct imx_thermal_data *data = tz->devdata; -+ -+ if (mode == THERMAL_DEVICE_ENABLED) { -+ tz->polling_delay = IMX_POLLING_DELAY; -+ tz->passive_delay = IMX_PASSIVE_DELAY; -+ } else { -+ tz->polling_delay = 0; -+ tz->passive_delay = 0; -+ } -+ -+ data->mode = mode; -+ thermal_zone_device_update(tz); -+ -+ return 0; -+} -+ -+static int imx_get_trip_type(struct thermal_zone_device *tz, int trip, -+ enum thermal_trip_type *type) -+{ -+ *type = (trip == IMX_TRIP_PASSIVE) ? THERMAL_TRIP_PASSIVE : -+ THERMAL_TRIP_CRITICAL; -+ return 0; -+} -+ -+static int imx_get_crit_temp(struct thermal_zone_device *tz, -+ unsigned long *temp) -+{ -+ *temp = IMX_TEMP_CRITICAL; -+ return 0; -+} -+ -+static int imx_get_trip_temp(struct thermal_zone_device *tz, int trip, -+ unsigned long *temp) -+{ -+ *temp = (trip == IMX_TRIP_PASSIVE) ? IMX_TEMP_PASSIVE : -+ IMX_TEMP_CRITICAL; -+ return 0; -+} -+ -+static int imx_bind(struct thermal_zone_device *tz, -+ struct thermal_cooling_device *cdev) -+{ -+ int ret; -+ -+ ret = thermal_zone_bind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev, -+ THERMAL_NO_LIMIT, -+ THERMAL_NO_LIMIT); -+ if (ret) { -+ dev_err(&tz->device, -+ "binding zone %s with cdev %s failed:%d\n", -+ tz->type, cdev->type, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int imx_unbind(struct thermal_zone_device *tz, -+ struct thermal_cooling_device *cdev) -+{ -+ int ret; -+ -+ ret = thermal_zone_unbind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev); -+ if (ret) { -+ dev_err(&tz->device, -+ "unbinding zone %s with cdev %s failed:%d\n", -+ tz->type, cdev->type, ret); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static const struct thermal_zone_device_ops imx_tz_ops = { -+ .bind = imx_bind, -+ .unbind = imx_unbind, -+ .get_temp = imx_get_temp, -+ .get_mode = imx_get_mode, -+ .set_mode = imx_set_mode, -+ .get_trip_type = imx_get_trip_type, -+ .get_trip_temp = imx_get_trip_temp, -+ .get_crit_temp = imx_get_crit_temp, -+}; -+ -+static int imx_get_sensor_data(struct platform_device *pdev) -+{ -+ struct imx_thermal_data *data = platform_get_drvdata(pdev); -+ struct regmap *map; -+ int t1, t2, n1, n2; -+ int ret; -+ u32 val; -+ -+ map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -+ "fsl,tempmon-data"); -+ if (IS_ERR(map)) { -+ ret = PTR_ERR(map); -+ dev_err(&pdev->dev, "failed to get sensor regmap: %d\n", ret); -+ return ret; -+ } -+ -+ ret = regmap_read(map, OCOTP_ANA1, &val); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); -+ return ret; -+ } -+ -+ if (val == 0 || val == ~0) { -+ dev_err(&pdev->dev, "invalid sensor calibration data\n"); -+ return -EINVAL; -+ } -+ -+ /* -+ * Sensor data layout: -+ * [31:20] - sensor value @ 25C -+ * [19:8] - sensor value of hot -+ * [7:0] - hot temperature value -+ */ -+ n1 = val >> 20; -+ n2 = (val & 0xfff00) >> 8; -+ t2 = val & 0xff; -+ t1 = 25; /* t1 always 25C */ -+ -+ /* -+ * Derived from linear interpolation, -+ * Tmeas = T2 + (Nmeas - N2) * (T1 - T2) / (N1 - N2) -+ * We want to reduce this down to the minimum computation necessary -+ * for each temperature read. Also, we want Tmeas in millicelsius -+ * and we don't want to lose precision from integer division. So... -+ * milli_Tmeas = 1000 * T2 + 1000 * (Nmeas - N2) * (T1 - T2) / (N1 - N2) -+ * Let constant c1 = 1000 * (T1 - T2) / (N1 - N2) -+ * milli_Tmeas = (1000 * T2) + c1 * (Nmeas - N2) -+ * milli_Tmeas = (1000 * T2) + (c1 * Nmeas) - (c1 * N2) -+ * Let constant c2 = (1000 * T2) - (c1 * N2) -+ * milli_Tmeas = c2 + (c1 * Nmeas) -+ */ -+ data->c1 = 1000 * (t1 - t2) / (n1 - n2); -+ data->c2 = 1000 * t2 - data->c1 * n2; -+ -+ return 0; -+} -+ -+static int imx_thermal_probe(struct platform_device *pdev) -+{ -+ struct imx_thermal_data *data; -+ struct cpumask clip_cpus; -+ struct regmap *map; -+ int ret; -+ -+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ -+ map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon"); -+ if (IS_ERR(map)) { -+ ret = PTR_ERR(map); -+ dev_err(&pdev->dev, "failed to get tempmon regmap: %d\n", ret); -+ return ret; -+ } -+ data->tempmon = map; -+ -+ platform_set_drvdata(pdev, data); -+ -+ ret = imx_get_sensor_data(pdev); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to get sensor data\n"); -+ return ret; -+ } -+ -+ /* Make sure sensor is in known good state for measurements */ -+ regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); -+ regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_MEASURE_TEMP); -+ regmap_write(map, TEMPSENSE1 + REG_CLR, TEMPSENSE1_MEASURE_FREQ); -+ regmap_write(map, MISC0 + REG_SET, MISC0_REFTOP_SELBIASOFF); -+ regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_POWER_DOWN); -+ -+ cpumask_set_cpu(0, &clip_cpus); -+ data->cdev = cpufreq_cooling_register(&clip_cpus); -+ if (IS_ERR(data->cdev)) { -+ ret = PTR_ERR(data->cdev); -+ dev_err(&pdev->dev, -+ "failed to register cpufreq cooling device: %d\n", ret); -+ return ret; -+ } -+ -+ data->tz = thermal_zone_device_register("imx_thermal_zone", -+ IMX_TRIP_NUM, 0, data, -+ &imx_tz_ops, NULL, -+ IMX_PASSIVE_DELAY, -+ IMX_POLLING_DELAY); -+ if (IS_ERR(data->tz)) { -+ ret = PTR_ERR(data->tz); -+ dev_err(&pdev->dev, -+ "failed to register thermal zone device %d\n", ret); -+ cpufreq_cooling_unregister(data->cdev); -+ return ret; -+ } -+ -+ data->mode = THERMAL_DEVICE_ENABLED; -+ -+ return 0; -+} -+ -+static int imx_thermal_remove(struct platform_device *pdev) -+{ -+ struct imx_thermal_data *data = platform_get_drvdata(pdev); -+ -+ thermal_zone_device_unregister(data->tz); -+ cpufreq_cooling_unregister(data->cdev); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM_SLEEP -+static int imx_thermal_suspend(struct device *dev) -+{ -+ struct imx_thermal_data *data = dev_get_drvdata(dev); -+ struct regmap *map = data->tempmon; -+ u32 val; -+ -+ regmap_read(map, TEMPSENSE0, &val); -+ if ((val & TEMPSENSE0_POWER_DOWN) == 0) { -+ /* -+ * If a measurement is taking place, wait for a long enough -+ * time for it to finish, and then check again. If it still -+ * does not finish, something must go wrong. -+ */ -+ udelay(50); -+ regmap_read(map, TEMPSENSE0, &val); -+ if ((val & TEMPSENSE0_POWER_DOWN) == 0) -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static int imx_thermal_resume(struct device *dev) -+{ -+ /* Nothing to do for now */ -+ return 0; -+} -+#endif -+ -+static SIMPLE_DEV_PM_OPS(imx_thermal_pm_ops, -+ imx_thermal_suspend, imx_thermal_resume); -+ -+static const struct of_device_id of_imx_thermal_match[] = { -+ { .compatible = "fsl,imx6q-tempmon", }, -+ { /* end */ } -+}; -+ -+static struct platform_driver imx_thermal = { -+ .driver = { -+ .name = "imx_thermal", -+ .owner = THIS_MODULE, -+ .pm = &imx_thermal_pm_ops, -+ .of_match_table = of_imx_thermal_match, -+ }, -+ .probe = imx_thermal_probe, -+ .remove = imx_thermal_remove, -+}; -+module_platform_driver(imx_thermal); -+ -+MODULE_AUTHOR("Freescale Semiconductor, Inc."); -+MODULE_DESCRIPTION("Thermal driver for Freescale i.MX SoCs"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:imx-thermal"); --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0004-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch b/src/patches/kernel/wandboard/imx/0004-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch deleted file mode 100644 index 993b1d7..0000000 --- a/src/patches/kernel/wandboard/imx/0004-ARM-i.MX6-Wandboard-add-wifi-bt-rfkill-driver.patch +++ /dev/null @@ -1,341 +0,0 @@ -From adf0f7b7d7c0083dd936fe46423b89e974f8df12 Mon Sep 17 00:00:00 2001 -From: Vladimir Ermakov vooon341@gmail.com -Date: Wed, 10 Jul 2013 03:06:54 +0400 -Subject: [PATCH] ARM i.MX6 Wandboard add wifi+bt rfkill driver - -BRCM WiFi module requires initialization for control gpio; -Additional provides rfkill funcs. - -v2: fix wrong probe func in driver struct -v3: add imx6qdl compatible - -Signed-off-by: Vladimir Ermakov vooon341@gmail.com ---- - arch/arm/mach-imx/devices/Kconfig | 6 + - arch/arm/mach-imx/devices/Makefile | 1 + - arch/arm/mach-imx/devices/wand-rfkill.c | 290 ++++++++++++++++++++++++++++++++ - 3 files changed, 297 insertions(+) - create mode 100644 arch/arm/mach-imx/devices/wand-rfkill.c - -diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig -index 68c74fb..a0adf75 100644 ---- a/arch/arm/mach-imx/devices/Kconfig -+++ b/arch/arm/mach-imx/devices/Kconfig -@@ -85,3 +85,9 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - - config IMX_HAVE_PLATFORM_SPI_IMX - bool -+ -+config WAND_RFKILL -+ tristate "Wandboard RF Kill support" -+ depends on SOC_IMX6Q -+ default m -+ select RFKILL -diff --git a/arch/arm/mach-imx/devices/Makefile b/arch/arm/mach-imx/devices/Makefile -index 67416fb..b2aded5 100644 ---- a/arch/arm/mach-imx/devices/Makefile -+++ b/arch/arm/mach-imx/devices/Makefile -@@ -30,3 +30,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o - obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o - obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o - obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o -+obj-$(CONFIG_WAND_RFKILL) += wand-rfkill.o -diff --git a/arch/arm/mach-imx/devices/wand-rfkill.c b/arch/arm/mach-imx/devices/wand-rfkill.c -new file mode 100644 -index 0000000..da7ef9f ---- /dev/null -+++ b/arch/arm/mach-imx/devices/wand-rfkill.c -@@ -0,0 +1,290 @@ -+/* -+ * arch/arm/mach-imx/devices/wand-rfkill.c -+ * -+ * Copyright (C) 2013 Vladimir Ermakov vooon341@gmail.com -+ * -+ * based on net/rfkill/rfkill-gpio.c -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include <linux/of.h> -+#include <linux/of_gpio.h> -+#include <linux/of_device.h> -+#include <linux/pinctrl/consumer.h> -+#include <linux/platform_device.h> -+#include <linux/rfkill.h> -+#include <linux/delay.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/slab.h> -+ -+ -+struct wand_rfkill_data { -+ struct rfkill *rfkill_dev; -+ int shutdown_gpio; -+ const char *shutdown_name; -+}; -+ -+static int wand_rfkill_set_block(void *data, bool blocked) -+{ -+ struct wand_rfkill_data *rfkill = data; -+ -+ pr_debug("wandboard-rfkill: set block %d\n", blocked); -+ -+ if (blocked) { -+ if (gpio_is_valid(rfkill->shutdown_gpio)) -+ gpio_direction_output(rfkill->shutdown_gpio, 0); -+ } else { -+ if (gpio_is_valid(rfkill->shutdown_gpio)) -+ gpio_direction_output(rfkill->shutdown_gpio, 1); -+ } -+ -+ return 0; -+} -+ -+static const struct rfkill_ops wand_rfkill_ops = { -+ .set_block = wand_rfkill_set_block, -+}; -+ -+static int wand_rfkill_wifi_probe(struct device *dev, -+ struct device_node *np, -+ struct wand_rfkill_data *rfkill) -+{ -+ int ret; -+ int wl_ref_on, wl_rst_n, wl_reg_on, wl_wake, wl_host_wake; -+ -+ wl_ref_on = of_get_named_gpio(np, "wifi-ref-on", 0); -+ wl_rst_n = of_get_named_gpio(np, "wifi-rst-n", 0); -+ wl_reg_on = of_get_named_gpio(np, "wifi-reg-on", 0); -+ wl_wake = of_get_named_gpio(np, "wifi-wake", 0); -+ wl_host_wake = of_get_named_gpio(np, "wifi-host-wake", 0); -+ -+ if (!gpio_is_valid(wl_rst_n) || !gpio_is_valid(wl_ref_on) || -+ !gpio_is_valid(wl_reg_on) || !gpio_is_valid(wl_wake) || -+ !gpio_is_valid(wl_host_wake)) { -+ -+ dev_err(dev, "incorrect wifi gpios (%d %d %d %d %d)\n", -+ wl_rst_n, wl_ref_on, wl_reg_on, wl_wake, wl_host_wake); -+ return -EINVAL; -+ } -+ -+ dev_info(dev, "initialize wifi chip\n"); -+ -+ gpio_request(wl_rst_n, "wl_rst_n"); -+ gpio_direction_output(wl_rst_n, 0); -+ msleep(11); -+ gpio_set_value(wl_rst_n, 1); -+ -+ gpio_request(wl_ref_on, "wl_ref_on"); -+ gpio_direction_output(wl_ref_on, 1); -+ -+ gpio_request(wl_reg_on, "wl_reg_on"); -+ gpio_direction_output(wl_reg_on, 1); -+ -+ gpio_request(wl_wake, "wl_wake"); -+ gpio_direction_output(wl_wake, 1); -+ -+ gpio_request(wl_host_wake, "wl_host_wake"); -+ gpio_direction_input(wl_host_wake); -+ -+ rfkill->shutdown_name = "wifi_shutdown"; -+ rfkill->shutdown_gpio = wl_wake; -+ -+ rfkill->rfkill_dev = rfkill_alloc("wifi-rfkill", dev, RFKILL_TYPE_WLAN, -+ &wand_rfkill_ops, rfkill); -+ if (!rfkill->rfkill_dev) { -+ ret = -ENOMEM; -+ goto wifi_fail_free_gpio; -+ } -+ -+ ret = rfkill_register(rfkill->rfkill_dev); -+ if (ret < 0) -+ goto wifi_fail_unregister; -+ -+ dev_info(dev, "wifi-rfkill registered.\n"); -+ -+ return 0; -+ -+wifi_fail_unregister: -+ rfkill_destroy(rfkill->rfkill_dev); -+wifi_fail_free_gpio: -+ if (gpio_is_valid(wl_rst_n)) gpio_free(wl_rst_n); -+ if (gpio_is_valid(wl_ref_on)) gpio_free(wl_ref_on); -+ if (gpio_is_valid(wl_reg_on)) gpio_free(wl_reg_on); -+ if (gpio_is_valid(wl_wake)) gpio_free(wl_wake); -+ if (gpio_is_valid(wl_host_wake)) gpio_free(wl_host_wake); -+ -+ return ret; -+} -+ -+static int wand_rfkill_bt_probe(struct device *dev, -+ struct device_node *np, -+ struct wand_rfkill_data *rfkill) -+{ -+ int ret; -+ int bt_on, bt_wake, bt_host_wake; -+ -+ bt_on = of_get_named_gpio(np, "bluetooth-on", 0); -+ bt_wake = of_get_named_gpio(np, "bluetooth-wake", 0); -+ bt_host_wake = of_get_named_gpio(np, "bluetooth-host-wake", 0); -+ -+ if (!gpio_is_valid(bt_on) || !gpio_is_valid(bt_wake) || -+ !gpio_is_valid(bt_host_wake)) { -+ -+ dev_err(dev, "incorrect bt gpios (%d %d %d)\n", -+ bt_on, bt_wake, bt_host_wake); -+ return -EINVAL; -+ } -+ -+ dev_info(dev, "initialize bluetooth chip\n"); -+ -+ gpio_request(bt_on, "bt_on"); -+ gpio_direction_output(bt_on, 0); -+ msleep(11); -+ gpio_set_value(bt_on, 1); -+ -+ gpio_request(bt_wake, "bt_wake"); -+ gpio_direction_output(bt_wake, 1); -+ -+ gpio_request(bt_host_wake, "bt_host_wake"); -+ gpio_direction_input(bt_host_wake); -+ -+ rfkill->shutdown_name = "bluetooth_shutdown"; -+ rfkill->shutdown_gpio = bt_wake; -+ -+ rfkill->rfkill_dev = rfkill_alloc("bluetooth-rfkill", dev, RFKILL_TYPE_BLUETOOTH, -+ &wand_rfkill_ops, rfkill); -+ if (!rfkill->rfkill_dev) { -+ ret = -ENOMEM; -+ goto bt_fail_free_gpio; -+ } -+ -+ ret = rfkill_register(rfkill->rfkill_dev); -+ if (ret < 0) -+ goto bt_fail_unregister; -+ -+ dev_info(dev, "bluetooth-rfkill registered.\n"); -+ -+ return 0; -+ -+bt_fail_unregister: -+ rfkill_destroy(rfkill->rfkill_dev); -+bt_fail_free_gpio: -+ if (gpio_is_valid(bt_on)) gpio_free(bt_on); -+ if (gpio_is_valid(bt_wake)) gpio_free(bt_wake); -+ if (gpio_is_valid(bt_host_wake)) gpio_free(bt_host_wake); -+ -+ return ret; -+} -+ -+static int wand_rfkill_probe(struct platform_device *pdev) -+{ -+ struct wand_rfkill_data *rfkill; -+ struct pinctrl *pinctrl; -+ int ret; -+ -+ dev_info(&pdev->dev, "Wandboard rfkill initialization\n"); -+ -+ if (!pdev->dev.of_node) { -+ dev_err(&pdev->dev, "no device tree node\n"); -+ return -ENODEV; -+ } -+ -+ rfkill = kzalloc(sizeof(*rfkill) * 2, GFP_KERNEL); -+ if (!rfkill) -+ return -ENOMEM; -+ -+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev); -+ if (IS_ERR(pinctrl)) { -+ int ret = PTR_ERR(pinctrl); -+ dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret); -+ return ret; -+ } -+ -+ /* setup WiFi */ -+ ret = wand_rfkill_wifi_probe(&pdev->dev, pdev->dev.of_node, &rfkill[0]); -+ if (ret < 0) -+ goto fail_free_rfkill; -+ -+ /* setup bluetooth */ -+ ret = wand_rfkill_bt_probe(&pdev->dev, pdev->dev.of_node, &rfkill[1]); -+ if (ret < 0) -+ goto fail_unregister_wifi; -+ -+ platform_set_drvdata(pdev, rfkill); -+ -+ return 0; -+ -+fail_unregister_wifi: -+ if (rfkill[1].rfkill_dev) { -+ rfkill_unregister(rfkill[1].rfkill_dev); -+ rfkill_destroy(rfkill[1].rfkill_dev); -+ } -+ -+ /* TODO free gpio */ -+ -+fail_free_rfkill: -+ kfree(rfkill); -+ -+ return ret; -+} -+ -+static int wand_rfkill_remove(struct platform_device *pdev) -+{ -+ struct wand_rfkill_data *rfkill = platform_get_drvdata(pdev); -+ -+ dev_info(&pdev->dev, "Module unloading\n"); -+ -+ if (!rfkill) -+ return 0; -+ -+ /* WiFi */ -+ if (gpio_is_valid(rfkill[0].shutdown_gpio)) -+ gpio_free(rfkill[0].shutdown_gpio); -+ -+ rfkill_unregister(rfkill[0].rfkill_dev); -+ rfkill_destroy(rfkill[0].rfkill_dev); -+ -+ /* Bt */ -+ if (gpio_is_valid(rfkill[1].shutdown_gpio)) -+ gpio_free(rfkill[1].shutdown_gpio); -+ -+ rfkill_unregister(rfkill[1].rfkill_dev); -+ rfkill_destroy(rfkill[1].rfkill_dev); -+ -+ kfree(rfkill); -+ -+ return 0; -+} -+ -+static struct of_device_id wand_rfkill_match[] = { -+ { .compatible = "wand,imx6q-wandboard-rfkill", }, -+ { .compatible = "wand,imx6dl-wandboard-rfkill", }, -+ { .compatible = "wand,imx6qdl-wandboard-rfkill", }, -+ {} -+}; -+ -+static struct platform_driver wand_rfkill_driver = { -+ .driver = { -+ .name = "wandboard-rfkill", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(wand_rfkill_match), -+ }, -+ .probe = wand_rfkill_probe, -+ .remove = wand_rfkill_remove -+}; -+ -+module_platform_driver(wand_rfkill_driver); -+ -+MODULE_AUTHOR("Vladimir Ermakov vooon341@gmail.com"); -+MODULE_DESCRIPTION("Wandboard rfkill driver"); -+MODULE_LICENSE("GPL v2"); --- -1.8.4.rc3 - diff --git a/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch b/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch deleted file mode 100644 index 912b3be..0000000 --- a/src/patches/kernel/wandboard/imx/0005-Add-IMX6Q-AHCI-support.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 8e890a259208dbe3aba6f46f7c3a213269d8f123 Mon Sep 17 00:00:00 2001 -From: Allen Ibara allen@zee.aero -Date: Tue, 4 Dec 2012 20:44:26 -0800 -Subject: [PATCH 2/5] Add IMX6Q AHCI support - -Adds ahci_platform bits to make AHCI work on sabrelite IMX6Q board. - -Signed-off-by: Allen Ibara allen@zee.aero -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - -diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c -index 7a8a284..d324cdf 100644 ---- a/drivers/ata/ahci_platform.c -+++ b/drivers/ata/ahci_platform.c -@@ -23,6 +23,9 @@ - #include <linux/platform_device.h> - #include <linux/libata.h> - #include <linux/ahci_platform.h> -+#include <linux/of.h> -+#include <linux/of_device.h> -+#include <linux/of_gpio.h> - #include "ahci.h" - - static void ahci_host_stop(struct ata_host *host); -@@ -30,6 +33,7 @@ static void ahci_host_stop(struct ata_host *host); - enum ahci_type { - AHCI, /* standard platform ahci */ - IMX53_AHCI, /* ahci on i.mx53 */ -+ IMX6Q_AHCI, /* ahci on i.mx6q */ - STRICT_AHCI, /* delayed DMA engine start */ - }; - -@@ -41,6 +45,9 @@ static struct platform_device_id ahci_devtype[] = { - .name = "imx53-ahci", - .driver_data = IMX53_AHCI, - }, { -+ .name = "imx6q-ahci", -+ .driver_data = IMX53_AHCI, -+ }, { - .name = "strict-ahci", - .driver_data = STRICT_AHCI, - }, { -@@ -86,12 +93,24 @@ static struct scsi_host_template ahci_platform_sht = { - AHCI_SHT("ahci_platform"), - }; - -+static const struct of_device_id ahci_of_match[] = { -+ { .compatible = "calxeda,hb-ahci", .data = &ahci_devtype[AHCI],}, -+ { .compatible = "fsl,imx6q-ahci", .data = &ahci_devtype[IMX6Q_AHCI],}, -+ { .compatible = "snps,spear-ahci", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ahci_of_match); -+ - static int ahci_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; - struct ahci_platform_data *pdata = dev_get_platdata(dev); -+ const struct of_device_id *of_id = -+ of_match_device(ahci_of_match, &pdev->dev); -+ const struct platform_device_id *id_entry = of_id->data; - const struct platform_device_id *id = platform_get_device_id(pdev); -- struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0]; -+ struct ata_port_info pi = ahci_port_info[id ? id->driver_data : \ -+ id_entry->driver_data]; - const struct ata_port_info *ppi[] = { &pi, NULL }; - struct ahci_host_priv *hpriv; - struct ata_host *host; -@@ -325,12 +344,6 @@ disable_unprepare_clk: - - static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume); - --static const struct of_device_id ahci_of_match[] = { -- { .compatible = "snps,spear-ahci", }, -- {}, --}; --MODULE_DEVICE_TABLE(of, ahci_of_match); -- - static struct platform_driver ahci_driver = { - .probe = ahci_probe, - .remove = ata_platform_remove_one, --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch b/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch deleted file mode 100644 index 1b96d8c..0000000 --- a/src/patches/kernel/wandboard/imx/0006-imx-Add-IMX53-AHCI-support.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 41cc1967181a833c3c5af30682ea85dd01c28ff4 Mon Sep 17 00:00:00 2001 -From: Robert Nelson robertcnelson@gmail.com -Date: Tue, 22 Jan 2013 22:21:03 -0600 -Subject: [PATCH 3/5] imx: Add IMX53 AHCI support - -Adds ahci_platform bits to make AHCI work on mx53 qsb board. - -Signed-off-by: Robert Nelson robertcnelson@gmail.com ---- - -diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c -index d324cdf..b01eeca 100644 ---- a/drivers/ata/ahci_platform.c -+++ b/drivers/ata/ahci_platform.c -@@ -95,6 +95,7 @@ static struct scsi_host_template ahci_platform_sht = { - - static const struct of_device_id ahci_of_match[] = { - { .compatible = "calxeda,hb-ahci", .data = &ahci_devtype[AHCI],}, -+ { .compatible = "fsl,imx53-ahci", .data = &ahci_devtype[IMX53_AHCI],}, - { .compatible = "fsl,imx6q-ahci", .data = &ahci_devtype[IMX6Q_AHCI],}, - { .compatible = "snps,spear-ahci", }, - {}, --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch b/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch deleted file mode 100644 index d85e3ff..0000000 --- a/src/patches/kernel/wandboard/imx/0007-imx6-enable-sata-clk-if-SATA_AHCI_PLATFORM.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 765561c8c72a46c2177b20d730e061ab2ff8f970 Mon Sep 17 00:00:00 2001 -From: Paolo Pisati paolo.pisati@canonical.com -Date: Thu, 31 Jan 2013 18:33:46 +0100 -Subject: [PATCH 4/5] SAUCE: imx6: enable sata clk if SATA_AHCI_PLATFORM - -Clock modifications in 24d340ac "ARM i.MX6: Fix ethernet PLL clocks" broke the -SATA clk, fix it. - -More info: http://www.spinics.net/lists/arm-kernel/msg221503.html - -Original-code-from: Shawn Guo shawn.guo@linaro.org -Signed-off-by: Paolo Pisati paolo.pisati@canonical.com ---- - arch/arm/mach-imx/clk-imx6q.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c -index 4e3148c..38d707a 100644 ---- a/arch/arm/mach-imx/clk-imx6q.c -+++ b/arch/arm/mach-imx/clk-imx6q.c -@@ -568,6 +568,9 @@ int __init mx6q_clocks_init(void) - clk_prepare_enable(clk[usbphy2_gate]); - } - -+ if (IS_ENABLED(CONFIG_SATA_AHCI_PLATFORM)) -+ clk_prepare_enable(clk[sata_ref_100m]); -+ - /* Set initial power mode */ - imx6q_set_lpm(WAIT_CLOCKED); - --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch b/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch deleted file mode 100644 index 6f6ea69..0000000 --- a/src/patches/kernel/wandboard/imx/0008-ARM-imx6q-update-the-sata-bits-definitions-of-gpr13.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 371863a788db77e6092d69df17d8884cb0d94270 Mon Sep 17 00:00:00 2001 -From: Richard Zhu r65037@freescale.com -Date: Wed, 24 Jul 2013 06:15:28 +0000 -Subject: [PATCH 1/2] ARM: imx6q: update the sata bits definitions of gpr13 - -Replace the SATA_PHY_# by the more readable definitons. - -tj: Being routed through libata branch to enable implementation of - ahci_imx. - -Signed-off-by: Richard Zhu r65037@freescale.com -Acked-by: Shawn Guo shawn.guo@linaro.org -Signed-off-by: Tejun Heo tj@kernel.org ---- - include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 121 +++++++++++++++++++-------- - 1 file changed, 84 insertions(+), 37 deletions(-) - -diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -index b1521e8..b6bdcd6 100644 ---- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -@@ -279,41 +279,88 @@ - #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) - #define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28) - #define IMX6Q_GPR13_ENET_STOP_REQ BIT(27) --#define IMX6Q_GPR13_SATA_PHY_8_MASK (0x7 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_0_5_DB (0x0 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_1_0_DB (0x1 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_1_5_DB (0x2 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_2_0_DB (0x3 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_2_5_DB (0x4 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_3_0_DB (0x5 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_3_5_DB (0x6 << 24) --#define IMX6Q_GPR13_SATA_PHY_8_4_0_DB (0x7 << 24) --#define IMX6Q_GPR13_SATA_PHY_7_MASK (0x1f << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA1I (0x10 << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA1M (0x10 << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA1X (0x1a << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA2I (0x12 << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA2M (0x12 << 19) --#define IMX6Q_GPR13_SATA_PHY_7_SATA2X (0x1a << 19) --#define IMX6Q_GPR13_SATA_PHY_6_MASK (0x7 << 16) --#define IMX6Q_GPR13_SATA_SPEED_MASK BIT(15) --#define IMX6Q_GPR13_SATA_SPEED_1P5G 0x0 --#define IMX6Q_GPR13_SATA_SPEED_3P0G BIT(15) --#define IMX6Q_GPR13_SATA_PHY_5 BIT(14) --#define IMX6Q_GPR13_SATA_PHY_4_MASK (0x7 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_16_16 (0x0 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_14_16 (0x1 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_12_16 (0x2 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_10_16 (0x3 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_9_16 (0x4 << 11) --#define IMX6Q_GPR13_SATA_PHY_4_8_16 (0x5 << 11) --#define IMX6Q_GPR13_SATA_PHY_3_MASK (0xf << 7) --#define IMX6Q_GPR13_SATA_PHY_3_OFF 0x7 --#define IMX6Q_GPR13_SATA_PHY_2_MASK (0x1f << 2) --#define IMX6Q_GPR13_SATA_PHY_2_OFF 0x2 --#define IMX6Q_GPR13_SATA_PHY_1_MASK (0x3 << 0) --#define IMX6Q_GPR13_SATA_PHY_1_FAST (0x0 << 0) --#define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0) --#define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0) -- -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK (0x7 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_0_5_DB (0x0 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_0_DB (0x1 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_1_5_DB (0x2 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_0_DB (0x3 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_2_5_DB (0x4 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB (0x5 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_3_5_DB (0x6 << 24) -+#define IMX6Q_GPR13_SATA_RX_EQ_VAL_4_0_DB (0x7 << 24) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK (0x1f << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1I (0x10 << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1M (0x10 << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA1X (0x1a << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2I (0x12 << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M (0x12 << 19) -+#define IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2X (0x1a << 19) -+#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK (0x7 << 16) -+#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_1F (0x0 << 16) -+#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_2F (0x1 << 16) -+#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_1P_4F (0x2 << 16) -+#define IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F (0x3 << 16) -+#define IMX6Q_GPR13_SATA_SPD_MODE_MASK BIT(15) -+#define IMX6Q_GPR13_SATA_SPD_MODE_1P5G 0x0 -+#define IMX6Q_GPR13_SATA_SPD_MODE_3P0G BIT(15) -+#define IMX6Q_GPR13_SATA_MPLL_SS_EN BIT(14) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_MASK (0x7 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_16_16 (0x0 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_14_16 (0x1 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_12_16 (0x2 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_10_16 (0x3 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_9_16 (0x4 << 11) -+#define IMX6Q_GPR13_SATA_TX_ATTEN_8_16 (0x5 << 11) -+#define IMX6Q_GPR13_SATA_TX_BOOST_MASK (0xf << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_0_00_DB (0x0 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_0_37_DB (0x1 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_0_74_DB (0x2 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_1_11_DB (0x3 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_1_48_DB (0x4 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_1_85_DB (0x5 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_2_22_DB (0x6 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_2_59_DB (0x7 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_2_96_DB (0x8 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB (0x9 << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_3_70_DB (0xa << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_4_07_DB (0xb << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_4_44_DB (0xc << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_4_81_DB (0xd << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_5_28_DB (0xe << 7) -+#define IMX6Q_GPR13_SATA_TX_BOOST_5_75_DB (0xf << 7) -+#define IMX6Q_GPR13_SATA_TX_LVL_MASK (0x1f << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_937_V (0x00 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_947_V (0x01 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_957_V (0x02 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_966_V (0x03 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_976_V (0x04 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_986_V (0x05 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_0_996_V (0x06 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_005_V (0x07 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_015_V (0x08 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_025_V (0x09 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_035_V (0x0a << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_045_V (0x0b << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_054_V (0x0c << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_064_V (0x0d << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_074_V (0x0e << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_084_V (0x0f << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_094_V (0x10 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_104_V (0x11 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_113_V (0x12 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_123_V (0x13 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_133_V (0x14 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_143_V (0x15 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_152_V (0x16 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_162_V (0x17 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_172_V (0x18 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_182_V (0x19 << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_191_V (0x1a << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_201_V (0x1b << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_211_V (0x1c << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_221_V (0x1d << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_230_V (0x1e << 2) -+#define IMX6Q_GPR13_SATA_TX_LVL_1_240_V (0x1f << 2) -+#define IMX6Q_GPR13_SATA_MPLL_CLK_EN BIT(1) -+#define IMX6Q_GPR13_SATA_TX_EDGE_RATE BIT(0) - #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch b/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch deleted file mode 100644 index 758476a..0000000 --- a/src/patches/kernel/wandboard/imx/0009-ahci_imx-add-ahci-sata-support-on-imx-platforms.patch +++ /dev/null @@ -1,316 +0,0 @@ -From 093f4fdd74f29031d79be747c65b95fb16601a92 Mon Sep 17 00:00:00 2001 -From: Richard Zhu r65037@freescale.com -Date: Wed, 24 Jul 2013 06:15:29 +0000 -Subject: [PATCH 2/2] ahci_imx: add ahci sata support on imx platforms - -imx6q contains one Synopsys AHCI SATA controller, But it can't share -ahci_platform driver with other controllers because there are some -misalignments of the generic AHCI controller - the bits definitions of -the HBA registers, the Vendor Specific registers, the AHCI PHY clock -and the AHCI signals adjustment window(GPR13 register). - - - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', - should be configured to be '1' - - - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL - should be set to be '1'.(default 0) - - - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be - configured regarding to the frequency of AHB bus clock. - - - Configurations of the AHCI PHY clock, and the signal parameters of - the GPR13 - -Setup its own ahci sata driver, contained the imx6q specific -initialized codes, re-use the generic ahci_platform driver, and keep -the generic ahci_platform driver clean as much as possible. - -tj: patch description reformatted - -Signed-off-by: Richard Zhu r65037@freescale.com -Reviewed-by: Shawn Guo shawn.guo@linaro.org -Signed-off-by: Tejun Heo tj@kernel.org ---- - drivers/ata/Kconfig | 9 ++ - drivers/ata/Makefile | 1 + - drivers/ata/ahci_imx.c | 236 ++++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 246 insertions(+) - create mode 100644 drivers/ata/ahci_imx.c - -diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig -index 80dc988..cbf7a16 100644 ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -97,6 +97,15 @@ config SATA_AHCI_PLATFORM - - If unsure, say N. - -+config AHCI_IMX -+ tristate "Freescale i.MX AHCI SATA support" -+ depends on SATA_AHCI_PLATFORM -+ help -+ This option enables support for the Freescale i.MX SoC's -+ onboard AHCI SATA. -+ -+ If unsure, say N. -+ - config SATA_FSL - tristate "Freescale 3.0Gbps SATA support" - depends on FSL_SOC -diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile -index c04d0fd..46518c6 100644 ---- a/drivers/ata/Makefile -+++ b/drivers/ata/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o - obj-$(CONFIG_SATA_SIL24) += sata_sil24.o - obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o - obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o -+obj-$(CONFIG_AHCI_IMX) += ahci_imx.o - - # SFF w/ custom DMA - obj-$(CONFIG_PDC_ADMA) += pdc_adma.o -diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c -new file mode 100644 -index 0000000..58debb0 ---- /dev/null -+++ b/drivers/ata/ahci_imx.c -@@ -0,0 +1,236 @@ -+/* -+ * Freescale IMX AHCI SATA platform driver -+ * Copyright 2013 Freescale Semiconductor, Inc. -+ * -+ * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms and conditions of the GNU General Public License, -+ * version 2, as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see http://www.gnu.org/licenses/. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/regmap.h> -+#include <linux/ahci_platform.h> -+#include <linux/of_device.h> -+#include <linux/mfd/syscon.h> -+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> -+#include "ahci.h" -+ -+enum { -+ HOST_TIMER1MS = 0xe0, /* Timer 1-ms */ -+}; -+ -+struct imx_ahci_priv { -+ struct platform_device *ahci_pdev; -+ struct clk *sata_ref_clk; -+ struct clk *ahb_clk; -+ struct regmap *gpr; -+}; -+ -+static int imx6q_sata_init(struct device *dev, void __iomem *mmio) -+{ -+ int ret = 0; -+ unsigned int reg_val; -+ struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent); -+ -+ imxpriv->gpr = -+ syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); -+ if (IS_ERR(imxpriv->gpr)) { -+ dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n"); -+ return PTR_ERR(imxpriv->gpr); -+ } -+ -+ ret = clk_prepare_enable(imxpriv->sata_ref_clk); -+ if (ret < 0) { -+ dev_err(dev, "prepare-enable sata_ref clock err:%d\n", ret); -+ return ret; -+ } -+ -+ /* -+ * set PHY Paremeters, two steps to configure the GPR13, -+ * one write for rest of parameters, mask of first write -+ * is 0x07fffffd, and the other one write for setting -+ * the mpll_clk_en. -+ */ -+ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK -+ | IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK -+ | IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK -+ | IMX6Q_GPR13_SATA_SPD_MODE_MASK -+ | IMX6Q_GPR13_SATA_MPLL_SS_EN -+ | IMX6Q_GPR13_SATA_TX_ATTEN_MASK -+ | IMX6Q_GPR13_SATA_TX_BOOST_MASK -+ | IMX6Q_GPR13_SATA_TX_LVL_MASK -+ | IMX6Q_GPR13_SATA_TX_EDGE_RATE -+ , IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB -+ | IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M -+ | IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F -+ | IMX6Q_GPR13_SATA_SPD_MODE_3P0G -+ | IMX6Q_GPR13_SATA_MPLL_SS_EN -+ | IMX6Q_GPR13_SATA_TX_ATTEN_9_16 -+ | IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB -+ | IMX6Q_GPR13_SATA_TX_LVL_1_025_V); -+ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN, -+ IMX6Q_GPR13_SATA_MPLL_CLK_EN); -+ usleep_range(100, 200); -+ -+ /* -+ * Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL, -+ * and IP vendor specific register HOST_TIMER1MS. -+ * Configure CAP_SSS (support stagered spin up). -+ * Implement the port0. -+ * Get the ahb clock rate, and configure the TIMER1MS register. -+ */ -+ reg_val = readl(mmio + HOST_CAP); -+ if (!(reg_val & HOST_CAP_SSS)) { -+ reg_val |= HOST_CAP_SSS; -+ writel(reg_val, mmio + HOST_CAP); -+ } -+ reg_val = readl(mmio + HOST_PORTS_IMPL); -+ if (!(reg_val & 0x1)) { -+ reg_val |= 0x1; -+ writel(reg_val, mmio + HOST_PORTS_IMPL); -+ } -+ -+ reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000; -+ writel(reg_val, mmio + HOST_TIMER1MS); -+ -+ return 0; -+} -+ -+static void imx6q_sata_exit(struct device *dev) -+{ -+ struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent); -+ -+ regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN, -+ !IMX6Q_GPR13_SATA_MPLL_CLK_EN); -+ clk_disable_unprepare(imxpriv->sata_ref_clk); -+} -+ -+static struct ahci_platform_data imx6q_sata_pdata = { -+ .init = imx6q_sata_init, -+ .exit = imx6q_sata_exit, -+}; -+ -+static const struct of_device_id imx_ahci_of_match[] = { -+ { .compatible = "fsl,imx6q-ahci", .data = &imx6q_sata_pdata}, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, imx_ahci_of_match); -+ -+static int imx_ahci_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct resource *mem, *irq, res[2]; -+ const struct of_device_id *of_id; -+ const struct ahci_platform_data *pdata = NULL; -+ struct imx_ahci_priv *imxpriv; -+ struct device *ahci_dev; -+ struct platform_device *ahci_pdev; -+ int ret; -+ -+ imxpriv = devm_kzalloc(dev, sizeof(*imxpriv), GFP_KERNEL); -+ if (!imxpriv) { -+ dev_err(dev, "can't alloc ahci_host_priv\n"); -+ return -ENOMEM; -+ } -+ -+ ahci_pdev = platform_device_alloc("ahci", -1); -+ if (!ahci_pdev) -+ return -ENODEV; -+ -+ ahci_dev = &ahci_pdev->dev; -+ ahci_dev->parent = dev; -+ -+ imxpriv->ahb_clk = devm_clk_get(dev, "ahb"); -+ if (IS_ERR(imxpriv->ahb_clk)) { -+ dev_err(dev, "can't get ahb clock.\n"); -+ ret = PTR_ERR(imxpriv->ahb_clk); -+ goto err_out; -+ } -+ -+ imxpriv->sata_ref_clk = devm_clk_get(dev, "sata_ref"); -+ if (IS_ERR(imxpriv->sata_ref_clk)) { -+ dev_err(dev, "can't get sata_ref clock.\n"); -+ ret = PTR_ERR(imxpriv->sata_ref_clk); -+ goto err_out; -+ } -+ -+ imxpriv->ahci_pdev = ahci_pdev; -+ platform_set_drvdata(pdev, imxpriv); -+ -+ of_id = of_match_device(imx_ahci_of_match, dev); -+ if (of_id) { -+ pdata = of_id->data; -+ } else { -+ ret = -EINVAL; -+ goto err_out; -+ } -+ -+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); -+ if (!mem || !irq) { -+ dev_err(dev, "no mmio/irq resource\n"); -+ ret = -ENOMEM; -+ goto err_out; -+ } -+ -+ res[0] = *mem; -+ res[1] = *irq; -+ -+ ahci_dev->coherent_dma_mask = DMA_BIT_MASK(32); -+ ahci_dev->dma_mask = &ahci_dev->coherent_dma_mask; -+ ahci_dev->of_node = dev->of_node; -+ -+ ret = platform_device_add_resources(ahci_pdev, res, 2); -+ if (ret) -+ goto err_out; -+ -+ ret = platform_device_add_data(ahci_pdev, pdata, sizeof(*pdata)); -+ if (ret) -+ goto err_out; -+ -+ ret = platform_device_add(ahci_pdev); -+ if (ret) { -+err_out: -+ platform_device_put(ahci_pdev); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int imx_ahci_remove(struct platform_device *pdev) -+{ -+ struct imx_ahci_priv *imxpriv = platform_get_drvdata(pdev); -+ struct platform_device *ahci_pdev = imxpriv->ahci_pdev; -+ -+ platform_device_unregister(ahci_pdev); -+ return 0; -+} -+ -+static struct platform_driver imx_ahci_driver = { -+ .probe = imx_ahci_probe, -+ .remove = imx_ahci_remove, -+ .driver = { -+ .name = "ahci-imx", -+ .owner = THIS_MODULE, -+ .of_match_table = imx_ahci_of_match, -+ }, -+}; -+module_platform_driver(imx_ahci_driver); -+ -+MODULE_DESCRIPTION("Freescale i.MX AHCI SATA platform driver"); -+MODULE_AUTHOR("Richard Zhu Hong-Xing.Zhu@freescale.com"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ahci:imx"); --- -1.7.10.4 - diff --git a/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch b/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch deleted file mode 100644 index 86e7d8f..0000000 --- a/src/patches/kernel/wandboard/imx/0010-ahci_imx-depend-on-CONFIG_MFD_SYSCON.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Tejun Heo tj@kernel.org -Subject: [PATCH] ahci_imx: depend on CONFIG_MFD_SYSCON - -ahci_imx makes use of regmap but the dependency wasn't specified in -Kconfig leading build failures if CONFIG_AHCI_IMX is enabled but -CONFIG_MFD_SYSCON is not. Add the Kconfig dependency. - -Signed-off-by: Tejun Heo tj@kernel.org -Reported-by: Stephen Rothwell sfr@canb.auug.org.au ---- - drivers/ata/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -99,7 +99,7 @@ config SATA_AHCI_PLATFORM - - config AHCI_IMX - tristate "Freescale i.MX AHCI SATA support" -- depends on SATA_AHCI_PLATFORM -+ depends on SATA_AHCI_PLATFORM && MFD_SYSCON - help - This option enables support for the Freescale i.MX SoC's - onboard AHCI SATA. diff --git a/src/patches/kernel/wandboard/imx/0011-add-pcie-designware.patch b/src/patches/kernel/wandboard/imx/0011-add-pcie-designware.patch deleted file mode 100644 index 3d865d3..0000000 --- a/src/patches/kernel/wandboard/imx/0011-add-pcie-designware.patch +++ /dev/null @@ -1,636 +0,0 @@ ---- /dev/null 2013-12-09 21:30:35.000000000 +0000 -+++ drivers/pci/host/pcie-designware.h 2013-09-20 01:59:32.000000000 +0000 -@@ -0,0 +1,65 @@ -+/* -+ * Synopsys Designware PCIe host controller driver -+ * -+ * Copyright (C) 2013 Samsung Electronics Co., Ltd. -+ * http://www.samsung.com -+ * -+ * Author: Jingoo Han jg1.han@samsung.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+struct pcie_port_info { -+ u32 cfg0_size; -+ u32 cfg1_size; -+ u32 io_size; -+ u32 mem_size; -+ phys_addr_t io_bus_addr; -+ phys_addr_t mem_bus_addr; -+}; -+ -+struct pcie_port { -+ struct device *dev; -+ u8 root_bus_nr; -+ void __iomem *dbi_base; -+ u64 cfg0_base; -+ void __iomem *va_cfg0_base; -+ u64 cfg1_base; -+ void __iomem *va_cfg1_base; -+ u64 io_base; -+ u64 mem_base; -+ spinlock_t conf_lock; -+ struct resource cfg; -+ struct resource io; -+ struct resource mem; -+ struct pcie_port_info config; -+ int irq; -+ u32 lanes; -+ struct pcie_host_ops *ops; -+}; -+ -+struct pcie_host_ops { -+ void (*readl_rc)(struct pcie_port *pp, -+ void __iomem *dbi_base, u32 *val); -+ void (*writel_rc)(struct pcie_port *pp, -+ u32 val, void __iomem *dbi_base); -+ int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val); -+ int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val); -+ int (*link_up)(struct pcie_port *pp); -+ void (*host_init)(struct pcie_port *pp); -+}; -+ -+extern unsigned long global_io_offset; -+ -+int cfg_read(void __iomem *addr, int where, int size, u32 *val); -+int cfg_write(void __iomem *addr, int where, int size, u32 val); -+int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, u32 val); -+int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, u32 *val); -+int dw_pcie_link_up(struct pcie_port *pp); -+void dw_pcie_setup_rc(struct pcie_port *pp); -+int dw_pcie_host_init(struct pcie_port *pp); -+int dw_pcie_setup(int nr, struct pci_sys_data *sys); -+struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys); -+int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); ---- /dev/null 2013-12-09 21:30:35.000000000 +0000 -+++ drivers/pci/host/pcie-designware.c 2013-09-20 01:59:32.000000000 +0000 -@@ -0,0 +1,565 @@ -+/* -+ * Synopsys Designware PCIe host controller driver -+ * -+ * Copyright (C) 2013 Samsung Electronics Co., Ltd. -+ * http://www.samsung.com -+ * -+ * Author: Jingoo Han jg1.han@samsung.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/of_address.h> -+#include <linux/pci.h> -+#include <linux/pci_regs.h> -+#include <linux/types.h> -+ -+#include "pcie-designware.h" -+ -+/* Synopsis specific PCIE configuration registers */ -+#define PCIE_PORT_LINK_CONTROL 0x710 -+#define PORT_LINK_MODE_MASK (0x3f << 16) -+#define PORT_LINK_MODE_1_LANES (0x1 << 16) -+#define PORT_LINK_MODE_2_LANES (0x3 << 16) -+#define PORT_LINK_MODE_4_LANES (0x7 << 16) -+ -+#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C -+#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17) -+#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8) -+#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8) -+#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8) -+#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8) -+ -+#define PCIE_MSI_ADDR_LO 0x820 -+#define PCIE_MSI_ADDR_HI 0x824 -+#define PCIE_MSI_INTR0_ENABLE 0x828 -+#define PCIE_MSI_INTR0_MASK 0x82C -+#define PCIE_MSI_INTR0_STATUS 0x830 -+ -+#define PCIE_ATU_VIEWPORT 0x900 -+#define PCIE_ATU_REGION_INBOUND (0x1 << 31) -+#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31) -+#define PCIE_ATU_REGION_INDEX1 (0x1 << 0) -+#define PCIE_ATU_REGION_INDEX0 (0x0 << 0) -+#define PCIE_ATU_CR1 0x904 -+#define PCIE_ATU_TYPE_MEM (0x0 << 0) -+#define PCIE_ATU_TYPE_IO (0x2 << 0) -+#define PCIE_ATU_TYPE_CFG0 (0x4 << 0) -+#define PCIE_ATU_TYPE_CFG1 (0x5 << 0) -+#define PCIE_ATU_CR2 0x908 -+#define PCIE_ATU_ENABLE (0x1 << 31) -+#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30) -+#define PCIE_ATU_LOWER_BASE 0x90C -+#define PCIE_ATU_UPPER_BASE 0x910 -+#define PCIE_ATU_LIMIT 0x914 -+#define PCIE_ATU_LOWER_TARGET 0x918 -+#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24) -+#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19) -+#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16) -+#define PCIE_ATU_UPPER_TARGET 0x91C -+ -+static struct hw_pci dw_pci; -+ -+unsigned long global_io_offset; -+ -+static inline struct pcie_port *sys_to_pcie(struct pci_sys_data *sys) -+{ -+ return sys->private_data; -+} -+ -+int cfg_read(void __iomem *addr, int where, int size, u32 *val) -+{ -+ *val = readl(addr); -+ -+ if (size == 1) -+ *val = (*val >> (8 * (where & 3))) & 0xff; -+ else if (size == 2) -+ *val = (*val >> (8 * (where & 3))) & 0xffff; -+ else if (size != 4) -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+int cfg_write(void __iomem *addr, int where, int size, u32 val) -+{ -+ if (size == 4) -+ writel(val, addr); -+ else if (size == 2) -+ writew(val, addr + (where & 2)); -+ else if (size == 1) -+ writeb(val, addr + (where & 3)); -+ else -+ return PCIBIOS_BAD_REGISTER_NUMBER; -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static inline void dw_pcie_readl_rc(struct pcie_port *pp, u32 reg, u32 *val) -+{ -+ if (pp->ops->readl_rc) -+ pp->ops->readl_rc(pp, pp->dbi_base + reg, val); -+ else -+ *val = readl(pp->dbi_base + reg); -+} -+ -+static inline void dw_pcie_writel_rc(struct pcie_port *pp, u32 val, u32 reg) -+{ -+ if (pp->ops->writel_rc) -+ pp->ops->writel_rc(pp, val, pp->dbi_base + reg); -+ else -+ writel(val, pp->dbi_base + reg); -+} -+ -+int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, -+ u32 *val) -+{ -+ int ret; -+ -+ if (pp->ops->rd_own_conf) -+ ret = pp->ops->rd_own_conf(pp, where, size, val); -+ else -+ ret = cfg_read(pp->dbi_base + (where & ~0x3), where, size, val); -+ -+ return ret; -+} -+ -+int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, -+ u32 val) -+{ -+ int ret; -+ -+ if (pp->ops->wr_own_conf) -+ ret = pp->ops->wr_own_conf(pp, where, size, val); -+ else -+ ret = cfg_write(pp->dbi_base + (where & ~0x3), where, size, -+ val); -+ -+ return ret; -+} -+ -+int dw_pcie_link_up(struct pcie_port *pp) -+{ -+ if (pp->ops->link_up) -+ return pp->ops->link_up(pp); -+ else -+ return 0; -+} -+ -+int __init dw_pcie_host_init(struct pcie_port *pp) -+{ -+ struct device_node *np = pp->dev->of_node; -+ struct of_pci_range range; -+ struct of_pci_range_parser parser; -+ u32 val; -+ -+ if (of_pci_range_parser_init(&parser, np)) { -+ dev_err(pp->dev, "missing ranges property\n"); -+ return -EINVAL; -+ } -+ -+ /* Get the I/O and memory ranges from DT */ -+ for_each_of_pci_range(&parser, &range) { -+ unsigned long restype = range.flags & IORESOURCE_TYPE_BITS; -+ if (restype == IORESOURCE_IO) { -+ of_pci_range_to_resource(&range, np, &pp->io); -+ pp->io.name = "I/O"; -+ pp->io.start = max_t(resource_size_t, -+ PCIBIOS_MIN_IO, -+ range.pci_addr + global_io_offset); -+ pp->io.end = min_t(resource_size_t, -+ IO_SPACE_LIMIT, -+ range.pci_addr + range.size -+ + global_io_offset); -+ pp->config.io_size = resource_size(&pp->io); -+ pp->config.io_bus_addr = range.pci_addr; -+ } -+ if (restype == IORESOURCE_MEM) { -+ of_pci_range_to_resource(&range, np, &pp->mem); -+ pp->mem.name = "MEM"; -+ pp->config.mem_size = resource_size(&pp->mem); -+ pp->config.mem_bus_addr = range.pci_addr; -+ } -+ if (restype == 0) { -+ of_pci_range_to_resource(&range, np, &pp->cfg); -+ pp->config.cfg0_size = resource_size(&pp->cfg)/2; -+ pp->config.cfg1_size = resource_size(&pp->cfg)/2; -+ } -+ } -+ -+ if (!pp->dbi_base) { -+ pp->dbi_base = devm_ioremap(pp->dev, pp->cfg.start, -+ resource_size(&pp->cfg)); -+ if (!pp->dbi_base) { -+ dev_err(pp->dev, "error with ioremap\n"); -+ return -ENOMEM; -+ } -+ } -+ -+ pp->cfg0_base = pp->cfg.start; -+ pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size; -+ pp->io_base = pp->io.start; -+ pp->mem_base = pp->mem.start; -+ -+ pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base, -+ pp->config.cfg0_size); -+ if (!pp->va_cfg0_base) { -+ dev_err(pp->dev, "error with ioremap in function\n"); -+ return -ENOMEM; -+ } -+ pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base, -+ pp->config.cfg1_size); -+ if (!pp->va_cfg1_base) { -+ dev_err(pp->dev, "error with ioremap\n"); -+ return -ENOMEM; -+ } -+ -+ if (of_property_read_u32(np, "num-lanes", &pp->lanes)) { -+ dev_err(pp->dev, "Failed to parse the number of lanes\n"); -+ return -EINVAL; -+ } -+ -+ if (pp->ops->host_init) -+ pp->ops->host_init(pp); -+ -+ dw_pcie_wr_own_conf(pp, PCI_BASE_ADDRESS_0, 4, 0); -+ -+ /* program correct class for RC */ -+ dw_pcie_wr_own_conf(pp, PCI_CLASS_DEVICE, 2, PCI_CLASS_BRIDGE_PCI); -+ -+ dw_pcie_rd_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, &val); -+ val |= PORT_LOGIC_SPEED_CHANGE; -+ dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); -+ -+ dw_pci.nr_controllers = 1; -+ dw_pci.private_data = (void **)&pp; -+ -+ pci_common_init(&dw_pci); -+ pci_assign_unassigned_resources(); -+#ifdef CONFIG_PCI_DOMAINS -+ dw_pci.domain++; -+#endif -+ -+ return 0; -+} -+ -+static void dw_pcie_prog_viewport_cfg0(struct pcie_port *pp, u32 busdev) -+{ -+ /* Program viewport 0 : OUTBOUND : CFG0 */ -+ dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, -+ PCIE_ATU_VIEWPORT); -+ dw_pcie_writel_rc(pp, pp->cfg0_base, PCIE_ATU_LOWER_BASE); -+ dw_pcie_writel_rc(pp, (pp->cfg0_base >> 32), PCIE_ATU_UPPER_BASE); -+ dw_pcie_writel_rc(pp, pp->cfg0_base + pp->config.cfg0_size - 1, -+ PCIE_ATU_LIMIT); -+ dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); -+ dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); -+ dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG0, PCIE_ATU_CR1); -+ dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); -+} -+ -+static void dw_pcie_prog_viewport_cfg1(struct pcie_port *pp, u32 busdev) -+{ -+ /* Program viewport 1 : OUTBOUND : CFG1 */ -+ dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, -+ PCIE_ATU_VIEWPORT); -+ dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1); -+ dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); -+ dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE); -+ dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE); -+ dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1, -+ PCIE_ATU_LIMIT); -+ dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); -+ dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); -+} -+ -+static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp) -+{ -+ /* Program viewport 0 : OUTBOUND : MEM */ -+ dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, -+ PCIE_ATU_VIEWPORT); -+ dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1); -+ dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); -+ dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE); -+ dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE); -+ dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1, -+ PCIE_ATU_LIMIT); -+ dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET); -+ dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr), -+ PCIE_ATU_UPPER_TARGET); -+} -+ -+static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp) -+{ -+ /* Program viewport 1 : OUTBOUND : IO */ -+ dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, -+ PCIE_ATU_VIEWPORT); -+ dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1); -+ dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); -+ dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE); -+ dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE); -+ dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1, -+ PCIE_ATU_LIMIT); -+ dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET); -+ dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr), -+ PCIE_ATU_UPPER_TARGET); -+} -+ -+static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, -+ u32 devfn, int where, int size, u32 *val) -+{ -+ int ret = PCIBIOS_SUCCESSFUL; -+ u32 address, busdev; -+ -+ busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | -+ PCIE_ATU_FUNC(PCI_FUNC(devfn)); -+ address = where & ~0x3; -+ -+ if (bus->parent->number == pp->root_bus_nr) { -+ dw_pcie_prog_viewport_cfg0(pp, busdev); -+ ret = cfg_read(pp->va_cfg0_base + address, where, size, val); -+ dw_pcie_prog_viewport_mem_outbound(pp); -+ } else { -+ dw_pcie_prog_viewport_cfg1(pp, busdev); -+ ret = cfg_read(pp->va_cfg1_base + address, where, size, val); -+ dw_pcie_prog_viewport_io_outbound(pp); -+ } -+ -+ return ret; -+} -+ -+static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, -+ u32 devfn, int where, int size, u32 val) -+{ -+ int ret = PCIBIOS_SUCCESSFUL; -+ u32 address, busdev; -+ -+ busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | -+ PCIE_ATU_FUNC(PCI_FUNC(devfn)); -+ address = where & ~0x3; -+ -+ if (bus->parent->number == pp->root_bus_nr) { -+ dw_pcie_prog_viewport_cfg0(pp, busdev); -+ ret = cfg_write(pp->va_cfg0_base + address, where, size, val); -+ dw_pcie_prog_viewport_mem_outbound(pp); -+ } else { -+ dw_pcie_prog_viewport_cfg1(pp, busdev); -+ ret = cfg_write(pp->va_cfg1_base + address, where, size, val); -+ dw_pcie_prog_viewport_io_outbound(pp); -+ } -+ -+ return ret; -+} -+ -+ -+static int dw_pcie_valid_config(struct pcie_port *pp, -+ struct pci_bus *bus, int dev) -+{ -+ /* If there is no link, then there is no device */ -+ if (bus->number != pp->root_bus_nr) { -+ if (!dw_pcie_link_up(pp)) -+ return 0; -+ } -+ -+ /* access only one slot on each root port */ -+ if (bus->number == pp->root_bus_nr && dev > 0) -+ return 0; -+ -+ /* -+ * do not read more than one device on the bus directly attached -+ * to RC's (Virtual Bridge's) DS side. -+ */ -+ if (bus->primary == pp->root_bus_nr && dev > 0) -+ return 0; -+ -+ return 1; -+} -+ -+static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, -+ int size, u32 *val) -+{ -+ struct pcie_port *pp = sys_to_pcie(bus->sysdata); -+ unsigned long flags; -+ int ret; -+ -+ if (!pp) { -+ BUG(); -+ return -EINVAL; -+ } -+ -+ if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) { -+ *val = 0xffffffff; -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ } -+ -+ spin_lock_irqsave(&pp->conf_lock, flags); -+ if (bus->number != pp->root_bus_nr) -+ ret = dw_pcie_rd_other_conf(pp, bus, devfn, -+ where, size, val); -+ else -+ ret = dw_pcie_rd_own_conf(pp, where, size, val); -+ spin_unlock_irqrestore(&pp->conf_lock, flags); -+ -+ return ret; -+} -+ -+static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, -+ int where, int size, u32 val) -+{ -+ struct pcie_port *pp = sys_to_pcie(bus->sysdata); -+ unsigned long flags; -+ int ret; -+ -+ if (!pp) { -+ BUG(); -+ return -EINVAL; -+ } -+ -+ if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ spin_lock_irqsave(&pp->conf_lock, flags); -+ if (bus->number != pp->root_bus_nr) -+ ret = dw_pcie_wr_other_conf(pp, bus, devfn, -+ where, size, val); -+ else -+ ret = dw_pcie_wr_own_conf(pp, where, size, val); -+ spin_unlock_irqrestore(&pp->conf_lock, flags); -+ -+ return ret; -+} -+ -+static struct pci_ops dw_pcie_ops = { -+ .read = dw_pcie_rd_conf, -+ .write = dw_pcie_wr_conf, -+}; -+ -+int dw_pcie_setup(int nr, struct pci_sys_data *sys) -+{ -+ struct pcie_port *pp; -+ -+ pp = sys_to_pcie(sys); -+ -+ if (!pp) -+ return 0; -+ -+ if (global_io_offset < SZ_1M && pp->config.io_size > 0) { -+ sys->io_offset = global_io_offset - pp->config.io_bus_addr; -+ pci_ioremap_io(sys->io_offset, pp->io.start); -+ global_io_offset += SZ_64K; -+ pci_add_resource_offset(&sys->resources, &pp->io, -+ sys->io_offset); -+ } -+ -+ sys->mem_offset = pp->mem.start - pp->config.mem_bus_addr; -+ pci_add_resource_offset(&sys->resources, &pp->mem, sys->mem_offset); -+ -+ return 1; -+} -+ -+struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys) -+{ -+ struct pci_bus *bus; -+ struct pcie_port *pp = sys_to_pcie(sys); -+ -+ if (pp) { -+ pp->root_bus_nr = sys->busnr; -+ bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops, -+ sys, &sys->resources); -+ } else { -+ bus = NULL; -+ BUG(); -+ } -+ -+ return bus; -+} -+ -+int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); -+ -+ return pp->irq; -+} -+ -+static struct hw_pci dw_pci = { -+ .setup = dw_pcie_setup, -+ .scan = dw_pcie_scan_bus, -+ .map_irq = dw_pcie_map_irq, -+}; -+ -+void dw_pcie_setup_rc(struct pcie_port *pp) -+{ -+ struct pcie_port_info *config = &pp->config; -+ u32 val; -+ u32 membase; -+ u32 memlimit; -+ -+ /* set the number of lines as 4 */ -+ dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val); -+ val &= ~PORT_LINK_MODE_MASK; -+ switch (pp->lanes) { -+ case 1: -+ val |= PORT_LINK_MODE_1_LANES; -+ break; -+ case 2: -+ val |= PORT_LINK_MODE_2_LANES; -+ break; -+ case 4: -+ val |= PORT_LINK_MODE_4_LANES; -+ break; -+ } -+ dw_pcie_writel_rc(pp, val, PCIE_PORT_LINK_CONTROL); -+ -+ /* set link width speed control register */ -+ dw_pcie_readl_rc(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, &val); -+ val &= ~PORT_LOGIC_LINK_WIDTH_MASK; -+ switch (pp->lanes) { -+ case 1: -+ val |= PORT_LOGIC_LINK_WIDTH_1_LANES; -+ break; -+ case 2: -+ val |= PORT_LOGIC_LINK_WIDTH_2_LANES; -+ break; -+ case 4: -+ val |= PORT_LOGIC_LINK_WIDTH_4_LANES; -+ break; -+ } -+ dw_pcie_writel_rc(pp, val, PCIE_LINK_WIDTH_SPEED_CONTROL); -+ -+ /* setup RC BARs */ -+ dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_0); -+ dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_1); -+ -+ /* setup interrupt pins */ -+ dw_pcie_readl_rc(pp, PCI_INTERRUPT_LINE, &val); -+ val &= 0xffff00ff; -+ val |= 0x00000100; -+ dw_pcie_writel_rc(pp, val, PCI_INTERRUPT_LINE); -+ -+ /* setup bus numbers */ -+ dw_pcie_readl_rc(pp, PCI_PRIMARY_BUS, &val); -+ val &= 0xff000000; -+ val |= 0x00010100; -+ dw_pcie_writel_rc(pp, val, PCI_PRIMARY_BUS); -+ -+ /* setup memory base, memory limit */ -+ membase = ((u32)pp->mem_base & 0xfff00000) >> 16; -+ memlimit = (config->mem_size + (u32)pp->mem_base) & 0xfff00000; -+ val = memlimit | membase; -+ dw_pcie_writel_rc(pp, val, PCI_MEMORY_BASE); -+ -+ /* setup command register */ -+ dw_pcie_readl_rc(pp, PCI_COMMAND, &val); -+ val &= 0xffff0000; -+ val |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | -+ PCI_COMMAND_MASTER | PCI_COMMAND_SERR; -+ dw_pcie_writel_rc(pp, val, PCI_COMMAND); -+} -+ -+MODULE_AUTHOR("Jingoo Han jg1.han@samsung.com"); -+MODULE_DESCRIPTION("Designware PCIe host controller driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/src/patches/kernel/wandboard/imx/0012-pcie-backport-fixes.patch b/src/patches/kernel/wandboard/imx/0012-pcie-backport-fixes.patch deleted file mode 100644 index aef6b05..0000000 --- a/src/patches/kernel/wandboard/imx/0012-pcie-backport-fixes.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/drivers/pci/Kconfig -+++ b/drivers/pci/Kconfig -@@ -125,3 +125,5 @@ config PCI_IOAPIC - config PCI_LABEL - def_bool y if (DMI || ACPI) - select NLS -+ -+source "drivers/pci/host/Kconfig" ---- a/drivers/pci/Makefile -+++ b/drivers/pci/Makefile -@@ -67,3 +67,6 @@ obj-$(CONFIG_XEN_PCIDEV_FRONTEND) += xen - obj-$(CONFIG_OF) += of.o - - ccflags-$(CONFIG_PCI_DEBUG) := -DDEBUG -+ -+# PCI host controller drivers -+obj-y += host/ diff --git a/src/patches/kernel/wandboard/imx/0013-of-pci-Provide-support-for-parsing-PCI-DT-ranges-pro.patch b/src/patches/kernel/wandboard/imx/0013-of-pci-Provide-support-for-parsing-PCI-DT-ranges-pro.patch deleted file mode 100644 index ab20f7f..0000000 --- a/src/patches/kernel/wandboard/imx/0013-of-pci-Provide-support-for-parsing-PCI-DT-ranges-pro.patch +++ /dev/null @@ -1,194 +0,0 @@ -From: Andrew Murray Andrew.Murray@arm.com -Subject: [PATCH] of/pci: Provide support for parsing PCI DT ranges property - -This patch factors out common implementation patterns to reduce overall kernel -code and provide a means for host bridge drivers to directly obtain struct -resources from the DT's ranges property without relying on architecture specific -DT handling. This will make it easier to write archiecture independent host bridge -drivers and mitigate against further duplication of DT parsing code. - -This patch can be used in the following way: - - struct of_pci_range_parser parser; - struct of_pci_range range; - - if (of_pci_range_parser_init(&parser, np)) - ; //no ranges property - - for_each_of_pci_range(&parser, &range) { - - /* - directly access properties of the address range, e.g.: - range.pci_space, range.pci_addr, range.cpu_addr, - range.size, range.flags - - alternatively obtain a struct resource, e.g.: - struct resource res; - of_pci_range_to_resource(&range, np, &res); - */ - } - -Additionally the implementation takes care of adjacent ranges and merges them -into a single range (as was the case with powerpc and microblaze). - -Signed-off-by: Andrew Murray Andrew.Murray@arm.com -Signed-off-by: Liviu Dudau Liviu.Dudau@arm.com -Signed-off-by: Thomas Petazzoni thomas.petazzoni@free-electrons.com -Reviewed-by: Rob Herring rob.herring@calxeda.com -Tested-by: Thomas Petazzoni thomas.petazzoni@free-electrons.com -Tested-by: Linus Walleij linus.walleij@linaro.org -Tested-by: Jingoo Han jg1.han@samsung.com -Acked-by: Grant Likely grant.likely@secretlab.ca -Signed-off-by: Jason Cooper jason@lakedaemon.net ---- - drivers/of/address.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/of_address.h | 48 +++++++++++++++++++++++++++++++++ - 2 files changed, 115 insertions(+) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -231,6 +231,73 @@ int of_pci_address_to_resource(struct de - return __of_address_to_resource(dev, addrp, size, flags, NULL, r); - } - EXPORT_SYMBOL_GPL(of_pci_address_to_resource); -+ -+int of_pci_range_parser_init(struct of_pci_range_parser *parser, -+ struct device_node *node) -+{ -+ const int na = 3, ns = 2; -+ int rlen; -+ -+ parser->node = node; -+ parser->pna = of_n_addr_cells(node); -+ parser->np = parser->pna + na + ns; -+ -+ parser->range = of_get_property(node, "ranges", &rlen); -+ if (parser->range == NULL) -+ return -ENOENT; -+ -+ parser->end = parser->range + rlen / sizeof(__be32); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(of_pci_range_parser_init); -+ -+struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, -+ struct of_pci_range *range) -+{ -+ const int na = 3, ns = 2; -+ -+ if (!range) -+ return NULL; -+ -+ if (!parser->range || parser->range + parser->np > parser->end) -+ return NULL; -+ -+ range->pci_space = parser->range[0]; -+ range->flags = of_bus_pci_get_flags(parser->range); -+ range->pci_addr = of_read_number(parser->range + 1, ns); -+ range->cpu_addr = of_translate_address(parser->node, -+ parser->range + na); -+ range->size = of_read_number(parser->range + parser->pna + na, ns); -+ -+ parser->range += parser->np; -+ -+ /* Now consume following elements while they are contiguous */ -+ while (parser->range + parser->np <= parser->end) { -+ u32 flags, pci_space; -+ u64 pci_addr, cpu_addr, size; -+ -+ pci_space = be32_to_cpup(parser->range); -+ flags = of_bus_pci_get_flags(parser->range); -+ pci_addr = of_read_number(parser->range + 1, ns); -+ cpu_addr = of_translate_address(parser->node, -+ parser->range + na); -+ size = of_read_number(parser->range + parser->pna + na, ns); -+ -+ if (flags != range->flags) -+ break; -+ if (pci_addr != range->pci_addr + range->size || -+ cpu_addr != range->cpu_addr + range->size) -+ break; -+ -+ range->size += size; -+ parser->range += parser->np; -+ } -+ -+ return range; -+} -+EXPORT_SYMBOL_GPL(of_pci_range_parser_one); -+ - #endif /* CONFIG_PCI */ - - /* ---- a/include/linux/of_address.h -+++ b/include/linux/of_address.h -@@ -4,6 +4,36 @@ - #include <linux/errno.h> - #include <linux/of.h> - -+struct of_pci_range_parser { -+ struct device_node *node; -+ const __be32 *range; -+ const __be32 *end; -+ int np; -+ int pna; -+}; -+ -+struct of_pci_range { -+ u32 pci_space; -+ u64 pci_addr; -+ u64 cpu_addr; -+ u64 size; -+ u32 flags; -+}; -+ -+#define for_each_of_pci_range(parser, range) \ -+ for (; of_pci_range_parser_one(parser, range);) -+ -+static inline void of_pci_range_to_resource(struct of_pci_range *range, -+ struct device_node *np, -+ struct resource *res) -+{ -+ res->flags = range->flags; -+ res->start = range->cpu_addr; -+ res->end = range->cpu_addr + range->size - 1; -+ res->parent = res->child = res->sibling = NULL; -+ res->name = np->full_name; -+} -+ - #ifdef CONFIG_OF_ADDRESS - extern u64 of_translate_address(struct device_node *np, const __be32 *addr); - extern bool of_can_translate_address(struct device_node *dev); -@@ -27,6 +57,11 @@ static inline unsigned long pci_address_ - #define pci_address_to_pio pci_address_to_pio - #endif - -+extern int of_pci_range_parser_init(struct of_pci_range_parser *parser, -+ struct device_node *node); -+extern struct of_pci_range *of_pci_range_parser_one( -+ struct of_pci_range_parser *parser, -+ struct of_pci_range *range); - #else /* CONFIG_OF_ADDRESS */ - #ifndef of_address_to_resource - static inline int of_address_to_resource(struct device_node *dev, int index, -@@ -53,6 +88,19 @@ static inline const __be32 *of_get_addre - { - return NULL; - } -+ -+static inline int of_pci_range_parser_init(struct of_pci_range_parser *parser, -+ struct device_node *node) -+{ -+ return -1; -+} -+ -+static inline struct of_pci_range *of_pci_range_parser_one( -+ struct of_pci_range_parser *parser, -+ struct of_pci_range *range) -+{ -+ return NULL; -+} - #endif /* CONFIG_OF_ADDRESS */ - - diff --git a/src/patches/kernel/wandboard/imx/0014-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch b/src/patches/kernel/wandboard/imx/0014-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch deleted file mode 100644 index 19ca079..0000000 --- a/src/patches/kernel/wandboard/imx/0014-ARM-imx6q-Add-PCIe-bits-to-GPR-syscon-definition.patch +++ /dev/null @@ -1,37 +0,0 @@ -From: Sean Cross xobs@kosagi.com -Subject: [PATCH 1/2] ARM: imx6q: Add PCIe bits to GPR syscon definition - -PCIe requires additional bits be defined for GPR8 and GPR12. - -Signed-off-by: Sean Cross xobs@kosagi.com -Signed-off-by: Shawn Guo shawn.guo@linaro.org -Signed-off-by: Bjorn Helgaas bhelgaas@google.com ---- - include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h -@@ -241,6 +241,12 @@ - - #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) - -+#define IMX6Q_GPR8_TX_SWING_LOW (0x7f << 25) -+#define IMX6Q_GPR8_TX_SWING_FULL (0x7f << 18) -+#define IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB (0x3f << 12) -+#define IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB (0x3f << 6) -+#define IMX6Q_GPR8_TX_DEEMPH_GEN1 (0x3f << 0) -+ - #define IMX6Q_GPR9_TZASC2_BYP BIT(1) - #define IMX6Q_GPR9_TZASC1_BYP BIT(0) - -@@ -273,7 +279,9 @@ - #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) - #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) - #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) -+#define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) - #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) -+#define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) - - #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) - #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) diff --git a/src/patches/kernel/wandboard/imx/0015-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch b/src/patches/kernel/wandboard/imx/0015-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch deleted file mode 100644 index 599cd0e..0000000 --- a/src/patches/kernel/wandboard/imx/0015-PCI-imx6-Add-support-for-i.MX6-PCIe-controller.patch +++ /dev/null @@ -1,616 +0,0 @@ -Subject: [PATCH 2/2] PCI: imx6: Add support for i.MX6 PCIe controller -From: Sean Cross xobs@kosagi.com - -Add support for the PCIe port present on the i.MX6 family of controllers. -These use the Synopsis Designware core tied to their own PHY. - -Signed-off-by: Sean Cross xobs@kosagi.com -Signed-off-by: Shawn Guo shawn.guo@linaro.org -Signed-off-by: Bjorn Helgaas bhelgaas@google.com -Acked-by: Sascha Hauer s.hauer@pengutronix.de ---- - drivers/pci/host/Kconfig | 6 + - drivers/pci/host/Makefile | 1 + - drivers/pci/host/pci-imx6.c | 575 +++++++++++++++++++++ - 4 files changed, 588 insertions(+), 1 deletion(-) - create mode 100644 drivers/pci/host/pci-imx6.c - ---- /dev/null -+++ b/drivers/pci/host/Kconfig -@@ -0,0 +1,13 @@ -+menu "PCI host controller drivers" -+ depends on PCI -+ -+config PCIE_DW -+ bool -+ -+config PCI_IMX6 -+ bool "Freescale i.MX6 PCIe controller" -+ depends on SOC_IMX6Q -+ select PCIEPORTBUS -+ select PCIE_DW -+ -+endmenu ---- /dev/null -+++ b/drivers/pci/host/Makefile -@@ -0,0 +1,2 @@ -+obj-$(CONFIG_PCIE_DW) += pcie-designware.o -+obj-$(CONFIG_PCI_IMX6) += pci-imx6.o ---- /dev/null -+++ b/drivers/pci/host/pci-imx6.c -@@ -0,0 +1,575 @@ -+/* -+ * PCIe host controller driver for Freescale i.MX6 SoCs -+ * -+ * Copyright (C) 2013 Kosagi -+ * http://www.kosagi.com -+ * -+ * Author: Sean Cross xobs@kosagi.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/gpio.h> -+#include <linux/kernel.h> -+#include <linux/mfd/syscon.h> -+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> -+#include <linux/module.h> -+#include <linux/of_gpio.h> -+#include <linux/pci.h> -+#include <linux/platform_device.h> -+#include <linux/regmap.h> -+#include <linux/resource.h> -+#include <linux/signal.h> -+#include <linux/types.h> -+ -+#include "pcie-designware.h" -+ -+#define to_imx6_pcie(x) container_of(x, struct imx6_pcie, pp) -+ -+struct imx6_pcie { -+ int reset_gpio; -+ int power_on_gpio; -+ int wake_up_gpio; -+ int disable_gpio; -+ struct clk *lvds_gate; -+ struct clk *sata_ref_100m; -+ struct clk *pcie_ref_125m; -+ struct clk *pcie_axi; -+ struct pcie_port pp; -+ struct regmap *iomuxc_gpr; -+ void __iomem *mem_base; -+}; -+ -+/* PCIe Port Logic registers (memory-mapped) */ -+#define PL_OFFSET 0x700 -+#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28) -+#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c) -+ -+#define PCIE_PHY_CTRL (PL_OFFSET + 0x114) -+#define PCIE_PHY_CTRL_DATA_LOC 0 -+#define PCIE_PHY_CTRL_CAP_ADR_LOC 16 -+#define PCIE_PHY_CTRL_CAP_DAT_LOC 17 -+#define PCIE_PHY_CTRL_WR_LOC 18 -+#define PCIE_PHY_CTRL_RD_LOC 19 -+ -+#define PCIE_PHY_STAT (PL_OFFSET + 0x110) -+#define PCIE_PHY_STAT_ACK_LOC 16 -+ -+/* PHY registers (not memory-mapped) */ -+#define PCIE_PHY_RX_ASIC_OUT 0x100D -+ -+#define PHY_RX_OVRD_IN_LO 0x1005 -+#define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5) -+#define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3) -+ -+static int pcie_phy_poll_ack(void __iomem *dbi_base, int exp_val) -+{ -+ u32 val; -+ u32 max_iterations = 10; -+ u32 wait_counter = 0; -+ -+ do { -+ val = readl(dbi_base + PCIE_PHY_STAT); -+ val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1; -+ wait_counter++; -+ -+ if (val == exp_val) -+ return 0; -+ -+ udelay(1); -+ } while (wait_counter < max_iterations); -+ -+ return -ETIMEDOUT; -+} -+ -+static int pcie_phy_wait_ack(void __iomem *dbi_base, int addr) -+{ -+ u32 val; -+ int ret; -+ -+ val = addr << PCIE_PHY_CTRL_DATA_LOC; -+ writel(val, dbi_base + PCIE_PHY_CTRL); -+ -+ val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC); -+ writel(val, dbi_base + PCIE_PHY_CTRL); -+ -+ ret = pcie_phy_poll_ack(dbi_base, 1); -+ if (ret) -+ return ret; -+ -+ val = addr << PCIE_PHY_CTRL_DATA_LOC; -+ writel(val, dbi_base + PCIE_PHY_CTRL); -+ -+ ret = pcie_phy_poll_ack(dbi_base, 0); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+/* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */ -+static int pcie_phy_read(void __iomem *dbi_base, int addr , int *data) -+{ -+ u32 val, phy_ctl; -+ int ret; -+ -+ ret = pcie_phy_wait_ack(dbi_base, addr); -+ if (ret) -+ return ret; -+ -+ /* assert Read signal */ -+ phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC; -+ writel(phy_ctl, dbi_base + PCIE_PHY_CTRL); -+ -+ ret = pcie_phy_poll_ack(dbi_base, 1); -+ if (ret) -+ return ret; -+ -+ val = readl(dbi_base + PCIE_PHY_STAT); -+ *data = val & 0xffff; -+ -+ /* deassert Read signal */ -+ writel(0x00, dbi_base + PCIE_PHY_CTRL); -+ -+ ret = pcie_phy_poll_ack(dbi_base, 0); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int pcie_phy_write(void __iomem *dbi_base, int addr, int data) -+{ -+ u32 var; -+ int ret; -+ -+ /* write addr */ -+ /* cap addr */ -+ ret = pcie_phy_wait_ack(dbi_base, addr); -+ if (ret) -+ return ret; -+ -+ var = data << PCIE_PHY_CTRL_DATA_LOC; -+ writel(var, dbi_base + PCIE_PHY_CTRL); -+ -+ /* capture data */ -+ var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC); -+ writel(var, dbi_base + PCIE_PHY_CTRL); -+ -+ ret = pcie_phy_poll_ack(dbi_base, 1); -+ if (ret) -+ return ret; -+ -+ /* deassert cap data */ -+ var = data << PCIE_PHY_CTRL_DATA_LOC; -+ writel(var, dbi_base + PCIE_PHY_CTRL); -+ -+ /* wait for ack de-assertion */ -+ ret = pcie_phy_poll_ack(dbi_base, 0); -+ if (ret) -+ return ret; -+ -+ /* assert wr signal */ -+ var = 0x1 << PCIE_PHY_CTRL_WR_LOC; -+ writel(var, dbi_base + PCIE_PHY_CTRL); -+ -+ /* wait for ack */ -+ ret = pcie_phy_poll_ack(dbi_base, 1); -+ if (ret) -+ return ret; -+ -+ /* deassert wr signal */ -+ var = data << PCIE_PHY_CTRL_DATA_LOC; -+ writel(var, dbi_base + PCIE_PHY_CTRL); -+ -+ /* wait for ack de-assertion */ -+ ret = pcie_phy_poll_ack(dbi_base, 0); -+ if (ret) -+ return ret; -+ -+ writel(0x0, dbi_base + PCIE_PHY_CTRL); -+ -+ return 0; -+} -+ -+/* Added for PCI abort handling */ -+static int imx6q_pcie_abort_handler(unsigned long addr, -+ unsigned int fsr, struct pt_regs *regs) -+{ -+ /* -+ * If it was an imprecise abort, then we need to correct the -+ * return address to be _after_ the instruction. -+ */ -+ if (fsr & (1 << 10)) -+ regs->ARM_pc += 4; -+ return 0; -+} -+ -+static int imx6_pcie_assert_core_reset(struct pcie_port *pp) -+{ -+ struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); -+ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, -+ IMX6Q_GPR1_PCIE_TEST_PD, 1 << 18); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, -+ IMX6Q_GPR12_PCIE_CTL_2, 1 << 10); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, -+ IMX6Q_GPR1_PCIE_REF_CLK_EN, 0 << 16); -+ -+ gpio_set_value(imx6_pcie->reset_gpio, 0); -+ msleep(100); -+ gpio_set_value(imx6_pcie->reset_gpio, 1); -+ -+ return 0; -+} -+ -+static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) -+{ -+ struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); -+ int ret; -+ -+ if (gpio_is_valid(imx6_pcie->power_on_gpio)) -+ gpio_set_value(imx6_pcie->power_on_gpio, 1); -+ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, -+ IMX6Q_GPR1_PCIE_TEST_PD, 0 << 18); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1, -+ IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); -+ -+ ret = clk_prepare_enable(imx6_pcie->sata_ref_100m); -+ if (ret) { -+ dev_err(pp->dev, "unable to enable sata_ref_100m\n"); -+ goto err_sata_ref; -+ } -+ -+ ret = clk_prepare_enable(imx6_pcie->pcie_ref_125m); -+ if (ret) { -+ dev_err(pp->dev, "unable to enable pcie_ref_125m\n"); -+ goto err_pcie_ref; -+ } -+ -+ ret = clk_prepare_enable(imx6_pcie->lvds_gate); -+ if (ret) { -+ dev_err(pp->dev, "unable to enable lvds_gate\n"); -+ goto err_lvds_gate; -+ } -+ -+ ret = clk_prepare_enable(imx6_pcie->pcie_axi); -+ if (ret) { -+ dev_err(pp->dev, "unable to enable pcie_axi\n"); -+ goto err_pcie_axi; -+ } -+ -+ /* allow the clocks to stabilize */ -+ usleep_range(200, 500); -+ -+ return 0; -+ -+err_pcie_axi: -+ clk_disable_unprepare(imx6_pcie->lvds_gate); -+err_lvds_gate: -+ clk_disable_unprepare(imx6_pcie->pcie_ref_125m); -+err_pcie_ref: -+ clk_disable_unprepare(imx6_pcie->sata_ref_100m); -+err_sata_ref: -+ return ret; -+ -+} -+ -+static void imx6_pcie_init_phy(struct pcie_port *pp) -+{ -+ struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); -+ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, -+ IMX6Q_GPR12_PCIE_CTL_2, 0 << 10); -+ -+ /* configure constant input signal to the pcie ctrl and phy */ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, -+ IMX6Q_GPR12_DEVICE_TYPE, PCI_EXP_TYPE_ROOT_PORT << 12); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, -+ IMX6Q_GPR12_LOS_LEVEL, 9 << 4); -+ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, -+ IMX6Q_GPR8_TX_DEEMPH_GEN1, 0 << 0); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, -+ IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB, 0 << 6); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, -+ IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB, 20 << 12); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, -+ IMX6Q_GPR8_TX_SWING_FULL, 127 << 18); -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR8, -+ IMX6Q_GPR8_TX_SWING_LOW, 127 << 25); -+} -+ -+static void imx6_pcie_host_init(struct pcie_port *pp) -+{ -+ int count = 0; -+ struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp); -+ -+ imx6_pcie_assert_core_reset(pp); -+ -+ imx6_pcie_init_phy(pp); -+ -+ imx6_pcie_deassert_core_reset(pp); -+ -+ dw_pcie_setup_rc(pp); -+ -+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, -+ IMX6Q_GPR12_PCIE_CTL_2, 1 << 10); -+ -+ while (!dw_pcie_link_up(pp)) { -+ usleep_range(100, 1000); -+ count++; -+ if (count >= 10) { -+ dev_err(pp->dev, "phy link never came up\n"); -+ dev_dbg(pp->dev, -+ "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", -+ readl(pp->dbi_base + PCIE_PHY_DEBUG_R0), -+ readl(pp->dbi_base + PCIE_PHY_DEBUG_R1)); -+ break; -+ } -+ } -+ -+ return; -+} -+ -+static int imx6_pcie_link_up(struct pcie_port *pp) -+{ -+ u32 rc, ltssm, rx_valid, temp; -+ -+ /* link is debug bit 36, debug register 1 starts at bit 32 */ -+ rc = readl(pp->dbi_base + PCIE_PHY_DEBUG_R1) & (0x1 << (36 - 32)); -+ if (rc) -+ return -EAGAIN; -+ -+ /* -+ * From L0, initiate MAC entry to gen2 if EP/RC supports gen2. -+ * Wait 2ms (LTSSM timeout is 24ms, PHY lock is ~5us in gen2). -+ * If (MAC/LTSSM.state == Recovery.RcvrLock) -+ * && (PHY/rx_valid==0) then pulse PHY/rx_reset. Transition -+ * to gen2 is stuck -+ */ -+ pcie_phy_read(pp->dbi_base, PCIE_PHY_RX_ASIC_OUT, &rx_valid); -+ ltssm = readl(pp->dbi_base + PCIE_PHY_DEBUG_R0) & 0x3F; -+ -+ if (rx_valid & 0x01) -+ return 0; -+ -+ if (ltssm != 0x0d) -+ return 0; -+ -+ dev_err(pp->dev, "transition to gen2 is stuck, reset PHY!\n"); -+ -+ pcie_phy_read(pp->dbi_base, -+ PHY_RX_OVRD_IN_LO, &temp); -+ temp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN -+ | PHY_RX_OVRD_IN_LO_RX_PLL_EN); -+ pcie_phy_write(pp->dbi_base, -+ PHY_RX_OVRD_IN_LO, temp); -+ -+ usleep_range(2000, 3000); -+ -+ pcie_phy_read(pp->dbi_base, -+ PHY_RX_OVRD_IN_LO, &temp); -+ temp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN -+ | PHY_RX_OVRD_IN_LO_RX_PLL_EN); -+ pcie_phy_write(pp->dbi_base, -+ PHY_RX_OVRD_IN_LO, temp); -+ -+ return 0; -+} -+ -+static struct pcie_host_ops imx6_pcie_host_ops = { -+ .link_up = imx6_pcie_link_up, -+ .host_init = imx6_pcie_host_init, -+}; -+ -+static int imx6_add_pcie_port(struct pcie_port *pp, -+ struct platform_device *pdev) -+{ -+ int ret; -+ -+ pp->irq = platform_get_irq(pdev, 0); -+ if (!pp->irq) { -+ dev_err(&pdev->dev, "failed to get irq\n"); -+ return -ENODEV; -+ } -+ -+ pp->root_bus_nr = -1; -+ pp->ops = &imx6_pcie_host_ops; -+ -+ spin_lock_init(&pp->conf_lock); -+ ret = dw_pcie_host_init(pp); -+ if (ret) { -+ dev_err(&pdev->dev, "failed to initialize host\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int __init imx6_pcie_probe(struct platform_device *pdev) -+{ -+ struct imx6_pcie *imx6_pcie; -+ struct pcie_port *pp; -+ struct device_node *np = pdev->dev.of_node; -+ struct resource *dbi_base; -+ int ret; -+ -+ imx6_pcie = devm_kzalloc(&pdev->dev, sizeof(*imx6_pcie), GFP_KERNEL); -+ if (!imx6_pcie) -+ return -ENOMEM; -+ -+ pp = &imx6_pcie->pp; -+ pp->dev = &pdev->dev; -+ -+ /* Added for PCI abort handling */ -+ hook_fault_code(16 + 6, imx6q_pcie_abort_handler, SIGBUS, 0, -+ "imprecise external abort"); -+ -+ dbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!dbi_base) { -+ dev_err(&pdev->dev, "dbi_base memory resource not found\n"); -+ return -ENODEV; -+ } -+ -+ pp->dbi_base = devm_ioremap_resource(&pdev->dev, dbi_base); -+ if (IS_ERR(pp->dbi_base)) { -+ dev_err(&pdev->dev, "unable to remap dbi_base\n"); -+ ret = PTR_ERR(pp->dbi_base); -+ goto err; -+ } -+ -+ /* Fetch GPIOs */ -+ imx6_pcie->reset_gpio = of_get_named_gpio(np, "reset-gpio", 0); -+ if (!gpio_is_valid(imx6_pcie->reset_gpio)) { -+ dev_err(&pdev->dev, "no reset-gpio defined\n"); -+ ret = -ENODEV; -+ } -+ ret = devm_gpio_request_one(&pdev->dev, -+ imx6_pcie->reset_gpio, -+ GPIOF_OUT_INIT_LOW, -+ "PCIe reset"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to get reset gpio\n"); -+ goto err; -+ } -+ -+ imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0); -+ if (gpio_is_valid(imx6_pcie->power_on_gpio)) { -+ ret = devm_gpio_request_one(&pdev->dev, -+ imx6_pcie->power_on_gpio, -+ GPIOF_OUT_INIT_LOW, -+ "PCIe power enable"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to get power-on gpio\n"); -+ goto err; -+ } -+ } -+ -+ imx6_pcie->wake_up_gpio = of_get_named_gpio(np, "wake-up-gpio", 0); -+ if (gpio_is_valid(imx6_pcie->wake_up_gpio)) { -+ ret = devm_gpio_request_one(&pdev->dev, -+ imx6_pcie->wake_up_gpio, -+ GPIOF_IN, -+ "PCIe wake up"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to get wake-up gpio\n"); -+ goto err; -+ } -+ } -+ -+ imx6_pcie->disable_gpio = of_get_named_gpio(np, "disable-gpio", 0); -+ if (gpio_is_valid(imx6_pcie->disable_gpio)) { -+ ret = devm_gpio_request_one(&pdev->dev, -+ imx6_pcie->disable_gpio, -+ GPIOF_OUT_INIT_HIGH, -+ "PCIe disable endpoint"); -+ if (ret) { -+ dev_err(&pdev->dev, "unable to get disable-ep gpio\n"); -+ goto err; -+ } -+ } -+ -+ /* Fetch clocks */ -+ imx6_pcie->lvds_gate = devm_clk_get(&pdev->dev, "lvds_gate"); -+ if (IS_ERR(imx6_pcie->lvds_gate)) { -+ dev_err(&pdev->dev, -+ "lvds_gate clock select missing or invalid\n"); -+ ret = PTR_ERR(imx6_pcie->lvds_gate); -+ goto err; -+ } -+ -+ imx6_pcie->sata_ref_100m = devm_clk_get(&pdev->dev, "sata_ref_100m"); -+ if (IS_ERR(imx6_pcie->sata_ref_100m)) { -+ dev_err(&pdev->dev, -+ "sata_ref_100m clock source missing or invalid\n"); -+ ret = PTR_ERR(imx6_pcie->sata_ref_100m); -+ goto err; -+ } -+ -+ imx6_pcie->pcie_ref_125m = devm_clk_get(&pdev->dev, "pcie_ref_125m"); -+ if (IS_ERR(imx6_pcie->pcie_ref_125m)) { -+ dev_err(&pdev->dev, -+ "pcie_ref_125m clock source missing or invalid\n"); -+ ret = PTR_ERR(imx6_pcie->pcie_ref_125m); -+ goto err; -+ } -+ -+ imx6_pcie->pcie_axi = devm_clk_get(&pdev->dev, "pcie_axi"); -+ if (IS_ERR(imx6_pcie->pcie_axi)) { -+ dev_err(&pdev->dev, -+ "pcie_axi clock source missing or invalid\n"); -+ ret = PTR_ERR(imx6_pcie->pcie_axi); -+ goto err; -+ } -+ -+ /* Grab GPR config register range */ -+ imx6_pcie->iomuxc_gpr = -+ syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); -+ if (IS_ERR(imx6_pcie->iomuxc_gpr)) { -+ dev_err(&pdev->dev, "unable to find iomuxc registers\n"); -+ ret = PTR_ERR(imx6_pcie->iomuxc_gpr); -+ goto err; -+ } -+ -+ ret = imx6_add_pcie_port(pp, pdev); -+ if (ret < 0) -+ goto err; -+ -+ platform_set_drvdata(pdev, imx6_pcie); -+ return 0; -+ -+err: -+ return ret; -+} -+ -+static const struct of_device_id imx6_pcie_of_match[] = { -+ { .compatible = "fsl,imx6q-pcie", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, imx6_pcie_of_match); -+ -+static struct platform_driver imx6_pcie_driver = { -+ .driver = { -+ .name = "imx6q-pcie", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(imx6_pcie_of_match), -+ }, -+}; -+ -+/* Freescale PCIe driver does not allow module unload */ -+ -+static int __init imx6_pcie_init(void) -+{ -+ return platform_driver_probe(&imx6_pcie_driver, imx6_pcie_probe); -+} -+module_init(imx6_pcie_init); -+ -+MODULE_AUTHOR("Sean Cross xobs@kosagi.com"); -+MODULE_DESCRIPTION("Freescale i.MX6 PCIe host controller driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/src/patches/kernel/wandboard/imx/0016-imx6-pci-tweaks.patch b/src/patches/kernel/wandboard/imx/0016-imx6-pci-tweaks.patch deleted file mode 100644 index eda007e..0000000 --- a/src/patches/kernel/wandboard/imx/0016-imx6-pci-tweaks.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/drivers/pci/host/pci-imx6.c -+++ b/drivers/pci/host/pci-imx6.c -@@ -200,12 +200,6 @@ static int pcie_phy_write(void __iomem * - static int imx6q_pcie_abort_handler(unsigned long addr, - unsigned int fsr, struct pt_regs *regs) - { -- /* -- * If it was an imprecise abort, then we need to correct the -- * return address to be _after_ the instruction. -- */ -- if (fsr & (1 << 10)) -- regs->ARM_pc += 4; - return 0; - } - -@@ -322,7 +316,7 @@ static void imx6_pcie_host_init(struct p - IMX6Q_GPR12_PCIE_CTL_2, 1 << 10); - - while (!dw_pcie_link_up(pp)) { -- usleep_range(100, 1000); -+ usleep_range(2000, 3000); - count++; - if (count >= 10) { - dev_err(pp->dev, "phy link never came up\n"); diff --git a/src/patches/kernel/wandboard/imx/0017-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch b/src/patches/kernel/wandboard/imx/0017-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch deleted file mode 100644 index 3f1b6eb..0000000 --- a/src/patches/kernel/wandboard/imx/0017-ARM-imx-Add-LVDS-general-purpose-clocks-to-i.MX6Q.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: Sean Cross xobs@kosagi.com -Subject: [PATCH 1/3] ARM: imx: Add LVDS general-purpose clocks to i.MX6Q - -The i.MX6 has two general-purpose LVDS clocks that can be driven -from a variety of sources. This patch adds a mux and a gate for -both of these clocks. - -Signed-off-by: Sean Cross xobs@kosagi.com -Signed-off-by: Shawn Guo shawn.guo@linaro.org ---- - .../devicetree/bindings/clock/imx6q-clock.txt | 4 ++++ - arch/arm/mach-imx/clk-imx6q.c | 20 +++++++++++++++++++- - 2 files changed, 23 insertions(+), 1 deletion(-) - ---- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt -+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt -@@ -208,6 +208,10 @@ clocks and IDs. - pll4_post_div 193 - pll5_post_div 194 - pll5_video_div 195 -+ lvds1_sel 204 -+ lvds2_sel 205 -+ lvds1_gate 206 -+ lvds2_gate 207 - - Examples: - ---- a/arch/arm/mach-imx/clk-imx6q.c -+++ b/arch/arm/mach-imx/clk-imx6q.c -@@ -205,6 +205,11 @@ static const char *vpu_axi_sels[] = { "a - static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div", - "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0", - "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_post_div", }; -+static const char *lvds_sels[] = { -+ "dummy", "dummy", "dummy", "dummy", "dummy", "dummy", -+ "pll4_audio", "pll5_video", "pll8_mlb", "enet_ref", -+ "pcie_ref", "sata_ref", -+}; - - enum mx6q_clks { - dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m, -@@ -238,7 +243,8 @@ enum mx6q_clks { - pll4_audio, pll5_video, pll8_mlb, pll7_usb_host, pll6_enet, ssi1_ipg, - ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5, - sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate, -- usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, clk_max -+ usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, -+ lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max - }; - - static struct clk *clk[clk_max]; -@@ -340,6 +346,18 @@ int __init mx6q_clocks_init(void) - base + 0xe0, 0, 2, 0, clk_enet_ref_table, - &imx_ccm_lock); - -+ clk[lvds1_sel] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); -+ clk[lvds2_sel] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels)); -+ -+ /* -+ * lvds1_gate and lvds2_gate are pseudo-gates. Both can be -+ * independently configured as clock inputs or outputs. We treat -+ * the "output_enable" bit as a gate, even though it's really just -+ * enabling clock output. -+ */ -+ clk[lvds1_gate] = imx_clk_gate("lvds1_gate", "dummy", base + 0x160, 10); -+ clk[lvds2_gate] = imx_clk_gate("lvds2_gate", "dummy", base + 0x160, 11); -+ - /* name parent_name reg idx */ - clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); - clk[pll2_pfd1_594m] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus", base + 0x100, 1); diff --git a/src/patches/kernel/wandboard/imx/0018-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch b/src/patches/kernel/wandboard/imx/0018-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch deleted file mode 100644 index 25f207a..0000000 --- a/src/patches/kernel/wandboard/imx/0018-ARM-imx6q-clock-and-Kconfig-update-for-PCIe-support.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 4f6723e8ff497e35c8f2fb20886fccc533c58cdb Mon Sep 17 00:00:00 2001 -From: Sean Cross xobs@kosagi.com -Date: Thu, 26 Sep 2013 10:45:35 +0800 -Subject: [PATCH] ARM: imx6q: clock and Kconfig update for PCIe support - -Update imx6q clock initialization and Kconfig for PCIe support. - -Signed-off-by: Sean Cross xobs@kosagi.com -Signed-off-by: Shawn Guo shawn.guo@linaro.org ---- - arch/arm/mach-imx/Kconfig | 2 ++ - arch/arm/mach-imx/clk-imx6q.c | 4 ++++ - 2 files changed, 6 insertions(+) - ---- a/arch/arm/mach-imx/Kconfig -+++ b/arch/arm/mach-imx/Kconfig -@@ -806,6 +806,8 @@ config SOC_IMX6Q - select HAVE_IMX_SRC - select HAVE_SMP - select MFD_SYSCON -+ select MIGHT_HAVE_PCI -+ select PCI_DOMAINS if PCI - select PINCTRL - select PINCTRL_IMX6Q - select PL310_ERRATA_588369 if CACHE_PL310 ---- a/arch/arm/mach-imx/clk-imx6q.c -+++ b/arch/arm/mach-imx/clk-imx6q.c -@@ -586,6 +586,10 @@ int __init mx6q_clocks_init(void) - clk_prepare_enable(clk[usbphy2_gate]); - } - -+ /* All existing boards with PCIe use LVDS1 */ -+ if (IS_ENABLED(CONFIG_PCI_IMX6)) -+ clk_set_parent(clk[lvds1_sel], clk[sata_ref]); -+ - /* Set initial power mode */ - imx6q_set_lpm(WAIT_CLOCKED); - diff --git a/src/patches/linux-2.6-arm-asm-constraint.patch b/src/patches/linux-2.6-arm-asm-constraint.patch deleted file mode 100644 index ac0641e..0000000 --- a/src/patches/linux-2.6-arm-asm-constraint.patch +++ /dev/null @@ -1,347 +0,0 @@ -From 398aa66827155ef52bab58bebd24597d90968929 Mon Sep 17 00:00:00 2001 -From: Will Deacon will.deacon@arm.com -Date: Thu, 8 Jul 2010 10:59:16 +0100 -Subject: [PATCH] ARM: 6212/1: atomic ops: add memory constraints to inline - asm - -Currently, the 32-bit and 64-bit atomic operations on ARM do not -include memory constraints in the inline assembly blocks. In the -case of barrier-less operations [for example, atomic_add], this -means that the compiler may constant fold values which have actually -been modified by a call to an atomic operation. - -This issue can be observed in the atomic64_test routine in -<kernel root>/lib/atomic64_test.c: - -00000000 <test_atomic64>: - 0: e1a0c00d mov ip, sp - 4: e92dd830 push {r4, r5, fp, ip, lr, pc} - 8: e24cb004 sub fp, ip, #4 - c: e24dd008 sub sp, sp, #8 - 10: e24b3014 sub r3, fp, #20 - 14: e30d000d movw r0, #53261 ; 0xd00d - 18: e3011337 movw r1, #4919 ; 0x1337 - 1c: e34c0001 movt r0, #49153 ; 0xc001 - 20: e34a1aa3 movt r1, #43683 ; 0xaaa3 - 24: e16300f8 strd r0, [r3, #-8]! - 28: e30c0afe movw r0, #51966 ; 0xcafe - 2c: e30b1eef movw r1, #48879 ; 0xbeef - 30: e34d0eaf movt r0, #57007 ; 0xdeaf - 34: e34d1ead movt r1, #57005 ; 0xdead - 38: e1b34f9f ldrexd r4, [r3] - 3c: e1a34f90 strexd r4, r0, [r3] - 40: e3340000 teq r4, #0 - 44: 1afffffb bne 38 <test_atomic64+0x38> - 48: e59f0004 ldr r0, [pc, #4] ; 54 <test_atomic64+0x54> - 4c: e3a0101e mov r1, #30 - 50: ebfffffe bl 0 <__bug> - 54: 00000000 .word 0x00000000 - -The atomic64_set (0x38-0x44) writes to the atomic64_t, but the -compiler doesn't see this, assumes the test condition is always -false and generates an unconditional branch to __bug. The rest of the -test is optimised away. - -This patch adds suitable memory constraints to the atomic operations on ARM -to ensure that the compiler is informed of the correct data hazards. We have -to use the "Qo" constraints to avoid hitting the GCC anomaly described at -http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44492 , where the compiler -makes assumptions about the writeback in the addressing mode used by the -inline assembly. These constraints forbid the use of auto{inc,dec} addressing -modes, so it doesn't matter if we don't use the operand exactly once. - -Cc: stable@kernel.org -Reviewed-by: Nicolas Pitre nicolas.pitre@linaro.org -Signed-off-by: Will Deacon will.deacon@arm.com -Signed-off-by: Russell King rmk+kernel@arm.linux.org.uk ---- - arch/arm/include/asm/atomic.h | 132 ++++++++++++++++++++-------------------- - 1 files changed, 66 insertions(+), 66 deletions(-) - -diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h -index e9e56c0..7e79503 100644 ---- a/arch/arm/include/asm/atomic.h -+++ b/arch/arm/include/asm/atomic.h -@@ -40,12 +40,12 @@ static inline void atomic_add(int i, atomic_t *v) - int result; - - __asm__ __volatile__("@ atomic_add\n" --"1: ldrex %0, [%2]\n" --" add %0, %0, %3\n" --" strex %1, %0, [%2]\n" -+"1: ldrex %0, [%3]\n" -+" add %0, %0, %4\n" -+" strex %1, %0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "Ir" (i) - : "cc"); - } -@@ -58,12 +58,12 @@ static inline int atomic_add_return(int i, atomic_t *v) - smp_mb(); - - __asm__ __volatile__("@ atomic_add_return\n" --"1: ldrex %0, [%2]\n" --" add %0, %0, %3\n" --" strex %1, %0, [%2]\n" -+"1: ldrex %0, [%3]\n" -+" add %0, %0, %4\n" -+" strex %1, %0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "Ir" (i) - : "cc"); - -@@ -78,12 +78,12 @@ static inline void atomic_sub(int i, atomic_t *v) - int result; - - __asm__ __volatile__("@ atomic_sub\n" --"1: ldrex %0, [%2]\n" --" sub %0, %0, %3\n" --" strex %1, %0, [%2]\n" -+"1: ldrex %0, [%3]\n" -+" sub %0, %0, %4\n" -+" strex %1, %0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "Ir" (i) - : "cc"); - } -@@ -96,12 +96,12 @@ static inline int atomic_sub_return(int i, atomic_t *v) - smp_mb(); - - __asm__ __volatile__("@ atomic_sub_return\n" --"1: ldrex %0, [%2]\n" --" sub %0, %0, %3\n" --" strex %1, %0, [%2]\n" -+"1: ldrex %0, [%3]\n" -+" sub %0, %0, %4\n" -+" strex %1, %0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "Ir" (i) - : "cc"); - -@@ -118,11 +118,11 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) - - do { - __asm__ __volatile__("@ atomic_cmpxchg\n" -- "ldrex %1, [%2]\n" -+ "ldrex %1, [%3]\n" - "mov %0, #0\n" -- "teq %1, %3\n" -- "strexeq %0, %4, [%2]\n" -- : "=&r" (res), "=&r" (oldval) -+ "teq %1, %4\n" -+ "strexeq %0, %5, [%3]\n" -+ : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter) - : "r" (&ptr->counter), "Ir" (old), "r" (new) - : "cc"); - } while (res); -@@ -137,12 +137,12 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) - unsigned long tmp, tmp2; - - __asm__ __volatile__("@ atomic_clear_mask\n" --"1: ldrex %0, [%2]\n" --" bic %0, %0, %3\n" --" strex %1, %0, [%2]\n" -+"1: ldrex %0, [%3]\n" -+" bic %0, %0, %4\n" -+" strex %1, %0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (tmp), "=&r" (tmp2) -+ : "=&r" (tmp), "=&r" (tmp2), "+Qo" (*addr) - : "r" (addr), "Ir" (mask) - : "cc"); - } -@@ -249,7 +249,7 @@ static inline u64 atomic64_read(atomic64_t *v) - __asm__ __volatile__("@ atomic64_read\n" - " ldrexd %0, %H0, [%1]" - : "=&r" (result) -- : "r" (&v->counter) -+ : "r" (&v->counter), "Qo" (v->counter) - ); - - return result; -@@ -260,11 +260,11 @@ static inline void atomic64_set(atomic64_t *v, u64 i) - u64 tmp; - - __asm__ __volatile__("@ atomic64_set\n" --"1: ldrexd %0, %H0, [%1]\n" --" strexd %0, %2, %H2, [%1]\n" -+"1: ldrexd %0, %H0, [%2]\n" -+" strexd %0, %3, %H3, [%2]\n" - " teq %0, #0\n" - " bne 1b" -- : "=&r" (tmp) -+ : "=&r" (tmp), "=Qo" (v->counter) - : "r" (&v->counter), "r" (i) - : "cc"); - } -@@ -275,13 +275,13 @@ static inline void atomic64_add(u64 i, atomic64_t *v) - unsigned long tmp; - - __asm__ __volatile__("@ atomic64_add\n" --"1: ldrexd %0, %H0, [%2]\n" --" adds %0, %0, %3\n" --" adc %H0, %H0, %H3\n" --" strexd %1, %0, %H0, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" -+" adds %0, %0, %4\n" -+" adc %H0, %H0, %H4\n" -+" strexd %1, %0, %H0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "r" (i) - : "cc"); - } -@@ -294,13 +294,13 @@ static inline u64 atomic64_add_return(u64 i, atomic64_t *v) - smp_mb(); - - __asm__ __volatile__("@ atomic64_add_return\n" --"1: ldrexd %0, %H0, [%2]\n" --" adds %0, %0, %3\n" --" adc %H0, %H0, %H3\n" --" strexd %1, %0, %H0, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" -+" adds %0, %0, %4\n" -+" adc %H0, %H0, %H4\n" -+" strexd %1, %0, %H0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "r" (i) - : "cc"); - -@@ -315,13 +315,13 @@ static inline void atomic64_sub(u64 i, atomic64_t *v) - unsigned long tmp; - - __asm__ __volatile__("@ atomic64_sub\n" --"1: ldrexd %0, %H0, [%2]\n" --" subs %0, %0, %3\n" --" sbc %H0, %H0, %H3\n" --" strexd %1, %0, %H0, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" -+" subs %0, %0, %4\n" -+" sbc %H0, %H0, %H4\n" -+" strexd %1, %0, %H0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "r" (i) - : "cc"); - } -@@ -334,13 +334,13 @@ static inline u64 atomic64_sub_return(u64 i, atomic64_t *v) - smp_mb(); - - __asm__ __volatile__("@ atomic64_sub_return\n" --"1: ldrexd %0, %H0, [%2]\n" --" subs %0, %0, %3\n" --" sbc %H0, %H0, %H3\n" --" strexd %1, %0, %H0, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" -+" subs %0, %0, %4\n" -+" sbc %H0, %H0, %H4\n" -+" strexd %1, %0, %H0, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "r" (i) - : "cc"); - -@@ -358,12 +358,12 @@ static inline u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old, u64 new) - - do { - __asm__ __volatile__("@ atomic64_cmpxchg\n" -- "ldrexd %1, %H1, [%2]\n" -+ "ldrexd %1, %H1, [%3]\n" - "mov %0, #0\n" -- "teq %1, %3\n" -- "teqeq %H1, %H3\n" -- "strexdeq %0, %4, %H4, [%2]" -- : "=&r" (res), "=&r" (oldval) -+ "teq %1, %4\n" -+ "teqeq %H1, %H4\n" -+ "strexdeq %0, %5, %H5, [%3]" -+ : "=&r" (res), "=&r" (oldval), "+Qo" (ptr->counter) - : "r" (&ptr->counter), "r" (old), "r" (new) - : "cc"); - } while (res); -@@ -381,11 +381,11 @@ static inline u64 atomic64_xchg(atomic64_t *ptr, u64 new) - smp_mb(); - - __asm__ __volatile__("@ atomic64_xchg\n" --"1: ldrexd %0, %H0, [%2]\n" --" strexd %1, %3, %H3, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" -+" strexd %1, %4, %H4, [%3]\n" - " teq %1, #0\n" - " bne 1b" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (ptr->counter) - : "r" (&ptr->counter), "r" (new) - : "cc"); - -@@ -402,16 +402,16 @@ static inline u64 atomic64_dec_if_positive(atomic64_t *v) - smp_mb(); - - __asm__ __volatile__("@ atomic64_dec_if_positive\n" --"1: ldrexd %0, %H0, [%2]\n" -+"1: ldrexd %0, %H0, [%3]\n" - " subs %0, %0, #1\n" - " sbc %H0, %H0, #0\n" - " teq %H0, #0\n" - " bmi 2f\n" --" strexd %1, %0, %H0, [%2]\n" -+" strexd %1, %0, %H0, [%3]\n" - " teq %1, #0\n" - " bne 1b\n" - "2:" -- : "=&r" (result), "=&r" (tmp) -+ : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter) - : "cc"); - -@@ -429,18 +429,18 @@ static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) - smp_mb(); - - __asm__ __volatile__("@ atomic64_add_unless\n" --"1: ldrexd %0, %H0, [%3]\n" --" teq %0, %4\n" --" teqeq %H0, %H4\n" -+"1: ldrexd %0, %H0, [%4]\n" -+" teq %0, %5\n" -+" teqeq %H0, %H5\n" - " moveq %1, #0\n" - " beq 2f\n" --" adds %0, %0, %5\n" --" adc %H0, %H0, %H5\n" --" strexd %2, %0, %H0, [%3]\n" -+" adds %0, %0, %6\n" -+" adc %H0, %H0, %H6\n" -+" strexd %2, %0, %H0, [%4]\n" - " teq %2, #0\n" - " bne 1b\n" - "2:" -- : "=&r" (val), "+r" (ret), "=&r" (tmp) -+ : "=&r" (val), "+r" (ret), "=&r" (tmp), "+Qo" (v->counter) - : "r" (&v->counter), "r" (u), "r" (a) - : "cc"); - --- -1.7.6.2 - diff --git a/src/patches/linux-2.6-silence-acpi-blacklist.patch b/src/patches/linux-2.6-silence-acpi-blacklist.patch deleted file mode 100644 index c5997bb..0000000 --- a/src/patches/linux-2.6-silence-acpi-blacklist.patch +++ /dev/null @@ -1,25 +0,0 @@ -diff -up linux-2.6.26.noarch/drivers/acpi/blacklist.c.jx linux-2.6.26.noarch/drivers/acpi/blacklist.c ---- linux-2.6.26.noarch/drivers/acpi/blacklist.c.jx 2008-07-13 17:51:29.000000000 -0400 -+++ linux-2.6.26.noarch/drivers/acpi/blacklist.c 2008-08-12 14:21:39.000000000 -0400 -@@ -81,18 +81,18 @@ static int __init blacklist_by_year(void - - /* Doesn't exist? Likely an old system */ - if (!dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL)) { -- printk(KERN_ERR PREFIX "no DMI BIOS year, " -+ printk(KERN_INFO PREFIX "no DMI BIOS year, " - "acpi=force is required to enable ACPI\n" ); - return 1; - } - /* 0? Likely a buggy new BIOS */ - if (year == 0) { -- printk(KERN_ERR PREFIX "DMI BIOS year==0, " -+ printk(KERN_INFO PREFIX "DMI BIOS year==0, " - "assuming ACPI-capable machine\n" ); - return 0; - } - if (year < CONFIG_ACPI_BLACKLIST_YEAR) { -- printk(KERN_ERR PREFIX "BIOS age (%d) fails cutoff (%d), " -+ printk(KERN_INFO PREFIX "BIOS age (%d) fails cutoff (%d), " - "acpi=force is required to enable ACPI\n", - year, CONFIG_ACPI_BLACKLIST_YEAR); - return 1; diff --git a/src/patches/linux-2.6-vmscan_remove_wait_on_page_writeback.patch b/src/patches/linux-2.6-vmscan_remove_wait_on_page_writeback.patch deleted file mode 100644 index 02e9cd1..0000000 --- a/src/patches/linux-2.6-vmscan_remove_wait_on_page_writeback.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- linux-next.orig/mm/vmscan.c 2010-07-28 16:22:21.000000000 +0800 -+++ linux-next/mm/vmscan.c 2010-07-28 16:23:35.000000000 +0800 -@@ -324,8 +324,7 @@ typedef enum { - * pageout is called by shrink_page_list() for each dirty page. - * Calls ->writepage(). - */ --static pageout_t pageout(struct page *page, struct address_space *mapping, -- enum pageout_io sync_writeback) -+static pageout_t pageout(struct page *page, struct address_space *mapping) - { - /* - * If the page is dirty, only perform writeback if that write -@@ -384,14 +383,6 @@ static pageout_t pageout(struct page *pa - return PAGE_ACTIVATE; - } - -- /* -- * Wait on writeback if requested to. This happens when -- * direct reclaiming a large contiguous area and the -- * first attempt to free a range of pages fails. -- */ -- if (PageWriteback(page) && sync_writeback == PAGEOUT_IO_SYNC) -- wait_on_page_writeback(page); -- - if (!PageWriteback(page)) { - /* synchronous write or broken a_ops? */ - ClearPageReclaim(page); -@@ -727,7 +718,7 @@ static unsigned long shrink_page_list(st - goto keep_locked; - - /* Page is dirty, try to write it out here */ -- switch (pageout(page, mapping, sync_writeback)) { -+ switch (pageout(page, mapping)) { - case PAGE_KEEP: - goto keep_locked; - case PAGE_ACTIVATE: - diff --git a/src/patches/linux-2.6.32-crypto-mv_cesa.patch b/src/patches/linux-2.6.32-crypto-mv_cesa.patch deleted file mode 100644 index cc85d52..0000000 --- a/src/patches/linux-2.6.32-crypto-mv_cesa.patch +++ /dev/null @@ -1,647 +0,0 @@ -From 0328ac267564089d9cedfb568f936d30a6debd21 Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:25:37 +0300 -Subject: [PATCH] crypto: mv_cesa - Invoke the user callback from a softirq - context - -Invoke the user callback from a softirq context - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 2 ++ - 1 files changed, 2 insertions(+), 0 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index b21ef63..3e60ba9 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -275,7 +275,9 @@ static void dequeue_complete_req(void) - sg_miter_stop(&cpg->p.dst_sg_it); - mv_crypto_algo_completion(); - cpg->eng_st = ENGINE_IDLE; -+ local_bh_disable(); - req->base.complete(&req->base, 0); -+ local_bh_enable(); - } - } - --- -1.7.6.5 -From 6bc6fcd609080461682c5cc0a1e3bf4345d6419d Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:25:56 +0300 -Subject: [PATCH] crypto: mv_cesa - Remove compiler warning in mv_cesa driver - -Remove compiler warning - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 1 + - 1 files changed, 1 insertions(+), 0 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 3e60ba9..37d9f06 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -178,6 +178,7 @@ static void mv_process_current_q(int first_block) - op.config = CFG_OP_CRYPT_ONLY | CFG_ENCM_AES | CFG_ENC_MODE_ECB; - break; - case COP_AES_CBC: -+ default: - op.config = CFG_OP_CRYPT_ONLY | CFG_ENCM_AES | CFG_ENC_MODE_CBC; - op.enc_iv = ENC_IV_POINT(SRAM_DATA_IV) | - ENC_IV_BUF_POINT(SRAM_DATA_IV_BUF); --- -1.7.6.5 -X-Git-Url: http://git.kernelconcepts.de/?p=mv-sheeva.git;a=blobdiff_plain;f=drivers%2Fc... - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 37d9f06..018a95c 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -242,6 +242,8 @@ static void dequeue_complete_req(void) - struct ablkcipher_request *req = cpg->cur_req; - void *buf; - int ret; -+ int need_copy_len = cpg->p.crypt_len; -+ int sram_offset = 0; - - cpg->p.total_req_bytes += cpg->p.crypt_len; - do { -@@ -257,14 +259,16 @@ static void dequeue_complete_req(void) - buf = cpg->p.dst_sg_it.addr; - buf += cpg->p.dst_start; - -- dst_copy = min(cpg->p.crypt_len, cpg->p.sg_dst_left); -- -- memcpy(buf, cpg->sram + SRAM_DATA_OUT_START, dst_copy); -+ dst_copy = min(need_copy_len, cpg->p.sg_dst_left); - -+ memcpy(buf, -+ cpg->sram + SRAM_DATA_OUT_START + sram_offset, -+ dst_copy); -+ sram_offset += dst_copy; - cpg->p.sg_dst_left -= dst_copy; -- cpg->p.crypt_len -= dst_copy; -+ need_copy_len -= dst_copy; - cpg->p.dst_start += dst_copy; -- } while (cpg->p.crypt_len > 0); -+ } while (need_copy_len > 0); - - BUG_ON(cpg->eng_st != ENGINE_W_DEQUEUE); - if (cpg->p.total_req_bytes < req->nbytes) { -From 15d4dd3594221f11a7730fcf2d5f9942b96cdd7e Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:27:02 +0300 -Subject: [PATCH] crypto: mv_cesa - Fix situations where the src sglist spans - more data than the request asks for - -Fix for situations where the source scatterlist spans more data than the -request nbytes - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 66 ++++++++++++++++++++++++++++++--------------- - 1 files changed, 44 insertions(+), 22 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 018a95c..096f9ff 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -143,27 +143,45 @@ static int mv_setkey_aes(struct crypto_ablkcipher *cipher, const u8 *key, - return 0; - } - --static void setup_data_in(struct ablkcipher_request *req) -+static void copy_src_to_buf(struct req_progress *p, char *dbuf, int len) - { - int ret; -- void *buf; -- -- if (!cpg->p.sg_src_left) { -- ret = sg_miter_next(&cpg->p.src_sg_it); -- BUG_ON(!ret); -- cpg->p.sg_src_left = cpg->p.src_sg_it.length; -- cpg->p.src_start = 0; -- } -+ void *sbuf; -+ int copied = 0; - -- cpg->p.crypt_len = min(cpg->p.sg_src_left, cpg->max_req_size); -- -- buf = cpg->p.src_sg_it.addr; -- buf += cpg->p.src_start; -+ while (1) { -+ if (!p->sg_src_left) { -+ ret = sg_miter_next(&p->src_sg_it); -+ BUG_ON(!ret); -+ p->sg_src_left = p->src_sg_it.length; -+ p->src_start = 0; -+ } - -- memcpy(cpg->sram + SRAM_DATA_IN_START, buf, cpg->p.crypt_len); -+ sbuf = p->src_sg_it.addr + p->src_start; -+ -+ if (p->sg_src_left <= len - copied) { -+ memcpy(dbuf + copied, sbuf, p->sg_src_left); -+ copied += p->sg_src_left; -+ p->sg_src_left = 0; -+ if (copied >= len) -+ break; -+ } else { -+ int copy_len = len - copied; -+ memcpy(dbuf + copied, sbuf, copy_len); -+ p->src_start += copy_len; -+ p->sg_src_left -= copy_len; -+ break; -+ } -+ } -+} - -- cpg->p.sg_src_left -= cpg->p.crypt_len; -- cpg->p.src_start += cpg->p.crypt_len; -+static void setup_data_in(struct ablkcipher_request *req) -+{ -+ struct req_progress *p = &cpg->p; -+ p->crypt_len = -+ min((int)req->nbytes - p->total_req_bytes, cpg->max_req_size); -+ copy_src_to_buf(p, cpg->sram + SRAM_DATA_IN_START, -+ p->crypt_len); - } - - static void mv_process_current_q(int first_block) -@@ -289,12 +307,16 @@ static void dequeue_complete_req(void) - static int count_sgs(struct scatterlist *sl, unsigned int total_bytes) - { - int i = 0; -- -- do { -- total_bytes -= sl[i].length; -- i++; -- -- } while (total_bytes > 0); -+ size_t cur_len; -+ -+ while (1) { -+ cur_len = sl[i].length; -+ ++i; -+ if (total_bytes > cur_len) -+ total_bytes -= cur_len; -+ else -+ break; -+ } - - return i; - } --- -1.7.6.5 -From 3b61a90502481045f56c1c41a2af35ee48ca8b80 Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:27:33 +0300 -Subject: [PATCH] crypto: mv_cesa - Enqueue generic async requests - -Enqueue generic async requests rather than ablkcipher requests -in the driver's queue - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 43 ++++++++++++++++++++++++------------------- - 1 files changed, 24 insertions(+), 19 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 096f9ff..8891e2e 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -39,6 +39,7 @@ enum engine_status { - * @sg_src_left: bytes left in src to process (scatter list) - * @src_start: offset to add to src start position (scatter list) - * @crypt_len: length of current crypt process -+ * @hw_nbytes: total bytes to process in hw for this request - * @sg_dst_left: bytes left dst to process in this scatter list - * @dst_start: offset to add to dst start position (scatter list) - * @total_req_bytes: total number of bytes processed (request). -@@ -55,6 +56,7 @@ struct req_progress { - int sg_src_left; - int src_start; - int crypt_len; -+ int hw_nbytes; - /* dst mostly */ - int sg_dst_left; - int dst_start; -@@ -71,7 +73,7 @@ struct crypto_priv { - spinlock_t lock; - struct crypto_queue queue; - enum engine_status eng_st; -- struct ablkcipher_request *cur_req; -+ struct crypto_async_request *cur_req; - struct req_progress p; - int max_req_size; - int sram_size; -@@ -175,18 +177,18 @@ static void copy_src_to_buf(struct req_progress *p, char *dbuf, int len) - } - } - --static void setup_data_in(struct ablkcipher_request *req) -+static void setup_data_in(void) - { - struct req_progress *p = &cpg->p; - p->crypt_len = -- min((int)req->nbytes - p->total_req_bytes, cpg->max_req_size); -+ min(p->hw_nbytes - p->total_req_bytes, cpg->max_req_size); - copy_src_to_buf(p, cpg->sram + SRAM_DATA_IN_START, - p->crypt_len); - } - - static void mv_process_current_q(int first_block) - { -- struct ablkcipher_request *req = cpg->cur_req; -+ struct ablkcipher_request *req = ablkcipher_request_cast(cpg->cur_req); - struct mv_ctx *ctx = crypto_tfm_ctx(req->base.tfm); - struct mv_req_ctx *req_ctx = ablkcipher_request_ctx(req); - struct sec_accel_config op; -@@ -229,7 +231,7 @@ static void mv_process_current_q(int first_block) - ENC_P_DST(SRAM_DATA_OUT_START); - op.enc_key_p = SRAM_DATA_KEY_P; - -- setup_data_in(req); -+ setup_data_in(); - op.enc_len = cpg->p.crypt_len; - memcpy(cpg->sram + SRAM_CONFIG, &op, - sizeof(struct sec_accel_config)); -@@ -246,7 +248,7 @@ static void mv_process_current_q(int first_block) - - static void mv_crypto_algo_completion(void) - { -- struct ablkcipher_request *req = cpg->cur_req; -+ struct ablkcipher_request *req = ablkcipher_request_cast(cpg->cur_req); - struct mv_req_ctx *req_ctx = ablkcipher_request_ctx(req); - - if (req_ctx->op != COP_AES_CBC) -@@ -257,7 +259,7 @@ static void mv_crypto_algo_completion(void) - - static void dequeue_complete_req(void) - { -- struct ablkcipher_request *req = cpg->cur_req; -+ struct crypto_async_request *req = cpg->cur_req; - void *buf; - int ret; - int need_copy_len = cpg->p.crypt_len; -@@ -289,7 +291,7 @@ static void dequeue_complete_req(void) - } while (need_copy_len > 0); - - BUG_ON(cpg->eng_st != ENGINE_W_DEQUEUE); -- if (cpg->p.total_req_bytes < req->nbytes) { -+ if (cpg->p.total_req_bytes < cpg->p.hw_nbytes) { - /* process next scatter list entry */ - cpg->eng_st = ENGINE_BUSY; - mv_process_current_q(0); -@@ -299,7 +301,7 @@ static void dequeue_complete_req(void) - mv_crypto_algo_completion(); - cpg->eng_st = ENGINE_IDLE; - local_bh_disable(); -- req->base.complete(&req->base, 0); -+ req->complete(req, 0); - local_bh_enable(); - } - } -@@ -323,16 +325,19 @@ static int count_sgs(struct scatterlist *sl, unsigned int total_bytes) - - static void mv_enqueue_new_req(struct ablkcipher_request *req) - { -+ struct req_progress *p = &cpg->p; - int num_sgs; - -- cpg->cur_req = req; -- memset(&cpg->p, 0, sizeof(struct req_progress)); -+ cpg->cur_req = &req->base; -+ memset(p, 0, sizeof(struct req_progress)); -+ p->hw_nbytes = req->nbytes; - - num_sgs = count_sgs(req->src, req->nbytes); -- sg_miter_start(&cpg->p.src_sg_it, req->src, num_sgs, SG_MITER_FROM_SG); -+ sg_miter_start(&p->src_sg_it, req->src, num_sgs, SG_MITER_FROM_SG); - - num_sgs = count_sgs(req->dst, req->nbytes); -- sg_miter_start(&cpg->p.dst_sg_it, req->dst, num_sgs, SG_MITER_TO_SG); -+ sg_miter_start(&p->dst_sg_it, req->dst, num_sgs, SG_MITER_TO_SG); -+ - mv_process_current_q(1); - } - -@@ -378,13 +383,13 @@ static int queue_manag(void *data) - return 0; - } - --static int mv_handle_req(struct ablkcipher_request *req) -+static int mv_handle_req(struct crypto_async_request *req) - { - unsigned long flags; - int ret; - - spin_lock_irqsave(&cpg->lock, flags); -- ret = ablkcipher_enqueue_request(&cpg->queue, req); -+ ret = crypto_enqueue_request(&cpg->queue, req); - spin_unlock_irqrestore(&cpg->lock, flags); - wake_up_process(cpg->queue_th); - return ret; -@@ -397,7 +402,7 @@ static int mv_enc_aes_ecb(struct ablkcipher_request *req) - req_ctx->op = COP_AES_ECB; - req_ctx->decrypt = 0; - -- return mv_handle_req(req); -+ return mv_handle_req(&req->base); - } - - static int mv_dec_aes_ecb(struct ablkcipher_request *req) -@@ -409,7 +414,7 @@ static int mv_dec_aes_ecb(struct ablkcipher_request *req) - req_ctx->decrypt = 1; - - compute_aes_dec_key(ctx); -- return mv_handle_req(req); -+ return mv_handle_req(&req->base); - } - - static int mv_enc_aes_cbc(struct ablkcipher_request *req) -@@ -419,7 +424,7 @@ static int mv_enc_aes_cbc(struct ablkcipher_request *req) - req_ctx->op = COP_AES_CBC; - req_ctx->decrypt = 0; - -- return mv_handle_req(req); -+ return mv_handle_req(&req->base); - } - - static int mv_dec_aes_cbc(struct ablkcipher_request *req) -@@ -431,7 +436,7 @@ static int mv_dec_aes_cbc(struct ablkcipher_request *req) - req_ctx->decrypt = 1; - - compute_aes_dec_key(ctx); -- return mv_handle_req(req); -+ return mv_handle_req(&req->base); - } - - static int mv_cra_init(struct crypto_tfm *tfm) --- -1.7.6.5 -From 7a5f691ef03f4c01d2703b5ec4ddd4c17e645dec Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:29:16 +0300 -Subject: [PATCH] crypto: mv_cesa - Rename a variable to a more suitable name - -Rename a variable to a more suitable name - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 10 +++++----- - 1 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 8891e2e..4262932 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -42,7 +42,7 @@ enum engine_status { - * @hw_nbytes: total bytes to process in hw for this request - * @sg_dst_left: bytes left dst to process in this scatter list - * @dst_start: offset to add to dst start position (scatter list) -- * @total_req_bytes: total number of bytes processed (request). -+ * @hw_processed_bytes: number of bytes processed by hw (request). - * - * sg helper are used to iterate over the scatterlist. Since the size of the - * SRAM may be less than the scatter size, this struct struct is used to keep -@@ -60,7 +60,7 @@ struct req_progress { - /* dst mostly */ - int sg_dst_left; - int dst_start; -- int total_req_bytes; -+ int hw_processed_bytes; - }; - - struct crypto_priv { -@@ -181,7 +181,7 @@ static void setup_data_in(void) - { - struct req_progress *p = &cpg->p; - p->crypt_len = -- min(p->hw_nbytes - p->total_req_bytes, cpg->max_req_size); -+ min(p->hw_nbytes - p->hw_processed_bytes, cpg->max_req_size); - copy_src_to_buf(p, cpg->sram + SRAM_DATA_IN_START, - p->crypt_len); - } -@@ -265,7 +265,7 @@ static void dequeue_complete_req(void) - int need_copy_len = cpg->p.crypt_len; - int sram_offset = 0; - -- cpg->p.total_req_bytes += cpg->p.crypt_len; -+ cpg->p.hw_processed_bytes += cpg->p.crypt_len; - do { - int dst_copy; - -@@ -291,7 +291,7 @@ static void dequeue_complete_req(void) - } while (need_copy_len > 0); - - BUG_ON(cpg->eng_st != ENGINE_W_DEQUEUE); -- if (cpg->p.total_req_bytes < cpg->p.hw_nbytes) { -+ if (cpg->p.hw_processed_bytes < cpg->p.hw_nbytes) { - /* process next scatter list entry */ - cpg->eng_st = ENGINE_BUSY; - mv_process_current_q(0); --- -1.6.5.GIT -From a58094ac5f95d6969e5c52ff096d2fd2864542af Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:30:19 +0300 -Subject: [PATCH] crypto: mv_cesa - Execute some code via function pointers - rathr than direct calls - -Execute some code via function pointers rathr than direct calls -(to allow customization in the hashing request) - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 13 +++++++++---- - 1 files changed, 9 insertions(+), 4 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 4262932..2b4f07a 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -51,6 +51,8 @@ enum engine_status { - struct req_progress { - struct sg_mapping_iter src_sg_it; - struct sg_mapping_iter dst_sg_it; -+ void (*complete) (void); -+ void (*process) (int is_first); - - /* src mostly */ - int sg_src_left; -@@ -251,6 +253,9 @@ static void mv_crypto_algo_completion(void) - struct ablkcipher_request *req = ablkcipher_request_cast(cpg->cur_req); - struct mv_req_ctx *req_ctx = ablkcipher_request_ctx(req); - -+ sg_miter_stop(&cpg->p.src_sg_it); -+ sg_miter_stop(&cpg->p.dst_sg_it); -+ - if (req_ctx->op != COP_AES_CBC) - return ; - -@@ -294,11 +299,9 @@ static void dequeue_complete_req(void) - if (cpg->p.hw_processed_bytes < cpg->p.hw_nbytes) { - /* process next scatter list entry */ - cpg->eng_st = ENGINE_BUSY; -- mv_process_current_q(0); -+ cpg->p.process(0); - } else { -- sg_miter_stop(&cpg->p.src_sg_it); -- sg_miter_stop(&cpg->p.dst_sg_it); -- mv_crypto_algo_completion(); -+ cpg->p.complete(); - cpg->eng_st = ENGINE_IDLE; - local_bh_disable(); - req->complete(req, 0); -@@ -331,6 +334,8 @@ static void mv_enqueue_new_req(struct ablkcipher_request *req) - cpg->cur_req = &req->base; - memset(p, 0, sizeof(struct req_progress)); - p->hw_nbytes = req->nbytes; -+ p->complete = mv_crypto_algo_completion; -+ p->process = mv_process_current_q; - - num_sgs = count_sgs(req->src, req->nbytes); - sg_miter_start(&p->src_sg_it, req->src, num_sgs, SG_MITER_FROM_SG); --- -1.7.6.5 -X-Git-Url: http://git.kernelconcepts.de/?p=mv-sheeva.git;a=blobdiff_plain;f=drivers%2Fc... - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 2b4f07a..49a2206 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -40,6 +40,7 @@ enum engine_status { - * @src_start: offset to add to src start position (scatter list) - * @crypt_len: length of current crypt process - * @hw_nbytes: total bytes to process in hw for this request -+ * @copy_back: whether to copy data back (crypt) or not (hash) - * @sg_dst_left: bytes left dst to process in this scatter list - * @dst_start: offset to add to dst start position (scatter list) - * @hw_processed_bytes: number of bytes processed by hw (request). -@@ -60,6 +61,7 @@ struct req_progress { - int crypt_len; - int hw_nbytes; - /* dst mostly */ -+ int copy_back; - int sg_dst_left; - int dst_start; - int hw_processed_bytes; -@@ -267,33 +269,35 @@ static void dequeue_complete_req(void) - struct crypto_async_request *req = cpg->cur_req; - void *buf; - int ret; -- int need_copy_len = cpg->p.crypt_len; -- int sram_offset = 0; -- - cpg->p.hw_processed_bytes += cpg->p.crypt_len; -- do { -- int dst_copy; -+ if (cpg->p.copy_back) { -+ int need_copy_len = cpg->p.crypt_len; -+ int sram_offset = 0; -+ do { -+ int dst_copy; -+ -+ if (!cpg->p.sg_dst_left) { -+ ret = sg_miter_next(&cpg->p.dst_sg_it); -+ BUG_ON(!ret); -+ cpg->p.sg_dst_left = cpg->p.dst_sg_it.length; -+ cpg->p.dst_start = 0; -+ } - -- if (!cpg->p.sg_dst_left) { -- ret = sg_miter_next(&cpg->p.dst_sg_it); -- BUG_ON(!ret); -- cpg->p.sg_dst_left = cpg->p.dst_sg_it.length; -- cpg->p.dst_start = 0; -- } -+ buf = cpg->p.dst_sg_it.addr; -+ buf += cpg->p.dst_start; - -- buf = cpg->p.dst_sg_it.addr; -- buf += cpg->p.dst_start; -+ dst_copy = min(need_copy_len, cpg->p.sg_dst_left); - -- dst_copy = min(need_copy_len, cpg->p.sg_dst_left); -+ memcpy(buf, -+ cpg->sram + SRAM_DATA_OUT_START + sram_offset, -+ dst_copy); -+ sram_offset += dst_copy; -+ cpg->p.sg_dst_left -= dst_copy; -+ need_copy_len -= dst_copy; -+ cpg->p.dst_start += dst_copy; -+ } while (need_copy_len > 0); -+ } - -- memcpy(buf, -- cpg->sram + SRAM_DATA_OUT_START + sram_offset, -- dst_copy); -- sram_offset += dst_copy; -- cpg->p.sg_dst_left -= dst_copy; -- need_copy_len -= dst_copy; -- cpg->p.dst_start += dst_copy; -- } while (need_copy_len > 0); - - BUG_ON(cpg->eng_st != ENGINE_W_DEQUEUE); - if (cpg->p.hw_processed_bytes < cpg->p.hw_nbytes) { -@@ -336,6 +340,7 @@ static void mv_enqueue_new_req(struct ablkcipher_request *req) - p->hw_nbytes = req->nbytes; - p->complete = mv_crypto_algo_completion; - p->process = mv_process_current_q; -+ p->copy_back = 1; - - num_sgs = count_sgs(req->src, req->nbytes); - sg_miter_start(&p->src_sg_it, req->src, num_sgs, SG_MITER_FROM_SG); -From 0c5c6c4bae8fe9ae3d86b44c332eb1267df1ec99 Mon Sep 17 00:00:00 2001 -From: Uri Simchoni uri@jdland.co.il -Date: Thu, 8 Apr 2010 19:33:26 +0300 -Subject: [PATCH] crypto: mv_cesa - Support processing of data from previous - requests - -Support processing of data from previous requests (as in hashing -update/final requests). - -Signed-off-by: Uri Simchoni uri@jdland.co.il -Signed-off-by: Herbert Xu herbert@gondor.apana.org.au ---- - drivers/crypto/mv_cesa.c | 8 +++++--- - 1 files changed, 5 insertions(+), 3 deletions(-) - -diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c -index 49a2206..d0fb10e 100644 ---- a/drivers/crypto/mv_cesa.c -+++ b/drivers/crypto/mv_cesa.c -@@ -184,10 +184,11 @@ static void copy_src_to_buf(struct req_progress *p, char *dbuf, int len) - static void setup_data_in(void) - { - struct req_progress *p = &cpg->p; -- p->crypt_len = -+ int data_in_sram = - min(p->hw_nbytes - p->hw_processed_bytes, cpg->max_req_size); -- copy_src_to_buf(p, cpg->sram + SRAM_DATA_IN_START, -- p->crypt_len); -+ copy_src_to_buf(p, cpg->sram + SRAM_DATA_IN_START + p->crypt_len, -+ data_in_sram - p->crypt_len); -+ p->crypt_len = data_in_sram; - } - - static void mv_process_current_q(int first_block) -@@ -298,6 +299,7 @@ static void dequeue_complete_req(void) - } while (need_copy_len > 0); - } - -+ cpg->p.crypt_len = 0; - - BUG_ON(cpg->eng_st != ENGINE_W_DEQUEUE); - if (cpg->p.hw_processed_bytes < cpg->p.hw_nbytes) { --- -1.7.6.5 diff --git a/src/patches/linux-2.6.32-imq-test2.patch b/src/patches/linux-2.6.32-imq-test2.patch deleted file mode 100644 index 17f85c3..0000000 --- a/src/patches/linux-2.6.32-imq-test2.patch +++ /dev/null @@ -1,1462 +0,0 @@ -diff -U 5 -Nr linux-2.6.32/drivers/net/imq.c linux-2.6.32-imq/drivers/net/imq.c ---- linux-2.6.32/drivers/net/imq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/drivers/net/imq.c 2009-12-11 15:08:01.958734740 +0200 -@@ -0,0 +1,632 @@ -+/* -+ * Pseudo-driver for the intermediate queue device. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Authors: Patrick McHardy, kaber@trash.net -+ * -+ * The first version was written by Martin Devera, devik@cdi.cz -+ * -+ * Credits: Jan Rafaj imq2t@cedric.vabo.cz -+ * - Update patch to 2.4.21 -+ * Sebastian Strollo sstrollo@nortelnetworks.com -+ * - Fix "Dead-loop on netdevice imq"-issue -+ * Marcel Sebek sebek64@post.cz -+ * - Update to 2.6.2-rc1 -+ * -+ * After some time of inactivity there is a group taking care -+ * of IMQ again: http://www.linuximq.net -+ * -+ * -+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 -+ * including the following changes: -+ * -+ * - Correction of ipv6 support "+"s issue (Hasso Tepper) -+ * - Correction of imq_init_devs() issue that resulted in -+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller) -+ * - Addition of functionality to choose number of IMQ devices -+ * during kernel config (Andre Correa) -+ * - Addition of functionality to choose how IMQ hooks on -+ * PRE and POSTROUTING (after or before NAT) (Andre Correa) -+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa) -+ * -+ * -+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were -+ * released with almost no problems. 2.6.14-x was released -+ * with some important changes: nfcache was removed; After -+ * some weeks of trouble we figured out that some IMQ fields -+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header. -+ * These functions are correctly patched by this new patch version. -+ * -+ * Thanks for all who helped to figure out all the problems with -+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX, -+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully -+ * I didn't forget anybody). I apologize again for my lack of time. -+ * -+ * -+ * 2008/06/17 - 2.6.25 - Changed imq.c to use qdisc_run() instead -+ * of qdisc_restart() and moved qdisc_run() to tasklet to avoid -+ * recursive locking. New initialization routines to fix 'rmmod' not -+ * working anymore. Used code from ifb.c. (Jussi Kivilinna) -+ * -+ * 2008/08/06 - 2.6.26 - (JK) -+ * - Replaced tasklet with 'netif_schedule()'. -+ * - Cleaned up and added comments for imq_nf_queue(). -+ * -+ * 2009/04/12 -+ * - Add skb_save_cb/skb_restore_cb helper functions for backuping -+ * control buffer. This is needed because qdisc-layer on kernels -+ * 2.6.27 and newer overwrite control buffer. (Jussi Kivilinna) -+ * - Add better locking for IMQ device. Hopefully this will solve -+ * SMP issues. (Jussi Kivilinna) -+ * - Port to 2.6.27 -+ * - Port to 2.6.28 -+ * - Port to 2.6.29 + fix rmmod not working -+ * -+ * 2009/04/20 - (Jussi Kivilinna) -+ * - Use netdevice feature flags to avoid extra packet handling -+ * by core networking layer and possibly increase performance. -+ * -+ * 2009/09/26 - (Jussi Kivilinna) -+ * - Add imq_nf_reinject_lockless to fix deadlock with -+ * imq_nf_queue/imq_nf_reinject. -+ * -+ * 2009/12/08 - (Jussi Kivilinna) -+ * - Port to 2.6.32 -+ * - Add check for skb->nf_queue_entry==NULL in imq_dev_xmit() -+ * - Also add better error checking for skb->nf_queue_entry usage -+ * -+ * Also, many thanks to pablo Sebastian Greco for making the initial -+ * patch and to those who helped the testing. -+ * -+ * More info at: http://www.linuximq.net/ (Andre Correa) -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/moduleparam.h> -+#include <linux/list.h> -+#include <linux/skbuff.h> -+#include <linux/netdevice.h> -+#include <linux/etherdevice.h> -+#include <linux/rtnetlink.h> -+#include <linux/if_arp.h> -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv4.h> -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ #include <linux/netfilter_ipv6.h> -+#endif -+#include <linux/imq.h> -+#include <net/pkt_sched.h> -+#include <net/netfilter/nf_queue.h> -+ -+static nf_hookfn imq_nf_hook; -+ -+static struct nf_hook_ops imq_ingress_ipv4 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP_PRI_MANGLE + 1 -+#else -+ .priority = NF_IP_PRI_NAT_DST + 1 -+#endif -+}; -+ -+static struct nf_hook_ops imq_egress_ipv4 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP_PRI_LAST -+#else -+ .priority = NF_IP_PRI_NAT_SRC - 1 -+#endif -+}; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+static struct nf_hook_ops imq_ingress_ipv6 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP6_PRI_MANGLE + 1 -+#else -+ .priority = NF_IP6_PRI_NAT_DST + 1 -+#endif -+}; -+ -+static struct nf_hook_ops imq_egress_ipv6 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP6_PRI_LAST -+#else -+ .priority = NF_IP6_PRI_NAT_SRC - 1 -+#endif -+}; -+#endif -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+static unsigned int numdevs = CONFIG_IMQ_NUM_DEVS; -+#else -+static unsigned int numdevs = IMQ_MAX_DEVS; -+#endif -+ -+static DEFINE_SPINLOCK(imq_nf_queue_lock); -+ -+static struct net_device *imq_devs_cache[IMQ_MAX_DEVS]; -+ -+ -+static struct net_device_stats *imq_get_stats(struct net_device *dev) -+{ -+ return &dev->stats; -+} -+ -+/* called for packets kfree'd in qdiscs at places other than enqueue */ -+static void imq_skb_destructor(struct sk_buff *skb) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ -+ if (entry) { -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+ } -+ -+ skb_restore_cb(skb); /* kfree backup */ -+} -+ -+/* locking not needed when called from imq_nf_queue */ -+static void imq_nf_reinject_lockless(struct nf_queue_entry *entry, -+ unsigned int verdict) -+{ -+ int status; -+ -+ if (!entry->next_outfn) { -+ nf_reinject(entry, verdict); -+ return; -+ } -+ -+ status = entry->next_outfn(entry, entry->next_queuenum); -+ if (status < 0) { -+ nf_queue_entry_release_refs(entry); -+ kfree_skb(entry->skb); -+ kfree(entry); -+ } -+} -+ -+static void imq_nf_reinject(struct nf_queue_entry *entry, unsigned int verdict) -+{ -+ int status; -+ -+ if (!entry->next_outfn) { -+ spin_lock_bh(&imq_nf_queue_lock); -+ nf_reinject(entry, verdict); -+ spin_unlock_bh(&imq_nf_queue_lock); -+ return; -+ } -+ -+ rcu_read_lock(); -+ local_bh_disable(); -+ status = entry->next_outfn(entry, entry->next_queuenum); -+ local_bh_enable(); -+ if (status < 0) { -+ nf_queue_entry_release_refs(entry); -+ kfree_skb(entry->skb); -+ kfree(entry); -+ } -+ -+ rcu_read_unlock(); -+} -+ -+static netdev_tx_t imq_dev_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ dev->trans_start = jiffies; -+ -+ dev->stats.tx_bytes += skb->len; -+ dev->stats.tx_packets++; -+ -+ if (entry == NULL) { -+ /* We don't know what is going on here.. packet is queued for -+ * imq device, but (probably) not by us. -+ * -+ * If this packet was not send here by imq_nf_queue(), then -+ * skb_save_cb() was not used and skb_free() should not show: -+ * WARNING: IMQ: kfree_skb: skb->cb_next:.. -+ * and/or -+ * WARNING: IMQ: kfree_skb: skb->nf_queue_entry... -+ * -+ * However if this message is shown, then IMQ is somehow broken -+ * and you should report this to linuximq.net. -+ */ -+ -+ /* imq_dev_xmit is black hole that eats all packets, report that -+ * we eat this packet happily and increase dropped counters. -+ */ -+ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ return NETDEV_TX_OK; -+ } -+ -+ skb_restore_cb(skb); /* restore skb->cb */ -+ -+ skb->imq_flags = 0; -+ skb->destructor = NULL; -+ -+ imq_nf_reinject(entry, NF_ACCEPT); -+ -+ return NETDEV_TX_OK; -+} -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num) -+{ -+ struct net_device *dev; -+ struct sk_buff *skb_orig, *skb, *skb_shared; -+ struct Qdisc *q; -+ struct netdev_queue *txq; -+ int users, index; -+ int retval = -EINVAL; -+ -+ index = entry->skb->imq_flags & IMQ_F_IFMASK; -+ if (unlikely(index > numdevs - 1)) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ numdevs - 1); -+ retval = -EINVAL; -+ goto out; -+ } -+ -+ /* check for imq device by index from cache */ -+ dev = imq_devs_cache[index]; -+ if (unlikely(!dev)) { -+ char buf[8]; -+ -+ /* get device by name and cache result */ -+ snprintf(buf, sizeof(buf), "imq%d", index); -+ dev = dev_get_by_name(&init_net, buf); -+ if (!dev) { -+ /* not found ?!*/ -+ BUG(); -+ retval = -ENODEV; -+ goto out; -+ } -+ -+ imq_devs_cache[index] = dev; -+ dev_put(dev); -+ } -+ -+ if (unlikely(!(dev->flags & IFF_UP))) { -+ entry->skb->imq_flags = 0; -+ imq_nf_reinject_lockless(entry, NF_ACCEPT); -+ retval = 0; -+ goto out; -+ } -+ dev->last_rx = jiffies; -+ -+ skb = entry->skb; -+ skb_orig = NULL; -+ -+ /* skb has owner? => make clone */ -+ if (unlikely(skb->destructor)) { -+ skb_orig = skb; -+ skb = skb_clone(skb, GFP_ATOMIC); -+ if (!skb) { -+ retval = -ENOMEM; -+ goto out; -+ } -+ entry->skb = skb; -+ } -+ -+ skb->nf_queue_entry = entry; -+ -+ dev->stats.rx_bytes += skb->len; -+ dev->stats.rx_packets++; -+ -+ txq = dev_pick_tx(dev, skb); -+ -+ q = rcu_dereference(txq->qdisc); -+ if (unlikely(!q->enqueue)) -+ goto packet_not_eaten_by_imq_dev; -+ -+ spin_lock_bh(qdisc_lock(q)); -+ -+ users = atomic_read(&skb->users); -+ -+ skb_shared = skb_get(skb); /* increase reference count by one */ -+ skb_save_cb(skb_shared); /* backup skb->cb, as qdisc layer will -+ overwrite it */ -+ qdisc_enqueue_root(skb_shared, q); /* might kfree_skb */ -+ -+ if (likely(atomic_read(&skb_shared->users) == users + 1)) { -+ kfree_skb(skb_shared); /* decrease reference count by one */ -+ -+ skb->destructor = &imq_skb_destructor; -+ -+ /* cloned? */ -+ if (skb_orig) -+ kfree_skb(skb_orig); /* free original */ -+ -+ spin_unlock_bh(qdisc_lock(q)); -+ -+ /* schedule qdisc dequeue */ -+ __netif_schedule(q); -+ -+ retval = 0; -+ goto out; -+ } else { -+ skb_restore_cb(skb_shared); /* restore skb->cb */ -+ skb->nf_queue_entry = NULL; -+ /* qdisc dropped packet and decreased skb reference count of -+ * skb, so we don't really want to and try refree as that would -+ * actually destroy the skb. */ -+ spin_unlock_bh(qdisc_lock(q)); -+ goto packet_not_eaten_by_imq_dev; -+ } -+ -+packet_not_eaten_by_imq_dev: -+ /* cloned? restore original */ -+ if (skb_orig) { -+ kfree_skb(skb); -+ entry->skb = skb_orig; -+ } -+ retval = -1; -+out: -+ return retval; -+} -+ -+static struct nf_queue_handler nfqh = { -+ .name = "imq", -+ .outfn = imq_nf_queue, -+}; -+ -+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff *pskb, -+ const struct net_device *indev, -+ const struct net_device *outdev, -+ int (*okfn)(struct sk_buff *)) -+{ -+ if (pskb->imq_flags & IMQ_F_ENQUEUE) -+ return NF_QUEUE; -+ -+ return NF_ACCEPT; -+} -+ -+static int imq_close(struct net_device *dev) -+{ -+ netif_stop_queue(dev); -+ return 0; -+} -+ -+static int imq_open(struct net_device *dev) -+{ -+ netif_start_queue(dev); -+ return 0; -+} -+ -+static const struct net_device_ops imq_netdev_ops = { -+ .ndo_open = imq_open, -+ .ndo_stop = imq_close, -+ .ndo_start_xmit = imq_dev_xmit, -+ .ndo_get_stats = imq_get_stats, -+}; -+ -+static void imq_setup(struct net_device *dev) -+{ -+ dev->netdev_ops = &imq_netdev_ops; -+ dev->type = ARPHRD_VOID; -+ dev->mtu = 16000; -+ dev->tx_queue_len = 11000; -+ dev->flags = IFF_NOARP; -+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | -+ NETIF_F_GSO | NETIF_F_HW_CSUM | -+ NETIF_F_HIGHDMA; -+ dev->priv_flags &= ~IFF_XMIT_DST_RELEASE; -+} -+ -+static int imq_validate(struct nlattr *tb[], struct nlattr *data[]) -+{ -+ int ret = 0; -+ -+ if (tb[IFLA_ADDRESS]) { -+ if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN) { -+ ret = -EINVAL; -+ goto end; -+ } -+ if (!is_valid_ether_addr(nla_data(tb[IFLA_ADDRESS]))) { -+ ret = -EADDRNOTAVAIL; -+ goto end; -+ } -+ } -+ return 0; -+end: -+ printk(KERN_WARNING "IMQ: imq_validate failed (%d)\n", ret); -+ return ret; -+} -+ -+static struct rtnl_link_ops imq_link_ops __read_mostly = { -+ .kind = "imq", -+ .priv_size = 0, -+ .setup = imq_setup, -+ .validate = imq_validate, -+}; -+ -+static int __init imq_init_hooks(void) -+{ -+ int err; -+ -+ nf_register_queue_imq_handler(&nfqh); -+ -+ err = nf_register_hook(&imq_ingress_ipv4); -+ if (err) -+ goto err1; -+ -+ err = nf_register_hook(&imq_egress_ipv4); -+ if (err) -+ goto err2; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ err = nf_register_hook(&imq_ingress_ipv6); -+ if (err) -+ goto err3; -+ -+ err = nf_register_hook(&imq_egress_ipv6); -+ if (err) -+ goto err4; -+#endif -+ -+ return 0; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+err4: -+ nf_unregister_hook(&imq_ingress_ipv6); -+err3: -+ nf_unregister_hook(&imq_egress_ipv4); -+#endif -+err2: -+ nf_unregister_hook(&imq_ingress_ipv4); -+err1: -+ nf_unregister_queue_imq_handler(); -+ return err; -+} -+ -+static int __init imq_init_one(int index) -+{ -+ struct net_device *dev; -+ int ret; -+ -+ dev = alloc_netdev(0, "imq%d", imq_setup); -+ if (!dev) -+ return -ENOMEM; -+ -+ ret = dev_alloc_name(dev, dev->name); -+ if (ret < 0) -+ goto fail; -+ -+ dev->rtnl_link_ops = &imq_link_ops; -+ ret = register_netdevice(dev); -+ if (ret < 0) -+ goto fail; -+ -+ return 0; -+fail: -+ free_netdev(dev); -+ return ret; -+} -+ -+static int __init imq_init_devs(void) -+{ -+ int err, i; -+ -+ if (numdevs < 1 || numdevs > IMQ_MAX_DEVS) { -+ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n", -+ IMQ_MAX_DEVS); -+ return -EINVAL; -+ } -+ -+ rtnl_lock(); -+ err = __rtnl_link_register(&imq_link_ops); -+ -+ for (i = 0; i < numdevs && !err; i++) -+ err = imq_init_one(i); -+ -+ if (err) { -+ __rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ } -+ rtnl_unlock(); -+ -+ return err; -+} -+ -+static int __init imq_init_module(void) -+{ -+ int err; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS > 16); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS < 2); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS - 1 > IMQ_F_IFMASK); -+#endif -+ -+ err = imq_init_devs(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_devs(net)\n"); -+ return err; -+ } -+ -+ err = imq_init_hooks(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n"); -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ return err; -+ } -+ -+ printk(KERN_INFO "IMQ driver loaded successfully.\n"); -+ -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n"); -+#endif -+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n"); -+#endif -+ -+ return 0; -+} -+ -+static void __exit imq_unhook(void) -+{ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ nf_unregister_hook(&imq_ingress_ipv6); -+ nf_unregister_hook(&imq_egress_ipv6); -+#endif -+ nf_unregister_hook(&imq_ingress_ipv4); -+ nf_unregister_hook(&imq_egress_ipv4); -+ -+ nf_unregister_queue_imq_handler(); -+} -+ -+static void __exit imq_cleanup_devs(void) -+{ -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+} -+ -+static void __exit imq_exit_module(void) -+{ -+ imq_unhook(); -+ imq_cleanup_devs(); -+ printk(KERN_INFO "IMQ driver unloaded successfully.\n"); -+} -+ -+module_init(imq_init_module); -+module_exit(imq_exit_module); -+ -+module_param(numdevs, int, 0); -+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will " -+ "be created)"); -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See " -+ "http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_RTNL_LINK("imq"); -+ -diff -U 5 -Nr linux-2.6.32/drivers/net/Kconfig linux-2.6.32-imq/drivers/net/Kconfig ---- linux-2.6.32/drivers/net/Kconfig 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/drivers/net/Kconfig 2009-12-11 14:16:42.678730699 +0200 -@@ -107,10 +107,133 @@ - http://www.tldp.org/docs.html#howto. - - To compile this driver as a module, choose M here: the module - will be called eql. If unsure, say N. - -+config IMQ -+ tristate "IMQ (intermediate queueing device) support" -+ depends on NETDEVICES && NETFILTER -+ ---help--- -+ The IMQ device(s) is used as placeholder for QoS queueing -+ disciplines. Every packet entering/leaving the IP stack can be -+ directed through the IMQ device where it's enqueued/dequeued to the -+ attached qdisc. This allows you to treat network devices as classes -+ and distribute bandwidth among them. Iptables is used to specify -+ through which IMQ device, if any, packets travel. -+ -+ More information at: http://www.linuximq.net/ -+ -+ To compile this driver as a module, choose M here: the module -+ will be called imq. If unsure, say N. -+ -+choice -+ prompt "IMQ behavior (PRE/POSTROUTING)" -+ depends on IMQ -+ default IMQ_BEHAVIOR_AB -+ help -+ -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ IMQ can work in any of the following ways: -+ -+ PREROUTING | POSTROUTING -+ -----------------|------------------- -+ #1 After NAT | After NAT -+ #2 After NAT | Before NAT -+ #3 Before NAT | After NAT -+ #4 Before NAT | Before NAT -+ -+ The default behavior is to hook before NAT on PREROUTING -+ and after NAT on POSTROUTING (#3). -+ -+ This settings are specially usefull when trying to use IMQ -+ to shape NATed clients. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AA -+ bool "IMQ AA" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AB -+ bool "IMQ AB" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BA -+ bool "IMQ BA" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BB -+ bool "IMQ BB" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+endchoice -+ -+config IMQ_NUM_DEVS -+ -+ int "Number of IMQ devices" -+ range 2 16 -+ depends on IMQ -+ default "16" -+ help -+ -+ This settings defines how many IMQ devices will be -+ created. -+ -+ The default value is 16. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ - config TUN - tristate "Universal TUN/TAP device driver support" - select CRC32 - ---help--- - TUN/TAP provides packet reception and transmission for user space -diff -U 5 -Nr linux-2.6.32/drivers/net/Makefile linux-2.6.32-imq/drivers/net/Makefile ---- linux-2.6.32/drivers/net/Makefile 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/drivers/net/Makefile 2009-12-11 14:16:42.678730699 +0200 -@@ -163,10 +163,11 @@ - obj-$(CONFIG_SLHC) += slhc.o - - obj-$(CONFIG_XEN_NETDEV_FRONTEND) += xen-netfront.o - - obj-$(CONFIG_DUMMY) += dummy.o -+obj-$(CONFIG_IMQ) += imq.o - obj-$(CONFIG_IFB) += ifb.o - obj-$(CONFIG_MACVLAN) += macvlan.o - obj-$(CONFIG_DE600) += de600.o - obj-$(CONFIG_DE620) += de620.o - obj-$(CONFIG_LANCE) += lance.o -diff -U 5 -Nr linux-2.6.32/include/linux/imq.h linux-2.6.32-imq/include/linux/imq.h ---- linux-2.6.32/include/linux/imq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/imq.h 2009-12-11 14:16:42.678730699 +0200 -@@ -0,0 +1,13 @@ -+#ifndef _IMQ_H -+#define _IMQ_H -+ -+/* IFMASK (16 device indexes, 0 to 15) and flag(s) fit in 5 bits */ -+#define IMQ_F_BITS 5 -+ -+#define IMQ_F_IFMASK 0x0f -+#define IMQ_F_ENQUEUE 0x10 -+ -+#define IMQ_MAX_DEVS (IMQ_F_IFMASK + 1) -+ -+#endif /* _IMQ_H */ -+ -diff -U 5 -Nr linux-2.6.32/include/linux/netdevice.h linux-2.6.32-imq/include/linux/netdevice.h ---- linux-2.6.32/include/linux/netdevice.h 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/netdevice.h 2009-12-11 14:16:42.679730960 +0200 -@@ -1112,10 +1112,11 @@ - extern struct net_device *__dev_get_by_name(struct net *net, const char *name); - extern int dev_alloc_name(struct net_device *dev, const char *name); - extern int dev_open(struct net_device *dev); - extern int dev_close(struct net_device *dev); - extern void dev_disable_lro(struct net_device *dev); -+extern struct netdev_queue *dev_pick_tx(struct net_device *dev, struct sk_buff *skb); - extern int dev_queue_xmit(struct sk_buff *skb); - extern int register_netdevice(struct net_device *dev); - extern void unregister_netdevice(struct net_device *dev); - extern void free_netdev(struct net_device *dev); - extern void synchronize_net(void); -diff -U 5 -Nr linux-2.6.32/include/linux/netfilter/xt_IMQ.h linux-2.6.32-imq/include/linux/netfilter/xt_IMQ.h ---- linux-2.6.32/include/linux/netfilter/xt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/netfilter/xt_IMQ.h 2009-12-11 14:16:42.679730960 +0200 -@@ -0,0 +1,9 @@ -+#ifndef _XT_IMQ_H -+#define _XT_IMQ_H -+ -+struct xt_imq_info { -+ unsigned int todev; /* target imq device */ -+}; -+ -+#endif /* _XT_IMQ_H */ -+ -diff -U 5 -Nr linux-2.6.32/include/linux/netfilter_ipv4/ipt_IMQ.h linux-2.6.32-imq/include/linux/netfilter_ipv4/ipt_IMQ.h ---- linux-2.6.32/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/netfilter_ipv4/ipt_IMQ.h 2009-12-11 14:16:42.679730960 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IPT_IMQ_H -+#define _IPT_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ipt_imq_info xt_imq_info -+ -+#endif /* _IPT_IMQ_H */ -+ -diff -U 5 -Nr linux-2.6.32/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-2.6.32-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h ---- linux-2.6.32/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h 2009-12-11 14:16:42.679730960 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IP6T_IMQ_H -+#define _IP6T_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ip6t_imq_info xt_imq_info -+ -+#endif /* _IP6T_IMQ_H */ -+ -diff -U 5 -Nr linux-2.6.32/include/linux/skbuff.h linux-2.6.32-imq/include/linux/skbuff.h ---- linux-2.6.32/include/linux/skbuff.h 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/include/linux/skbuff.h 2009-12-11 14:16:42.680730834 +0200 -@@ -27,10 +27,13 @@ - #include <linux/textsearch.h> - #include <net/checksum.h> - #include <linux/rcupdate.h> - #include <linux/dmaengine.h> - #include <linux/hrtimer.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - /* Don't change this without changing skb_csum_unnecessary! */ - #define CHECKSUM_NONE 0 - #define CHECKSUM_UNNECESSARY 1 - #define CHECKSUM_COMPLETE 2 -@@ -328,10 +331,13 @@ - * layer. Please put your private variables there. If you - * want to keep them across layers you have to do a skb_clone() - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48]; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ void *cb_next; -+#endif - - unsigned int len, - data_len; - __u16 mac_len, - hdr_len; -@@ -360,10 +366,13 @@ - void (*destructor)(struct sk_buff *skb); - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - struct nf_conntrack *nfct; - struct sk_buff *nfct_reasm; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ struct nf_queue_entry *nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; - #endif - - int iif; -@@ -381,10 +390,14 @@ - #endif - kmemcheck_bitfield_end(flags2); - - /* 0/14 bit hole */ - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ __u8 imq_flags:IMQ_F_BITS; -+#endif -+ - #ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; - #endif - #ifdef CONFIG_NETWORK_SECMARK - __u32 secmark; -@@ -435,10 +448,16 @@ - static inline struct rtable *skb_rtable(const struct sk_buff *skb) - { - return (struct rtable *)skb_dst(skb); - } - -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern int skb_save_cb(struct sk_buff *skb); -+extern int skb_restore_cb(struct sk_buff *skb); -+#endif -+ - extern void kfree_skb(struct sk_buff *skb); - extern void consume_skb(struct sk_buff *skb); - extern void __kfree_skb(struct sk_buff *skb); - extern struct sk_buff *__alloc_skb(unsigned int size, - gfp_t priority, int fclone, int node); -@@ -1970,10 +1989,14 @@ - nf_conntrack_get(src->nfct); - dst->nfctinfo = src->nfctinfo; - dst->nfct_reasm = src->nfct_reasm; - nf_conntrack_get_reasm(src->nfct_reasm); - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ dst->imq_flags = src->imq_flags; -+ dst->nf_queue_entry = src->nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - dst->nf_bridge = src->nf_bridge; - nf_bridge_get(src->nf_bridge); - #endif - } -diff -U 5 -Nr linux-2.6.32/include/net/netfilter/nf_queue.h linux-2.6.32-imq/include/net/netfilter/nf_queue.h ---- linux-2.6.32/include/net/netfilter/nf_queue.h 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/include/net/netfilter/nf_queue.h 2009-12-11 14:16:42.680730834 +0200 -@@ -11,10 +11,16 @@ - u_int8_t pf; - unsigned int hook; - struct net_device *indev; - struct net_device *outdev; - int (*okfn)(struct sk_buff *); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ int (*next_outfn)(struct nf_queue_entry *entry, -+ unsigned int queuenum); -+ unsigned int next_queuenum; -+#endif - }; - - #define nf_queue_entry_reroute(x) ((void *)x + sizeof(struct nf_queue_entry)) - - /* Packet queuing */ -@@ -28,7 +34,13 @@ - const struct nf_queue_handler *qh); - extern int nf_unregister_queue_handler(u_int8_t pf, - const struct nf_queue_handler *qh); - extern void nf_unregister_queue_handlers(const struct nf_queue_handler *qh); - extern void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict); -+extern void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern void nf_register_queue_imq_handler(const struct nf_queue_handler *qh); -+extern void nf_unregister_queue_imq_handler(void); -+#endif - - #endif /* _NF_QUEUE_H */ -diff -U 5 -Nr linux-2.6.32/net/core/dev.c linux-2.6.32-imq/net/core/dev.c ---- linux-2.6.32/net/core/dev.c 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/net/core/dev.c 2009-12-11 14:16:42.681731014 +0200 -@@ -94,10 +94,13 @@ - #include <linux/notifier.h> - #include <linux/skbuff.h> - #include <net/net_namespace.h> - #include <net/sock.h> - #include <linux/rtnetlink.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - #include <linux/proc_fs.h> - #include <linux/seq_file.h> - #include <linux/stat.h> - #include <linux/if_bridge.h> - #include <linux/if_macvlan.h> -@@ -1702,11 +1705,15 @@ - { - const struct net_device_ops *ops = dev->netdev_ops; - int rc; - - if (likely(!skb->next)) { -- if (!list_empty(&ptype_all)) -+ if (!list_empty(&ptype_all) -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ && !(skb->imq_flags & IMQ_F_ENQUEUE) -+#endif -+ ) - dev_queue_xmit_nit(skb, dev); - - if (netif_needs_gso(dev, skb)) { - if (unlikely(dev_gso_segment(skb))) - goto out_kfree_skb; -@@ -1787,12 +1794,11 @@ - - return (u16) (((u64) hash * dev->real_num_tx_queues) >> 32); - } - EXPORT_SYMBOL(skb_tx_hash); - --static struct netdev_queue *dev_pick_tx(struct net_device *dev, -- struct sk_buff *skb) -+struct netdev_queue *dev_pick_tx(struct net_device *dev, struct sk_buff *skb) - { - const struct net_device_ops *ops = dev->netdev_ops; - u16 queue_index = 0; - - if (ops->ndo_select_queue) -@@ -1801,10 +1807,11 @@ - queue_index = skb_tx_hash(dev, skb); - - skb_set_queue_mapping(skb, queue_index); - return netdev_get_tx_queue(dev, queue_index); - } -+EXPORT_SYMBOL(dev_pick_tx); - - static inline int __dev_xmit_skb(struct sk_buff *skb, struct Qdisc *q, - struct net_device *dev, - struct netdev_queue *txq) - { -diff -U 5 -Nr linux-2.6.32/net/core/skbuff.c linux-2.6.32-imq/net/core/skbuff.c ---- linux-2.6.32/net/core/skbuff.c 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/net/core/skbuff.c 2009-12-11 15:12:39.294981618 +0200 -@@ -70,10 +70,13 @@ - - #include "kmap_skb.h" - - static struct kmem_cache *skbuff_head_cache __read_mostly; - static struct kmem_cache *skbuff_fclone_cache __read_mostly; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static struct kmem_cache *skbuff_cb_store_cache __read_mostly; -+#endif - - static void sock_pipe_buf_release(struct pipe_inode_info *pipe, - struct pipe_buffer *buf) - { - put_page(buf->page); -@@ -89,10 +92,87 @@ - struct pipe_buffer *buf) - { - return 1; - } - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+/* Control buffer save/restore for IMQ devices */ -+struct skb_cb_table { -+ void *cb_next; -+ atomic_t refcnt; -+ char cb[48]; -+}; -+ -+static DEFINE_SPINLOCK(skb_cb_store_lock); -+ -+int skb_save_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ next = kmem_cache_alloc(skbuff_cb_store_cache, GFP_ATOMIC); -+ if (!next) -+ return -ENOMEM; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(next->cb, skb->cb, sizeof(skb->cb)); -+ next->cb_next = skb->cb_next; -+ -+ atomic_set(&next->refcnt, 1); -+ -+ skb->cb_next = next; -+ return 0; -+} -+EXPORT_SYMBOL(skb_save_cb); -+ -+int skb_restore_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ if (!skb->cb_next) -+ return 0; -+ -+ next = skb->cb_next; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(skb->cb, next->cb, sizeof(skb->cb)); -+ skb->cb_next = next->cb_next; -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ if (atomic_dec_and_test(&next->refcnt)) { -+ kmem_cache_free(skbuff_cb_store_cache, next); -+ } -+ -+ spin_unlock(&skb_cb_store_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(skb_restore_cb); -+ -+static void skb_copy_stored_cb(struct sk_buff *new, const struct sk_buff *__old) -+{ -+ struct skb_cb_table *next; -+ struct sk_buff *old; -+ -+ if (!__old->cb_next) { -+ new->cb_next = NULL; -+ return; -+ } -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ old = (struct sk_buff *)__old; -+ -+ next = old->cb_next; -+ atomic_inc(&next->refcnt); -+ new->cb_next = next; -+ -+ spin_unlock(&skb_cb_store_lock); -+} -+#endif - - /* Pipe buffer operations for a socket. */ - static struct pipe_buf_operations sock_pipe_buf_ops = { - .can_merge = 0, - .map = generic_pipe_buf_map, -@@ -396,10 +476,30 @@ - #endif - if (skb->destructor) { - WARN_ON(in_irq()); - skb->destructor(skb); - } -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ /* This should not happen. When it does, avoid memleak by restoring -+ the chain of cb-backups. */ -+ while(skb->cb_next != NULL) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING "IMQ: kfree_skb: skb->cb_next: " -+ "%08x\n", (unsigned int)skb->cb_next); -+ -+ skb_restore_cb(skb); -+ } -+ /* This should not happen either, nf_queue_entry is nullified in -+ * imq_dev_xmit(). If we have non-NULL nf_queue_entry then we are -+ * leaking entry pointers, maybe memory. We don't know if this is -+ * pointer to already freed memory, or should this be freed. -+ * If this happens we need to add refcounting, etc for nf_queue_entry. -+ */ -+ if (skb->nf_queue_entry && net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: kfree_skb: skb->nf_queue_entry != NULL"); -+#endif - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - nf_conntrack_put(skb->nfct); - nf_conntrack_put_reasm(skb->nfct_reasm); - #endif - #ifdef CONFIG_BRIDGE_NETFILTER -@@ -533,10 +633,13 @@ - skb_dst_set(new, dst_clone(skb_dst(old))); - #ifdef CONFIG_XFRM - new->sp = secpath_get(old->sp); - #endif - memcpy(new->cb, old->cb, sizeof(old->cb)); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skb_copy_stored_cb(new, old); -+#endif - new->csum = old->csum; - new->local_df = old->local_df; - new->pkt_type = old->pkt_type; - new->ip_summed = old->ip_summed; - skb_copy_queue_mapping(new, old); -@@ -2774,10 +2877,17 @@ - (2*sizeof(struct sk_buff)) + - sizeof(atomic_t), - 0, - SLAB_HWCACHE_ALIGN|SLAB_PANIC, - NULL); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skbuff_cb_store_cache = kmem_cache_create("skbuff_cb_store_cache", -+ sizeof(struct skb_cb_table), -+ 0, -+ SLAB_HWCACHE_ALIGN|SLAB_PANIC, -+ NULL); -+#endif - } - - /** - * skb_to_sgvec - Fill a scatter-gather list from a socket buffer - * @skb: Socket buffer containing the buffers to be mapped -diff -U 5 -Nr linux-2.6.32/net/netfilter/Kconfig linux-2.6.32-imq/net/netfilter/Kconfig ---- linux-2.6.32/net/netfilter/Kconfig 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/net/netfilter/Kconfig 2009-12-11 14:16:42.681731014 +0200 -@@ -394,10 +394,22 @@ - echo netfilter-ssh > /sys/class/leds/<ledname>/trigger - - For more information on the LEDs available on your system, see - Documentation/leds-class.txt - -+config NETFILTER_XT_TARGET_IMQ -+ tristate '"IMQ" target support' -+ depends on NETFILTER_XTABLES -+ depends on IP_NF_MANGLE || IP6_NF_MANGLE -+ select IMQ -+ default m if NETFILTER_ADVANCED=n -+ help -+ This option adds a `IMQ' target which is used to specify if and -+ to which imq device packets should get enqueued/dequeued. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ - config NETFILTER_XT_TARGET_MARK - tristate '"MARK" target support' - default m if NETFILTER_ADVANCED=n - help - This option adds a `MARK' target, which allows you to create rules -diff -U 5 -Nr linux-2.6.32/net/netfilter/Makefile linux-2.6.32-imq/net/netfilter/Makefile ---- linux-2.6.32/net/netfilter/Makefile 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/net/netfilter/Makefile 2009-12-11 14:16:42.681731014 +0200 -@@ -44,10 +44,11 @@ - obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIFY) += xt_CLASSIFY.o - obj-$(CONFIG_NETFILTER_XT_TARGET_CONNMARK) += xt_CONNMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_IMQ) += xt_IMQ.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o - obj-$(CONFIG_NETFILTER_XT_TARGET_MARK) += xt_MARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFLOG) += xt_NFLOG.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NOTRACK) += xt_NOTRACK.o -diff -U 5 -Nr linux-2.6.32/net/netfilter/nf_queue.c linux-2.6.32-imq/net/netfilter/nf_queue.c ---- linux-2.6.32/net/netfilter/nf_queue.c 2009-12-03 05:51:21.000000000 +0200 -+++ linux-2.6.32-imq/net/netfilter/nf_queue.c 2009-12-11 14:16:42.681731014 +0200 -@@ -18,10 +18,30 @@ - */ - static const struct nf_queue_handler *queue_handler[NFPROTO_NUMPROTO] __read_mostly; - - static DEFINE_MUTEX(queue_handler_mutex); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static const struct nf_queue_handler *queue_imq_handler; -+ -+void nf_register_queue_imq_handler(const struct nf_queue_handler *qh) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, qh); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL(nf_register_queue_imq_handler); -+ -+void nf_unregister_queue_imq_handler(void) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, NULL); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL(nf_unregister_queue_imq_handler); -+#endif -+ - /* return EBUSY when somebody else is registered, return EEXIST if the - * same handler is registered, return 0 in case of success. */ - int nf_register_queue_handler(u_int8_t pf, const struct nf_queue_handler *qh) - { - int ret; -@@ -78,11 +98,11 @@ - - synchronize_rcu(); - } - EXPORT_SYMBOL_GPL(nf_unregister_queue_handlers); - --static void nf_queue_entry_release_refs(struct nf_queue_entry *entry) -+void nf_queue_entry_release_refs(struct nf_queue_entry *entry) - { - /* Release those devices we held, or Alexey will kill me. */ - if (entry->indev) - dev_put(entry->indev); - if (entry->outdev) -@@ -98,10 +118,11 @@ - } - #endif - /* Drop reference to owner of hook which queued us. */ - module_put(entry->elem->owner); - } -+EXPORT_SYMBOL_GPL(nf_queue_entry_release_refs); - - /* - * Any packet that leaves via this function must come back - * through nf_reinject(). - */ -@@ -119,16 +140,30 @@ - struct net_device *physindev; - struct net_device *physoutdev; - #endif - const struct nf_afinfo *afinfo; - const struct nf_queue_handler *qh; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ const struct nf_queue_handler *qih = NULL; -+#endif - - /* QUEUE == DROP if noone is waiting, to be safe. */ - rcu_read_lock(); - - qh = rcu_dereference(queue_handler[pf]); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ if (pf == PF_INET || pf == PF_INET6) -+#else -+ if (pf == PF_INET) -+#endif -+ qih = rcu_dereference(queue_imq_handler); -+ -+ if (!qh && !qih) -+#else /* !IMQ */ - if (!qh) -+#endif - goto err_unlock; - - afinfo = nf_get_afinfo(pf); - if (!afinfo) - goto err_unlock; -@@ -143,10 +178,14 @@ - .pf = pf, - .hook = hook, - .indev = indev, - .outdev = outdev, - .okfn = okfn, -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ .next_outfn = qh ? qh->outfn : NULL, -+ .next_queuenum = queuenum, -+#endif - }; - - /* If it's going away, ignore hook. */ - if (!try_module_get(entry->elem->owner)) { - rcu_read_unlock(); -@@ -168,12 +207,23 @@ - if (physoutdev) - dev_hold(physoutdev); - } - #endif - afinfo->saveroute(skb, entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ if (qih) { -+ status = qih->outfn(entry, queuenum); -+ goto imq_skip_queue; -+ } -+#endif -+ - status = qh->outfn(entry, queuenum); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+imq_skip_queue: -+#endif - rcu_read_unlock(); - - if (status < 0) { - nf_queue_entry_release_refs(entry); - goto err; -diff -U 5 -Nr linux-2.6.32/net/netfilter/xt_IMQ.c linux-2.6.32-imq/net/netfilter/xt_IMQ.c ---- linux-2.6.32/net/netfilter/xt_IMQ.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-2.6.32-imq/net/netfilter/xt_IMQ.c 2009-12-11 14:16:42.681731014 +0200 -@@ -0,0 +1,73 @@ -+/* -+ * This target marks packets to be enqueued to an imq device -+ */ -+#include <linux/module.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_IMQ.h> -+#include <linux/imq.h> -+ -+static unsigned int imq_target(struct sk_buff *pskb, -+ const struct xt_target_param *par) -+{ -+ const struct xt_imq_info *mr = par->targinfo; -+ -+ pskb->imq_flags = (mr->todev & IMQ_F_IFMASK) | IMQ_F_ENQUEUE; -+ -+ return XT_CONTINUE; -+} -+ -+static bool imq_checkentry(const struct xt_tgchk_param *par) -+{ -+ struct xt_imq_info *mr = par->targinfo; -+ -+ if (mr->todev > IMQ_MAX_DEVS - 1) { -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ IMQ_MAX_DEVS - 1); -+ return 0; -+ } -+ -+ return 1; -+} -+ -+static struct xt_target xt_imq_reg[] __read_mostly = { -+ { -+ .name = "IMQ", -+ .family = AF_INET, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+ { -+ .name = "IMQ", -+ .family = AF_INET6, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+}; -+ -+static int __init imq_init(void) -+{ -+ return xt_register_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+static void __exit imq_fini(void) -+{ -+ xt_unregister_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+module_init(imq_init); -+module_exit(imq_fini); -+ -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ipt_IMQ"); -+MODULE_ALIAS("ip6t_IMQ"); -+ diff --git a/src/patches/linux-2.6.32.11-netdev-1.patch b/src/patches/linux-2.6.32.11-netdev-1.patch deleted file mode 100644 index 65cd319..0000000 --- a/src/patches/linux-2.6.32.11-netdev-1.patch +++ /dev/null @@ -1,478 +0,0 @@ -diff -Nur linux-2.6.32.11.vanilla/drivers/leds/Kconfig linux-2.6.32.11/drivers/leds/Kconfig ---- linux-2.6.32.11.vanilla/drivers/leds/Kconfig 2010-04-02 00:59:14.000000000 +0200 -+++ linux-2.6.32.11/drivers/leds/Kconfig 2010-04-18 17:12:55.000000000 +0200 -@@ -304,4 +304,11 @@ - comment "iptables trigger is under Netfilter config (LED target)" - depends on LEDS_TRIGGERS - -+config LEDS_TRIGGER_NETDEV -+ tristate "LED Netdev Trigger" -+ depends on LEDS_TRIGGERS -+ help -+ This allows LEDs to be controlled by network device activity. -+ If unsure, say Y. -+ - endif # NEW_LEDS -diff -Nur linux-2.6.32.11.vanilla/drivers/leds/ledtrig-netdev.c linux-2.6.32.11/drivers/leds/ledtrig-netdev.c ---- linux-2.6.32.11.vanilla/drivers/leds/ledtrig-netdev.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.11/drivers/leds/ledtrig-netdev.c 2010-04-18 16:17:25.000000000 +0200 -@@ -0,0 +1,451 @@ -+/* -+ * LED Kernel Netdev Trigger -+ * -+ * Toggles the LED to reflect the link and traffic state of a named net device -+ * -+ * Copyright 2007 Oliver Jowett oliver@opencloud.com -+ * -+ * Derived from ledtrig-timer.c which is: -+ * Copyright 2005-2006 Openedhand Ltd. -+ * Author: Richard Purdie rpurdie@openedhand.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/module.h> -+#include <linux/jiffies.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/device.h> -+#include <linux/sysdev.h> -+#include <linux/netdevice.h> -+#include <linux/timer.h> -+#include <linux/ctype.h> -+#include <linux/leds.h> -+#include <linux/version.h> -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+#include <net/net_namespace.h> -+#endif -+ -+#include "leds.h" -+ -+/* -+ * Configurable sysfs attributes: -+ * -+ * device_name - network device name to monitor -+ * -+ * interval - duration of LED blink, in milliseconds -+ * -+ * mode - either "none" (LED is off) or a space separated list of one or more of: -+ * link: LED's normal state reflects whether the link is up (has carrier) or not -+ * tx: LED blinks on transmitted data -+ * rx: LED blinks on receive data -+ * -+ * Some suggestions: -+ * -+ * Simple link status LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo link >someled/mode -+ * -+ * Ethernet-style link/activity LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo "link tx rx" >someled/mode -+ * -+ * Modem-style tx/rx LEDs: -+ * $ echo netdev >led1/trigger -+ * $ echo ppp0 >led1/device_name -+ * $ echo tx >led1/mode -+ * $ echo netdev >led2/trigger -+ * $ echo ppp0 >led2/device_name -+ * $ echo rx >led2/mode -+ * -+ */ -+ -+#define MODE_LINK 1 -+#define MODE_TX 2 -+#define MODE_RX 4 -+ -+struct led_netdev_data { -+ rwlock_t lock; -+ -+ struct timer_list timer; -+ struct notifier_block notifier; -+ -+ struct led_classdev *led_cdev; -+ struct net_device *net_dev; -+ -+ char device_name[IFNAMSIZ]; -+ unsigned interval; -+ unsigned mode; -+ unsigned link_up; -+ unsigned last_activity; -+}; -+ -+static void set_baseline_state(struct led_netdev_data *trigger_data) -+{ -+ if ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ else -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ -+ if ((trigger_data->mode & (MODE_TX | MODE_RX)) != 0 && trigger_data->link_up) -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ else -+ del_timer(&trigger_data->timer); -+} -+ -+static ssize_t led_device_name_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%s\n", trigger_data->device_name); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+extern struct net init_net; -+#endif -+ -+static ssize_t led_device_name_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (size < 0 || size >= IFNAMSIZ) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ -+ strcpy(trigger_data->device_name, buf); -+ if (size > 0 && trigger_data->device_name[size-1] == '\n') -+ trigger_data->device_name[size-1] = 0; -+ -+ if (trigger_data->device_name[0] != 0) { -+ /* check for existing device to update from */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+ trigger_data->net_dev = dev_get_by_name(&init_net, trigger_data->device_name); -+#else -+ trigger_data->net_dev = dev_get_by_name(trigger_data->device_name); -+#endif -+ if (trigger_data->net_dev != NULL) -+ trigger_data->link_up = (dev_get_flags(trigger_data->net_dev) & IFF_LOWER_UP) != 0; -+ set_baseline_state(trigger_data); /* updates LEDs, may start timers */ -+ } -+ -+ write_unlock(&trigger_data->lock); -+ return size; -+} -+ -+static DEVICE_ATTR(device_name, 0644, led_device_name_show, led_device_name_store); -+ -+static ssize_t led_mode_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ -+ if (trigger_data->mode == 0) { -+ strcpy(buf, "none\n"); -+ } else { -+ if (trigger_data->mode & MODE_LINK) -+ strcat(buf, "link "); -+ if (trigger_data->mode & MODE_TX) -+ strcat(buf, "tx "); -+ if (trigger_data->mode & MODE_RX) -+ strcat(buf, "rx "); -+ strcat(buf, "\n"); -+ } -+ -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf)+1; -+} -+ -+static ssize_t led_mode_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ char copybuf[1024]; -+ int new_mode = -1; -+ char *p, *token; -+ -+ /* take a copy since we don't want to trash the inbound buffer when using strsep */ -+ strncpy(copybuf, buf, sizeof(copybuf)); -+ copybuf[1023] = 0; -+ p = copybuf; -+ -+ while ((token = strsep(&p, " \t\n")) != NULL) { -+ if (!*token) -+ continue; -+ -+ if (new_mode == -1) -+ new_mode = 0; -+ -+ if (!strcmp(token, "none")) -+ new_mode = 0; -+ else if (!strcmp(token, "tx")) -+ new_mode |= MODE_TX; -+ else if (!strcmp(token, "rx")) -+ new_mode |= MODE_RX; -+ else if (!strcmp(token, "link")) -+ new_mode |= MODE_LINK; -+ else -+ return -EINVAL; -+ } -+ -+ if (new_mode == -1) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ trigger_data->mode = new_mode; -+ set_baseline_state(trigger_data); -+ write_unlock(&trigger_data->lock); -+ -+ return size; -+} -+ -+static DEVICE_ATTR(mode, 0644, led_mode_show, led_mode_store); -+ -+static ssize_t led_interval_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%u\n", jiffies_to_msecs(trigger_data->interval)); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+static ssize_t led_interval_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ int ret = -EINVAL; -+ char *after; -+ unsigned long value = simple_strtoul(buf, &after, 10); -+ size_t count = after - buf; -+ -+ if (*after && isspace(*after)) -+ count++; -+ -+ /* impose some basic bounds on the timer interval */ -+ if (count == size && value >= 5 && value <= 10000) { -+ write_lock(&trigger_data->lock); -+ trigger_data->interval = msecs_to_jiffies(value); -+ set_baseline_state(trigger_data); // resets timer -+ write_unlock(&trigger_data->lock); -+ ret = count; -+ } -+ -+ return ret; -+} -+ -+static DEVICE_ATTR(interval, 0644, led_interval_show, led_interval_store); -+ -+static int netdev_trig_notify(struct notifier_block *nb, -+ unsigned long evt, -+ void *dv) -+{ -+ struct net_device *dev = dv; -+ struct led_netdev_data *trigger_data = container_of(nb, struct led_netdev_data, notifier); -+ -+ if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER) -+ return NOTIFY_DONE; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (strcmp(dev->name, trigger_data->device_name)) -+ goto done; -+ -+ if (evt == NETDEV_REGISTER) { -+ if (trigger_data->net_dev != NULL) -+ dev_put(trigger_data->net_dev); -+ dev_hold(dev); -+ trigger_data->net_dev = dev; -+ trigger_data->link_up = 0; -+ goto done; -+ } -+ -+ if (evt == NETDEV_UNREGISTER && trigger_data->net_dev != NULL) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ goto done; -+ } -+ -+ /* UP / DOWN / CHANGE */ -+ -+ trigger_data->link_up = (evt != NETDEV_DOWN && netif_carrier_ok(dev)); -+ set_baseline_state(trigger_data); -+ -+done: -+ write_unlock(&trigger_data->lock); -+ return NOTIFY_DONE; -+} -+ -+/* here's the real work! */ -+static void netdev_trig_timer(unsigned long arg) -+{ -+ struct led_netdev_data *trigger_data = (struct led_netdev_data *)arg; -+ const struct net_device_stats *dev_stats; -+ unsigned new_activity; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (!trigger_data->link_up || !trigger_data->net_dev || (trigger_data->mode & (MODE_TX | MODE_RX)) == 0) { -+ /* we don't need to do timer work, just reflect link state. */ -+ led_set_brightness(trigger_data->led_cdev, ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) ? LED_FULL : LED_OFF); -+ goto no_restart; -+ } -+ -+ dev_stats = dev_get_stats(trigger_data->net_dev); -+ new_activity = -+ ((trigger_data->mode & MODE_TX) ? dev_stats->tx_packets : 0) + -+ ((trigger_data->mode & MODE_RX) ? dev_stats->rx_packets : 0); -+ -+ if (trigger_data->mode & MODE_LINK) { -+ /* base state is ON (link present) */ -+ /* if there's no link, we don't get this far and the LED is off */ -+ -+ /* OFF -> ON always */ -+ /* ON -> OFF on activity */ -+ if (trigger_data->led_cdev->brightness == LED_OFF) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } -+ } else { -+ /* base state is OFF */ -+ /* ON -> OFF always */ -+ /* OFF -> ON on activity */ -+ if (trigger_data->led_cdev->brightness == LED_FULL) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } -+ } -+ -+ trigger_data->last_activity = new_activity; -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ -+no_restart: -+ write_unlock(&trigger_data->lock); -+} -+ -+static void netdev_trig_activate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data; -+ int rc; -+ -+ trigger_data = kzalloc(sizeof(struct led_netdev_data), GFP_KERNEL); -+ if (!trigger_data) -+ return; -+ -+ rwlock_init(&trigger_data->lock); -+ -+ trigger_data->notifier.notifier_call = netdev_trig_notify; -+ trigger_data->notifier.priority = 10; -+ -+ setup_timer(&trigger_data->timer, netdev_trig_timer, (unsigned long) trigger_data); -+ -+ trigger_data->led_cdev = led_cdev; -+ trigger_data->net_dev = NULL; -+ trigger_data->device_name[0] = 0; -+ -+ trigger_data->mode = 0; -+ trigger_data->interval = msecs_to_jiffies(50); -+ trigger_data->link_up = 0; -+ trigger_data->last_activity = 0; -+ -+ led_cdev->trigger_data = trigger_data; -+ -+ rc = device_create_file(led_cdev->dev, &dev_attr_device_name); -+ if (rc) -+ goto err_out; -+ rc = device_create_file(led_cdev->dev, &dev_attr_mode); -+ if (rc) -+ goto err_out_device_name; -+ rc = device_create_file(led_cdev->dev, &dev_attr_interval); -+ if (rc) -+ goto err_out_mode; -+ -+ register_netdevice_notifier(&trigger_data->notifier); -+ return; -+ -+err_out_mode: -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+err_out_device_name: -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+err_out: -+ led_cdev->trigger_data = NULL; -+ kfree(trigger_data); -+} -+ -+static void netdev_trig_deactivate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (trigger_data) { -+ unregister_netdevice_notifier(&trigger_data->notifier); -+ -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+ device_remove_file(led_cdev->dev, &dev_attr_interval); -+ -+ write_lock(&trigger_data->lock); -+ -+ if (trigger_data->net_dev) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ } -+ -+ write_unlock(&trigger_data->lock); -+ -+ del_timer_sync(&trigger_data->timer); -+ -+ kfree(trigger_data); -+ } -+} -+ -+static struct led_trigger netdev_led_trigger = { -+ .name = "netdev", -+ .activate = netdev_trig_activate, -+ .deactivate = netdev_trig_deactivate, -+}; -+ -+static int __init netdev_trig_init(void) -+{ -+ return led_trigger_register(&netdev_led_trigger); -+} -+ -+static void __exit netdev_trig_exit(void) -+{ -+ led_trigger_unregister(&netdev_led_trigger); -+} -+ -+module_init(netdev_trig_init); -+module_exit(netdev_trig_exit); -+ -+MODULE_AUTHOR("Oliver Jowett oliver@opencloud.com"); -+MODULE_DESCRIPTION("Netdev LED trigger"); -+MODULE_LICENSE("GPL"); -diff -Nur linux-2.6.32.11.vanilla/drivers/leds/Makefile linux-2.6.32.11/drivers/leds/Makefile ---- linux-2.6.32.11.vanilla/drivers/leds/Makefile 2010-04-02 00:59:14.000000000 +0200 -+++ linux-2.6.32.11/drivers/leds/Makefile 2010-04-18 16:13:39.000000000 +0200 -@@ -40,3 +40,4 @@ - obj-$(CONFIG_LEDS_TRIGGER_BACKLIGHT) += ledtrig-backlight.o - obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledtrig-gpio.o - obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o -+obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o diff --git a/src/patches/linux-2.6.32.15-option_add_huawei_android.patch b/src/patches/linux-2.6.32.15-option_add_huawei_android.patch deleted file mode 100644 index a6bb66b..0000000 --- a/src/patches/linux-2.6.32.15-option_add_huawei_android.patch +++ /dev/null @@ -1,19 +0,0 @@ -diff -Naur linux-2.6.32.15.org/drivers/usb/serial/option.c linux-2.6.32.15/drivers/usb/serial/option.c ---- linux-2.6.32.15.org/drivers/usb/serial/option.c 2010-06-01 18:56:03.000000000 +0200 -+++ linux-2.6.32.15/drivers/usb/serial/option.c 2010-08-02 22:38:11.000000000 +0200 -@@ -102,6 +102,7 @@ - #define HUAWEI_PRODUCT_E600 0x1001 - #define HUAWEI_PRODUCT_E220 0x1003 - #define HUAWEI_PRODUCT_E220BIS 0x1004 -+#define HUAWEI_PRODUCT_ANDROID 0x1035 - #define HUAWEI_PRODUCT_E1401 0x1401 - #define HUAWEI_PRODUCT_E1402 0x1402 - #define HUAWEI_PRODUCT_E1403 0x1403 -@@ -380,6 +381,7 @@ - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E600, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E220, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E220BIS, 0xff, 0xff, 0xff) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_ANDROID, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1401, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1402, 0xff, 0xff, 0xff) }, - { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1403, 0xff, 0xff, 0xff) }, diff --git a/src/patches/linux-2.6.32.27_ipg-fix-driver-name.patch b/src/patches/linux-2.6.32.27_ipg-fix-driver-name.patch deleted file mode 100644 index 2da9301..0000000 --- a/src/patches/linux-2.6.32.27_ipg-fix-driver-name.patch +++ /dev/null @@ -1,15 +0,0 @@ -Patch by Arne Fitzenreiter arne_f@ipfire.org -Fix PHYSDEVDRIVER from "Sundance IPG ..." to the modulname (ipg) - -diff -Naur linux-2.6.32.27.org/drivers/net/ipg.c linux-2.6.32.27/drivers/net/ipg.c ---- linux-2.6.32.27.org/drivers/net/ipg.c 2010-12-09 22:29:45.000000000 +0100 -+++ linux-2.6.32.27/drivers/net/ipg.c 2010-12-25 00:24:29.291637731 +0100 -@@ -2320,7 +2320,7 @@ - } - - static struct pci_driver ipg_pci_driver = { -- .name = IPG_DRIVER_NAME, -+ .name = DRV_NAME, - .id_table = ipg_pci_tbl, - .probe = ipg_probe, - .remove = __devexit_p(ipg_remove), diff --git a/src/patches/linux-2.6.32.45_align_ssb_modtable_32bit_boundary.patch b/src/patches/linux-2.6.32.45_align_ssb_modtable_32bit_boundary.patch deleted file mode 100644 index e9b8b82..0000000 --- a/src/patches/linux-2.6.32.45_align_ssb_modtable_32bit_boundary.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Naur linux-2.6.32.45.org/include/linux/mod_devicetable.h linux-2.6.32.45/include/linux/mod_devicetable.h ---- linux-2.6.32.45.org/include/linux/mod_devicetable.h 2011-08-16 03:57:37.000000000 +0200 -+++ linux-2.6.32.45/include/linux/mod_devicetable.h 2011-11-17 15:07:43.366023632 +0100 -@@ -364,7 +364,7 @@ - __u16 vendor; /* Vendor or SDIO_ANY_ID */ - __u16 device; /* Device ID or SDIO_ANY_ID */ - kernel_ulong_t driver_data /* Data private to the driver */ -- __attribute__((aligned(sizeof(kernel_ulong_t)))); -+ __attribute__((aligned(sizeof(__u32)))); /* align to 32bit boundary */ - }; - - /* SSB core, see drivers/ssb/ */ diff --git a/src/patches/linux-2.6.32.8-ipp2p-0.8.2-pomng.patch b/src/patches/linux-2.6.32.8-ipp2p-0.8.2-pomng.patch deleted file mode 100644 index 359892f..0000000 --- a/src/patches/linux-2.6.32.8-ipp2p-0.8.2-pomng.patch +++ /dev/null @@ -1,1033 +0,0 @@ -diff -Naur linux-2.6.32.8.org/include/linux/netfilter_ipv4/ipt_ipp2p.h linux-2.6.32.8/include/linux/netfilter_ipv4/ipt_ipp2p.h ---- linux-2.6.32.8.org/include/linux/netfilter_ipv4/ipt_ipp2p.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/include/linux/netfilter_ipv4/ipt_ipp2p.h 2010-02-13 19:54:30.000000000 +0100 -@@ -0,0 +1,31 @@ -+#ifndef __IPT_IPP2P_H -+#define __IPT_IPP2P_H -+#define IPP2P_VERSION "0.8.2-pomng" -+ -+struct ipt_p2p_info { -+ int cmd; -+ int debug; -+}; -+ -+#endif //__IPT_IPP2P_H -+ -+#define SHORT_HAND_IPP2P 1 /* --ipp2p switch*/ -+//#define SHORT_HAND_DATA 4 /* --ipp2p-data switch*/ -+#define SHORT_HAND_NONE 5 /* no short hand*/ -+ -+#define IPP2P_EDK (1 << 1) -+#define IPP2P_DATA_KAZAA (1 << 2) -+#define IPP2P_DATA_EDK (1 << 3) -+#define IPP2P_DATA_DC (1 << 4) -+#define IPP2P_DC (1 << 5) -+#define IPP2P_DATA_GNU (1 << 6) -+#define IPP2P_GNU (1 << 7) -+#define IPP2P_KAZAA (1 << 8) -+#define IPP2P_BIT (1 << 9) -+#define IPP2P_APPLE (1 << 10) -+#define IPP2P_SOUL (1 << 11) -+#define IPP2P_WINMX (1 << 12) -+#define IPP2P_ARES (1 << 13) -+#define IPP2P_MUTE (1 << 14) -+#define IPP2P_WASTE (1 << 15) -+#define IPP2P_XDCC (1 << 16) -diff -Naur linux-2.6.32.8.org/net/ipv4/netfilter/ipt_ipp2p.c linux-2.6.32.8/net/ipv4/netfilter/ipt_ipp2p.c ---- linux-2.6.32.8.org/net/ipv4/netfilter/ipt_ipp2p.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/net/ipv4/netfilter/ipt_ipp2p.c 2010-02-13 19:54:30.000000000 +0100 -@@ -0,0 +1,964 @@ -+#if defined(MODVERSIONS) -+#include <linux/modversions.h> -+#endif -+#include <linux/module.h> -+#include <linux/version.h> -+#include <linux/netfilter_ipv4/ip_tables.h> -+#include <linux/netfilter_ipv4/ipt_ipp2p.h> -+#include <net/tcp.h> -+#include <net/udp.h> -+ -+#define get_u8(X,O) (*(__u8 *)(X + O)) -+#define get_u16(X,O) (*(__u16 *)(X + O)) -+#define get_u32(X,O) (*(__u32 *)(X + O)) -+ -+MODULE_AUTHOR("Eicke Friedrich/Klaus Degner ipp2p@ipp2p.org"); -+MODULE_DESCRIPTION("An extension to iptables to identify P2P traffic."); -+MODULE_LICENSE("GPL"); -+ -+ -+/*Search for UDP eDonkey/eMule/Kad commands*/ -+int -+udp_search_edk (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ t += 8; -+ -+ switch (t[0]) { -+ case 0xe3: -+ { /*edonkey*/ -+ switch (t[1]) -+ { -+ /* client -> server status request */ -+ case 0x96: -+ if (packet_len == 14) return ((IPP2P_EDK * 100) + 50); -+ break; -+ /* server -> client status request */ -+ case 0x97: if (packet_len == 42) return ((IPP2P_EDK * 100) + 51); -+ break; -+ /* server description request */ -+ /* e3 2a ff f0 .. | size == 6 */ -+ case 0xa2: if ( (packet_len == 14) && ( get_u16(t,2) == __constant_htons(0xfff0) ) ) return ((IPP2P_EDK * 100) + 52); -+ break; -+ /* server description response */ -+ /* e3 a3 ff f0 .. | size > 40 && size < 200 */ -+ //case 0xa3: return ((IPP2P_EDK * 100) + 53); -+ // break; -+ case 0x9a: if (packet_len==26) return ((IPP2P_EDK * 100) + 54); -+ break; -+ -+ case 0x92: if (packet_len==18) return ((IPP2P_EDK * 100) + 55); -+ break; -+ } -+ break; -+ } -+ case 0xe4: -+ { -+ switch (t[1]) -+ { -+ /* e4 20 .. | size == 43 */ -+ case 0x20: if ((packet_len == 43) && (t[2] != 0x00) && (t[34] != 0x00)) return ((IPP2P_EDK * 100) + 60); -+ break; -+ /* e4 00 .. 00 | size == 35 ? */ -+ case 0x00: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 61); -+ break; -+ /* e4 10 .. 00 | size == 35 ? */ -+ case 0x10: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 62); -+ break; -+ /* e4 18 .. 00 | size == 35 ? */ -+ case 0x18: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 63); -+ break; -+ /* e4 52 .. | size = 44 */ -+ case 0x52: if (packet_len == 44 ) return ((IPP2P_EDK * 100) + 64); -+ break; -+ /* e4 58 .. | size == 6 */ -+ case 0x58: if (packet_len == 14 ) return ((IPP2P_EDK * 100) + 65); -+ break; -+ /* e4 59 .. | size == 2 */ -+ case 0x59: if (packet_len == 10 )return ((IPP2P_EDK * 100) + 66); -+ break; -+ /* e4 28 .. | packet_len == 52,77,102,127... */ -+ case 0x28: if (((packet_len-52) % 25) == 0) return ((IPP2P_EDK * 100) + 67); -+ break; -+ /* e4 50 xx xx | size == 4 */ -+ case 0x50: if (packet_len == 12) return ((IPP2P_EDK * 100) + 68); -+ break; -+ /* e4 40 xx xx | size == 48 */ -+ case 0x40: if (packet_len == 56) return ((IPP2P_EDK * 100) + 69); -+ break; -+ } -+ break; -+ } -+ } /* end of switch (t[0]) */ -+ return 0; -+}/*udp_search_edk*/ -+ -+ -+/*Search for UDP Gnutella commands*/ -+int -+udp_search_gnu (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ t += 8; -+ -+ if (memcmp(t, "GND", 3) == 0) return ((IPP2P_GNU * 100) + 51); -+ if (memcmp(t, "GNUTELLA ", 9) == 0) return ((IPP2P_GNU * 100) + 52); -+ return 0; -+}/*udp_search_gnu*/ -+ -+ -+/*Search for UDP KaZaA commands*/ -+int -+udp_search_kazaa (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ -+ if (t[packet_len-1] == 0x00){ -+ t += (packet_len - 6); -+ if (memcmp(t, "KaZaA", 5) == 0) return (IPP2P_KAZAA * 100 +50); -+ } -+ -+ return 0; -+}/*udp_search_kazaa*/ -+ -+/*Search for UDP DirectConnect commands*/ -+int -+udp_search_directconnect (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ if ((*(t + 8) == 0x24) && (*(t + packet_len - 1) == 0x7c)) { -+ t+=8; -+ if (memcmp(t, "SR ", 3) == 0) return ((IPP2P_DC * 100) + 60); -+ if (memcmp(t, "Ping ", 5) == 0) return ((IPP2P_DC * 100) + 61); -+ } -+ return 0; -+}/*udp_search_directconnect*/ -+ -+ -+ -+/*Search for UDP BitTorrent commands*/ -+int -+udp_search_bit (unsigned char *haystack, int packet_len) -+{ -+ switch(packet_len) -+ { -+ case 24: -+ /* ^ 00 00 04 17 27 10 19 80 */ -+ if ((ntohl(get_u32(haystack, 8)) == 0x00000417) && (ntohl(get_u32(haystack, 12)) == 0x27101980)) -+ return (IPP2P_BIT * 100 + 50); -+ break; -+ case 44: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 51); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400)) -+ return (IPP2P_BIT * 100 + 61); -+ break; -+ case 65: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 52); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404)) -+ return (IPP2P_BIT * 100 + 62); -+ break; -+ case 67: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 53); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406)) -+ return (IPP2P_BIT * 100 + 63); -+ break; -+ case 211: -+ if (get_u32(haystack, 8) == __constant_htonl(0x00000405)) -+ return (IPP2P_BIT * 100 + 54); -+ break; -+ case 29: -+ if ((get_u32(haystack, 8) == __constant_htonl(0x00000401))) -+ return (IPP2P_BIT * 100 + 55); -+ break; -+ case 52: -+ if (get_u32(haystack,8) == __constant_htonl(0x00000827) && -+ get_u32(haystack,12) == __constant_htonl(0x37502950)) -+ return (IPP2P_BIT * 100 + 80); -+ break; -+ default: -+ /* this packet does not have a constant size */ -+ if (packet_len >= 40 && get_u32(haystack, 16) == __constant_htonl(0x00000402) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 56); -+ break; -+ } -+ -+ /* some extra-bitcomet rules: -+ * "d1:" [a|r] "d2:id20:" -+ */ -+ if (packet_len > 30 && get_u8(haystack, 8) == 'd' && get_u8(haystack, 9) == '1' && get_u8(haystack, 10) == ':' ) -+ { -+ if (get_u8(haystack, 11) == 'a' || get_u8(haystack, 11) == 'r') -+ { -+ if (memcmp(haystack+12,"d2:id20:",8)==0) -+ return (IPP2P_BIT * 100 + 57); -+ } -+ } -+ -+#if 0 -+ /* bitlord rules */ -+ /* packetlen must be bigger than 40 */ -+ /* first 4 bytes are zero */ -+ if (packet_len > 40 && get_u32(haystack, 8) == 0x00000000) -+ { -+ /* first rule: 00 00 00 00 01 00 00 xx xx xx xx 00 00 00 00*/ -+ if (get_u32(haystack, 12) == 0x00000000 && -+ get_u32(haystack, 16) == 0x00010000 && -+ get_u32(haystack, 24) == 0x00000000 ) -+ return (IPP2P_BIT * 100 + 71); -+ -+ /* 00 01 00 00 0d 00 00 xx xx xx xx 00 00 00 00*/ -+ if (get_u32(haystack, 12) == 0x00000001 && -+ get_u32(haystack, 16) == 0x000d0000 && -+ get_u32(haystack, 24) == 0x00000000 ) -+ return (IPP2P_BIT * 100 + 71); -+ -+ -+ } -+#endif -+ -+ return 0; -+}/*udp_search_bit*/ -+ -+ -+ -+/*Search for Ares commands*/ -+//#define IPP2P_DEBUG_ARES -+int -+search_ares (const unsigned char *payload, const u16 plen) -+//int search_ares (unsigned char *haystack, int packet_len, int head_len) -+{ -+// const unsigned char *t = haystack + head_len; -+ -+ /* all ares packets start with */ -+ if (payload[1] == 0 && (plen - payload[0]) == 3) -+ { -+ switch (payload[2]) -+ { -+ case 0x5a: -+ /* ares connect */ -+ if ( plen == 6 && payload[5] == 0x05 ) return ((IPP2P_ARES * 100) + 1); -+ break; -+ case 0x09: -+ /* ares search, min 3 chars --> 14 bytes -+ * lets define a search can be up to 30 chars --> max 34 bytes -+ */ -+ if ( plen >= 14 && plen <= 34 ) return ((IPP2P_ARES * 100) + 1); -+ break; -+#ifdef IPP2P_DEBUG_ARES -+ default: -+ printk(KERN_DEBUG "Unknown Ares command %x recognized, len: %u \n", (unsigned int) payload[2],plen); -+#endif /* IPP2P_DEBUG_ARES */ -+ } -+ } -+ -+#if 0 -+ /* found connect packet: 03 00 5a 04 03 05 */ -+ /* new version ares 1.8: 03 00 5a xx xx 05 */ -+ if ((plen) == 6){ /* possible connect command*/ -+ if ((payload[0] == 0x03) && (payload[1] == 0x00) && (payload[2] == 0x5a) && (payload[5] == 0x05)) -+ return ((IPP2P_ARES * 100) + 1); -+ } -+ if ((plen) == 60){ /* possible download command*/ -+ if ((payload[59] == 0x0a) && (payload[58] == 0x0a)){ -+ if (memcmp(t, "PUSH SHA1:", 10) == 0) /* found download command */ -+ return ((IPP2P_ARES * 100) + 2); -+ } -+ } -+#endif -+ -+ return 0; -+} /*search_ares*/ -+ -+/*Search for SoulSeek commands*/ -+int -+search_soul (const unsigned char *payload, const u16 plen) -+{ -+//#define IPP2P_DEBUG_SOUL -+ /* match: xx xx xx xx | xx = sizeof(payload) - 4 */ -+ if (get_u32(payload, 0) == (plen - 4)){ -+ const __u32 m=get_u32(payload, 4); -+ /* match 00 yy yy 00, yy can be everything */ -+ if ( get_u8(payload, 4) == 0x00 && get_u8(payload, 7) == 0x00 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "0: Soulseek command 0x%x recognized\n",get_u32(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 1); -+ } -+ -+ /* next match: 01 yy 00 00 | yy can be everything */ -+ if ( get_u8(payload, 4) == 0x01 && get_u16(payload, 6) == 0x0000 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "1: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 2); -+ } -+ -+ /* other soulseek commandos are: 1-5,7,9,13-18,22,23,26,28,35-37,40-46,50,51,60,62-69,91,92,1001 */ -+ /* try to do this in an intelligent way */ -+ /* get all small commandos */ -+ switch(m) -+ { -+ case 7: -+ case 9: -+ case 22: -+ case 23: -+ case 26: -+ case 28: -+ case 50: -+ case 51: -+ case 60: -+ case 91: -+ case 92: -+ case 1001: -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "2: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 3); -+ } -+ -+ if (m > 0 && m < 6 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "3: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 4); -+ } -+ if (m > 12 && m < 19 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "4: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 5); -+ } -+ -+ if (m > 34 && m < 38 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "5: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 6); -+ } -+ -+ if (m > 39 && m < 47 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "6: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 7); -+ } -+ -+ if (m > 61 && m < 70 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "7: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 8); -+ } -+ -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "unknown SOULSEEK command: 0x%x, first 16 bit: 0x%x, first 8 bit: 0x%x ,soulseek ???\n",get_u32(payload, 4),get_u16(payload, 4) >> 16,get_u8(payload, 4) >> 24); -+#endif /* IPP2P_DEBUG_SOUL */ -+ } -+ -+ /* match 14 00 00 00 01 yy 00 00 00 STRING(YY) 01 00 00 00 00 46|50 00 00 00 00 */ -+ /* without size at the beginning !!! */ -+ if ( get_u32(payload, 0) == 0x14 && get_u8(payload, 4) == 0x01 ) -+ { -+ __u32 y=get_u32(payload, 5); -+ /* we need 19 chars + string */ -+ if ( (y + 19) <= (plen) ) -+ { -+ const unsigned char *w=payload+9+y; -+ if (get_u32(w, 0) == 0x01 && ( get_u16(w, 4) == 0x4600 || get_u16(w, 4) == 0x5000) && get_u32(w, 6) == 0x00); -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "Soulssek special client command recognized\n"); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 9); -+ } -+ } -+ return 0; -+} -+ -+ -+/*Search for WinMX commands*/ -+int -+search_winmx (const unsigned char *payload, const u16 plen) -+{ -+//#define IPP2P_DEBUG_WINMX -+ if (((plen) == 4) && (memcmp(payload, "SEND", 4) == 0)) return ((IPP2P_WINMX * 100) + 1); -+ if (((plen) == 3) && (memcmp(payload, "GET", 3) == 0)) return ((IPP2P_WINMX * 100) + 2); -+ //if (packet_len < (head_len + 10)) return 0; -+ if (plen < 10) return 0; -+ -+ if ((memcmp(payload, "SEND", 4) == 0) || (memcmp(payload, "GET", 3) == 0)){ -+ u16 c=4; -+ const u16 end=plen-2; -+ u8 count=0; -+ while (c < end) -+ { -+ if (payload[c]== 0x20 && payload[c+1] == 0x22) -+ { -+ c++; -+ count++; -+ if (count>=2) return ((IPP2P_WINMX * 100) + 3); -+ } -+ c++; -+ } -+ } -+ -+ if ( plen == 149 && payload[0] == '8' ) -+ { -+#ifdef IPP2P_DEBUG_WINMX -+ printk(KERN_INFO "maybe WinMX\n"); -+#endif -+ if (get_u32(payload,17) == 0 && get_u32(payload,21) == 0 && get_u32(payload,25) == 0 && -+// get_u32(payload,33) == __constant_htonl(0x71182b1a) && get_u32(payload,37) == __constant_htonl(0x05050000) && -+// get_u32(payload,133) == __constant_htonl(0x31097edf) && get_u32(payload,145) == __constant_htonl(0xdcb8f792)) -+ get_u16(payload,39) == 0 && get_u16(payload,135) == __constant_htons(0x7edf) && get_u16(payload,147) == __constant_htons(0xf792)) -+ -+ { -+#ifdef IPP2P_DEBUG_WINMX -+ printk(KERN_INFO "got WinMX\n"); -+#endif -+ return ((IPP2P_WINMX * 100) + 4); -+ } -+ } -+ return 0; -+} /*search_winmx*/ -+ -+ -+/*Search for appleJuice commands*/ -+int -+search_apple (const unsigned char *payload, const u16 plen) -+{ -+ if ( (plen > 7) && (payload[6] == 0x0d) && (payload[7] == 0x0a) && (memcmp(payload, "ajprot", 6) == 0)) return (IPP2P_APPLE * 100); -+ -+ return 0; -+} -+ -+ -+/*Search for BitTorrent commands*/ -+int -+search_bittorrent (const unsigned char *payload, const u16 plen) -+{ -+ if (plen > 20) -+ { -+ /* test for match 0x13+"BitTorrent protocol" */ -+ if (payload[0] == 0x13) -+ { -+ if (memcmp(payload+1, "BitTorrent protocol", 19) == 0) return (IPP2P_BIT * 100); -+ } -+ -+ /* get tracker commandos, all starts with GET / -+ * then it can follow: scrape| announce -+ * and then ?hash_info= -+ */ -+ if (memcmp(payload,"GET /",5) == 0) -+ { -+ /* message scrape */ -+ if ( memcmp(payload+5,"scrape?info_hash=",17)==0 ) return (IPP2P_BIT * 100 + 1); -+ /* message announce */ -+ if ( memcmp(payload+5,"announce?info_hash=",19)==0 ) return (IPP2P_BIT * 100 + 2); -+ } -+ } -+ else -+ { -+ /* bitcomet encryptes the first packet, so we have to detect another -+ * one later in the flow */ -+ /* first try failed, too many missdetections */ -+ //if ( size == 5 && get_u32(t,0) == __constant_htonl(1) && t[4] < 3) return (IPP2P_BIT * 100 + 3); -+ -+ /* second try: block request packets */ -+ if ( plen == 17 && get_u32(payload,0) == __constant_htonl(0x0d) && payload[4] == 0x06 && get_u32(payload,13) == __constant_htonl(0x4000) ) return (IPP2P_BIT * 100 + 3); -+ } -+ -+ return 0; -+} -+ -+ -+ -+/*check for Kazaa get command*/ -+int -+search_kazaa (const unsigned char *payload, const u16 plen) -+ -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a) && memcmp(payload, "GET /.hash=", 11) == 0) -+ return (IPP2P_DATA_KAZAA * 100); -+ -+ return 0; -+} -+ -+ -+/*check for gnutella get command*/ -+int -+search_gnu (const unsigned char *payload, const u16 plen) -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ if (memcmp(payload, "GET /get/", 9) == 0) return ((IPP2P_DATA_GNU * 100) + 1); -+ if (memcmp(payload, "GET /uri-res/", 13) == 0) return ((IPP2P_DATA_GNU * 100) + 2); -+ } -+ return 0; -+} -+ -+ -+/*check for gnutella get commands and other typical data*/ -+int -+search_all_gnu (const unsigned char *payload, const u16 plen) -+{ -+ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ -+ if (memcmp(payload, "GNUTELLA CONNECT/", 17) == 0) return ((IPP2P_GNU * 100) + 1); -+ if (memcmp(payload, "GNUTELLA/", 9) == 0) return ((IPP2P_GNU * 100) + 2); -+ -+ -+ if ((memcmp(payload, "GET /get/", 9) == 0) || (memcmp(payload, "GET /uri-res/", 13) == 0)) -+ { -+ u16 c=8; -+ const u16 end=plen-22; -+ while (c < end) { -+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Gnutella-", 11) == 0) || (memcmp(&payload[c+2], "X-Queue:", 8) == 0))) -+ return ((IPP2P_GNU * 100) + 3); -+ c++; -+ } -+ } -+ } -+ return 0; -+} -+ -+ -+/*check for KaZaA download commands and other typical data*/ -+int -+search_all_kazaa (const unsigned char *payload, const u16 plen) -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ -+ if (memcmp(payload, "GIVE ", 5) == 0) return ((IPP2P_KAZAA * 100) + 1); -+ -+ if (memcmp(payload, "GET /", 5) == 0) { -+ u16 c = 8; -+ const u16 end=plen-22; -+ while (c < end) { -+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Kazaa-Username: ", 18) == 0) || (memcmp(&payload[c+2], "User-Agent: PeerEnabler/", 24) == 0))) -+ return ((IPP2P_KAZAA * 100) + 2); -+ c++; -+ } -+ } -+ } -+ return 0; -+} -+ -+/*fast check for edonkey file segment transfer command*/ -+int -+search_edk (const unsigned char *payload, const u16 plen) -+{ -+ if (payload[0] != 0xe3) -+ return 0; -+ else { -+ if (payload[5] == 0x47) -+ return (IPP2P_DATA_EDK * 100); -+ else -+ return 0; -+ } -+} -+ -+ -+ -+/*intensive but slower search for some edonkey packets including size-check*/ -+int -+search_all_edk (const unsigned char *payload, const u16 plen) -+{ -+ if (payload[0] != 0xe3) -+ return 0; -+ else { -+ //t += head_len; -+ const u16 cmd = get_u16(payload, 1); -+ if (cmd == (plen - 5)) { -+ switch (payload[5]) { -+ case 0x01: return ((IPP2P_EDK * 100) + 1); /*Client: hello or Server:hello*/ -+ case 0x4c: return ((IPP2P_EDK * 100) + 9); /*Client: Hello-Answer*/ -+ } -+ } -+ return 0; -+ } -+} -+ -+ -+/*fast check for Direct Connect send command*/ -+int -+search_dc (const unsigned char *payload, const u16 plen) -+{ -+ -+ if (payload[0] != 0x24 ) -+ return 0; -+ else { -+ if (memcmp(&payload[1], "Send|", 5) == 0) -+ return (IPP2P_DATA_DC * 100); -+ else -+ return 0; -+ } -+ -+} -+ -+ -+/*intensive but slower check for all direct connect packets*/ -+int -+search_all_dc (const unsigned char *payload, const u16 plen) -+{ -+// unsigned char *t = haystack; -+ -+ if (payload[0] == 0x24 && payload[plen-1] == 0x7c) -+ { -+ const unsigned char *t=&payload[1]; -+ /* Client-Hub-Protocol */ -+ if (memcmp(t, "Lock ", 5) == 0) return ((IPP2P_DC * 100) + 1); -+ /* Client-Client-Protocol, some are already recognized by client-hub (like lock) */ -+ if (memcmp(t, "MyNick ", 7) == 0) return ((IPP2P_DC * 100) + 38); -+ } -+ return 0; -+} -+ -+/*check for mute*/ -+int -+search_mute (const unsigned char *payload, const u16 plen) -+{ -+ if ( plen == 209 || plen == 345 || plen == 473 || plen == 609 || plen == 1121 ) -+ { -+ //printk(KERN_DEBUG "size hit: %u",size); -+ if (memcmp(payload,"PublicKey: ",11) == 0 ) -+ { -+ return ((IPP2P_MUTE * 100) + 0); -+ -+/* if (memcmp(t+size-14,"\x0aEndPublicKey\x0a",14) == 0) -+ { -+ printk(KERN_DEBUG "end pubic key hit: %u",size); -+ -+ }*/ -+ } -+ } -+ return 0; -+} -+ -+ -+/* check for xdcc */ -+int -+search_xdcc (const unsigned char *payload, const u16 plen) -+{ -+ /* search in small packets only */ -+ if (plen > 20 && plen < 200 && payload[plen-1] == 0x0a && payload[plen-2] == 0x0d && memcmp(payload,"PRIVMSG ",8) == 0) -+ { -+ -+ u16 x=10; -+ const u16 end=plen - 13; -+ -+ /* is seems to be a irc private massage, chedck for xdcc command */ -+ while (x < end) -+ { -+ if (payload[x] == ':') -+ { -+ if ( memcmp(&payload[x+1],"xdcc send #",11) == 0 ) -+ return ((IPP2P_XDCC * 100) + 0); -+ } -+ x++; -+ } -+ } -+ return 0; -+} -+ -+/* search for waste */ -+int search_waste(const unsigned char *payload, const u16 plen) -+{ -+ if ( plen >= 8 && memcmp(payload,"GET.sha1:",9) == 0) -+ return ((IPP2P_WASTE * 100) + 0); -+ -+ return 0; -+} -+ -+ -+static struct { -+ int command; -+ __u8 short_hand; /*for fucntions included in short hands*/ -+ int packet_len; -+ int (*function_name) (const unsigned char *, const u16); -+} matchlist[] = { -+ {IPP2P_EDK,SHORT_HAND_IPP2P,20, &search_all_edk}, -+// {IPP2P_DATA_KAZAA,SHORT_HAND_DATA,200, &search_kazaa}, -+// {IPP2P_DATA_EDK,SHORT_HAND_DATA,60, &search_edk}, -+// {IPP2P_DATA_DC,SHORT_HAND_DATA,26, &search_dc}, -+ {IPP2P_DC,SHORT_HAND_IPP2P,5, search_all_dc}, -+// {IPP2P_DATA_GNU,SHORT_HAND_DATA,40, &search_gnu}, -+ {IPP2P_GNU,SHORT_HAND_IPP2P,5, &search_all_gnu}, -+ {IPP2P_KAZAA,SHORT_HAND_IPP2P,5, &search_all_kazaa}, -+ {IPP2P_BIT,SHORT_HAND_IPP2P,20, &search_bittorrent}, -+ {IPP2P_APPLE,SHORT_HAND_IPP2P,5, &search_apple}, -+ {IPP2P_SOUL,SHORT_HAND_IPP2P,5, &search_soul}, -+ {IPP2P_WINMX,SHORT_HAND_IPP2P,2, &search_winmx}, -+ {IPP2P_ARES,SHORT_HAND_IPP2P,5, &search_ares}, -+ {IPP2P_MUTE,SHORT_HAND_NONE,200, &search_mute}, -+ {IPP2P_WASTE,SHORT_HAND_NONE,5, &search_waste}, -+ {IPP2P_XDCC,SHORT_HAND_NONE,5, &search_xdcc}, -+ {0,0,0,NULL} -+}; -+ -+ -+static struct { -+ int command; -+ __u8 short_hand; /*for fucntions included in short hands*/ -+ int packet_len; -+ int (*function_name) (unsigned char *, int); -+} udp_list[] = { -+ { IPP2P_KAZAA, SHORT_HAND_IPP2P, 14, &udp_search_kazaa}, -+ { IPP2P_BIT, SHORT_HAND_IPP2P, 23, &udp_search_bit}, -+ { IPP2P_GNU, SHORT_HAND_IPP2P, 11, &udp_search_gnu}, -+ { IPP2P_EDK, SHORT_HAND_IPP2P, 9, &udp_search_edk}, -+ { IPP2P_DC, SHORT_HAND_IPP2P, 12, &udp_search_directconnect}, -+ { 0, 0, 0, NULL } -+}; -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ const void *hdr, -+ u_int16_t datalen, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const struct xt_match *match, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+static bool -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const struct xt_match *match, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ bool *hotdrop) -+#else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) */ -+static bool -+match(const struct sk_buff *skb, -+ const struct xt_match_param *par) -+#endif -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+ const struct ipt_p2p_info *info = matchinfo; -+#else -+ const struct ipt_p2p_info *info = par->matchinfo; -+ const int offset = par->fragoff; -+#endif -+ unsigned char *haystack; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) -+ struct iphdr *ip = ip_hdr(skb); -+#else -+ struct iphdr *ip = skb->nh.iph; -+#endif -+ int p2p_result = 0, i = 0; -+// int head_len; -+ int hlen = ntohs(ip->tot_len)-(ip->ihl*4); /*hlen = packet-data length*/ -+ -+ /*must not be a fragment*/ -+ if (offset) { -+ if (info->debug) printk("IPP2P.match: offset found %i \n",offset); -+ return 0; -+ } -+ -+ /*make sure that skb is linear*/ -+ if(skb_is_nonlinear(skb)){ -+ if (info->debug) printk("IPP2P.match: nonlinear skb found\n"); -+ return 0; -+ } -+ -+ -+ haystack=(char *)ip+(ip->ihl*4); /*haystack = packet data*/ -+ -+ switch (ip->protocol){ -+ case IPPROTO_TCP: /*what to do with a TCP packet*/ -+ { -+ struct tcphdr *tcph = (void *) ip + ip->ihl * 4; -+ -+ if (tcph->fin) return 0; /*if FIN bit is set bail out*/ -+ if (tcph->syn) return 0; /*if SYN bit is set bail out*/ -+ if (tcph->rst) return 0; /*if RST bit is set bail out*/ -+ -+ haystack += tcph->doff * 4; /*get TCP-Header-Size*/ -+ hlen -= tcph->doff * 4; -+ while (matchlist[i].command) { -+ if ((((info->cmd & matchlist[i].command) == matchlist[i].command) || -+ ((info->cmd & matchlist[i].short_hand) == matchlist[i].short_hand)) && -+ (hlen > matchlist[i].packet_len)) { -+ p2p_result = matchlist[i].function_name(haystack, hlen); -+ if (p2p_result) -+ { -+ if (info->debug) printk("IPP2P.debug:TCP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n", -+ p2p_result, NIPQUAD(ip->saddr),ntohs(tcph->source), NIPQUAD(ip->daddr),ntohs(tcph->dest),hlen); -+ return p2p_result; -+ } -+ } -+ i++; -+ } -+ return p2p_result; -+ } -+ -+ case IPPROTO_UDP: /*what to do with an UDP packet*/ -+ { -+ struct udphdr *udph = (void *) ip + ip->ihl * 4; -+ -+ while (udp_list[i].command){ -+ if ((((info->cmd & udp_list[i].command) == udp_list[i].command) || -+ ((info->cmd & udp_list[i].short_hand) == udp_list[i].short_hand)) && -+ (hlen > udp_list[i].packet_len)) { -+ p2p_result = udp_list[i].function_name(haystack, hlen); -+ if (p2p_result){ -+ if (info->debug) printk("IPP2P.debug:UDP-match: %i from: %u.%u.%u.%u:%i to: %u.%u.%u.%u:%i Length: %i\n", -+ p2p_result, NIPQUAD(ip->saddr),ntohs(udph->source), NIPQUAD(ip->daddr),ntohs(udph->dest),hlen); -+ return p2p_result; -+ } -+ } -+ i++; -+ } -+ return p2p_result; -+ } -+ -+ default: return 0; -+ } -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) -+static int -+checkentry(const char *tablename, -+ const struct ipt_ip *ip, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+static bool -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int hook_mask) -+#else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) */ -+static bool -+checkentry(const struct xt_mtchk_param *par) -+#endif -+{ -+ /* Must specify -p tcp */ -+/* if (ip->proto != IPPROTO_TCP || (ip->invflags & IPT_INV_PROTO)) { -+ * printk("ipp2p: Only works on TCP packets, use -p tcp\n"); -+ * return 0; -+ * }*/ -+ return 1; -+} -+ -+ -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+static struct xt_match ipp2p_match = { -+#else -+static struct ipt_match ipp2p_match = { -+#endif -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ { NULL, NULL }, -+ "ipp2p", -+ &ipp2p_match, -+ &ipp2p_checkentry, -+ NULL, -+ THIS_MODULE -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -+ .name = "ipp2p", -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ .family = AF_INET, -+#endif -+ .match = &match, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,17) -+ .matchsize = sizeof(struct ipt_p2p_info), -+#endif -+ .checkentry = &checkentry, -+ .me = THIS_MODULE, -+#endif -+}; -+ -+ -+static int __init init(void) -+{ -+ printk(KERN_INFO "IPP2P v%s loading\n", IPP2P_VERSION); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ return xt_register_match(&ipp2p_match); -+#else -+ return ipt_register_match(&ipp2p_match); -+#endif -+} -+ -+static void __exit fini(void) -+{ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ xt_unregister_match(&ipp2p_match); -+#else -+ ipt_unregister_match(&ipp2p_match); -+#endif -+ printk(KERN_INFO "IPP2P v%s unloaded\n", IPP2P_VERSION); -+} -+ -+module_init(init); -+module_exit(fini); -+ -+ -diff -Naur linux-2.6.32.8.org/net/ipv4/netfilter/Kconfig linux-2.6.32.8/net/ipv4/netfilter/Kconfig ---- linux-2.6.32.8.org/net/ipv4/netfilter/Kconfig 2010-02-09 13:57:19.000000000 +0100 -+++ linux-2.6.32.8/net/ipv4/netfilter/Kconfig 2010-02-13 19:54:30.000000000 +0100 -@@ -388,5 +388,15 @@ - - endif # IP_NF_ARPTABLES - -+config IP_NF_MATCH_IPP2P -+ tristate 'IPP2P match support' -+ depends on IP_NF_IPTABLES -+ help -+ This option makes possible to match some P2P packets -+ therefore helps controlling such traffic. -+ -+ If you want to compile it as a module, say M here and read -+ file:Documentation/modules.txt. If unsure, say `N'. -+ - endmenu - -diff -Naur linux-2.6.32.8.org/net/ipv4/netfilter/Makefile linux-2.6.32.8/net/ipv4/netfilter/Makefile ---- linux-2.6.32.8.org/net/ipv4/netfilter/Makefile 2010-02-09 13:57:19.000000000 +0100 -+++ linux-2.6.32.8/net/ipv4/netfilter/Makefile 2010-02-13 19:54:30.000000000 +0100 -@@ -48,6 +48,7 @@ - obj-$(CONFIG_IP_NF_SECURITY) += iptable_security.o - - # matches -+obj-$(CONFIG_IP_NF_MATCH_IPP2P) += ipt_ipp2p.o - obj-$(CONFIG_IP_NF_MATCH_ADDRTYPE) += ipt_addrtype.o - obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o - obj-$(CONFIG_IP_NF_MATCH_ECN) += ipt_ecn.o diff --git a/src/patches/linux-2.6.32.8-xen-imq-test2.patch b/src/patches/linux-2.6.32.8-xen-imq-test2.patch deleted file mode 100644 index 9d05da5..0000000 --- a/src/patches/linux-2.6.32.8-xen-imq-test2.patch +++ /dev/null @@ -1,1353 +0,0 @@ -diff -Naur linux-2.6.32.8.org/drivers/net/imq.c linux-2.6.32.8/drivers/net/imq.c ---- linux-2.6.32.8.org/drivers/net/imq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/drivers/net/imq.c 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,632 @@ -+/* -+ * Pseudo-driver for the intermediate queue device. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Authors: Patrick McHardy, kaber@trash.net -+ * -+ * The first version was written by Martin Devera, devik@cdi.cz -+ * -+ * Credits: Jan Rafaj imq2t@cedric.vabo.cz -+ * - Update patch to 2.4.21 -+ * Sebastian Strollo sstrollo@nortelnetworks.com -+ * - Fix "Dead-loop on netdevice imq"-issue -+ * Marcel Sebek sebek64@post.cz -+ * - Update to 2.6.2-rc1 -+ * -+ * After some time of inactivity there is a group taking care -+ * of IMQ again: http://www.linuximq.net -+ * -+ * -+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 -+ * including the following changes: -+ * -+ * - Correction of ipv6 support "+"s issue (Hasso Tepper) -+ * - Correction of imq_init_devs() issue that resulted in -+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller) -+ * - Addition of functionality to choose number of IMQ devices -+ * during kernel config (Andre Correa) -+ * - Addition of functionality to choose how IMQ hooks on -+ * PRE and POSTROUTING (after or before NAT) (Andre Correa) -+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa) -+ * -+ * -+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were -+ * released with almost no problems. 2.6.14-x was released -+ * with some important changes: nfcache was removed; After -+ * some weeks of trouble we figured out that some IMQ fields -+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header. -+ * These functions are correctly patched by this new patch version. -+ * -+ * Thanks for all who helped to figure out all the problems with -+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX, -+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully -+ * I didn't forget anybody). I apologize again for my lack of time. -+ * -+ * -+ * 2008/06/17 - 2.6.25 - Changed imq.c to use qdisc_run() instead -+ * of qdisc_restart() and moved qdisc_run() to tasklet to avoid -+ * recursive locking. New initialization routines to fix 'rmmod' not -+ * working anymore. Used code from ifb.c. (Jussi Kivilinna) -+ * -+ * 2008/08/06 - 2.6.26 - (JK) -+ * - Replaced tasklet with 'netif_schedule()'. -+ * - Cleaned up and added comments for imq_nf_queue(). -+ * -+ * 2009/04/12 -+ * - Add skb_save_cb/skb_restore_cb helper functions for backuping -+ * control buffer. This is needed because qdisc-layer on kernels -+ * 2.6.27 and newer overwrite control buffer. (Jussi Kivilinna) -+ * - Add better locking for IMQ device. Hopefully this will solve -+ * SMP issues. (Jussi Kivilinna) -+ * - Port to 2.6.27 -+ * - Port to 2.6.28 -+ * - Port to 2.6.29 + fix rmmod not working -+ * -+ * 2009/04/20 - (Jussi Kivilinna) -+ * - Use netdevice feature flags to avoid extra packet handling -+ * by core networking layer and possibly increase performance. -+ * -+ * 2009/09/26 - (Jussi Kivilinna) -+ * - Add imq_nf_reinject_lockless to fix deadlock with -+ * imq_nf_queue/imq_nf_reinject. -+ * -+ * 2009/12/08 - (Jussi Kivilinna) -+ * - Port to 2.6.32 -+ * - Add check for skb->nf_queue_entry==NULL in imq_dev_xmit() -+ * - Also add better error checking for skb->nf_queue_entry usage -+ * -+ * Also, many thanks to pablo Sebastian Greco for making the initial -+ * patch and to those who helped the testing. -+ * -+ * More info at: http://www.linuximq.net/ (Andre Correa) -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/moduleparam.h> -+#include <linux/list.h> -+#include <linux/skbuff.h> -+#include <linux/netdevice.h> -+#include <linux/etherdevice.h> -+#include <linux/rtnetlink.h> -+#include <linux/if_arp.h> -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv4.h> -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ #include <linux/netfilter_ipv6.h> -+#endif -+#include <linux/imq.h> -+#include <net/pkt_sched.h> -+#include <net/netfilter/nf_queue.h> -+ -+static nf_hookfn imq_nf_hook; -+ -+static struct nf_hook_ops imq_ingress_ipv4 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP_PRI_MANGLE + 1 -+#else -+ .priority = NF_IP_PRI_NAT_DST + 1 -+#endif -+}; -+ -+static struct nf_hook_ops imq_egress_ipv4 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP_PRI_LAST -+#else -+ .priority = NF_IP_PRI_NAT_SRC - 1 -+#endif -+}; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+static struct nf_hook_ops imq_ingress_ipv6 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP6_PRI_MANGLE + 1 -+#else -+ .priority = NF_IP6_PRI_NAT_DST + 1 -+#endif -+}; -+ -+static struct nf_hook_ops imq_egress_ipv6 = { -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP6_PRI_LAST -+#else -+ .priority = NF_IP6_PRI_NAT_SRC - 1 -+#endif -+}; -+#endif -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+static unsigned int numdevs = CONFIG_IMQ_NUM_DEVS; -+#else -+static unsigned int numdevs = IMQ_MAX_DEVS; -+#endif -+ -+static DEFINE_SPINLOCK(imq_nf_queue_lock); -+ -+static struct net_device *imq_devs_cache[IMQ_MAX_DEVS]; -+ -+ -+static struct net_device_stats *imq_get_stats(struct net_device *dev) -+{ -+ return &dev->stats; -+} -+ -+/* called for packets kfree'd in qdiscs at places other than enqueue */ -+static void imq_skb_destructor(struct sk_buff *skb) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ -+ if (entry) { -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+ } -+ -+ skb_restore_cb(skb); /* kfree backup */ -+} -+ -+/* locking not needed when called from imq_nf_queue */ -+static void imq_nf_reinject_lockless(struct nf_queue_entry *entry, -+ unsigned int verdict) -+{ -+ int status; -+ -+ if (!entry->next_outfn) { -+ nf_reinject(entry, verdict); -+ return; -+ } -+ -+ status = entry->next_outfn(entry, entry->next_queuenum); -+ if (status < 0) { -+ nf_queue_entry_release_refs(entry); -+ kfree_skb(entry->skb); -+ kfree(entry); -+ } -+} -+ -+static void imq_nf_reinject(struct nf_queue_entry *entry, unsigned int verdict) -+{ -+ int status; -+ -+ if (!entry->next_outfn) { -+ spin_lock_bh(&imq_nf_queue_lock); -+ nf_reinject(entry, verdict); -+ spin_unlock_bh(&imq_nf_queue_lock); -+ return; -+ } -+ -+ rcu_read_lock(); -+ local_bh_disable(); -+ status = entry->next_outfn(entry, entry->next_queuenum); -+ local_bh_enable(); -+ if (status < 0) { -+ nf_queue_entry_release_refs(entry); -+ kfree_skb(entry->skb); -+ kfree(entry); -+ } -+ -+ rcu_read_unlock(); -+} -+ -+static netdev_tx_t imq_dev_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ dev->trans_start = jiffies; -+ -+ dev->stats.tx_bytes += skb->len; -+ dev->stats.tx_packets++; -+ -+ if (entry == NULL) { -+ /* We don't know what is going on here.. packet is queued for -+ * imq device, but (probably) not by us. -+ * -+ * If this packet was not send here by imq_nf_queue(), then -+ * skb_save_cb() was not used and skb_free() should not show: -+ * WARNING: IMQ: kfree_skb: skb->cb_next:.. -+ * and/or -+ * WARNING: IMQ: kfree_skb: skb->nf_queue_entry... -+ * -+ * However if this message is shown, then IMQ is somehow broken -+ * and you should report this to linuximq.net. -+ */ -+ -+ /* imq_dev_xmit is black hole that eats all packets, report that -+ * we eat this packet happily and increase dropped counters. -+ */ -+ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ return NETDEV_TX_OK; -+ } -+ -+ skb_restore_cb(skb); /* restore skb->cb */ -+ -+ skb->imq_flags = 0; -+ skb->destructor = NULL; -+ -+ imq_nf_reinject(entry, NF_ACCEPT); -+ -+ return NETDEV_TX_OK; -+} -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num) -+{ -+ struct net_device *dev; -+ struct sk_buff *skb_orig, *skb, *skb_shared; -+ struct Qdisc *q; -+ struct netdev_queue *txq; -+ int users, index; -+ int retval = -EINVAL; -+ -+ index = entry->skb->imq_flags & IMQ_F_IFMASK; -+ if (unlikely(index > numdevs - 1)) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ numdevs - 1); -+ retval = -EINVAL; -+ goto out; -+ } -+ -+ /* check for imq device by index from cache */ -+ dev = imq_devs_cache[index]; -+ if (unlikely(!dev)) { -+ char buf[8]; -+ -+ /* get device by name and cache result */ -+ snprintf(buf, sizeof(buf), "imq%d", index); -+ dev = dev_get_by_name(&init_net, buf); -+ if (!dev) { -+ /* not found ?!*/ -+ BUG(); -+ retval = -ENODEV; -+ goto out; -+ } -+ -+ imq_devs_cache[index] = dev; -+ dev_put(dev); -+ } -+ -+ if (unlikely(!(dev->flags & IFF_UP))) { -+ entry->skb->imq_flags = 0; -+ imq_nf_reinject_lockless(entry, NF_ACCEPT); -+ retval = 0; -+ goto out; -+ } -+ dev->last_rx = jiffies; -+ -+ skb = entry->skb; -+ skb_orig = NULL; -+ -+ /* skb has owner? => make clone */ -+ if (unlikely(skb->destructor)) { -+ skb_orig = skb; -+ skb = skb_clone(skb, GFP_ATOMIC); -+ if (!skb) { -+ retval = -ENOMEM; -+ goto out; -+ } -+ entry->skb = skb; -+ } -+ -+ skb->nf_queue_entry = entry; -+ -+ dev->stats.rx_bytes += skb->len; -+ dev->stats.rx_packets++; -+ -+ txq = dev_pick_tx(dev, skb); -+ -+ q = rcu_dereference(txq->qdisc); -+ if (unlikely(!q->enqueue)) -+ goto packet_not_eaten_by_imq_dev; -+ -+ spin_lock_bh(qdisc_lock(q)); -+ -+ users = atomic_read(&skb->users); -+ -+ skb_shared = skb_get(skb); /* increase reference count by one */ -+ skb_save_cb(skb_shared); /* backup skb->cb, as qdisc layer will -+ overwrite it */ -+ qdisc_enqueue_root(skb_shared, q); /* might kfree_skb */ -+ -+ if (likely(atomic_read(&skb_shared->users) == users + 1)) { -+ kfree_skb(skb_shared); /* decrease reference count by one */ -+ -+ skb->destructor = &imq_skb_destructor; -+ -+ /* cloned? */ -+ if (skb_orig) -+ kfree_skb(skb_orig); /* free original */ -+ -+ spin_unlock_bh(qdisc_lock(q)); -+ -+ /* schedule qdisc dequeue */ -+ __netif_schedule(q); -+ -+ retval = 0; -+ goto out; -+ } else { -+ skb_restore_cb(skb_shared); /* restore skb->cb */ -+ skb->nf_queue_entry = NULL; -+ /* qdisc dropped packet and decreased skb reference count of -+ * skb, so we don't really want to and try refree as that would -+ * actually destroy the skb. */ -+ spin_unlock_bh(qdisc_lock(q)); -+ goto packet_not_eaten_by_imq_dev; -+ } -+ -+packet_not_eaten_by_imq_dev: -+ /* cloned? restore original */ -+ if (skb_orig) { -+ kfree_skb(skb); -+ entry->skb = skb_orig; -+ } -+ retval = -1; -+out: -+ return retval; -+} -+ -+static struct nf_queue_handler nfqh = { -+ .name = "imq", -+ .outfn = imq_nf_queue, -+}; -+ -+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff *pskb, -+ const struct net_device *indev, -+ const struct net_device *outdev, -+ int (*okfn)(struct sk_buff *)) -+{ -+ if (pskb->imq_flags & IMQ_F_ENQUEUE) -+ return NF_QUEUE; -+ -+ return NF_ACCEPT; -+} -+ -+static int imq_close(struct net_device *dev) -+{ -+ netif_stop_queue(dev); -+ return 0; -+} -+ -+static int imq_open(struct net_device *dev) -+{ -+ netif_start_queue(dev); -+ return 0; -+} -+ -+static const struct net_device_ops imq_netdev_ops = { -+ .ndo_open = imq_open, -+ .ndo_stop = imq_close, -+ .ndo_start_xmit = imq_dev_xmit, -+ .ndo_get_stats = imq_get_stats, -+}; -+ -+static void imq_setup(struct net_device *dev) -+{ -+ dev->netdev_ops = &imq_netdev_ops; -+ dev->type = ARPHRD_VOID; -+ dev->mtu = 16000; -+ dev->tx_queue_len = 11000; -+ dev->flags = IFF_NOARP; -+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | -+ NETIF_F_GSO | NETIF_F_HW_CSUM | -+ NETIF_F_HIGHDMA; -+ dev->priv_flags &= ~IFF_XMIT_DST_RELEASE; -+} -+ -+static int imq_validate(struct nlattr *tb[], struct nlattr *data[]) -+{ -+ int ret = 0; -+ -+ if (tb[IFLA_ADDRESS]) { -+ if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN) { -+ ret = -EINVAL; -+ goto end; -+ } -+ if (!is_valid_ether_addr(nla_data(tb[IFLA_ADDRESS]))) { -+ ret = -EADDRNOTAVAIL; -+ goto end; -+ } -+ } -+ return 0; -+end: -+ printk(KERN_WARNING "IMQ: imq_validate failed (%d)\n", ret); -+ return ret; -+} -+ -+static struct rtnl_link_ops imq_link_ops __read_mostly = { -+ .kind = "imq", -+ .priv_size = 0, -+ .setup = imq_setup, -+ .validate = imq_validate, -+}; -+ -+static int __init imq_init_hooks(void) -+{ -+ int err; -+ -+ nf_register_queue_imq_handler(&nfqh); -+ -+ err = nf_register_hook(&imq_ingress_ipv4); -+ if (err) -+ goto err1; -+ -+ err = nf_register_hook(&imq_egress_ipv4); -+ if (err) -+ goto err2; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ err = nf_register_hook(&imq_ingress_ipv6); -+ if (err) -+ goto err3; -+ -+ err = nf_register_hook(&imq_egress_ipv6); -+ if (err) -+ goto err4; -+#endif -+ -+ return 0; -+ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+err4: -+ nf_unregister_hook(&imq_ingress_ipv6); -+err3: -+ nf_unregister_hook(&imq_egress_ipv4); -+#endif -+err2: -+ nf_unregister_hook(&imq_ingress_ipv4); -+err1: -+ nf_unregister_queue_imq_handler(); -+ return err; -+} -+ -+static int __init imq_init_one(int index) -+{ -+ struct net_device *dev; -+ int ret; -+ -+ dev = alloc_netdev(0, "imq%d", imq_setup); -+ if (!dev) -+ return -ENOMEM; -+ -+ ret = dev_alloc_name(dev, dev->name); -+ if (ret < 0) -+ goto fail; -+ -+ dev->rtnl_link_ops = &imq_link_ops; -+ ret = register_netdevice(dev); -+ if (ret < 0) -+ goto fail; -+ -+ return 0; -+fail: -+ free_netdev(dev); -+ return ret; -+} -+ -+static int __init imq_init_devs(void) -+{ -+ int err, i; -+ -+ if (numdevs < 1 || numdevs > IMQ_MAX_DEVS) { -+ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n", -+ IMQ_MAX_DEVS); -+ return -EINVAL; -+ } -+ -+ rtnl_lock(); -+ err = __rtnl_link_register(&imq_link_ops); -+ -+ for (i = 0; i < numdevs && !err; i++) -+ err = imq_init_one(i); -+ -+ if (err) { -+ __rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ } -+ rtnl_unlock(); -+ -+ return err; -+} -+ -+static int __init imq_init_module(void) -+{ -+ int err; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS > 16); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS < 2); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS - 1 > IMQ_F_IFMASK); -+#endif -+ -+ err = imq_init_devs(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_devs(net)\n"); -+ return err; -+ } -+ -+ err = imq_init_hooks(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n"); -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ return err; -+ } -+ -+ printk(KERN_INFO "IMQ driver loaded successfully.\n"); -+ -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n"); -+#endif -+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n"); -+#endif -+ -+ return 0; -+} -+ -+static void __exit imq_unhook(void) -+{ -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ nf_unregister_hook(&imq_ingress_ipv6); -+ nf_unregister_hook(&imq_egress_ipv6); -+#endif -+ nf_unregister_hook(&imq_ingress_ipv4); -+ nf_unregister_hook(&imq_egress_ipv4); -+ -+ nf_unregister_queue_imq_handler(); -+} -+ -+static void __exit imq_cleanup_devs(void) -+{ -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+} -+ -+static void __exit imq_exit_module(void) -+{ -+ imq_unhook(); -+ imq_cleanup_devs(); -+ printk(KERN_INFO "IMQ driver unloaded successfully.\n"); -+} -+ -+module_init(imq_init_module); -+module_exit(imq_exit_module); -+ -+module_param(numdevs, int, 0); -+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will " -+ "be created)"); -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See " -+ "http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_RTNL_LINK("imq"); -+ -diff -Naur linux-2.6.32.8.org/drivers/net/Kconfig linux-2.6.32.8/drivers/net/Kconfig ---- linux-2.6.32.8.org/drivers/net/Kconfig 2010-02-17 20:30:19.000000000 +0100 -+++ linux-2.6.32.8/drivers/net/Kconfig 2010-02-17 20:45:00.000000000 +0100 -@@ -109,6 +109,129 @@ - To compile this driver as a module, choose M here: the module - will be called eql. If unsure, say N. - -+config IMQ -+ tristate "IMQ (intermediate queueing device) support" -+ depends on NETDEVICES && NETFILTER -+ ---help--- -+ The IMQ device(s) is used as placeholder for QoS queueing -+ disciplines. Every packet entering/leaving the IP stack can be -+ directed through the IMQ device where it's enqueued/dequeued to the -+ attached qdisc. This allows you to treat network devices as classes -+ and distribute bandwidth among them. Iptables is used to specify -+ through which IMQ device, if any, packets travel. -+ -+ More information at: http://www.linuximq.net/ -+ -+ To compile this driver as a module, choose M here: the module -+ will be called imq. If unsure, say N. -+ -+choice -+ prompt "IMQ behavior (PRE/POSTROUTING)" -+ depends on IMQ -+ default IMQ_BEHAVIOR_AB -+ help -+ -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ IMQ can work in any of the following ways: -+ -+ PREROUTING | POSTROUTING -+ -----------------|------------------- -+ #1 After NAT | After NAT -+ #2 After NAT | Before NAT -+ #3 Before NAT | After NAT -+ #4 Before NAT | Before NAT -+ -+ The default behavior is to hook before NAT on PREROUTING -+ and after NAT on POSTROUTING (#3). -+ -+ This settings are specially usefull when trying to use IMQ -+ to shape NATed clients. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AA -+ bool "IMQ AA" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AB -+ bool "IMQ AB" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BA -+ bool "IMQ BA" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BB -+ bool "IMQ BB" -+ help -+ This settings defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+endchoice -+ -+config IMQ_NUM_DEVS -+ -+ int "Number of IMQ devices" -+ range 2 16 -+ depends on IMQ -+ default "16" -+ help -+ -+ This settings defines how many IMQ devices will be -+ created. -+ -+ The default value is 16. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ - config TUN - tristate "Universal TUN/TAP device driver support" - select CRC32 -diff -Naur linux-2.6.32.8.org/drivers/net/Makefile linux-2.6.32.8/drivers/net/Makefile ---- linux-2.6.32.8.org/drivers/net/Makefile 2010-02-17 20:30:19.000000000 +0100 -+++ linux-2.6.32.8/drivers/net/Makefile 2010-02-17 20:46:48.000000000 +0100 -@@ -165,6 +165,7 @@ - obj-$(CONFIG_XEN_NETFRONT) += xen-netfront.o - - obj-$(CONFIG_DUMMY) += dummy.o -+obj-$(CONFIG_IMQ) += imq.o - obj-$(CONFIG_IFB) += ifb.o - obj-$(CONFIG_MACVLAN) += macvlan.o - obj-$(CONFIG_DE600) += de600.o -diff -Naur linux-2.6.32.8.org/include/linux/imq.h linux-2.6.32.8/include/linux/imq.h ---- linux-2.6.32.8.org/include/linux/imq.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/include/linux/imq.h 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,13 @@ -+#ifndef _IMQ_H -+#define _IMQ_H -+ -+/* IFMASK (16 device indexes, 0 to 15) and flag(s) fit in 5 bits */ -+#define IMQ_F_BITS 5 -+ -+#define IMQ_F_IFMASK 0x0f -+#define IMQ_F_ENQUEUE 0x10 -+ -+#define IMQ_MAX_DEVS (IMQ_F_IFMASK + 1) -+ -+#endif /* _IMQ_H */ -+ -diff -Naur linux-2.6.32.8.org/include/linux/netdevice.h linux-2.6.32.8/include/linux/netdevice.h ---- linux-2.6.32.8.org/include/linux/netdevice.h 2010-02-17 20:30:18.000000000 +0100 -+++ linux-2.6.32.8/include/linux/netdevice.h 2010-02-17 20:45:00.000000000 +0100 -@@ -1119,6 +1119,7 @@ - extern int dev_open(struct net_device *dev); - extern int dev_close(struct net_device *dev); - extern void dev_disable_lro(struct net_device *dev); -+extern struct netdev_queue *dev_pick_tx(struct net_device *dev, struct sk_buff *skb); - extern int dev_queue_xmit(struct sk_buff *skb); - extern int register_netdevice(struct net_device *dev); - extern void unregister_netdevice(struct net_device *dev); -diff -Naur linux-2.6.32.8.org/include/linux/netfilter/xt_IMQ.h linux-2.6.32.8/include/linux/netfilter/xt_IMQ.h ---- linux-2.6.32.8.org/include/linux/netfilter/xt_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/include/linux/netfilter/xt_IMQ.h 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,9 @@ -+#ifndef _XT_IMQ_H -+#define _XT_IMQ_H -+ -+struct xt_imq_info { -+ unsigned int todev; /* target imq device */ -+}; -+ -+#endif /* _XT_IMQ_H */ -+ -diff -Naur linux-2.6.32.8.org/include/linux/netfilter_ipv4/ipt_IMQ.h linux-2.6.32.8/include/linux/netfilter_ipv4/ipt_IMQ.h ---- linux-2.6.32.8.org/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/include/linux/netfilter_ipv4/ipt_IMQ.h 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,10 @@ -+#ifndef _IPT_IMQ_H -+#define _IPT_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ipt_imq_info xt_imq_info -+ -+#endif /* _IPT_IMQ_H */ -+ -diff -Naur linux-2.6.32.8.org/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-2.6.32.8/include/linux/netfilter_ipv6/ip6t_IMQ.h ---- linux-2.6.32.8.org/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/include/linux/netfilter_ipv6/ip6t_IMQ.h 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,10 @@ -+#ifndef _IP6T_IMQ_H -+#define _IP6T_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ip6t_imq_info xt_imq_info -+ -+#endif /* _IP6T_IMQ_H */ -+ -diff -Naur linux-2.6.32.8.org/include/linux/skbuff.h linux-2.6.32.8/include/linux/skbuff.h ---- linux-2.6.32.8.org/include/linux/skbuff.h 2010-02-17 20:30:19.000000000 +0100 -+++ linux-2.6.32.8/include/linux/skbuff.h 2010-02-17 20:50:34.000000000 +0100 -@@ -29,6 +29,9 @@ - #include <linux/rcupdate.h> - #include <linux/dmaengine.h> - #include <linux/hrtimer.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - /* Don't change this without changing skb_csum_unnecessary! */ - #define CHECKSUM_NONE 0 -@@ -332,6 +335,9 @@ - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48]; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ void *cb_next; -+#endif - - unsigned int len, - data_len; -@@ -364,6 +370,9 @@ - struct nf_conntrack *nfct; - struct sk_buff *nfct_reasm; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ struct nf_queue_entry *nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; - #endif -@@ -395,6 +404,11 @@ - #ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; - #endif -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ __u8 imq_flags:IMQ_F_BITS; -+#endif -+ - #ifdef CONFIG_NETWORK_SECMARK - __u32 secmark; - #endif -@@ -458,6 +472,12 @@ - return (struct rtable *)skb_dst(skb); - } - -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern int skb_save_cb(struct sk_buff *skb); -+extern int skb_restore_cb(struct sk_buff *skb); -+#endif -+ - extern void kfree_skb(struct sk_buff *skb); - extern void consume_skb(struct sk_buff *skb); - extern void __kfree_skb(struct sk_buff *skb); -@@ -2008,6 +2028,10 @@ - dst->nfct_reasm = src->nfct_reasm; - nf_conntrack_get_reasm(src->nfct_reasm); - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ dst->imq_flags = src->imq_flags; -+ dst->nf_queue_entry = src->nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - dst->nf_bridge = src->nf_bridge; - nf_bridge_get(src->nf_bridge); -diff -Naur linux-2.6.32.8.org/include/net/netfilter/nf_queue.h linux-2.6.32.8/include/net/netfilter/nf_queue.h ---- linux-2.6.32.8.org/include/net/netfilter/nf_queue.h 2010-02-09 13:57:19.000000000 +0100 -+++ linux-2.6.32.8/include/net/netfilter/nf_queue.h 2010-02-17 20:45:00.000000000 +0100 -@@ -13,6 +13,12 @@ - struct net_device *indev; - struct net_device *outdev; - int (*okfn)(struct sk_buff *); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ int (*next_outfn)(struct nf_queue_entry *entry, -+ unsigned int queuenum); -+ unsigned int next_queuenum; -+#endif - }; - - #define nf_queue_entry_reroute(x) ((void *)x + sizeof(struct nf_queue_entry)) -@@ -30,5 +36,11 @@ - const struct nf_queue_handler *qh); - extern void nf_unregister_queue_handlers(const struct nf_queue_handler *qh); - extern void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict); -+extern void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern void nf_register_queue_imq_handler(const struct nf_queue_handler *qh); -+extern void nf_unregister_queue_imq_handler(void); -+#endif - - #endif /* _NF_QUEUE_H */ -diff -Naur linux-2.6.32.8.org/net/core/dev.c linux-2.6.32.8/net/core/dev.c ---- linux-2.6.32.8.org/net/core/dev.c 2010-02-17 20:30:19.000000000 +0100 -+++ linux-2.6.32.8/net/core/dev.c 2010-02-17 20:57:37.000000000 +0100 -@@ -96,6 +96,9 @@ - #include <net/net_namespace.h> - #include <net/sock.h> - #include <linux/rtnetlink.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - #include <linux/proc_fs.h> - #include <linux/seq_file.h> - #include <linux/stat.h> -@@ -1723,7 +1726,11 @@ - int rc; - - if (likely(!skb->next)) { -- if (!list_empty(&ptype_all)) -+ if (!list_empty(&ptype_all) -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ && !(skb->imq_flags & IMQ_F_ENQUEUE) -+#endif -+ ) - dev_queue_xmit_nit(skb, dev); - - if (netif_needs_gso(dev, skb)) { -@@ -1808,8 +1815,7 @@ - } - EXPORT_SYMBOL(skb_tx_hash); - --static struct netdev_queue *dev_pick_tx(struct net_device *dev, -- struct sk_buff *skb) -+struct netdev_queue *dev_pick_tx(struct net_device *dev, struct sk_buff *skb) - { - const struct net_device_ops *ops = dev->netdev_ops; - u16 queue_index = 0; -@@ -1875,6 +1881,7 @@ - EXPORT_SYMBOL(skb_checksum_setup); - #endif - -+EXPORT_SYMBOL(dev_pick_tx); - static inline int __dev_xmit_skb(struct sk_buff *skb, struct Qdisc *q, - struct net_device *dev, - struct netdev_queue *txq) -diff -Naur linux-2.6.32.8.org/net/core/skbuff.c linux-2.6.32.8/net/core/skbuff.c ---- linux-2.6.32.8.org/net/core/skbuff.c 2010-02-17 20:30:18.000000000 +0100 -+++ linux-2.6.32.8/net/core/skbuff.c 2010-02-17 20:45:00.000000000 +0100 -@@ -72,6 +72,9 @@ - - static struct kmem_cache *skbuff_head_cache __read_mostly; - static struct kmem_cache *skbuff_fclone_cache __read_mostly; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static struct kmem_cache *skbuff_cb_store_cache __read_mostly; -+#endif - - static void sock_pipe_buf_release(struct pipe_inode_info *pipe, - struct pipe_buffer *buf) -@@ -91,6 +94,83 @@ - return 1; - } - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+/* Control buffer save/restore for IMQ devices */ -+struct skb_cb_table { -+ void *cb_next; -+ atomic_t refcnt; -+ char cb[48]; -+}; -+ -+static DEFINE_SPINLOCK(skb_cb_store_lock); -+ -+int skb_save_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ next = kmem_cache_alloc(skbuff_cb_store_cache, GFP_ATOMIC); -+ if (!next) -+ return -ENOMEM; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(next->cb, skb->cb, sizeof(skb->cb)); -+ next->cb_next = skb->cb_next; -+ -+ atomic_set(&next->refcnt, 1); -+ -+ skb->cb_next = next; -+ return 0; -+} -+EXPORT_SYMBOL(skb_save_cb); -+ -+int skb_restore_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ if (!skb->cb_next) -+ return 0; -+ -+ next = skb->cb_next; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(skb->cb, next->cb, sizeof(skb->cb)); -+ skb->cb_next = next->cb_next; -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ if (atomic_dec_and_test(&next->refcnt)) { -+ kmem_cache_free(skbuff_cb_store_cache, next); -+ } -+ -+ spin_unlock(&skb_cb_store_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(skb_restore_cb); -+ -+static void skb_copy_stored_cb(struct sk_buff *new, const struct sk_buff *__old) -+{ -+ struct skb_cb_table *next; -+ struct sk_buff *old; -+ -+ if (!__old->cb_next) { -+ new->cb_next = NULL; -+ return; -+ } -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ old = (struct sk_buff *)__old; -+ -+ next = old->cb_next; -+ atomic_inc(&next->refcnt); -+ new->cb_next = next; -+ -+ spin_unlock(&skb_cb_store_lock); -+} -+#endif - - /* Pipe buffer operations for a socket. */ - static struct pipe_buf_operations sock_pipe_buf_ops = { -@@ -456,6 +536,26 @@ - WARN_ON(in_irq()); - skb->destructor(skb); - } -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ /* This should not happen. When it does, avoid memleak by restoring -+ the chain of cb-backups. */ -+ while(skb->cb_next != NULL) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING "IMQ: kfree_skb: skb->cb_next: " -+ "%08x\n", (unsigned int)skb->cb_next); -+ -+ skb_restore_cb(skb); -+ } -+ /* This should not happen either, nf_queue_entry is nullified in -+ * imq_dev_xmit(). If we have non-NULL nf_queue_entry then we are -+ * leaking entry pointers, maybe memory. We don't know if this is -+ * pointer to already freed memory, or should this be freed. -+ * If this happens we need to add refcounting, etc for nf_queue_entry. -+ */ -+ if (skb->nf_queue_entry && net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: kfree_skb: skb->nf_queue_entry != NULL"); -+#endif - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - nf_conntrack_put(skb->nfct); - nf_conntrack_put_reasm(skb->nfct_reasm); -@@ -593,6 +693,9 @@ - new->sp = secpath_get(old->sp); - #endif - memcpy(new->cb, old->cb, sizeof(old->cb)); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skb_copy_stored_cb(new, old); -+#endif - new->csum = old->csum; - new->local_df = old->local_df; - new->pkt_type = old->pkt_type; -@@ -2863,6 +2966,13 @@ - 0, - SLAB_HWCACHE_ALIGN|SLAB_PANIC, - NULL); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skbuff_cb_store_cache = kmem_cache_create("skbuff_cb_store_cache", -+ sizeof(struct skb_cb_table), -+ 0, -+ SLAB_HWCACHE_ALIGN|SLAB_PANIC, -+ NULL); -+#endif - } - - /** -diff -Naur linux-2.6.32.8.org/net/netfilter/Kconfig linux-2.6.32.8/net/netfilter/Kconfig ---- linux-2.6.32.8.org/net/netfilter/Kconfig 2010-02-17 20:30:16.000000000 +0100 -+++ linux-2.6.32.8/net/netfilter/Kconfig 2010-02-17 20:45:00.000000000 +0100 -@@ -411,6 +411,18 @@ - For more information on the LEDs available on your system, see - Documentation/leds-class.txt - -+config NETFILTER_XT_TARGET_IMQ -+ tristate '"IMQ" target support' -+ depends on NETFILTER_XTABLES -+ depends on IP_NF_MANGLE || IP6_NF_MANGLE -+ select IMQ -+ default m if NETFILTER_ADVANCED=n -+ help -+ This option adds a `IMQ' target which is used to specify if and -+ to which imq device packets should get enqueued/dequeued. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ - config NETFILTER_XT_TARGET_MARK - tristate '"MARK" target support' - default m if NETFILTER_ADVANCED=n -diff -Naur linux-2.6.32.8.org/net/netfilter/Makefile linux-2.6.32.8/net/netfilter/Makefile ---- linux-2.6.32.8.org/net/netfilter/Makefile 2010-02-17 20:30:16.000000000 +0100 -+++ linux-2.6.32.8/net/netfilter/Makefile 2010-02-17 20:45:00.000000000 +0100 -@@ -47,6 +47,7 @@ - obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_IMQ) += xt_IMQ.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o - obj-$(CONFIG_NETFILTER_XT_TARGET_MARK) += xt_MARK.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFLOG) += xt_NFLOG.o -diff -Naur linux-2.6.32.8.org/net/netfilter/nf_queue.c linux-2.6.32.8/net/netfilter/nf_queue.c ---- linux-2.6.32.8.org/net/netfilter/nf_queue.c 2010-02-09 13:57:19.000000000 +0100 -+++ linux-2.6.32.8/net/netfilter/nf_queue.c 2010-02-17 20:45:00.000000000 +0100 -@@ -20,6 +20,26 @@ - - static DEFINE_MUTEX(queue_handler_mutex); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static const struct nf_queue_handler *queue_imq_handler; -+ -+void nf_register_queue_imq_handler(const struct nf_queue_handler *qh) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, qh); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL(nf_register_queue_imq_handler); -+ -+void nf_unregister_queue_imq_handler(void) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, NULL); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL(nf_unregister_queue_imq_handler); -+#endif -+ - /* return EBUSY when somebody else is registered, return EEXIST if the - * same handler is registered, return 0 in case of success. */ - int nf_register_queue_handler(u_int8_t pf, const struct nf_queue_handler *qh) -@@ -80,7 +100,7 @@ - } - EXPORT_SYMBOL_GPL(nf_unregister_queue_handlers); - --static void nf_queue_entry_release_refs(struct nf_queue_entry *entry) -+void nf_queue_entry_release_refs(struct nf_queue_entry *entry) - { - /* Release those devices we held, or Alexey will kill me. */ - if (entry->indev) -@@ -100,6 +120,7 @@ - /* Drop reference to owner of hook which queued us. */ - module_put(entry->elem->owner); - } -+EXPORT_SYMBOL_GPL(nf_queue_entry_release_refs); - - /* - * Any packet that leaves via this function must come back -@@ -121,12 +142,26 @@ - #endif - const struct nf_afinfo *afinfo; - const struct nf_queue_handler *qh; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ const struct nf_queue_handler *qih = NULL; -+#endif - - /* QUEUE == DROP if noone is waiting, to be safe. */ - rcu_read_lock(); - - qh = rcu_dereference(queue_handler[pf]); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ if (pf == PF_INET || pf == PF_INET6) -+#else -+ if (pf == PF_INET) -+#endif -+ qih = rcu_dereference(queue_imq_handler); -+ -+ if (!qh && !qih) -+#else /* !IMQ */ - if (!qh) -+#endif - goto err_unlock; - - afinfo = nf_get_afinfo(pf); -@@ -145,6 +180,10 @@ - .indev = indev, - .outdev = outdev, - .okfn = okfn, -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ .next_outfn = qh ? qh->outfn : NULL, -+ .next_queuenum = queuenum, -+#endif - }; - - /* If it's going away, ignore hook. */ -@@ -170,8 +209,19 @@ - } - #endif - afinfo->saveroute(skb, entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ if (qih) { -+ status = qih->outfn(entry, queuenum); -+ goto imq_skip_queue; -+ } -+#endif -+ - status = qh->outfn(entry, queuenum); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+imq_skip_queue: -+#endif - rcu_read_unlock(); - - if (status < 0) { -diff -Naur linux-2.6.32.8.org/net/netfilter/xt_IMQ.c linux-2.6.32.8/net/netfilter/xt_IMQ.c ---- linux-2.6.32.8.org/net/netfilter/xt_IMQ.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.32.8/net/netfilter/xt_IMQ.c 2010-02-17 20:45:00.000000000 +0100 -@@ -0,0 +1,73 @@ -+/* -+ * This target marks packets to be enqueued to an imq device -+ */ -+#include <linux/module.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_IMQ.h> -+#include <linux/imq.h> -+ -+static unsigned int imq_target(struct sk_buff *pskb, -+ const struct xt_target_param *par) -+{ -+ const struct xt_imq_info *mr = par->targinfo; -+ -+ pskb->imq_flags = (mr->todev & IMQ_F_IFMASK) | IMQ_F_ENQUEUE; -+ -+ return XT_CONTINUE; -+} -+ -+static bool imq_checkentry(const struct xt_tgchk_param *par) -+{ -+ struct xt_imq_info *mr = par->targinfo; -+ -+ if (mr->todev > IMQ_MAX_DEVS - 1) { -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ IMQ_MAX_DEVS - 1); -+ return 0; -+ } -+ -+ return 1; -+} -+ -+static struct xt_target xt_imq_reg[] __read_mostly = { -+ { -+ .name = "IMQ", -+ .family = AF_INET, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+ { -+ .name = "IMQ", -+ .family = AF_INET6, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+}; -+ -+static int __init imq_init(void) -+{ -+ return xt_register_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+static void __exit imq_fini(void) -+{ -+ xt_unregister_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+module_init(imq_init); -+module_exit(imq_fini); -+ -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ipt_IMQ"); -+MODULE_ALIAS("ip6t_IMQ"); -+ diff --git a/src/patches/linux-2.x-smsc95xx-add_mac_addr_param.patch b/src/patches/linux-2.x-smsc95xx-add_mac_addr_param.patch deleted file mode 100644 index 2aea1d1..0000000 --- a/src/patches/linux-2.x-smsc95xx-add_mac_addr_param.patch +++ /dev/null @@ -1,149 +0,0 @@ -Added smsc95xx.macaddr module parameter to allow the user to -change the MAC address on boot if there was no MAC on the EEPROM. - -The parameter take the MAC address in 01:23:45:67:89:ab format and -needs to be locally assigned. The MAC get assigned to the first -smsc95xx device with no MAC on EEPROM (which resulted in a random -MAC before). If there is more than one device without MAC on -EEPROM and the user needs set the MAC to a specific device, it -can be done by attaching the netdev name (e.g. eth0) to the -smsc95xx.macaddr parameter seperated by a ';' as e.g. in -'01:23:45:67:89:ab;eth0' - -This allows e.g. u-boot to pass on PandaBoard or BeagleBoard -the by u-boot generated static MAC address to the kernel device -to ensure the MAC stays the same during the whole boot process. - -Signed-off-by: Danny Kukawka <danny.kukawka@...> ---- - drivers/net/usb/smsc95xx.c | 85 ++++++++++++++++++++++++++++++++++++++++++-- - 1 files changed, 82 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c -index d45520e..3198c7d 100644 ---- a/drivers/net/usb/smsc95xx.c -+++ b/drivers/net/usb/smsc95xx.c -@@ -52,6 +52,8 @@ struct smsc95xx_priv { - u32 hash_hi; - u32 hash_lo; - spinlock_t mac_cr_lock; -+ bool mac_set_from_param; -+ bool mac_is_random; - }; - - struct usb_context { -@@ -63,6 +65,11 @@ static bool turbo_mode = true; - module_param(turbo_mode, bool, 0644); - MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); - -+static char *macaddr = ":"; -+static bool set_macaddr = false; -+module_param(macaddr, charp, 0); -+MODULE_PARM_DESC(macaddr, " macaddr=macaddr;[tgt-netdevname] (Set MAC only if there is a device without MAC on EEPROM)"); -+ - static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) - { - u32 *buf = kmalloc(4, GFP_KERNEL); -@@ -601,8 +608,71 @@ static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) - return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); - } - -+/* set mac address from the macaddr module parameter */ -+static int smsc95xx_init_mac_address_from_param(struct usbnet *dev) -+{ -+ struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); -+ int i, parsed, ret; -+ u8 mtbl[ETH_ALEN]; -+ char *input = NULL; -+ char *config_param = NULL; -+ char *netdev_name = NULL; -+ -+ parsed = 0; -+ ret = 0; -+ -+ input = kstrdup(macaddr, GFP_KERNEL); -+ -+ if (!input) -+ return -ENOMEM; -+ -+ if (strlen(input) >= 17) { -+ while ((config_param = strsep(&input, ";"))) { -+ if (parsed == 0) { -+ if (!mac_pton(config_param, mtbl)) { -+ ret = 1; -+ goto parse_err; -+ } -+ } else { -+ netdev_name = config_param; -+ } -+ parsed ++; -+ } -+ -+ if (parsed && is_valid_ether_addr(mtbl)) { -+ if (netdev_name && strlen(netdev_name)) { -+ if (strcmp(netdev_name, dev->net->name) != 0) { -+ netif_dbg(dev, ifup, dev->net, "requested devname (%s) didn't match (%s)\n", netdev_name, dev->net->name); -+ ret = 1; -+ goto out; -+ } -+ } -+ -+ for (i = 0; i < ETH_ALEN; i++) { -+ dev->net->dev_addr[i] = mtbl[i]; -+ } -+ -+ netif_dbg(dev, ifup, dev->net, "set valid MAC address from smsc95xx.macaddr\n"); -+ set_macaddr = true; -+ pdata->mac_set_from_param = true; -+ pdata->mac_is_random = false; -+ goto out; -+ } -+ } -+ -+parse_err: -+ netif_dbg(dev, ifup, dev->net, "failed to parse (valid) MAC from smsc95xx.macaddr\n"); -+ set_macaddr = true; -+out: -+ if (input) -+ kfree(input); -+ return ret; -+} -+ - static void smsc95xx_init_mac_address(struct usbnet *dev) - { -+ struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); -+ - /* try reading mac address from EEPROM */ - if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, - dev->net->dev_addr) == 0) { -@@ -615,16 +685,25 @@ static void smsc95xx_init_mac_address(struct usbnet *dev) - - /* no eeprom, or eeprom values are invalid. generate random MAC */ - random_ether_addr(dev->net->dev_addr); -+ pdata->mac_is_random = true; - netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n"); - } - - static int smsc95xx_set_mac_address(struct usbnet *dev) - { -- u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | -- dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; -- u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; -+ struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); -+ u32 addr_lo, addr_hi; - int ret; - -+ if (pdata->mac_is_random && !pdata->mac_set_from_param && !set_macaddr) { -+ netif_dbg(dev, ifup, dev->net, "random MAC address, not yet set from smsc95xx.macaddr, try to set it ...\n"); -+ smsc95xx_init_mac_address_from_param(dev); -+ } -+ -+ addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | -+ dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; -+ addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; -+ - ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); - if (ret < 0) { - netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret); --- - diff --git a/src/patches/linux-3.0-ipp2p-0.8.2-ipfire.patch b/src/patches/linux-3.0-ipp2p-0.8.2-ipfire.patch deleted file mode 100644 index 34cba84..0000000 --- a/src/patches/linux-3.0-ipp2p-0.8.2-ipfire.patch +++ /dev/null @@ -1,1039 +0,0 @@ -diff -Naur linux-3.0.24.org/include/linux/netfilter_ipv4/ipt_ipp2p.h linux-3.0.24/include/linux/netfilter_ipv4/ipt_ipp2p.h ---- linux-3.0.24.org/include/linux/netfilter_ipv4/ipt_ipp2p.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.0.24/include/linux/netfilter_ipv4/ipt_ipp2p.h 2012-03-20 09:29:20.616541362 +0100 -@@ -0,0 +1,31 @@ -+#ifndef __IPT_IPP2P_H -+#define __IPT_IPP2P_H -+#define IPP2P_VERSION "0.8.2-ipfire" -+ -+struct ipt_p2p_info { -+ int cmd; -+ int debug; -+}; -+ -+#endif //__IPT_IPP2P_H -+ -+#define SHORT_HAND_IPP2P 1 /* --ipp2p switch*/ -+//#define SHORT_HAND_DATA 4 /* --ipp2p-data switch*/ -+#define SHORT_HAND_NONE 5 /* no short hand*/ -+ -+#define IPP2P_EDK (1 << 1) -+#define IPP2P_DATA_KAZAA (1 << 2) -+#define IPP2P_DATA_EDK (1 << 3) -+#define IPP2P_DATA_DC (1 << 4) -+#define IPP2P_DC (1 << 5) -+#define IPP2P_DATA_GNU (1 << 6) -+#define IPP2P_GNU (1 << 7) -+#define IPP2P_KAZAA (1 << 8) -+#define IPP2P_BIT (1 << 9) -+#define IPP2P_APPLE (1 << 10) -+#define IPP2P_SOUL (1 << 11) -+#define IPP2P_WINMX (1 << 12) -+#define IPP2P_ARES (1 << 13) -+#define IPP2P_MUTE (1 << 14) -+#define IPP2P_WASTE (1 << 15) -+#define IPP2P_XDCC (1 << 16) -diff -Naur linux-3.0.24.org/net/ipv4/netfilter/ipt_ipp2p.c linux-3.0.24/net/ipv4/netfilter/ipt_ipp2p.c ---- linux-3.0.24.org/net/ipv4/netfilter/ipt_ipp2p.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.0.24/net/ipv4/netfilter/ipt_ipp2p.c 2012-03-20 11:26:38.593101443 +0100 -@@ -0,0 +1,970 @@ -+#if defined(MODVERSIONS) -+#include <linux/modversions.h> -+#endif -+#include <linux/module.h> -+#include <linux/version.h> -+#include <linux/netfilter_ipv4/ip_tables.h> -+#include <linux/netfilter_ipv4/ipt_ipp2p.h> -+#include <net/tcp.h> -+#include <net/udp.h> -+ -+#define get_u8(X,O) (*(__u8 *)(X + O)) -+#define get_u16(X,O) (*(__u16 *)(X + O)) -+#define get_u32(X,O) (*(__u32 *)(X + O)) -+ -+MODULE_AUTHOR("Eicke Friedrich/Klaus Degner ipp2p@ipp2p.org"); -+MODULE_DESCRIPTION("An extension to iptables to identify P2P traffic."); -+MODULE_LICENSE("GPL"); -+ -+ -+/*Search for UDP eDonkey/eMule/Kad commands*/ -+int -+udp_search_edk (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ t += 8; -+ -+ switch (t[0]) { -+ case 0xe3: -+ { /*edonkey*/ -+ switch (t[1]) -+ { -+ /* client -> server status request */ -+ case 0x96: -+ if (packet_len == 14) return ((IPP2P_EDK * 100) + 50); -+ break; -+ /* server -> client status request */ -+ case 0x97: if (packet_len == 42) return ((IPP2P_EDK * 100) + 51); -+ break; -+ /* server description request */ -+ /* e3 2a ff f0 .. | size == 6 */ -+ case 0xa2: if ( (packet_len == 14) && ( get_u16(t,2) == __constant_htons(0xfff0) ) ) return ((IPP2P_EDK * 100) + 52); -+ break; -+ /* server description response */ -+ /* e3 a3 ff f0 .. | size > 40 && size < 200 */ -+ //case 0xa3: return ((IPP2P_EDK * 100) + 53); -+ // break; -+ case 0x9a: if (packet_len==26) return ((IPP2P_EDK * 100) + 54); -+ break; -+ -+ case 0x92: if (packet_len==18) return ((IPP2P_EDK * 100) + 55); -+ break; -+ } -+ break; -+ } -+ case 0xe4: -+ { -+ switch (t[1]) -+ { -+ /* e4 20 .. | size == 43 */ -+ case 0x20: if ((packet_len == 43) && (t[2] != 0x00) && (t[34] != 0x00)) return ((IPP2P_EDK * 100) + 60); -+ break; -+ /* e4 00 .. 00 | size == 35 ? */ -+ case 0x00: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 61); -+ break; -+ /* e4 10 .. 00 | size == 35 ? */ -+ case 0x10: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 62); -+ break; -+ /* e4 18 .. 00 | size == 35 ? */ -+ case 0x18: if ((packet_len == 35) && (t[26] == 0x00)) return ((IPP2P_EDK * 100) + 63); -+ break; -+ /* e4 52 .. | size = 44 */ -+ case 0x52: if (packet_len == 44 ) return ((IPP2P_EDK * 100) + 64); -+ break; -+ /* e4 58 .. | size == 6 */ -+ case 0x58: if (packet_len == 14 ) return ((IPP2P_EDK * 100) + 65); -+ break; -+ /* e4 59 .. | size == 2 */ -+ case 0x59: if (packet_len == 10 )return ((IPP2P_EDK * 100) + 66); -+ break; -+ /* e4 28 .. | packet_len == 52,77,102,127... */ -+ case 0x28: if (((packet_len-52) % 25) == 0) return ((IPP2P_EDK * 100) + 67); -+ break; -+ /* e4 50 xx xx | size == 4 */ -+ case 0x50: if (packet_len == 12) return ((IPP2P_EDK * 100) + 68); -+ break; -+ /* e4 40 xx xx | size == 48 */ -+ case 0x40: if (packet_len == 56) return ((IPP2P_EDK * 100) + 69); -+ break; -+ } -+ break; -+ } -+ } /* end of switch (t[0]) */ -+ return 0; -+}/*udp_search_edk*/ -+ -+ -+/*Search for UDP Gnutella commands*/ -+int -+udp_search_gnu (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ t += 8; -+ -+ if (memcmp(t, "GND", 3) == 0) return ((IPP2P_GNU * 100) + 51); -+ if (memcmp(t, "GNUTELLA ", 9) == 0) return ((IPP2P_GNU * 100) + 52); -+ return 0; -+}/*udp_search_gnu*/ -+ -+ -+/*Search for UDP KaZaA commands*/ -+int -+udp_search_kazaa (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ -+ if (t[packet_len-1] == 0x00){ -+ t += (packet_len - 6); -+ if (memcmp(t, "KaZaA", 5) == 0) return (IPP2P_KAZAA * 100 +50); -+ } -+ -+ return 0; -+}/*udp_search_kazaa*/ -+ -+/*Search for UDP DirectConnect commands*/ -+int -+udp_search_directconnect (unsigned char *haystack, int packet_len) -+{ -+ unsigned char *t = haystack; -+ if ((*(t + 8) == 0x24) && (*(t + packet_len - 1) == 0x7c)) { -+ t+=8; -+ if (memcmp(t, "SR ", 3) == 0) return ((IPP2P_DC * 100) + 60); -+ if (memcmp(t, "Ping ", 5) == 0) return ((IPP2P_DC * 100) + 61); -+ } -+ return 0; -+}/*udp_search_directconnect*/ -+ -+ -+ -+/*Search for UDP BitTorrent commands*/ -+int -+udp_search_bit (unsigned char *haystack, int packet_len) -+{ -+ switch(packet_len) -+ { -+ case 24: -+ /* ^ 00 00 04 17 27 10 19 80 */ -+ if ((ntohl(get_u32(haystack, 8)) == 0x00000417) && (ntohl(get_u32(haystack, 12)) == 0x27101980)) -+ return (IPP2P_BIT * 100 + 50); -+ break; -+ case 44: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 51); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000400)) -+ return (IPP2P_BIT * 100 + 61); -+ break; -+ case 65: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 52); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000404)) -+ return (IPP2P_BIT * 100 + 62); -+ break; -+ case 67: -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 53); -+ if (get_u32(haystack, 16) == __constant_htonl(0x00000406)) -+ return (IPP2P_BIT * 100 + 63); -+ break; -+ case 211: -+ if (get_u32(haystack, 8) == __constant_htonl(0x00000405)) -+ return (IPP2P_BIT * 100 + 54); -+ break; -+ case 29: -+ if ((get_u32(haystack, 8) == __constant_htonl(0x00000401))) -+ return (IPP2P_BIT * 100 + 55); -+ break; -+ case 52: -+ if (get_u32(haystack,8) == __constant_htonl(0x00000827) && -+ get_u32(haystack,12) == __constant_htonl(0x37502950)) -+ return (IPP2P_BIT * 100 + 80); -+ break; -+ default: -+ /* this packet does not have a constant size */ -+ if (packet_len >= 40 && get_u32(haystack, 16) == __constant_htonl(0x00000402) && get_u32(haystack, 36) == __constant_htonl(0x00000104)) -+ return (IPP2P_BIT * 100 + 56); -+ break; -+ } -+ -+ /* some extra-bitcomet rules: -+ * "d1:" [a|r] "d2:id20:" -+ */ -+ if (packet_len > 30 && get_u8(haystack, 8) == 'd' && get_u8(haystack, 9) == '1' && get_u8(haystack, 10) == ':' ) -+ { -+ if (get_u8(haystack, 11) == 'a' || get_u8(haystack, 11) == 'r') -+ { -+ if (memcmp(haystack+12,"d2:id20:",8)==0) -+ return (IPP2P_BIT * 100 + 57); -+ } -+ } -+ -+#if 0 -+ /* bitlord rules */ -+ /* packetlen must be bigger than 40 */ -+ /* first 4 bytes are zero */ -+ if (packet_len > 40 && get_u32(haystack, 8) == 0x00000000) -+ { -+ /* first rule: 00 00 00 00 01 00 00 xx xx xx xx 00 00 00 00*/ -+ if (get_u32(haystack, 12) == 0x00000000 && -+ get_u32(haystack, 16) == 0x00010000 && -+ get_u32(haystack, 24) == 0x00000000 ) -+ return (IPP2P_BIT * 100 + 71); -+ -+ /* 00 01 00 00 0d 00 00 xx xx xx xx 00 00 00 00*/ -+ if (get_u32(haystack, 12) == 0x00000001 && -+ get_u32(haystack, 16) == 0x000d0000 && -+ get_u32(haystack, 24) == 0x00000000 ) -+ return (IPP2P_BIT * 100 + 71); -+ -+ -+ } -+#endif -+ -+ return 0; -+}/*udp_search_bit*/ -+ -+ -+ -+/*Search for Ares commands*/ -+//#define IPP2P_DEBUG_ARES -+int -+search_ares (const unsigned char *payload, const u16 plen) -+//int search_ares (unsigned char *haystack, int packet_len, int head_len) -+{ -+// const unsigned char *t = haystack + head_len; -+ -+ /* all ares packets start with */ -+ if (payload[1] == 0 && (plen - payload[0]) == 3) -+ { -+ switch (payload[2]) -+ { -+ case 0x5a: -+ /* ares connect */ -+ if ( plen == 6 && payload[5] == 0x05 ) return ((IPP2P_ARES * 100) + 1); -+ break; -+ case 0x09: -+ /* ares search, min 3 chars --> 14 bytes -+ * lets define a search can be up to 30 chars --> max 34 bytes -+ */ -+ if ( plen >= 14 && plen <= 34 ) return ((IPP2P_ARES * 100) + 1); -+ break; -+#ifdef IPP2P_DEBUG_ARES -+ default: -+ printk(KERN_DEBUG "Unknown Ares command %x recognized, len: %u \n", (unsigned int) payload[2],plen); -+#endif /* IPP2P_DEBUG_ARES */ -+ } -+ } -+ -+#if 0 -+ /* found connect packet: 03 00 5a 04 03 05 */ -+ /* new version ares 1.8: 03 00 5a xx xx 05 */ -+ if ((plen) == 6){ /* possible connect command*/ -+ if ((payload[0] == 0x03) && (payload[1] == 0x00) && (payload[2] == 0x5a) && (payload[5] == 0x05)) -+ return ((IPP2P_ARES * 100) + 1); -+ } -+ if ((plen) == 60){ /* possible download command*/ -+ if ((payload[59] == 0x0a) && (payload[58] == 0x0a)){ -+ if (memcmp(t, "PUSH SHA1:", 10) == 0) /* found download command */ -+ return ((IPP2P_ARES * 100) + 2); -+ } -+ } -+#endif -+ -+ return 0; -+} /*search_ares*/ -+ -+/*Search for SoulSeek commands*/ -+int -+search_soul (const unsigned char *payload, const u16 plen) -+{ -+//#define IPP2P_DEBUG_SOUL -+ /* match: xx xx xx xx | xx = sizeof(payload) - 4 */ -+ if (get_u32(payload, 0) == (plen - 4)){ -+ const __u32 m=get_u32(payload, 4); -+ /* match 00 yy yy 00, yy can be everything */ -+ if ( get_u8(payload, 4) == 0x00 && get_u8(payload, 7) == 0x00 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "0: Soulseek command 0x%x recognized\n",get_u32(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 1); -+ } -+ -+ /* next match: 01 yy 00 00 | yy can be everything */ -+ if ( get_u8(payload, 4) == 0x01 && get_u16(payload, 6) == 0x0000 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "1: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 2); -+ } -+ -+ /* other soulseek commandos are: 1-5,7,9,13-18,22,23,26,28,35-37,40-46,50,51,60,62-69,91,92,1001 */ -+ /* try to do this in an intelligent way */ -+ /* get all small commandos */ -+ switch(m) -+ { -+ case 7: -+ case 9: -+ case 22: -+ case 23: -+ case 26: -+ case 28: -+ case 50: -+ case 51: -+ case 60: -+ case 91: -+ case 92: -+ case 1001: -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "2: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 3); -+ } -+ -+ if (m > 0 && m < 6 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "3: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 4); -+ } -+ if (m > 12 && m < 19 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "4: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 5); -+ } -+ -+ if (m > 34 && m < 38 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "5: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 6); -+ } -+ -+ if (m > 39 && m < 47 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "6: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 7); -+ } -+ -+ if (m > 61 && m < 70 ) -+ { -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "7: Soulseek command 0x%x recognized\n",get_u16(payload, 4)); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 8); -+ } -+ -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "unknown SOULSEEK command: 0x%x, first 16 bit: 0x%x, first 8 bit: 0x%x ,soulseek ???\n",get_u32(payload, 4),get_u16(payload, 4) >> 16,get_u8(payload, 4) >> 24); -+#endif /* IPP2P_DEBUG_SOUL */ -+ } -+ -+ /* match 14 00 00 00 01 yy 00 00 00 STRING(YY) 01 00 00 00 00 46|50 00 00 00 00 */ -+ /* without size at the beginning !!! */ -+ if ( get_u32(payload, 0) == 0x14 && get_u8(payload, 4) == 0x01 ) -+ { -+ __u32 y=get_u32(payload, 5); -+ /* we need 19 chars + string */ -+ if ( (y + 19) <= (plen) ) -+ { -+ const unsigned char *w=payload+9+y; -+ if (get_u32(w, 0) == 0x01 && ( get_u16(w, 4) == 0x4600 || get_u16(w, 4) == 0x5000) && get_u32(w, 6) == 0x00); -+#ifdef IPP2P_DEBUG_SOUL -+ printk(KERN_DEBUG "Soulssek special client command recognized\n"); -+#endif /* IPP2P_DEBUG_SOUL */ -+ return ((IPP2P_SOUL * 100) + 9); -+ } -+ } -+ return 0; -+} -+ -+ -+/*Search for WinMX commands*/ -+int -+search_winmx (const unsigned char *payload, const u16 plen) -+{ -+//#define IPP2P_DEBUG_WINMX -+ if (((plen) == 4) && (memcmp(payload, "SEND", 4) == 0)) return ((IPP2P_WINMX * 100) + 1); -+ if (((plen) == 3) && (memcmp(payload, "GET", 3) == 0)) return ((IPP2P_WINMX * 100) + 2); -+ //if (packet_len < (head_len + 10)) return 0; -+ if (plen < 10) return 0; -+ -+ if ((memcmp(payload, "SEND", 4) == 0) || (memcmp(payload, "GET", 3) == 0)){ -+ u16 c=4; -+ const u16 end=plen-2; -+ u8 count=0; -+ while (c < end) -+ { -+ if (payload[c]== 0x20 && payload[c+1] == 0x22) -+ { -+ c++; -+ count++; -+ if (count>=2) return ((IPP2P_WINMX * 100) + 3); -+ } -+ c++; -+ } -+ } -+ -+ if ( plen == 149 && payload[0] == '8' ) -+ { -+#ifdef IPP2P_DEBUG_WINMX -+ printk(KERN_INFO "maybe WinMX\n"); -+#endif -+ if (get_u32(payload,17) == 0 && get_u32(payload,21) == 0 && get_u32(payload,25) == 0 && -+// get_u32(payload,33) == __constant_htonl(0x71182b1a) && get_u32(payload,37) == __constant_htonl(0x05050000) && -+// get_u32(payload,133) == __constant_htonl(0x31097edf) && get_u32(payload,145) == __constant_htonl(0xdcb8f792)) -+ get_u16(payload,39) == 0 && get_u16(payload,135) == __constant_htons(0x7edf) && get_u16(payload,147) == __constant_htons(0xf792)) -+ -+ { -+#ifdef IPP2P_DEBUG_WINMX -+ printk(KERN_INFO "got WinMX\n"); -+#endif -+ return ((IPP2P_WINMX * 100) + 4); -+ } -+ } -+ return 0; -+} /*search_winmx*/ -+ -+ -+/*Search for appleJuice commands*/ -+int -+search_apple (const unsigned char *payload, const u16 plen) -+{ -+ if ( (plen > 7) && (payload[6] == 0x0d) && (payload[7] == 0x0a) && (memcmp(payload, "ajprot", 6) == 0)) return (IPP2P_APPLE * 100); -+ -+ return 0; -+} -+ -+ -+/*Search for BitTorrent commands*/ -+int -+search_bittorrent (const unsigned char *payload, const u16 plen) -+{ -+ if (plen > 20) -+ { -+ /* test for match 0x13+"BitTorrent protocol" */ -+ if (payload[0] == 0x13) -+ { -+ if (memcmp(payload+1, "BitTorrent protocol", 19) == 0) return (IPP2P_BIT * 100); -+ } -+ -+ /* get tracker commandos, all starts with GET / -+ * then it can follow: scrape| announce -+ * and then ?hash_info= -+ */ -+ if (memcmp(payload,"GET /",5) == 0) -+ { -+ /* message scrape */ -+ if ( memcmp(payload+5,"scrape?info_hash=",17)==0 ) return (IPP2P_BIT * 100 + 1); -+ /* message announce */ -+ if ( memcmp(payload+5,"announce?info_hash=",19)==0 ) return (IPP2P_BIT * 100 + 2); -+ } -+ } -+ else -+ { -+ /* bitcomet encryptes the first packet, so we have to detect another -+ * one later in the flow */ -+ /* first try failed, too many missdetections */ -+ //if ( size == 5 && get_u32(t,0) == __constant_htonl(1) && t[4] < 3) return (IPP2P_BIT * 100 + 3); -+ -+ /* second try: block request packets */ -+ if ( plen == 17 && get_u32(payload,0) == __constant_htonl(0x0d) && payload[4] == 0x06 && get_u32(payload,13) == __constant_htonl(0x4000) ) return (IPP2P_BIT * 100 + 3); -+ } -+ -+ return 0; -+} -+ -+ -+ -+/*check for Kazaa get command*/ -+int -+search_kazaa (const unsigned char *payload, const u16 plen) -+ -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a) && memcmp(payload, "GET /.hash=", 11) == 0) -+ return (IPP2P_DATA_KAZAA * 100); -+ -+ return 0; -+} -+ -+ -+/*check for gnutella get command*/ -+int -+search_gnu (const unsigned char *payload, const u16 plen) -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ if (memcmp(payload, "GET /get/", 9) == 0) return ((IPP2P_DATA_GNU * 100) + 1); -+ if (memcmp(payload, "GET /uri-res/", 13) == 0) return ((IPP2P_DATA_GNU * 100) + 2); -+ } -+ return 0; -+} -+ -+ -+/*check for gnutella get commands and other typical data*/ -+int -+search_all_gnu (const unsigned char *payload, const u16 plen) -+{ -+ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ -+ if (memcmp(payload, "GNUTELLA CONNECT/", 17) == 0) return ((IPP2P_GNU * 100) + 1); -+ if (memcmp(payload, "GNUTELLA/", 9) == 0) return ((IPP2P_GNU * 100) + 2); -+ -+ -+ if ((memcmp(payload, "GET /get/", 9) == 0) || (memcmp(payload, "GET /uri-res/", 13) == 0)) -+ { -+ u16 c=8; -+ const u16 end=plen-22; -+ while (c < end) { -+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Gnutella-", 11) == 0) || (memcmp(&payload[c+2], "X-Queue:", 8) == 0))) -+ return ((IPP2P_GNU * 100) + 3); -+ c++; -+ } -+ } -+ } -+ return 0; -+} -+ -+ -+/*check for KaZaA download commands and other typical data*/ -+int -+search_all_kazaa (const unsigned char *payload, const u16 plen) -+{ -+ if ((payload[plen-2] == 0x0d) && (payload[plen-1] == 0x0a)) -+ { -+ -+ if (memcmp(payload, "GIVE ", 5) == 0) return ((IPP2P_KAZAA * 100) + 1); -+ -+ if (memcmp(payload, "GET /", 5) == 0) { -+ u16 c = 8; -+ const u16 end=plen-22; -+ while (c < end) { -+ if ( payload[c] == 0x0a && payload[c+1] == 0x0d && ((memcmp(&payload[c+2], "X-Kazaa-Username: ", 18) == 0) || (memcmp(&payload[c+2], "User-Agent: PeerEnabler/", 24) == 0))) -+ return ((IPP2P_KAZAA * 100) + 2); -+ c++; -+ } -+ } -+ } -+ return 0; -+} -+ -+/*fast check for edonkey file segment transfer command*/ -+int -+search_edk (const unsigned char *payload, const u16 plen) -+{ -+ if (payload[0] != 0xe3) -+ return 0; -+ else { -+ if (payload[5] == 0x47) -+ return (IPP2P_DATA_EDK * 100); -+ else -+ return 0; -+ } -+} -+ -+ -+ -+/*intensive but slower search for some edonkey packets including size-check*/ -+int -+search_all_edk (const unsigned char *payload, const u16 plen) -+{ -+ if (payload[0] != 0xe3) -+ return 0; -+ else { -+ //t += head_len; -+ const u16 cmd = get_u16(payload, 1); -+ if (cmd == (plen - 5)) { -+ switch (payload[5]) { -+ case 0x01: return ((IPP2P_EDK * 100) + 1); /*Client: hello or Server:hello*/ -+ case 0x4c: return ((IPP2P_EDK * 100) + 9); /*Client: Hello-Answer*/ -+ } -+ } -+ return 0; -+ } -+} -+ -+ -+/*fast check for Direct Connect send command*/ -+int -+search_dc (const unsigned char *payload, const u16 plen) -+{ -+ -+ if (payload[0] != 0x24 ) -+ return 0; -+ else { -+ if (memcmp(&payload[1], "Send|", 5) == 0) -+ return (IPP2P_DATA_DC * 100); -+ else -+ return 0; -+ } -+ -+} -+ -+ -+/*intensive but slower check for all direct connect packets*/ -+int -+search_all_dc (const unsigned char *payload, const u16 plen) -+{ -+// unsigned char *t = haystack; -+ -+ if (payload[0] == 0x24 && payload[plen-1] == 0x7c) -+ { -+ const unsigned char *t=&payload[1]; -+ /* Client-Hub-Protocol */ -+ if (memcmp(t, "Lock ", 5) == 0) return ((IPP2P_DC * 100) + 1); -+ /* Client-Client-Protocol, some are already recognized by client-hub (like lock) */ -+ if (memcmp(t, "MyNick ", 7) == 0) return ((IPP2P_DC * 100) + 38); -+ } -+ return 0; -+} -+ -+/*check for mute*/ -+int -+search_mute (const unsigned char *payload, const u16 plen) -+{ -+ if ( plen == 209 || plen == 345 || plen == 473 || plen == 609 || plen == 1121 ) -+ { -+ //printk(KERN_DEBUG "size hit: %u",size); -+ if (memcmp(payload,"PublicKey: ",11) == 0 ) -+ { -+ return ((IPP2P_MUTE * 100) + 0); -+ -+/* if (memcmp(t+size-14,"\x0aEndPublicKey\x0a",14) == 0) -+ { -+ printk(KERN_DEBUG "end pubic key hit: %u",size); -+ -+ }*/ -+ } -+ } -+ return 0; -+} -+ -+ -+/* check for xdcc */ -+int -+search_xdcc (const unsigned char *payload, const u16 plen) -+{ -+ /* search in small packets only */ -+ if (plen > 20 && plen < 200 && payload[plen-1] == 0x0a && payload[plen-2] == 0x0d && memcmp(payload,"PRIVMSG ",8) == 0) -+ { -+ -+ u16 x=10; -+ const u16 end=plen - 13; -+ -+ /* is seems to be a irc private massage, chedck for xdcc command */ -+ while (x < end) -+ { -+ if (payload[x] == ':') -+ { -+ if ( memcmp(&payload[x+1],"xdcc send #",11) == 0 ) -+ return ((IPP2P_XDCC * 100) + 0); -+ } -+ x++; -+ } -+ } -+ return 0; -+} -+ -+/* search for waste */ -+int search_waste(const unsigned char *payload, const u16 plen) -+{ -+ if ( plen >= 8 && memcmp(payload,"GET.sha1:",9) == 0) -+ return ((IPP2P_WASTE * 100) + 0); -+ -+ return 0; -+} -+ -+ -+static struct { -+ int command; -+ __u8 short_hand; /*for fucntions included in short hands*/ -+ int packet_len; -+ int (*function_name) (const unsigned char *, const u16); -+} matchlist[] = { -+ {IPP2P_EDK,SHORT_HAND_IPP2P,20, &search_all_edk}, -+// {IPP2P_DATA_KAZAA,SHORT_HAND_DATA,200, &search_kazaa}, -+// {IPP2P_DATA_EDK,SHORT_HAND_DATA,60, &search_edk}, -+// {IPP2P_DATA_DC,SHORT_HAND_DATA,26, &search_dc}, -+ {IPP2P_DC,SHORT_HAND_IPP2P,5, search_all_dc}, -+// {IPP2P_DATA_GNU,SHORT_HAND_DATA,40, &search_gnu}, -+ {IPP2P_GNU,SHORT_HAND_IPP2P,5, &search_all_gnu}, -+ {IPP2P_KAZAA,SHORT_HAND_IPP2P,5, &search_all_kazaa}, -+ {IPP2P_BIT,SHORT_HAND_IPP2P,20, &search_bittorrent}, -+ {IPP2P_APPLE,SHORT_HAND_IPP2P,5, &search_apple}, -+ {IPP2P_SOUL,SHORT_HAND_IPP2P,5, &search_soul}, -+ {IPP2P_WINMX,SHORT_HAND_IPP2P,2, &search_winmx}, -+ {IPP2P_ARES,SHORT_HAND_IPP2P,5, &search_ares}, -+ {IPP2P_MUTE,SHORT_HAND_NONE,200, &search_mute}, -+ {IPP2P_WASTE,SHORT_HAND_NONE,5, &search_waste}, -+ {IPP2P_XDCC,SHORT_HAND_NONE,5, &search_xdcc}, -+ {0,0,0,NULL} -+}; -+ -+ -+static struct { -+ int command; -+ __u8 short_hand; /*for fucntions included in short hands*/ -+ int packet_len; -+ int (*function_name) (unsigned char *, int); -+} udp_list[] = { -+ { IPP2P_KAZAA, SHORT_HAND_IPP2P, 14, &udp_search_kazaa}, -+ { IPP2P_BIT, SHORT_HAND_IPP2P, 23, &udp_search_bit}, -+ { IPP2P_GNU, SHORT_HAND_IPP2P, 11, &udp_search_gnu}, -+ { IPP2P_EDK, SHORT_HAND_IPP2P, 9, &udp_search_edk}, -+ { IPP2P_DC, SHORT_HAND_IPP2P, 12, &udp_search_directconnect}, -+ { 0, 0, 0, NULL } -+}; -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ const void *hdr, -+ u_int16_t datalen, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+static int -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const struct xt_match *match, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ int *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+static bool -+match(const struct sk_buff *skb, -+ const struct net_device *in, -+ const struct net_device *out, -+ const struct xt_match *match, -+ const void *matchinfo, -+ int offset, -+ unsigned int protoff, -+ bool *hotdrop) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) -+static bool -+match(const struct sk_buff *skb, -+ const struct xt_match_param *par) -+#else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) */ -+static int -+match(const struct sk_buff *skb, -+ struct xt_action_param *par) -+#endif -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+ const struct ipt_p2p_info *info = matchinfo; -+#else -+ const struct ipt_p2p_info *info = par->matchinfo; -+ const int offset = par->fragoff; -+#endif -+ unsigned char *haystack; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) -+ struct iphdr *ip = ip_hdr(skb); -+#else -+ struct iphdr *ip = skb->nh.iph; -+#endif -+ int p2p_result = 0, i = 0; -+// int head_len; -+ int hlen = ntohs(ip->tot_len)-(ip->ihl*4); /*hlen = packet-data length*/ -+ -+ /*must not be a fragment*/ -+ if (offset) { -+ if (info->debug) printk("IPP2P.match: offset found %i \n",offset); -+ return 0; -+ } -+ -+ /*make sure that skb is linear*/ -+ if(skb_is_nonlinear(skb)){ -+ if (info->debug) printk("IPP2P.match: nonlinear skb found\n"); -+ return 0; -+ } -+ -+ -+ haystack=(char *)ip+(ip->ihl*4); /*haystack = packet data*/ -+ -+ switch (ip->protocol){ -+ case IPPROTO_TCP: /*what to do with a TCP packet*/ -+ { -+ struct tcphdr *tcph = (void *) ip + ip->ihl * 4; -+ -+ if (tcph->fin) return 0; /*if FIN bit is set bail out*/ -+ if (tcph->syn) return 0; /*if SYN bit is set bail out*/ -+ if (tcph->rst) return 0; /*if RST bit is set bail out*/ -+ -+ haystack += tcph->doff * 4; /*get TCP-Header-Size*/ -+ hlen -= tcph->doff * 4; -+ while (matchlist[i].command) { -+ if ((((info->cmd & matchlist[i].command) == matchlist[i].command) || -+ ((info->cmd & matchlist[i].short_hand) == matchlist[i].short_hand)) && -+ (hlen > matchlist[i].packet_len)) { -+ p2p_result = matchlist[i].function_name(haystack, hlen); -+ if (p2p_result) -+ { -+ if (info->debug) printk("IPP2P.debug:TCP-match: %i from: %pl4:%i to: %pl4:%i Length: %i\n", -+ p2p_result, &ip->saddr,ntohs(tcph->source), &ip->daddr,ntohs(tcph->dest),hlen); -+ return p2p_result; -+ } -+ } -+ i++; -+ } -+ return p2p_result; -+ } -+ -+ case IPPROTO_UDP: /*what to do with an UDP packet*/ -+ { -+ struct udphdr *udph = (void *) ip + ip->ihl * 4; -+ -+ while (udp_list[i].command){ -+ if ((((info->cmd & udp_list[i].command) == udp_list[i].command) || -+ ((info->cmd & udp_list[i].short_hand) == udp_list[i].short_hand)) && -+ (hlen > udp_list[i].packet_len)) { -+ p2p_result = udp_list[i].function_name(haystack, hlen); -+ if (p2p_result){ -+ if (info->debug) printk("IPP2P.debug:UDP-match: %i from: %pl4:%i to: %pl4:%i Length: %i\n", -+ p2p_result, &ip->saddr,ntohs(udph->source), &ip->daddr,ntohs(udph->dest),hlen); -+ return p2p_result; -+ } -+ } -+ i++; -+ } -+ return p2p_result; -+ } -+ -+ default: return 0; -+ } -+} -+ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) -+static int -+checkentry(const char *tablename, -+ const struct ipt_ip *ip, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int matchsize, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) -+static int -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -+static bool -+checkentry(const char *tablename, -+ const void *inf, -+ const struct xt_match *match, -+ void *matchinfo, -+ unsigned int hook_mask) -+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) -+static bool -+checkentry(const struct xt_mtchk_param *par) -+#else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35) */ -+static int -+checkentry(const struct xt_mtchk_param *par) -+#endif -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) -+ return 1; -+#else -+ return 0; -+#endif -+} -+ -+ -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+static struct xt_match ipp2p_match = { -+#else -+static struct ipt_match ipp2p_match = { -+#endif -+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) -+ { NULL, NULL }, -+ "ipp2p", -+ &ipp2p_match, -+ &ipp2p_checkentry, -+ NULL, -+ THIS_MODULE -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) -+ .name = "ipp2p", -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ .family = AF_INET, -+#endif -+ .match = &match, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,17) -+ .matchsize = sizeof(struct ipt_p2p_info), -+#endif -+ .checkentry = &checkentry, -+ .me = THIS_MODULE, -+#endif -+}; -+ -+ -+static int __init init(void) -+{ -+ printk(KERN_INFO "IPP2P v%s loading\n", IPP2P_VERSION); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ return xt_register_match(&ipp2p_match); -+#else -+ return ipt_register_match(&ipp2p_match); -+#endif -+} -+ -+static void __exit fini(void) -+{ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+ xt_unregister_match(&ipp2p_match); -+#else -+ ipt_unregister_match(&ipp2p_match); -+#endif -+ printk(KERN_INFO "IPP2P v%s unloaded\n", IPP2P_VERSION); -+} -+ -+module_init(init); -+module_exit(fini); -+ -+ -diff -Naur linux-3.0.24.org/net/ipv4/netfilter/Kconfig linux-3.0.24/net/ipv4/netfilter/Kconfig ---- linux-3.0.24.org/net/ipv4/netfilter/Kconfig 2012-03-12 18:58:19.000000000 +0100 -+++ linux-3.0.24/net/ipv4/netfilter/Kconfig 2012-03-20 09:05:15.827477622 +0100 -@@ -379,5 +379,15 @@ - - endif # IP_NF_ARPTABLES - -+config IP_NF_MATCH_IPP2P -+ tristate 'IPP2P match support' -+ depends on IP_NF_IPTABLES -+ help -+ This option makes possible to match some P2P packets -+ therefore helps controlling such traffic. -+ -+ If you want to compile it as a module, say M here and read -+ file:Documentation/modules.txt. If unsure, say `N'. -+ - endmenu - -diff -Naur linux-3.0.24.org/net/ipv4/netfilter/Makefile linux-3.0.24/net/ipv4/netfilter/Makefile ---- linux-3.0.24.org/net/ipv4/netfilter/Makefile 2012-03-12 18:58:19.000000000 +0100 -+++ linux-3.0.24/net/ipv4/netfilter/Makefile 2012-03-20 09:13:38.960288878 +0100 -@@ -50,6 +50,7 @@ - # matches - obj-$(CONFIG_IP_NF_MATCH_AH) += ipt_ah.o - obj-$(CONFIG_IP_NF_MATCH_ECN) += ipt_ecn.o -+obj-$(CONFIG_IP_NF_MATCH_IPP2P) += ipt_ipp2p.o - - # targets - obj-$(CONFIG_IP_NF_TARGET_CLUSTERIP) += ipt_CLUSTERIP.o diff --git a/src/patches/linux-3.1-imq.patch b/src/patches/linux-3.1-imq.patch deleted file mode 100644 index 6e97f1c..0000000 --- a/src/patches/linux-3.1-imq.patch +++ /dev/null @@ -1,1603 +0,0 @@ -diff -uNr linux-3.1/drivers/net/imq.c linux-3.1-imq/drivers/net/imq.c ---- linux-3.1/drivers/net/imq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/drivers/net/imq.c 2011-11-04 12:16:10.454992642 +0200 -@@ -0,0 +1,850 @@ -+/* -+ * Pseudo-driver for the intermediate queue device. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Authors: Patrick McHardy, kaber@trash.net -+ * -+ * The first version was written by Martin Devera, devik@cdi.cz -+ * -+ * Credits: Jan Rafaj imq2t@cedric.vabo.cz -+ * - Update patch to 2.4.21 -+ * Sebastian Strollo sstrollo@nortelnetworks.com -+ * - Fix "Dead-loop on netdevice imq"-issue -+ * Marcel Sebek sebek64@post.cz -+ * - Update to 2.6.2-rc1 -+ * -+ * After some time of inactivity there is a group taking care -+ * of IMQ again: http://www.linuximq.net -+ * -+ * -+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 -+ * including the following changes: -+ * -+ * - Correction of ipv6 support "+"s issue (Hasso Tepper) -+ * - Correction of imq_init_devs() issue that resulted in -+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller) -+ * - Addition of functionality to choose number of IMQ devices -+ * during kernel config (Andre Correa) -+ * - Addition of functionality to choose how IMQ hooks on -+ * PRE and POSTROUTING (after or before NAT) (Andre Correa) -+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa) -+ * -+ * -+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were -+ * released with almost no problems. 2.6.14-x was released -+ * with some important changes: nfcache was removed; After -+ * some weeks of trouble we figured out that some IMQ fields -+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header. -+ * These functions are correctly patched by this new patch version. -+ * -+ * Thanks for all who helped to figure out all the problems with -+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX, -+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully -+ * I didn't forget anybody). I apologize again for my lack of time. -+ * -+ * -+ * 2008/06/17 - 2.6.25 - Changed imq.c to use qdisc_run() instead -+ * of qdisc_restart() and moved qdisc_run() to tasklet to avoid -+ * recursive locking. New initialization routines to fix 'rmmod' not -+ * working anymore. Used code from ifb.c. (Jussi Kivilinna) -+ * -+ * 2008/08/06 - 2.6.26 - (JK) -+ * - Replaced tasklet with 'netif_schedule()'. -+ * - Cleaned up and added comments for imq_nf_queue(). -+ * -+ * 2009/04/12 -+ * - Add skb_save_cb/skb_restore_cb helper functions for backuping -+ * control buffer. This is needed because qdisc-layer on kernels -+ * 2.6.27 and newer overwrite control buffer. (Jussi Kivilinna) -+ * - Add better locking for IMQ device. Hopefully this will solve -+ * SMP issues. (Jussi Kivilinna) -+ * - Port to 2.6.27 -+ * - Port to 2.6.28 -+ * - Port to 2.6.29 + fix rmmod not working -+ * -+ * 2009/04/20 - (Jussi Kivilinna) -+ * - Use netdevice feature flags to avoid extra packet handling -+ * by core networking layer and possibly increase performance. -+ * -+ * 2009/09/26 - (Jussi Kivilinna) -+ * - Add imq_nf_reinject_lockless to fix deadlock with -+ * imq_nf_queue/imq_nf_reinject. -+ * -+ * 2009/12/08 - (Jussi Kivilinna) -+ * - Port to 2.6.32 -+ * - Add check for skb->nf_queue_entry==NULL in imq_dev_xmit() -+ * - Also add better error checking for skb->nf_queue_entry usage -+ * -+ * 2010/02/25 - (Jussi Kivilinna) -+ * - Port to 2.6.33 -+ * -+ * 2010/08/15 - (Jussi Kivilinna) -+ * - Port to 2.6.35 -+ * - Simplify hook registration by using nf_register_hooks. -+ * - nf_reinject doesn't need spinlock around it, therefore remove -+ * imq_nf_reinject function. Other nf_reinject users protect -+ * their own data with spinlock. With IMQ however all data is -+ * needed is stored per skbuff, so no locking is needed. -+ * - Changed IMQ to use 'separate' NF_IMQ_QUEUE instead of -+ * NF_QUEUE, this allows working coexistance of IMQ and other -+ * NF_QUEUE users. -+ * - Make IMQ multi-queue. Number of IMQ device queues can be -+ * increased with 'numqueues' module parameters. Default number -+ * of queues is 1, in other words by default IMQ works as -+ * single-queue device. Multi-queue selection is based on -+ * IFB multi-queue patch by Changli Gao xiaosuo@gmail.com. -+ * -+ * 2011/03/18 - (Jussi Kivilinna) -+ * - Port to 2.6.38 -+ * -+ * 2011/07/12 - (syoder89@gmail.com) -+ * - Crash fix that happens when the receiving interface has more -+ * than one queue (add missing skb_set_queue_mapping in -+ * imq_select_queue). -+ * -+ * 2011/07/26 - (Jussi Kivilinna) -+ * - Add queue mapping checks for packets exiting IMQ. -+ * - Port to 3.0 -+ * -+ * 2011/08/16 - (Jussi Kivilinna) -+ * - Clear IFF_TX_SKB_SHARING flag that was added for linux 3.0.2 -+ * -+ * 2011/11/03 - Germano Michel germanomichel@gmail.com -+ * - Fix IMQ for net namespaces -+ * -+ * 2011/11/04 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.1 -+ * - Clean-up, move 'get imq device pointer by imqX name' to -+ * separate function from imq_nf_queue(). -+ * -+ * Also, many thanks to pablo Sebastian Greco for making the initial -+ * patch and to those who helped the testing. -+ * -+ * More info at: http://www.linuximq.net/ (Andre Correa) -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/moduleparam.h> -+#include <linux/list.h> -+#include <linux/skbuff.h> -+#include <linux/netdevice.h> -+#include <linux/etherdevice.h> -+#include <linux/rtnetlink.h> -+#include <linux/if_arp.h> -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv4.h> -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ #include <linux/netfilter_ipv6.h> -+#endif -+#include <linux/imq.h> -+#include <net/pkt_sched.h> -+#include <net/netfilter/nf_queue.h> -+#include <net/sock.h> -+#include <linux/ip.h> -+#include <linux/ipv6.h> -+#include <linux/if_vlan.h> -+#include <linux/if_pppox.h> -+#include <net/ip.h> -+#include <net/ipv6.h> -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num); -+ -+static nf_hookfn imq_nf_hook; -+ -+static struct nf_hook_ops imq_ops[] = { -+ { -+ /* imq_ingress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP_PRI_LAST, -+#else -+ .priority = NF_IP_PRI_NAT_SRC - 1, -+#endif -+ }, -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ { -+ /* imq_ingress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP6_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP6_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP6_PRI_LAST, -+#else -+ .priority = NF_IP6_PRI_NAT_SRC - 1, -+#endif -+ }, -+#endif -+}; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+static int numdevs = CONFIG_IMQ_NUM_DEVS; -+#else -+static int numdevs = IMQ_MAX_DEVS; -+#endif -+ -+static struct net_device *imq_devs_cache[IMQ_MAX_DEVS]; -+ -+#define IMQ_MAX_QUEUES 32 -+static int numqueues = 1; -+static u32 imq_hashrnd; -+ -+static inline __be16 pppoe_proto(const struct sk_buff *skb) -+{ -+ return *((__be16 *)(skb_mac_header(skb) + ETH_HLEN + -+ sizeof(struct pppoe_hdr))); -+} -+ -+static u16 imq_hash(struct net_device *dev, struct sk_buff *skb) -+{ -+ unsigned int pull_len; -+ u16 protocol = skb->protocol; -+ u32 addr1, addr2; -+ u32 hash, ihl = 0; -+ union { -+ u16 in16[2]; -+ u32 in32; -+ } ports; -+ u8 ip_proto; -+ -+ pull_len = 0; -+ -+recheck: -+ switch (protocol) { -+ case htons(ETH_P_8021Q): { -+ if (unlikely(skb_pull(skb, VLAN_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += VLAN_HLEN; -+ skb->network_header += VLAN_HLEN; -+ -+ protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; -+ goto recheck; -+ } -+ -+ case htons(ETH_P_PPP_SES): { -+ if (unlikely(skb_pull(skb, PPPOE_SES_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += PPPOE_SES_HLEN; -+ skb->network_header += PPPOE_SES_HLEN; -+ -+ protocol = pppoe_proto(skb); -+ goto recheck; -+ } -+ -+ case htons(ETH_P_IP): { -+ const struct iphdr *iph = ip_hdr(skb); -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct iphdr)))) -+ goto other; -+ -+ addr1 = iph->daddr; -+ addr2 = iph->saddr; -+ -+ ip_proto = !(ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) ? -+ iph->protocol : 0; -+ ihl = ip_hdrlen(skb); -+ -+ break; -+ } -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ case htons(ETH_P_IPV6): { -+ const struct ipv6hdr *iph = ipv6_hdr(skb); -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct ipv6hdr)))) -+ goto other; -+ -+ addr1 = iph->daddr.s6_addr32[3]; -+ addr2 = iph->saddr.s6_addr32[3]; -+ ihl = ipv6_skip_exthdr(skb, sizeof(struct ipv6hdr), &ip_proto); -+ if (unlikely(ihl < 0)) -+ goto other; -+ -+ break; -+ } -+#endif -+ default: -+other: -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ return (u16)(ntohs(protocol) % dev->real_num_tx_queues); -+ } -+ -+ if (addr1 > addr2) -+ swap(addr1, addr2); -+ -+ switch (ip_proto) { -+ case IPPROTO_TCP: -+ case IPPROTO_UDP: -+ case IPPROTO_DCCP: -+ case IPPROTO_ESP: -+ case IPPROTO_AH: -+ case IPPROTO_SCTP: -+ case IPPROTO_UDPLITE: { -+ if (likely(skb_copy_bits(skb, ihl, &ports.in32, 4) >= 0)) { -+ if (ports.in16[0] > ports.in16[1]) -+ swap(ports.in16[0], ports.in16[1]); -+ break; -+ } -+ /* fall-through */ -+ } -+ default: -+ ports.in32 = 0; -+ break; -+ } -+ -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ hash = jhash_3words(addr1, addr2, ports.in32, imq_hashrnd ^ ip_proto); -+ -+ return (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+} -+ -+static inline bool sk_tx_queue_recorded(struct sock *sk) -+{ -+ return (sk_tx_queue_get(sk) >= 0); -+} -+ -+static struct netdev_queue *imq_select_queue(struct net_device *dev, -+ struct sk_buff *skb) -+{ -+ u16 queue_index = 0; -+ u32 hash; -+ -+ if (likely(dev->real_num_tx_queues == 1)) -+ goto out; -+ -+ /* IMQ can be receiving ingress or engress packets. */ -+ -+ /* Check first for if rx_queue is set */ -+ if (skb_rx_queue_recorded(skb)) { -+ queue_index = skb_get_rx_queue(skb); -+ goto out; -+ } -+ -+ /* Check if socket has tx_queue set */ -+ if (sk_tx_queue_recorded(skb->sk)) { -+ queue_index = sk_tx_queue_get(skb->sk); -+ goto out; -+ } -+ -+ /* Try use socket hash */ -+ if (skb->sk && skb->sk->sk_hash) { -+ hash = skb->sk->sk_hash; -+ queue_index = -+ (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+ goto out; -+ } -+ -+ /* Generate hash from packet data */ -+ queue_index = imq_hash(dev, skb); -+ -+out: -+ if (unlikely(queue_index >= dev->real_num_tx_queues)) -+ queue_index = (u16)((u32)queue_index % dev->real_num_tx_queues); -+ -+ skb_set_queue_mapping(skb, queue_index); -+ return netdev_get_tx_queue(dev, queue_index); -+} -+ -+static struct net_device_stats *imq_get_stats(struct net_device *dev) -+{ -+ return &dev->stats; -+} -+ -+/* called for packets kfree'd in qdiscs at places other than enqueue */ -+static void imq_skb_destructor(struct sk_buff *skb) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ -+ if (entry) { -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+ } -+ -+ skb_restore_cb(skb); /* kfree backup */ -+} -+ -+static void imq_done_check_queue_mapping(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ unsigned int queue_index; -+ -+ /* Don't let queue_mapping be left too large after exiting IMQ */ -+ if (likely(skb->dev != dev && skb->dev != NULL)) { -+ queue_index = skb_get_queue_mapping(skb); -+ if (unlikely(queue_index >= skb->dev->real_num_tx_queues)) { -+ queue_index = (u16)((u32)queue_index % -+ skb->dev->real_num_tx_queues); -+ skb_set_queue_mapping(skb, queue_index); -+ } -+ } else { -+ /* skb->dev was IMQ device itself or NULL, be on safe side and -+ * just clear queue mapping. -+ */ -+ skb_set_queue_mapping(skb, 0); -+ } -+} -+ -+static netdev_tx_t imq_dev_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ dev->trans_start = jiffies; -+ -+ dev->stats.tx_bytes += skb->len; -+ dev->stats.tx_packets++; -+ -+ if (unlikely(entry == NULL)) { -+ /* We don't know what is going on here.. packet is queued for -+ * imq device, but (probably) not by us. -+ * -+ * If this packet was not send here by imq_nf_queue(), then -+ * skb_save_cb() was not used and skb_free() should not show: -+ * WARNING: IMQ: kfree_skb: skb->cb_next:.. -+ * and/or -+ * WARNING: IMQ: kfree_skb: skb->nf_queue_entry... -+ * -+ * However if this message is shown, then IMQ is somehow broken -+ * and you should report this to linuximq.net. -+ */ -+ -+ /* imq_dev_xmit is black hole that eats all packets, report that -+ * we eat this packet happily and increase dropped counters. -+ */ -+ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ return NETDEV_TX_OK; -+ } -+ -+ skb_restore_cb(skb); /* restore skb->cb */ -+ -+ skb->imq_flags = 0; -+ skb->destructor = NULL; -+ -+ imq_done_check_queue_mapping(skb, dev); -+ -+ nf_reinject(entry, NF_ACCEPT); -+ -+ return NETDEV_TX_OK; -+} -+ -+static struct net_device *get_imq_device_by_index(int index) -+{ -+ struct net_device *dev = NULL; -+ struct net *net; -+ char buf[8]; -+ -+ /* get device by name and cache result */ -+ snprintf(buf, sizeof(buf), "imq%d", index); -+ -+ /* Search device from all namespaces. */ -+ for_each_net(net) { -+ dev = dev_get_by_name(net, buf); -+ if (dev) -+ break; -+ } -+ -+ if (WARN_ON_ONCE(dev == NULL)) { -+ /* IMQ device not found. Exotic config? */ -+ return ERR_PTR(-ENODEV); -+ } -+ -+ imq_devs_cache[index] = dev; -+ dev_put(dev); -+ -+ return dev; -+} -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num) -+{ -+ struct net_device *dev; -+ struct sk_buff *skb_orig, *skb, *skb_shared; -+ struct Qdisc *q; -+ struct netdev_queue *txq; -+ spinlock_t *root_lock; -+ int users, index; -+ int retval = -EINVAL; -+ unsigned int orig_queue_index; -+ -+ index = entry->skb->imq_flags & IMQ_F_IFMASK; -+ if (unlikely(index > numdevs - 1)) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ numdevs - 1); -+ retval = -EINVAL; -+ goto out; -+ } -+ -+ /* check for imq device by index from cache */ -+ dev = imq_devs_cache[index]; -+ if (unlikely(!dev)) { -+ dev = get_imq_device_by_index(index); -+ if (IS_ERR(dev)) { -+ retval = PTR_ERR(dev); -+ goto out; -+ } -+ } -+ -+ if (unlikely(!(dev->flags & IFF_UP))) { -+ entry->skb->imq_flags = 0; -+ nf_reinject(entry, NF_ACCEPT); -+ retval = 0; -+ goto out; -+ } -+ dev->last_rx = jiffies; -+ -+ skb = entry->skb; -+ skb_orig = NULL; -+ -+ /* skb has owner? => make clone */ -+ if (unlikely(skb->destructor)) { -+ skb_orig = skb; -+ skb = skb_clone(skb, GFP_ATOMIC); -+ if (unlikely(!skb)) { -+ retval = -ENOMEM; -+ goto out; -+ } -+ entry->skb = skb; -+ } -+ -+ skb->nf_queue_entry = entry; -+ -+ dev->stats.rx_bytes += skb->len; -+ dev->stats.rx_packets++; -+ -+ if (!skb->dev) { -+ /* skb->dev == NULL causes problems, try the find cause. */ -+ if (net_ratelimit()) { -+ dev_warn(&dev->dev, -+ "received packet with skb->dev == NULL\n"); -+ dump_stack(); -+ } -+ -+ skb->dev = dev; -+ } -+ -+ /* Disables softirqs for lock below */ -+ rcu_read_lock_bh(); -+ -+ /* Multi-queue selection */ -+ orig_queue_index = skb_get_queue_mapping(skb); -+ txq = imq_select_queue(dev, skb); -+ -+ q = rcu_dereference(txq->qdisc); -+ if (unlikely(!q->enqueue)) -+ goto packet_not_eaten_by_imq_dev; -+ -+ root_lock = qdisc_lock(q); -+ spin_lock(root_lock); -+ -+ users = atomic_read(&skb->users); -+ -+ skb_shared = skb_get(skb); /* increase reference count by one */ -+ skb_save_cb(skb_shared); /* backup skb->cb, as qdisc layer will -+ overwrite it */ -+ qdisc_enqueue_root(skb_shared, q); /* might kfree_skb */ -+ -+ if (likely(atomic_read(&skb_shared->users) == users + 1)) { -+ kfree_skb(skb_shared); /* decrease reference count by one */ -+ -+ skb->destructor = &imq_skb_destructor; -+ -+ /* cloned? */ -+ if (unlikely(skb_orig)) -+ kfree_skb(skb_orig); /* free original */ -+ -+ spin_unlock(root_lock); -+ rcu_read_unlock_bh(); -+ -+ /* schedule qdisc dequeue */ -+ __netif_schedule(q); -+ -+ retval = 0; -+ goto out; -+ } else { -+ skb_restore_cb(skb_shared); /* restore skb->cb */ -+ skb->nf_queue_entry = NULL; -+ /* qdisc dropped packet and decreased skb reference count of -+ * skb, so we don't really want to and try refree as that would -+ * actually destroy the skb. */ -+ spin_unlock(root_lock); -+ goto packet_not_eaten_by_imq_dev; -+ } -+ -+packet_not_eaten_by_imq_dev: -+ skb_set_queue_mapping(skb, orig_queue_index); -+ rcu_read_unlock_bh(); -+ -+ /* cloned? restore original */ -+ if (unlikely(skb_orig)) { -+ kfree_skb(skb); -+ entry->skb = skb_orig; -+ } -+ retval = -1; -+out: -+ return retval; -+} -+ -+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff *pskb, -+ const struct net_device *indev, -+ const struct net_device *outdev, -+ int (*okfn)(struct sk_buff *)) -+{ -+ return (pskb->imq_flags & IMQ_F_ENQUEUE) ? NF_IMQ_QUEUE : NF_ACCEPT; -+} -+ -+static int imq_close(struct net_device *dev) -+{ -+ netif_stop_queue(dev); -+ return 0; -+} -+ -+static int imq_open(struct net_device *dev) -+{ -+ netif_start_queue(dev); -+ return 0; -+} -+ -+static const struct net_device_ops imq_netdev_ops = { -+ .ndo_open = imq_open, -+ .ndo_stop = imq_close, -+ .ndo_start_xmit = imq_dev_xmit, -+ .ndo_get_stats = imq_get_stats, -+}; -+ -+static void imq_setup(struct net_device *dev) -+{ -+ dev->netdev_ops = &imq_netdev_ops; -+ dev->type = ARPHRD_VOID; -+ dev->mtu = 16000; /* too small? */ -+ dev->tx_queue_len = 11000; /* too big? */ -+ dev->flags = IFF_NOARP; -+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | -+ NETIF_F_GSO | NETIF_F_HW_CSUM | -+ NETIF_F_HIGHDMA; -+ dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | -+ IFF_TX_SKB_SHARING); -+} -+ -+static int imq_validate(struct nlattr *tb[], struct nlattr *data[]) -+{ -+ int ret = 0; -+ -+ if (tb[IFLA_ADDRESS]) { -+ if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN) { -+ ret = -EINVAL; -+ goto end; -+ } -+ if (!is_valid_ether_addr(nla_data(tb[IFLA_ADDRESS]))) { -+ ret = -EADDRNOTAVAIL; -+ goto end; -+ } -+ } -+ return 0; -+end: -+ printk(KERN_WARNING "IMQ: imq_validate failed (%d)\n", ret); -+ return ret; -+} -+ -+static struct rtnl_link_ops imq_link_ops __read_mostly = { -+ .kind = "imq", -+ .priv_size = 0, -+ .setup = imq_setup, -+ .validate = imq_validate, -+}; -+ -+static const struct nf_queue_handler imq_nfqh = { -+ .name = "imq", -+ .outfn = imq_nf_queue, -+}; -+ -+static int __init imq_init_hooks(void) -+{ -+ int ret; -+ -+ nf_register_queue_imq_handler(&imq_nfqh); -+ -+ ret = nf_register_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ if (ret < 0) -+ nf_unregister_queue_imq_handler(); -+ -+ return ret; -+} -+ -+static int __init imq_init_one(int index) -+{ -+ struct net_device *dev; -+ int ret; -+ -+ dev = alloc_netdev_mq(0, "imq%d", imq_setup, numqueues); -+ if (!dev) -+ return -ENOMEM; -+ -+ ret = dev_alloc_name(dev, dev->name); -+ if (ret < 0) -+ goto fail; -+ -+ dev->rtnl_link_ops = &imq_link_ops; -+ ret = register_netdevice(dev); -+ if (ret < 0) -+ goto fail; -+ -+ return 0; -+fail: -+ free_netdev(dev); -+ return ret; -+} -+ -+static int __init imq_init_devs(void) -+{ -+ int err, i; -+ -+ if (numdevs < 1 || numdevs > IMQ_MAX_DEVS) { -+ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n", -+ IMQ_MAX_DEVS); -+ return -EINVAL; -+ } -+ -+ if (numqueues < 1 || numqueues > IMQ_MAX_QUEUES) { -+ printk(KERN_ERR "IMQ: numqueues has to be betweed 1 and %u\n", -+ IMQ_MAX_QUEUES); -+ return -EINVAL; -+ } -+ -+ get_random_bytes(&imq_hashrnd, sizeof(imq_hashrnd)); -+ -+ rtnl_lock(); -+ err = __rtnl_link_register(&imq_link_ops); -+ -+ for (i = 0; i < numdevs && !err; i++) -+ err = imq_init_one(i); -+ -+ if (err) { -+ __rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ } -+ rtnl_unlock(); -+ -+ return err; -+} -+ -+static int __init imq_init_module(void) -+{ -+ int err; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS > 16); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS < 2); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS - 1 > IMQ_F_IFMASK); -+#endif -+ -+ err = imq_init_devs(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_devs(net)\n"); -+ return err; -+ } -+ -+ err = imq_init_hooks(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n"); -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ return err; -+ } -+ -+ printk(KERN_INFO "IMQ driver loaded successfully. " -+ "(numdevs = %d, numqueues = %d)\n", numdevs, numqueues); -+ -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n"); -+#endif -+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n"); -+#endif -+ -+ return 0; -+} -+ -+static void __exit imq_unhook(void) -+{ -+ nf_unregister_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ nf_unregister_queue_imq_handler(); -+} -+ -+static void __exit imq_cleanup_devs(void) -+{ -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+} -+ -+static void __exit imq_exit_module(void) -+{ -+ imq_unhook(); -+ imq_cleanup_devs(); -+ printk(KERN_INFO "IMQ driver unloaded successfully.\n"); -+} -+ -+module_init(imq_init_module); -+module_exit(imq_exit_module); -+ -+module_param(numdevs, int, 0); -+module_param(numqueues, int, 0); -+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will " -+ "be created)"); -+MODULE_PARM_DESC(numqueues, "number of queues per IMQ device"); -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See " -+ "http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_RTNL_LINK("imq"); -+ -diff -uNr linux-3.1/drivers/net/Kconfig linux-3.1-imq/drivers/net/Kconfig ---- linux-3.1/drivers/net/Kconfig 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/drivers/net/Kconfig 2011-11-04 11:12:52.106390309 +0200 -@@ -124,6 +124,125 @@ - To compile this driver as a module, choose M here: the module - will be called eql. If unsure, say N. - -+config IMQ -+ tristate "IMQ (intermediate queueing device) support" -+ depends on NETDEVICES && NETFILTER -+ ---help--- -+ The IMQ device(s) is used as placeholder for QoS queueing -+ disciplines. Every packet entering/leaving the IP stack can be -+ directed through the IMQ device where it's enqueued/dequeued to the -+ attached qdisc. This allows you to treat network devices as classes -+ and distribute bandwidth among them. Iptables is used to specify -+ through which IMQ device, if any, packets travel. -+ -+ More information at: http://www.linuximq.net/ -+ -+ To compile this driver as a module, choose M here: the module -+ will be called imq. If unsure, say N. -+ -+choice -+ prompt "IMQ behavior (PRE/POSTROUTING)" -+ depends on IMQ -+ default IMQ_BEHAVIOR_AB -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ IMQ can work in any of the following ways: -+ -+ PREROUTING | POSTROUTING -+ -----------------|------------------- -+ #1 After NAT | After NAT -+ #2 After NAT | Before NAT -+ #3 Before NAT | After NAT -+ #4 Before NAT | Before NAT -+ -+ The default behavior is to hook before NAT on PREROUTING -+ and after NAT on POSTROUTING (#3). -+ -+ This settings are specially usefull when trying to use IMQ -+ to shape NATed clients. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AA -+ bool "IMQ AA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AB -+ bool "IMQ AB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BA -+ bool "IMQ BA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BB -+ bool "IMQ BB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+endchoice -+ -+config IMQ_NUM_DEVS -+ int "Number of IMQ devices" -+ range 2 16 -+ depends on IMQ -+ default "16" -+ help -+ This setting defines how many IMQ devices will be created. -+ -+ The default value is 16. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ - config TUN - tristate "Universal TUN/TAP device driver support" - select CRC32 -diff -uNr linux-3.1/drivers/net/Makefile linux-3.1-imq/drivers/net/Makefile ---- linux-3.1/drivers/net/Makefile 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/drivers/net/Makefile 2011-11-04 11:12:52.106390309 +0200 -@@ -175,6 +175,7 @@ - obj-$(CONFIG_XEN_NETDEV_BACKEND) += xen-netback/ - - obj-$(CONFIG_DUMMY) += dummy.o -+obj-$(CONFIG_IMQ) += imq.o - obj-$(CONFIG_IFB) += ifb.o - obj-$(CONFIG_MACVLAN) += macvlan.o - obj-$(CONFIG_MACVTAP) += macvtap.o -diff -uNr linux-3.1/include/linux/imq.h linux-3.1-imq/include/linux/imq.h ---- linux-3.1/include/linux/imq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/include/linux/imq.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,13 @@ -+#ifndef _IMQ_H -+#define _IMQ_H -+ -+/* IFMASK (16 device indexes, 0 to 15) and flag(s) fit in 5 bits */ -+#define IMQ_F_BITS 5 -+ -+#define IMQ_F_IFMASK 0x0f -+#define IMQ_F_ENQUEUE 0x10 -+ -+#define IMQ_MAX_DEVS (IMQ_F_IFMASK + 1) -+ -+#endif /* _IMQ_H */ -+ -diff -uNr linux-3.1/include/linux/netfilter/xt_IMQ.h linux-3.1-imq/include/linux/netfilter/xt_IMQ.h ---- linux-3.1/include/linux/netfilter/xt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/include/linux/netfilter/xt_IMQ.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,9 @@ -+#ifndef _XT_IMQ_H -+#define _XT_IMQ_H -+ -+struct xt_imq_info { -+ unsigned int todev; /* target imq device */ -+}; -+ -+#endif /* _XT_IMQ_H */ -+ -diff -uNr linux-3.1/include/linux/netfilter.h linux-3.1-imq/include/linux/netfilter.h ---- linux-3.1/include/linux/netfilter.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/include/linux/netfilter.h 2011-11-04 11:12:52.109723710 +0200 -@@ -22,7 +22,8 @@ - #define NF_QUEUE 3 - #define NF_REPEAT 4 - #define NF_STOP 5 --#define NF_MAX_VERDICT NF_STOP -+#define NF_IMQ_QUEUE 6 -+#define NF_MAX_VERDICT NF_IMQ_QUEUE - - /* we overload the higher bits for encoding auxiliary data such as the queue - * number or errno values. Not nice, but better than additional function -diff -uNr linux-3.1/include/linux/netfilter_ipv4/ipt_IMQ.h linux-3.1-imq/include/linux/netfilter_ipv4/ipt_IMQ.h ---- linux-3.1/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/include/linux/netfilter_ipv4/ipt_IMQ.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IPT_IMQ_H -+#define _IPT_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ipt_imq_info xt_imq_info -+ -+#endif /* _IPT_IMQ_H */ -+ -diff -uNr linux-3.1/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-3.1-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h ---- linux-3.1/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h 2011-11-04 11:12:52.113057113 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IP6T_IMQ_H -+#define _IP6T_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ip6t_imq_info xt_imq_info -+ -+#endif /* _IP6T_IMQ_H */ -+ -diff -uNr linux-3.1/include/linux/skbuff.h linux-3.1-imq/include/linux/skbuff.h ---- linux-3.1/include/linux/skbuff.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/include/linux/skbuff.h 2011-11-04 11:12:52.116390515 +0200 -@@ -29,6 +29,9 @@ - #include <linux/rcupdate.h> - #include <linux/dmaengine.h> - #include <linux/hrtimer.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - /* Don't change this without changing skb_csum_unnecessary! */ - #define CHECKSUM_NONE 0 -@@ -356,6 +359,9 @@ - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48] __aligned(8); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ void *cb_next; -+#endif - - unsigned long _skb_refdst; - #ifdef CONFIG_XFRM -@@ -394,6 +400,9 @@ - #ifdef NET_SKBUFF_NF_DEFRAG_NEEDED - struct sk_buff *nfct_reasm; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ struct nf_queue_entry *nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; - #endif -@@ -418,6 +427,10 @@ - - /* 0/13 bit hole */ - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ __u8 imq_flags:IMQ_F_BITS; -+#endif -+ - #ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; - #endif -@@ -504,6 +517,12 @@ - return (struct rtable *)skb_dst(skb); - } - -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern int skb_save_cb(struct sk_buff *skb); -+extern int skb_restore_cb(struct sk_buff *skb); -+#endif -+ - extern void kfree_skb(struct sk_buff *skb); - extern void consume_skb(struct sk_buff *skb); - extern void __kfree_skb(struct sk_buff *skb); -@@ -2157,6 +2176,10 @@ - dst->nfct_reasm = src->nfct_reasm; - nf_conntrack_get_reasm(src->nfct_reasm); - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ dst->imq_flags = src->imq_flags; -+ dst->nf_queue_entry = src->nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - dst->nf_bridge = src->nf_bridge; - nf_bridge_get(src->nf_bridge); -diff -uNr linux-3.1/include/net/netfilter/nf_queue.h linux-3.1-imq/include/net/netfilter/nf_queue.h ---- linux-3.1/include/net/netfilter/nf_queue.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/include/net/netfilter/nf_queue.h 2011-11-04 11:12:52.116390515 +0200 -@@ -30,5 +30,11 @@ - const struct nf_queue_handler *qh); - extern void nf_unregister_queue_handlers(const struct nf_queue_handler *qh); - extern void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict); -+extern void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern void nf_register_queue_imq_handler(const struct nf_queue_handler *qh); -+extern void nf_unregister_queue_imq_handler(void); -+#endif - - #endif /* _NF_QUEUE_H */ -diff -uNr linux-3.1/net/core/dev.c linux-3.1-imq/net/core/dev.c ---- linux-3.1/net/core/dev.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/core/dev.c 2011-11-04 11:12:52.119723915 +0200 -@@ -98,6 +98,9 @@ - #include <net/net_namespace.h> - #include <net/sock.h> - #include <linux/rtnetlink.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - #include <linux/proc_fs.h> - #include <linux/seq_file.h> - #include <linux/stat.h> -@@ -2126,7 +2129,12 @@ - if (dev->priv_flags & IFF_XMIT_DST_RELEASE) - skb_dst_drop(skb); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ if (!list_empty(&ptype_all) && -+ !(skb->imq_flags & IMQ_F_ENQUEUE)) -+#else - if (!list_empty(&ptype_all)) -+#endif - dev_queue_xmit_nit(skb, dev); - - skb_orphan_try(skb); -diff -uNr linux-3.1/net/core/skbuff.c linux-3.1-imq/net/core/skbuff.c ---- linux-3.1/net/core/skbuff.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/core/skbuff.c 2011-11-04 11:12:52.123057315 +0200 -@@ -73,6 +73,9 @@ - - static struct kmem_cache *skbuff_head_cache __read_mostly; - static struct kmem_cache *skbuff_fclone_cache __read_mostly; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static struct kmem_cache *skbuff_cb_store_cache __read_mostly; -+#endif - - static void sock_pipe_buf_release(struct pipe_inode_info *pipe, - struct pipe_buffer *buf) -@@ -92,6 +95,82 @@ - return 1; - } - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+/* Control buffer save/restore for IMQ devices */ -+struct skb_cb_table { -+ char cb[48] __aligned(8); -+ void *cb_next; -+ atomic_t refcnt; -+}; -+ -+static DEFINE_SPINLOCK(skb_cb_store_lock); -+ -+int skb_save_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ next = kmem_cache_alloc(skbuff_cb_store_cache, GFP_ATOMIC); -+ if (!next) -+ return -ENOMEM; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(next->cb, skb->cb, sizeof(skb->cb)); -+ next->cb_next = skb->cb_next; -+ -+ atomic_set(&next->refcnt, 1); -+ -+ skb->cb_next = next; -+ return 0; -+} -+EXPORT_SYMBOL(skb_save_cb); -+ -+int skb_restore_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ if (!skb->cb_next) -+ return 0; -+ -+ next = skb->cb_next; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(skb->cb, next->cb, sizeof(skb->cb)); -+ skb->cb_next = next->cb_next; -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ if (atomic_dec_and_test(&next->refcnt)) -+ kmem_cache_free(skbuff_cb_store_cache, next); -+ -+ spin_unlock(&skb_cb_store_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(skb_restore_cb); -+ -+static void skb_copy_stored_cb(struct sk_buff *new, const struct sk_buff *__old) -+{ -+ struct skb_cb_table *next; -+ struct sk_buff *old; -+ -+ if (!__old->cb_next) { -+ new->cb_next = NULL; -+ return; -+ } -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ old = (struct sk_buff *)__old; -+ -+ next = old->cb_next; -+ atomic_inc(&next->refcnt); -+ new->cb_next = next; -+ -+ spin_unlock(&skb_cb_store_lock); -+} -+#endif - - /* Pipe buffer operations for a socket. */ - static const struct pipe_buf_operations sock_pipe_buf_ops = { -@@ -392,6 +471,26 @@ - WARN_ON(in_irq()); - skb->destructor(skb); - } -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ /* This should not happen. When it does, avoid memleak by restoring -+ the chain of cb-backups. */ -+ while (skb->cb_next != NULL) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING "IMQ: kfree_skb: skb->cb_next: " -+ "%08x\n", (unsigned int)skb->cb_next); -+ -+ skb_restore_cb(skb); -+ } -+ /* This should not happen either, nf_queue_entry is nullified in -+ * imq_dev_xmit(). If we have non-NULL nf_queue_entry then we are -+ * leaking entry pointers, maybe memory. We don't know if this is -+ * pointer to already freed memory, or should this be freed. -+ * If this happens we need to add refcounting, etc for nf_queue_entry. -+ */ -+ if (skb->nf_queue_entry && net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: kfree_skb: skb->nf_queue_entry != NULL"); -+#endif - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - nf_conntrack_put(skb->nfct); - #endif -@@ -533,6 +632,9 @@ - new->sp = secpath_get(old->sp); - #endif - memcpy(new->cb, old->cb, sizeof(old->cb)); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skb_copy_stored_cb(new, old); -+#endif - new->csum = old->csum; - new->local_df = old->local_df; - new->pkt_type = old->pkt_type; -@@ -2888,6 +2990,13 @@ - 0, - SLAB_HWCACHE_ALIGN|SLAB_PANIC, - NULL); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skbuff_cb_store_cache = kmem_cache_create("skbuff_cb_store_cache", -+ sizeof(struct skb_cb_table), -+ 0, -+ SLAB_HWCACHE_ALIGN|SLAB_PANIC, -+ NULL); -+#endif - } - - /** -diff -uNr linux-3.1/net/ipv6/ip6_output.c linux-3.1-imq/net/ipv6/ip6_output.c ---- linux-3.1/net/ipv6/ip6_output.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/ipv6/ip6_output.c 2011-11-04 11:12:52.123057315 +0200 -@@ -102,9 +102,6 @@ - struct net_device *dev = dst->dev; - struct neighbour *neigh; - -- skb->protocol = htons(ETH_P_IPV6); -- skb->dev = dev; -- - if (ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr)) { - struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); - -@@ -170,6 +167,11 @@ - return 0; - } - -+ /* IMQ-patch: moved setting skb->dev and skb->protocol from -+ * ip6_finish_output2 to fix crashing at netif_skb_features(). */ -+ skb->protocol = htons(ETH_P_IPV6); -+ skb->dev = dev; -+ - return NF_HOOK_COND(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL, dev, - ip6_finish_output, - !(IP6CB(skb)->flags & IP6SKB_REROUTED)); -diff -uNr linux-3.1/net/netfilter/core.c linux-3.1-imq/net/netfilter/core.c ---- linux-3.1/net/netfilter/core.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/netfilter/core.c 2011-11-04 11:12:52.123057315 +0200 -@@ -179,9 +179,11 @@ - ret = NF_DROP_GETERR(verdict); - if (ret == 0) - ret = -EPERM; -- } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE) { -+ } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE || -+ (verdict & NF_VERDICT_MASK) == NF_IMQ_QUEUE) { - ret = nf_queue(skb, elem, pf, hook, indev, outdev, okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (ret < 0) { - if (ret == -ECANCELED) - goto next_hook; -diff -uNr linux-3.1/net/netfilter/Kconfig linux-3.1-imq/net/netfilter/Kconfig ---- linux-3.1/net/netfilter/Kconfig 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/netfilter/Kconfig 2011-11-04 11:12:52.123057315 +0200 -@@ -507,6 +507,18 @@ - For more information on the LEDs available on your system, see - Documentation/leds-class.txt - -+config NETFILTER_XT_TARGET_IMQ -+ tristate '"IMQ" target support' -+ depends on NETFILTER_XTABLES -+ depends on IP_NF_MANGLE || IP6_NF_MANGLE -+ select IMQ -+ default m if NETFILTER_ADVANCED=n -+ help -+ This option adds a `IMQ' target which is used to specify if and -+ to which imq device packets should get enqueued/dequeued. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ - config NETFILTER_XT_TARGET_MARK - tristate '"MARK" target support' - depends on NETFILTER_ADVANCED -diff -uNr linux-3.1/net/netfilter/Makefile linux-3.1-imq/net/netfilter/Makefile ---- linux-3.1/net/netfilter/Makefile 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/netfilter/Makefile 2011-11-04 11:12:52.123057315 +0200 -@@ -56,6 +56,7 @@ - obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_IMQ) += xt_IMQ.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFLOG) += xt_NFLOG.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o -diff -uNr linux-3.1/net/netfilter/nf_internals.h linux-3.1-imq/net/netfilter/nf_internals.h ---- linux-3.1/net/netfilter/nf_internals.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/netfilter/nf_internals.h 2011-11-04 11:12:52.123057315 +0200 -@@ -29,7 +29,7 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum); -+ unsigned int queuenum, unsigned int queuetype); - extern int __init netfilter_queue_init(void); - - /* nf_log.c */ -diff -uNr linux-3.1/net/netfilter/nf_queue.c linux-3.1-imq/net/netfilter/nf_queue.c ---- linux-3.1/net/netfilter/nf_queue.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.1-imq/net/netfilter/nf_queue.c 2011-11-04 11:12:52.123057315 +0200 -@@ -22,6 +22,26 @@ - - static DEFINE_MUTEX(queue_handler_mutex); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static const struct nf_queue_handler *queue_imq_handler; -+ -+void nf_register_queue_imq_handler(const struct nf_queue_handler *qh) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, qh); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL_GPL(nf_register_queue_imq_handler); -+ -+void nf_unregister_queue_imq_handler(void) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, NULL); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL_GPL(nf_unregister_queue_imq_handler); -+#endif -+ - /* return EBUSY when somebody else is registered, return EEXIST if the - * same handler is registered, return 0 in case of success. */ - int nf_register_queue_handler(u_int8_t pf, const struct nf_queue_handler *qh) -@@ -92,7 +112,7 @@ - } - EXPORT_SYMBOL_GPL(nf_unregister_queue_handlers); - --static void nf_queue_entry_release_refs(struct nf_queue_entry *entry) -+void nf_queue_entry_release_refs(struct nf_queue_entry *entry) - { - /* Release those devices we held, or Alexey will kill me. */ - if (entry->indev) -@@ -112,6 +132,7 @@ - /* Drop reference to owner of hook which queued us. */ - module_put(entry->elem->owner); - } -+EXPORT_SYMBOL_GPL(nf_queue_entry_release_refs); - - /* - * Any packet that leaves via this function must come back -@@ -123,7 +144,8 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum) -+ unsigned int queuenum, -+ unsigned int queuetype) - { - int status = -ENOENT; - struct nf_queue_entry *entry = NULL; -@@ -137,7 +159,17 @@ - /* QUEUE == DROP if no one is waiting, to be safe. */ - rcu_read_lock(); - -- qh = rcu_dereference(queue_handler[pf]); -+ if (queuetype == NF_IMQ_QUEUE) { -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ qh = rcu_dereference(queue_imq_handler); -+#else -+ BUG(); -+ goto err_unlock; -+#endif -+ } else { -+ qh = rcu_dereference(queue_handler[pf]); -+ } -+ - if (!qh) { - status = -ESRCH; - goto err_unlock; -@@ -209,7 +241,8 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum) -+ unsigned int queuenum, -+ unsigned int queuetype) - { - struct sk_buff *segs; - int err; -@@ -217,7 +250,7 @@ - - if (!skb_is_gso(skb)) - return __nf_queue(skb, elem, pf, hook, indev, outdev, okfn, -- queuenum); -+ queuenum, queuetype); - - switch (pf) { - case NFPROTO_IPV4: -@@ -244,7 +277,7 @@ - segs->next = NULL; - if (err == 0) - err = __nf_queue(segs, elem, pf, hook, indev, -- outdev, okfn, queuenum); -+ outdev, okfn, queuenum, queuetype); - if (err == 0) - queued++; - else -@@ -299,9 +332,11 @@ - local_bh_enable(); - break; - case NF_QUEUE: -+ case NF_IMQ_QUEUE: - err = __nf_queue(skb, elem, entry->pf, entry->hook, - entry->indev, entry->outdev, entry->okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (err < 0) { - if (err == -ECANCELED) - goto next_hook; -diff -uNr linux-3.1/net/netfilter/xt_IMQ.c linux-3.1-imq/net/netfilter/xt_IMQ.c ---- linux-3.1/net/netfilter/xt_IMQ.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.1-imq/net/netfilter/xt_IMQ.c 2011-11-04 11:12:52.123057315 +0200 -@@ -0,0 +1,74 @@ -+/* -+ * This target marks packets to be enqueued to an imq device -+ */ -+#include <linux/module.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_IMQ.h> -+#include <linux/imq.h> -+ -+static unsigned int imq_target(struct sk_buff *pskb, -+ const struct xt_action_param *par) -+{ -+ const struct xt_imq_info *mr = par->targinfo; -+ -+ pskb->imq_flags = (mr->todev & IMQ_F_IFMASK) | IMQ_F_ENQUEUE; -+ -+ return XT_CONTINUE; -+} -+ -+static int imq_checkentry(const struct xt_tgchk_param *par) -+{ -+ struct xt_imq_info *mr = par->targinfo; -+ -+ if (mr->todev > IMQ_MAX_DEVS - 1) { -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ IMQ_MAX_DEVS - 1); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static struct xt_target xt_imq_reg[] __read_mostly = { -+ { -+ .name = "IMQ", -+ .family = AF_INET, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+ { -+ .name = "IMQ", -+ .family = AF_INET6, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+}; -+ -+static int __init imq_init(void) -+{ -+ return xt_register_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+static void __exit imq_fini(void) -+{ -+ xt_unregister_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+module_init(imq_init); -+module_exit(imq_fini); -+ -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. " -+ "See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ipt_IMQ"); -+MODULE_ALIAS("ip6t_IMQ"); -+ diff --git a/src/patches/linux-3.10-layer7-filter.patch b/src/patches/linux-3.10-layer7-filter.patch deleted file mode 100644 index ec5fc5d..0000000 --- a/src/patches/linux-3.10-layer7-filter.patch +++ /dev/null @@ -1,2185 +0,0 @@ -http://git.ipfire.org/?p=people/ms/linux.git;a=shortlog;h=refs/heads/linux-3... - -diff --git a/include/linux/netfilter/xt_layer7.h b/include/linux/netfilter/xt_layer7.h -new file mode 100644 -index 0000000..c38d3c4 ---- /dev/null -+++ b/include/linux/netfilter/xt_layer7.h -@@ -0,0 +1,14 @@ -+#ifndef _XT_LAYER7_H -+#define _XT_LAYER7_H -+ -+#define MAX_PATTERN_LEN 8192 -+#define MAX_PROTOCOL_LEN 256 -+ -+struct xt_layer7_info { -+ char protocol[MAX_PROTOCOL_LEN]; -+ char pattern[MAX_PATTERN_LEN]; -+ u_int8_t invert; -+ u_int8_t pkt; -+}; -+ -+#endif /* _XT_LAYER7_H */ -diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h -index 644d9c2..b226a8f 100644 ---- a/include/net/netfilter/nf_conntrack.h -+++ b/include/net/netfilter/nf_conntrack.h -@@ -105,6 +105,22 @@ struct nf_conn { - struct net *ct_net; - #endif - -+#if defined(CONFIG_NETFILTER_XT_MATCH_LAYER7) || \ -+ defined(CONFIG_NETFILTER_XT_MATCH_LAYER7_MODULE) -+ struct { -+ /* -+ * e.g. "http". NULL before decision. "unknown" after decision -+ * if no match. -+ */ -+ char *app_proto; -+ /* -+ * application layer data so far. NULL after match decision. -+ */ -+ char *app_data; -+ unsigned int app_data_len; -+ } layer7; -+#endif -+ - /* Storage reserved for other modules, must be the last member */ - union nf_conntrack_proto proto; - }; -diff --git a/include/uapi/linux/netfilter/Kbuild b/include/uapi/linux/netfilter/Kbuild -index 4111577..a95e6b5 100644 ---- a/include/uapi/linux/netfilter/Kbuild -+++ b/include/uapi/linux/netfilter/Kbuild -@@ -53,6 +53,7 @@ header-y += xt_hashlimit.h - header-y += xt_helper.h - header-y += xt_iprange.h - header-y += xt_ipvs.h -+header-y += xt_layer7.h - header-y += xt_length.h - header-y += xt_limit.h - header-y += xt_mac.h -diff --git a/net/netfilter/Kconfig b/net/netfilter/Kconfig -index 56d22ca..7827ba4 100644 ---- a/net/netfilter/Kconfig -+++ b/net/netfilter/Kconfig -@@ -1011,6 +1011,26 @@ config NETFILTER_XT_MATCH_IPVS - - If unsure, say N. - -+config NETFILTER_XT_MATCH_LAYER7 -+ tristate '"layer7" match support' -+ depends on NETFILTER_XTABLES -+ depends on NETFILTER_ADVANCED -+ depends on NF_CONNTRACK -+ help -+ Say Y if you want to be able to classify connections (and their -+ packets) based on regular expression matching of their application -+ layer data. This is one way to classify applications such as -+ peer-to-peer filesharing systems that do not always use the same -+ port. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ -+config NETFILTER_XT_MATCH_LAYER7_DEBUG -+ bool 'Layer 7 debugging output' -+ depends on NETFILTER_XT_MATCH_LAYER7 -+ help -+ Say Y to get lots of debugging output. -+ - config NETFILTER_XT_MATCH_LENGTH - tristate '"length" match support' - depends on NETFILTER_ADVANCED -@@ -1205,6 +1225,12 @@ config NETFILTER_XT_MATCH_STATE - - To compile it as a module, choose M here. If unsure, say N. - -+config NETFILTER_XT_MATCH_LAYER7_DEBUG -+ bool 'Layer 7 debugging output' -+ depends on NETFILTER_XT_MATCH_LAYER7 -+ help -+ Say Y to get lots of debugging output. -+ - config NETFILTER_XT_MATCH_STATISTIC - tristate '"statistic" match support' - depends on NETFILTER_ADVANCED -diff --git a/net/netfilter/Makefile b/net/netfilter/Makefile -index a1abf87..acec24e 100644 ---- a/net/netfilter/Makefile -+++ b/net/netfilter/Makefile -@@ -134,6 +134,7 @@ obj-$(CONFIG_NETFILTER_XT_MATCH_RECENT) += xt_recent.o - obj-$(CONFIG_NETFILTER_XT_MATCH_SCTP) += xt_sctp.o - obj-$(CONFIG_NETFILTER_XT_MATCH_SOCKET) += xt_socket.o - obj-$(CONFIG_NETFILTER_XT_MATCH_STATE) += xt_state.o -+obj-$(CONFIG_NETFILTER_XT_MATCH_LAYER7) += xt_layer7.o - obj-$(CONFIG_NETFILTER_XT_MATCH_STATISTIC) += xt_statistic.o - obj-$(CONFIG_NETFILTER_XT_MATCH_STRING) += xt_string.o - obj-$(CONFIG_NETFILTER_XT_MATCH_TCPMSS) += xt_tcpmss.o -diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c -index 0283bae..cae3790 100644 ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -224,6 +224,13 @@ destroy_conntrack(struct nf_conntrack *nfct) - * too. */ - nf_ct_remove_expectations(ct); - -+#if defined(CONFIG_NETFILTER_XT_MATCH_LAYER7) || defined(CONFIG_NETFILTER_XT_MATCH_LAYER7_MODULE) -+ if(ct->layer7.app_proto) -+ kfree(ct->layer7.app_proto); -+ if(ct->layer7.app_data) -+ kfree(ct->layer7.app_data); -+#endif -+ - /* We overload first tuple to link into unconfirmed or dying list.*/ - BUG_ON(hlist_nulls_unhashed(&ct->tuplehash[IP_CT_DIR_ORIGINAL].hnnode)); - hlist_nulls_del_rcu(&ct->tuplehash[IP_CT_DIR_ORIGINAL].hnnode); -diff --git a/net/netfilter/nf_conntrack_standalone.c b/net/netfilter/nf_conntrack_standalone.c -index bd700b4..5d045ca 100644 ---- a/net/netfilter/nf_conntrack_standalone.c -+++ b/net/netfilter/nf_conntrack_standalone.c -@@ -240,6 +240,12 @@ static int ct_seq_show(struct seq_file *s, void *v) - if (ct_show_delta_time(s, ct)) - goto release; - -+#if defined(CONFIG_NETFILTER_XT_MATCH_LAYER7) || defined(CONFIG_NETFILTER_XT_MATCH_LAYER7_MODULE) -+ if(ct->layer7.app_proto && -+ seq_printf(s, "l7proto=%s ", ct->layer7.app_proto)) -+ return -ENOSPC; -+#endif -+ - if (seq_printf(s, "use=%u\n", atomic_read(&ct->ct_general.use))) - goto release; - -diff --git a/net/netfilter/regexp/regexp.c b/net/netfilter/regexp/regexp.c -new file mode 100644 -index 0000000..9006988 ---- /dev/null -+++ b/net/netfilter/regexp/regexp.c -@@ -0,0 +1,1197 @@ -+/* -+ * regcomp and regexec -- regsub and regerror are elsewhere -+ * @(#)regexp.c 1.3 of 18 April 87 -+ * -+ * Copyright (c) 1986 by University of Toronto. -+ * Written by Henry Spencer. Not derived from licensed software. -+ * -+ * Permission is granted to anyone to use this software for any -+ * purpose on any computer system, and to redistribute it freely, -+ * subject to the following restrictions: -+ * -+ * 1. The author is not responsible for the consequences of use of -+ * this software, no matter how awful, even if they arise -+ * from defects in it. -+ * -+ * 2. The origin of this software must not be misrepresented, either -+ * by explicit claim or by omission. -+ * -+ * 3. Altered versions must be plainly marked as such, and must not -+ * be misrepresented as being the original software. -+ * -+ * Beware that some of this code is subtly aware of the way operator -+ * precedence is structured in regular expressions. Serious changes in -+ * regular-expression syntax might require a total rethink. -+ * -+ * This code was modified by Ethan Sommer to work within the kernel -+ * (it now uses kmalloc etc..) -+ * -+ * Modified slightly by Matthew Strait to use more modern C. -+ */ -+ -+#include "regexp.h" -+#include "regmagic.h" -+ -+/* added by ethan and matt. Lets it work in both kernel and user space. -+(So iptables can use it, for instance.) Yea, it goes both ways... */ -+#if __KERNEL__ -+ #define malloc(foo) kmalloc(foo,GFP_ATOMIC) -+#else -+ #define printk(format,args...) printf(format,##args) -+#endif -+ -+void regerror(char * s) -+{ -+ printk("<3>Regexp: %s\n", s); -+ /* NOTREACHED */ -+} -+ -+/* -+ * The "internal use only" fields in regexp.h are present to pass info from -+ * compile to execute that permits the execute phase to run lots faster on -+ * simple cases. They are: -+ * -+ * regstart char that must begin a match; '\0' if none obvious -+ * reganch is the match anchored (at beginning-of-line only)? -+ * regmust string (pointer into program) that match must include, or NULL -+ * regmlen length of regmust string -+ * -+ * Regstart and reganch permit very fast decisions on suitable starting points -+ * for a match, cutting down the work a lot. Regmust permits fast rejection -+ * of lines that cannot possibly match. The regmust tests are costly enough -+ * that regcomp() supplies a regmust only if the r.e. contains something -+ * potentially expensive (at present, the only such thing detected is * or + -+ * at the start of the r.e., which can involve a lot of backup). Regmlen is -+ * supplied because the test in regexec() needs it and regcomp() is computing -+ * it anyway. -+ */ -+ -+/* -+ * Structure for regexp "program". This is essentially a linear encoding -+ * of a nondeterministic finite-state machine (aka syntax charts or -+ * "railroad normal form" in parsing technology). Each node is an opcode -+ * plus a "next" pointer, possibly plus an operand. "Next" pointers of -+ * all nodes except BRANCH implement concatenation; a "next" pointer with -+ * a BRANCH on both ends of it is connecting two alternatives. (Here we -+ * have one of the subtle syntax dependencies: an individual BRANCH (as -+ * opposed to a collection of them) is never concatenated with anything -+ * because of operator precedence.) The operand of some types of node is -+ * a literal string; for others, it is a node leading into a sub-FSM. In -+ * particular, the operand of a BRANCH node is the first node of the branch. -+ * (NB this is *not* a tree structure: the tail of the branch connects -+ * to the thing following the set of BRANCHes.) The opcodes are: -+ */ -+ -+/* definition number opnd? meaning */ -+#define END 0 /* no End of program. */ -+#define BOL 1 /* no Match "" at beginning of line. */ -+#define EOL 2 /* no Match "" at end of line. */ -+#define ANY 3 /* no Match any one character. */ -+#define ANYOF 4 /* str Match any character in this string. */ -+#define ANYBUT 5 /* str Match any character not in this string. */ -+#define BRANCH 6 /* node Match this alternative, or the next... */ -+#define BACK 7 /* no Match "", "next" ptr points backward. */ -+#define EXACTLY 8 /* str Match this string. */ -+#define NOTHING 9 /* no Match empty string. */ -+#define STAR 10 /* node Match this (simple) thing 0 or more times. */ -+#define PLUS 11 /* node Match this (simple) thing 1 or more times. */ -+#define OPEN 20 /* no Mark this point in input as start of #n. */ -+ /* OPEN+1 is number 1, etc. */ -+#define CLOSE 30 /* no Analogous to OPEN. */ -+ -+/* -+ * Opcode notes: -+ * -+ * BRANCH The set of branches constituting a single choice are hooked -+ * together with their "next" pointers, since precedence prevents -+ * anything being concatenated to any individual branch. The -+ * "next" pointer of the last BRANCH in a choice points to the -+ * thing following the whole choice. This is also where the -+ * final "next" pointer of each individual branch points; each -+ * branch starts with the operand node of a BRANCH node. -+ * -+ * BACK Normal "next" pointers all implicitly point forward; BACK -+ * exists to make loop structures possible. -+ * -+ * STAR,PLUS '?', and complex '*' and '+', are implemented as circular -+ * BRANCH structures using BACK. Simple cases (one character -+ * per match) are implemented with STAR and PLUS for speed -+ * and to minimize recursive plunges. -+ * -+ * OPEN,CLOSE ...are numbered at compile time. -+ */ -+ -+/* -+ * A node is one char of opcode followed by two chars of "next" pointer. -+ * "Next" pointers are stored as two 8-bit pieces, high order first. The -+ * value is a positive offset from the opcode of the node containing it. -+ * An operand, if any, simply follows the node. (Note that much of the -+ * code generation knows about this implicit relationship.) -+ * -+ * Using two bytes for the "next" pointer is vast overkill for most things, -+ * but allows patterns to get big without disasters. -+ */ -+#define OP(p) (*(p)) -+#define NEXT(p) (((*((p)+1)&0377)<<8) + (*((p)+2)&0377)) -+#define OPERAND(p) ((p) + 3) -+ -+/* -+ * See regmagic.h for one further detail of program structure. -+ */ -+ -+ -+/* -+ * Utility definitions. -+ */ -+#ifndef CHARBITS -+#define UCHARAT(p) ((int)*(unsigned char *)(p)) -+#else -+#define UCHARAT(p) ((int)*(p)&CHARBITS) -+#endif -+ -+#define FAIL(m) { regerror(m); return(NULL); } -+#define ISMULT(c) ((c) == '*' || (c) == '+' || (c) == '?') -+#define META "^$.[()|?+*\" -+ -+/* -+ * Flags to be passed up and down. -+ */ -+#define HASWIDTH 01 /* Known never to match null string. */ -+#define SIMPLE 02 /* Simple enough to be STAR/PLUS operand. */ -+#define SPSTART 04 /* Starts with * or +. */ -+#define WORST 0 /* Worst case. */ -+ -+/* -+ * Global work variables for regcomp(). -+ */ -+struct match_globals { -+char *reginput; /* String-input pointer. */ -+char *regbol; /* Beginning of input, for ^ check. */ -+char **regstartp; /* Pointer to startp array. */ -+char **regendp; /* Ditto for endp. */ -+char *regparse; /* Input-scan pointer. */ -+int regnpar; /* () count. */ -+char regdummy; -+char *regcode; /* Code-emit pointer; ®dummy = don't. */ -+long regsize; /* Code size. */ -+}; -+ -+/* -+ * Forward declarations for regcomp()'s friends. -+ */ -+#ifndef STATIC -+#define STATIC static -+#endif -+STATIC char *reg(struct match_globals *g, int paren,int *flagp); -+STATIC char *regbranch(struct match_globals *g, int *flagp); -+STATIC char *regpiece(struct match_globals *g, int *flagp); -+STATIC char *regatom(struct match_globals *g, int *flagp); -+STATIC char *regnode(struct match_globals *g, char op); -+STATIC char *regnext(struct match_globals *g, char *p); -+STATIC void regc(struct match_globals *g, char b); -+STATIC void reginsert(struct match_globals *g, char op, char *opnd); -+STATIC void regtail(struct match_globals *g, char *p, char *val); -+STATIC void regoptail(struct match_globals *g, char *p, char *val); -+ -+ -+__kernel_size_t my_strcspn(const char *s1,const char *s2) -+{ -+ char *scan1; -+ char *scan2; -+ int count; -+ -+ count = 0; -+ for (scan1 = (char *)s1; *scan1 != '\0'; scan1++) { -+ for (scan2 = (char *)s2; *scan2 != '\0';) /* ++ moved down. */ -+ if (*scan1 == *scan2++) -+ return(count); -+ count++; -+ } -+ return(count); -+} -+ -+/* -+ - regcomp - compile a regular expression into internal code -+ * -+ * We can't allocate space until we know how big the compiled form will be, -+ * but we can't compile it (and thus know how big it is) until we've got a -+ * place to put the code. So we cheat: we compile it twice, once with code -+ * generation turned off and size counting turned on, and once "for real". -+ * This also means that we don't allocate space until we are sure that the -+ * thing really will compile successfully, and we never have to move the -+ * code and thus invalidate pointers into it. (Note that it has to be in -+ * one piece because free() must be able to free it all.) -+ * -+ * Beware that the optimization-preparation code in here knows about some -+ * of the structure of the compiled regexp. -+ */ -+regexp * -+regcomp(char *exp,int *patternsize) -+{ -+ register regexp *r; -+ register char *scan; -+ register char *longest; -+ register int len; -+ int flags; -+ struct match_globals g; -+ -+ /* commented out by ethan -+ extern char *malloc(); -+ */ -+ -+ if (exp == NULL) -+ FAIL("NULL argument"); -+ -+ /* First pass: determine size, legality. */ -+ g.regparse = exp; -+ g.regnpar = 1; -+ g.regsize = 0L; -+ g.regcode = &g.regdummy; -+ regc(&g, MAGIC); -+ if (reg(&g, 0, &flags) == NULL) -+ return(NULL); -+ -+ /* Small enough for pointer-storage convention? */ -+ if (g.regsize >= 32767L) /* Probably could be 65535L. */ -+ FAIL("regexp too big"); -+ -+ /* Allocate space. */ -+ *patternsize=sizeof(regexp) + (unsigned)g.regsize; -+ r = (regexp *)malloc(sizeof(regexp) + (unsigned)g.regsize); -+ if (r == NULL) -+ FAIL("out of space"); -+ -+ /* Second pass: emit code. */ -+ g.regparse = exp; -+ g.regnpar = 1; -+ g.regcode = r->program; -+ regc(&g, MAGIC); -+ if (reg(&g, 0, &flags) == NULL) -+ return(NULL); -+ -+ /* Dig out information for optimizations. */ -+ r->regstart = '\0'; /* Worst-case defaults. */ -+ r->reganch = 0; -+ r->regmust = NULL; -+ r->regmlen = 0; -+ scan = r->program+1; /* First BRANCH. */ -+ if (OP(regnext(&g, scan)) == END) { /* Only one top-level choice. */ -+ scan = OPERAND(scan); -+ -+ /* Starting-point info. */ -+ if (OP(scan) == EXACTLY) -+ r->regstart = *OPERAND(scan); -+ else if (OP(scan) == BOL) -+ r->reganch++; -+ -+ /* -+ * If there's something expensive in the r.e., find the -+ * longest literal string that must appear and make it the -+ * regmust. Resolve ties in favor of later strings, since -+ * the regstart check works with the beginning of the r.e. -+ * and avoiding duplication strengthens checking. Not a -+ * strong reason, but sufficient in the absence of others. -+ */ -+ if (flags&SPSTART) { -+ longest = NULL; -+ len = 0; -+ for (; scan != NULL; scan = regnext(&g, scan)) -+ if (OP(scan) == EXACTLY && strlen(OPERAND(scan)) >= len) { -+ longest = OPERAND(scan); -+ len = strlen(OPERAND(scan)); -+ } -+ r->regmust = longest; -+ r->regmlen = len; -+ } -+ } -+ -+ return(r); -+} -+ -+/* -+ - reg - regular expression, i.e. main body or parenthesized thing -+ * -+ * Caller must absorb opening parenthesis. -+ * -+ * Combining parenthesis handling with the base level of regular expression -+ * is a trifle forced, but the need to tie the tails of the branches to what -+ * follows makes it hard to avoid. -+ */ -+static char * -+reg(struct match_globals *g, int paren, int *flagp /* Parenthesized? */ ) -+{ -+ register char *ret; -+ register char *br; -+ register char *ender; -+ register int parno = 0; /* 0 makes gcc happy */ -+ int flags; -+ -+ *flagp = HASWIDTH; /* Tentatively. */ -+ -+ /* Make an OPEN node, if parenthesized. */ -+ if (paren) { -+ if (g->regnpar >= NSUBEXP) -+ FAIL("too many ()"); -+ parno = g->regnpar; -+ g->regnpar++; -+ ret = regnode(g, OPEN+parno); -+ } else -+ ret = NULL; -+ -+ /* Pick up the branches, linking them together. */ -+ br = regbranch(g, &flags); -+ if (br == NULL) -+ return(NULL); -+ if (ret != NULL) -+ regtail(g, ret, br); /* OPEN -> first. */ -+ else -+ ret = br; -+ if (!(flags&HASWIDTH)) -+ *flagp &= ~HASWIDTH; -+ *flagp |= flags&SPSTART; -+ while (*g->regparse == '|') { -+ g->regparse++; -+ br = regbranch(g, &flags); -+ if (br == NULL) -+ return(NULL); -+ regtail(g, ret, br); /* BRANCH -> BRANCH. */ -+ if (!(flags&HASWIDTH)) -+ *flagp &= ~HASWIDTH; -+ *flagp |= flags&SPSTART; -+ } -+ -+ /* Make a closing node, and hook it on the end. */ -+ ender = regnode(g, (paren) ? CLOSE+parno : END); -+ regtail(g, ret, ender); -+ -+ /* Hook the tails of the branches to the closing node. */ -+ for (br = ret; br != NULL; br = regnext(g, br)) -+ regoptail(g, br, ender); -+ -+ /* Check for proper termination. */ -+ if (paren && *g->regparse++ != ')') { -+ FAIL("unmatched ()"); -+ } else if (!paren && *g->regparse != '\0') { -+ if (*g->regparse == ')') { -+ FAIL("unmatched ()"); -+ } else -+ FAIL("junk on end"); /* "Can't happen". */ -+ /* NOTREACHED */ -+ } -+ -+ return(ret); -+} -+ -+/* -+ - regbranch - one alternative of an | operator -+ * -+ * Implements the concatenation operator. -+ */ -+static char * -+regbranch(struct match_globals *g, int *flagp) -+{ -+ register char *ret; -+ register char *chain; -+ register char *latest; -+ int flags; -+ -+ *flagp = WORST; /* Tentatively. */ -+ -+ ret = regnode(g, BRANCH); -+ chain = NULL; -+ while (*g->regparse != '\0' && *g->regparse != '|' && *g->regparse != ')') { -+ latest = regpiece(g, &flags); -+ if (latest == NULL) -+ return(NULL); -+ *flagp |= flags&HASWIDTH; -+ if (chain == NULL) /* First piece. */ -+ *flagp |= flags&SPSTART; -+ else -+ regtail(g, chain, latest); -+ chain = latest; -+ } -+ if (chain == NULL) /* Loop ran zero times. */ -+ (void) regnode(g, NOTHING); -+ -+ return(ret); -+} -+ -+/* -+ - regpiece - something followed by possible [*+?] -+ * -+ * Note that the branching code sequences used for ? and the general cases -+ * of * and + are somewhat optimized: they use the same NOTHING node as -+ * both the endmarker for their branch list and the body of the last branch. -+ * It might seem that this node could be dispensed with entirely, but the -+ * endmarker role is not redundant. -+ */ -+static char * -+regpiece(struct match_globals *g, int *flagp) -+{ -+ register char *ret; -+ register char op; -+ register char *next; -+ int flags; -+ -+ ret = regatom(g, &flags); -+ if (ret == NULL) -+ return(NULL); -+ -+ op = *g->regparse; -+ if (!ISMULT(op)) { -+ *flagp = flags; -+ return(ret); -+ } -+ -+ if (!(flags&HASWIDTH) && op != '?') -+ FAIL("*+ operand could be empty"); -+ *flagp = (op != '+') ? (WORST|SPSTART) : (WORST|HASWIDTH); -+ -+ if (op == '*' && (flags&SIMPLE)) -+ reginsert(g, STAR, ret); -+ else if (op == '*') { -+ /* Emit x* as (x&|), where & means "self". */ -+ reginsert(g, BRANCH, ret); /* Either x */ -+ regoptail(g, ret, regnode(g, BACK)); /* and loop */ -+ regoptail(g, ret, ret); /* back */ -+ regtail(g, ret, regnode(g, BRANCH)); /* or */ -+ regtail(g, ret, regnode(g, NOTHING)); /* null. */ -+ } else if (op == '+' && (flags&SIMPLE)) -+ reginsert(g, PLUS, ret); -+ else if (op == '+') { -+ /* Emit x+ as x(&|), where & means "self". */ -+ next = regnode(g, BRANCH); /* Either */ -+ regtail(g, ret, next); -+ regtail(g, regnode(g, BACK), ret); /* loop back */ -+ regtail(g, next, regnode(g, BRANCH)); /* or */ -+ regtail(g, ret, regnode(g, NOTHING)); /* null. */ -+ } else if (op == '?') { -+ /* Emit x? as (x|) */ -+ reginsert(g, BRANCH, ret); /* Either x */ -+ regtail(g, ret, regnode(g, BRANCH)); /* or */ -+ next = regnode(g, NOTHING); /* null. */ -+ regtail(g, ret, next); -+ regoptail(g, ret, next); -+ } -+ g->regparse++; -+ if (ISMULT(*g->regparse)) -+ FAIL("nested *?+"); -+ -+ return(ret); -+} -+ -+/* -+ - regatom - the lowest level -+ * -+ * Optimization: gobbles an entire sequence of ordinary characters so that -+ * it can turn them into a single node, which is smaller to store and -+ * faster to run. Backslashed characters are exceptions, each becoming a -+ * separate node; the code is simpler that way and it's not worth fixing. -+ */ -+static char * -+regatom(struct match_globals *g, int *flagp) -+{ -+ register char *ret; -+ int flags; -+ -+ *flagp = WORST; /* Tentatively. */ -+ -+ switch (*g->regparse++) { -+ case '^': -+ ret = regnode(g, BOL); -+ break; -+ case '$': -+ ret = regnode(g, EOL); -+ break; -+ case '.': -+ ret = regnode(g, ANY); -+ *flagp |= HASWIDTH|SIMPLE; -+ break; -+ case '[': { -+ register int class; -+ register int classend; -+ -+ if (*g->regparse == '^') { /* Complement of range. */ -+ ret = regnode(g, ANYBUT); -+ g->regparse++; -+ } else -+ ret = regnode(g, ANYOF); -+ if (*g->regparse == ']' || *g->regparse == '-') -+ regc(g, *g->regparse++); -+ while (*g->regparse != '\0' && *g->regparse != ']') { -+ if (*g->regparse == '-') { -+ g->regparse++; -+ if (*g->regparse == ']' || *g->regparse == '\0') -+ regc(g, '-'); -+ else { -+ class = UCHARAT(g->regparse-2)+1; -+ classend = UCHARAT(g->regparse); -+ if (class > classend+1) -+ FAIL("invalid [] range"); -+ for (; class <= classend; class++) -+ regc(g, class); -+ g->regparse++; -+ } -+ } else -+ regc(g, *g->regparse++); -+ } -+ regc(g, '\0'); -+ if (*g->regparse != ']') -+ FAIL("unmatched []"); -+ g->regparse++; -+ *flagp |= HASWIDTH|SIMPLE; -+ } -+ break; -+ case '(': -+ ret = reg(g, 1, &flags); -+ if (ret == NULL) -+ return(NULL); -+ *flagp |= flags&(HASWIDTH|SPSTART); -+ break; -+ case '\0': -+ case '|': -+ case ')': -+ FAIL("internal urp"); /* Supposed to be caught earlier. */ -+ break; -+ case '?': -+ case '+': -+ case '*': -+ FAIL("?+* follows nothing"); -+ break; -+ case '\': -+ if (*g->regparse == '\0') -+ FAIL("trailing \"); -+ ret = regnode(g, EXACTLY); -+ regc(g, *g->regparse++); -+ regc(g, '\0'); -+ *flagp |= HASWIDTH|SIMPLE; -+ break; -+ default: { -+ register int len; -+ register char ender; -+ -+ g->regparse--; -+ len = my_strcspn((const char *)g->regparse, (const char *)META); -+ if (len <= 0) -+ FAIL("internal disaster"); -+ ender = *(g->regparse+len); -+ if (len > 1 && ISMULT(ender)) -+ len--; /* Back off clear of ?+* operand. */ -+ *flagp |= HASWIDTH; -+ if (len == 1) -+ *flagp |= SIMPLE; -+ ret = regnode(g, EXACTLY); -+ while (len > 0) { -+ regc(g, *g->regparse++); -+ len--; -+ } -+ regc(g, '\0'); -+ } -+ break; -+ } -+ -+ return(ret); -+} -+ -+/* -+ - regnode - emit a node -+ */ -+static char * /* Location. */ -+regnode(struct match_globals *g, char op) -+{ -+ register char *ret; -+ register char *ptr; -+ -+ ret = g->regcode; -+ if (ret == &g->regdummy) { -+ g->regsize += 3; -+ return(ret); -+ } -+ -+ ptr = ret; -+ *ptr++ = op; -+ *ptr++ = '\0'; /* Null "next" pointer. */ -+ *ptr++ = '\0'; -+ g->regcode = ptr; -+ -+ return(ret); -+} -+ -+/* -+ - regc - emit (if appropriate) a byte of code -+ */ -+static void -+regc(struct match_globals *g, char b) -+{ -+ if (g->regcode != &g->regdummy) -+ *g->regcode++ = b; -+ else -+ g->regsize++; -+} -+ -+/* -+ - reginsert - insert an operator in front of already-emitted operand -+ * -+ * Means relocating the operand. -+ */ -+static void -+reginsert(struct match_globals *g, char op, char* opnd) -+{ -+ register char *src; -+ register char *dst; -+ register char *place; -+ -+ if (g->regcode == &g->regdummy) { -+ g->regsize += 3; -+ return; -+ } -+ -+ src = g->regcode; -+ g->regcode += 3; -+ dst = g->regcode; -+ while (src > opnd) -+ *--dst = *--src; -+ -+ place = opnd; /* Op node, where operand used to be. */ -+ *place++ = op; -+ *place++ = '\0'; -+ *place++ = '\0'; -+} -+ -+/* -+ - regtail - set the next-pointer at the end of a node chain -+ */ -+static void -+regtail(struct match_globals *g, char *p, char *val) -+{ -+ register char *scan; -+ register char *temp; -+ register int offset; -+ -+ if (p == &g->regdummy) -+ return; -+ -+ /* Find last node. */ -+ scan = p; -+ for (;;) { -+ temp = regnext(g, scan); -+ if (temp == NULL) -+ break; -+ scan = temp; -+ } -+ -+ if (OP(scan) == BACK) -+ offset = scan - val; -+ else -+ offset = val - scan; -+ *(scan+1) = (offset>>8)&0377; -+ *(scan+2) = offset&0377; -+} -+ -+/* -+ - regoptail - regtail on operand of first argument; nop if operandless -+ */ -+static void -+regoptail(struct match_globals *g, char *p, char *val) -+{ -+ /* "Operandless" and "op != BRANCH" are synonymous in practice. */ -+ if (p == NULL || p == &g->regdummy || OP(p) != BRANCH) -+ return; -+ regtail(g, OPERAND(p), val); -+} -+ -+/* -+ * regexec and friends -+ */ -+ -+ -+/* -+ * Forwards. -+ */ -+STATIC int regtry(struct match_globals *g, regexp *prog, char *string); -+STATIC int regmatch(struct match_globals *g, char *prog); -+STATIC int regrepeat(struct match_globals *g, char *p); -+ -+#ifdef DEBUG -+int regnarrate = 0; -+void regdump(); -+STATIC char *regprop(char *op); -+#endif -+ -+/* -+ - regexec - match a regexp against a string -+ */ -+int -+regexec(regexp *prog, char *string) -+{ -+ register char *s; -+ struct match_globals g; -+ -+ /* Be paranoid... */ -+ if (prog == NULL || string == NULL) { -+ printk("<3>Regexp: NULL parameter\n"); -+ return(0); -+ } -+ -+ /* Check validity of program. */ -+ if (UCHARAT(prog->program) != MAGIC) { -+ printk("<3>Regexp: corrupted program\n"); -+ return(0); -+ } -+ -+ /* If there is a "must appear" string, look for it. */ -+ if (prog->regmust != NULL) { -+ s = string; -+ while ((s = strchr(s, prog->regmust[0])) != NULL) { -+ if (strncmp(s, prog->regmust, prog->regmlen) == 0) -+ break; /* Found it. */ -+ s++; -+ } -+ if (s == NULL) /* Not present. */ -+ return(0); -+ } -+ -+ /* Mark beginning of line for ^ . */ -+ g.regbol = string; -+ -+ /* Simplest case: anchored match need be tried only once. */ -+ if (prog->reganch) -+ return(regtry(&g, prog, string)); -+ -+ /* Messy cases: unanchored match. */ -+ s = string; -+ if (prog->regstart != '\0') -+ /* We know what char it must start with. */ -+ while ((s = strchr(s, prog->regstart)) != NULL) { -+ if (regtry(&g, prog, s)) -+ return(1); -+ s++; -+ } -+ else -+ /* We don't -- general case. */ -+ do { -+ if (regtry(&g, prog, s)) -+ return(1); -+ } while (*s++ != '\0'); -+ -+ /* Failure. */ -+ return(0); -+} -+ -+/* -+ - regtry - try match at specific point -+ */ -+static int /* 0 failure, 1 success */ -+regtry(struct match_globals *g, regexp *prog, char *string) -+{ -+ register int i; -+ register char **sp; -+ register char **ep; -+ -+ g->reginput = string; -+ g->regstartp = prog->startp; -+ g->regendp = prog->endp; -+ -+ sp = prog->startp; -+ ep = prog->endp; -+ for (i = NSUBEXP; i > 0; i--) { -+ *sp++ = NULL; -+ *ep++ = NULL; -+ } -+ if (regmatch(g, prog->program + 1)) { -+ prog->startp[0] = string; -+ prog->endp[0] = g->reginput; -+ return(1); -+ } else -+ return(0); -+} -+ -+/* -+ - regmatch - main matching routine -+ * -+ * Conceptually the strategy is simple: check to see whether the current -+ * node matches, call self recursively to see whether the rest matches, -+ * and then act accordingly. In practice we make some effort to avoid -+ * recursion, in particular by going through "ordinary" nodes (that don't -+ * need to know whether the rest of the match failed) by a loop instead of -+ * by recursion. -+ */ -+static int /* 0 failure, 1 success */ -+regmatch(struct match_globals *g, char *prog) -+{ -+ register char *scan = prog; /* Current node. */ -+ char *next; /* Next node. */ -+ -+#ifdef DEBUG -+ if (scan != NULL && regnarrate) -+ fprintf(stderr, "%s(\n", regprop(scan)); -+#endif -+ while (scan != NULL) { -+#ifdef DEBUG -+ if (regnarrate) -+ fprintf(stderr, "%s...\n", regprop(scan)); -+#endif -+ next = regnext(g, scan); -+ -+ switch (OP(scan)) { -+ case BOL: -+ if (g->reginput != g->regbol) -+ return(0); -+ break; -+ case EOL: -+ if (*g->reginput != '\0') -+ return(0); -+ break; -+ case ANY: -+ if (*g->reginput == '\0') -+ return(0); -+ g->reginput++; -+ break; -+ case EXACTLY: { -+ register int len; -+ register char *opnd; -+ -+ opnd = OPERAND(scan); -+ /* Inline the first character, for speed. */ -+ if (*opnd != *g->reginput) -+ return(0); -+ len = strlen(opnd); -+ if (len > 1 && strncmp(opnd, g->reginput, len) != 0) -+ return(0); -+ g->reginput += len; -+ } -+ break; -+ case ANYOF: -+ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) == NULL) -+ return(0); -+ g->reginput++; -+ break; -+ case ANYBUT: -+ if (*g->reginput == '\0' || strchr(OPERAND(scan), *g->reginput) != NULL) -+ return(0); -+ g->reginput++; -+ break; -+ case NOTHING: -+ case BACK: -+ break; -+ case OPEN+1: -+ case OPEN+2: -+ case OPEN+3: -+ case OPEN+4: -+ case OPEN+5: -+ case OPEN+6: -+ case OPEN+7: -+ case OPEN+8: -+ case OPEN+9: { -+ register int no; -+ register char *save; -+ -+ no = OP(scan) - OPEN; -+ save = g->reginput; -+ -+ if (regmatch(g, next)) { -+ /* -+ * Don't set startp if some later -+ * invocation of the same parentheses -+ * already has. -+ */ -+ if (g->regstartp[no] == NULL) -+ g->regstartp[no] = save; -+ return(1); -+ } else -+ return(0); -+ } -+ break; -+ case CLOSE+1: -+ case CLOSE+2: -+ case CLOSE+3: -+ case CLOSE+4: -+ case CLOSE+5: -+ case CLOSE+6: -+ case CLOSE+7: -+ case CLOSE+8: -+ case CLOSE+9: -+ { -+ register int no; -+ register char *save; -+ -+ no = OP(scan) - CLOSE; -+ save = g->reginput; -+ -+ if (regmatch(g, next)) { -+ /* -+ * Don't set endp if some later -+ * invocation of the same parentheses -+ * already has. -+ */ -+ if (g->regendp[no] == NULL) -+ g->regendp[no] = save; -+ return(1); -+ } else -+ return(0); -+ } -+ break; -+ case BRANCH: { -+ register char *save; -+ -+ if (OP(next) != BRANCH) /* No choice. */ -+ next = OPERAND(scan); /* Avoid recursion. */ -+ else { -+ do { -+ save = g->reginput; -+ if (regmatch(g, OPERAND(scan))) -+ return(1); -+ g->reginput = save; -+ scan = regnext(g, scan); -+ } while (scan != NULL && OP(scan) == BRANCH); -+ return(0); -+ /* NOTREACHED */ -+ } -+ } -+ break; -+ case STAR: -+ case PLUS: { -+ register char nextch; -+ register int no; -+ register char *save; -+ register int min; -+ -+ /* -+ * Lookahead to avoid useless match attempts -+ * when we know what character comes next. -+ */ -+ nextch = '\0'; -+ if (OP(next) == EXACTLY) -+ nextch = *OPERAND(next); -+ min = (OP(scan) == STAR) ? 0 : 1; -+ save = g->reginput; -+ no = regrepeat(g, OPERAND(scan)); -+ while (no >= min) { -+ /* If it could work, try it. */ -+ if (nextch == '\0' || *g->reginput == nextch) -+ if (regmatch(g, next)) -+ return(1); -+ /* Couldn't or didn't -- back up. */ -+ no--; -+ g->reginput = save + no; -+ } -+ return(0); -+ } -+ break; -+ case END: -+ return(1); /* Success! */ -+ break; -+ default: -+ printk("<3>Regexp: memory corruption\n"); -+ return(0); -+ break; -+ } -+ -+ scan = next; -+ } -+ -+ /* -+ * We get here only if there's trouble -- normally "case END" is -+ * the terminating point. -+ */ -+ printk("<3>Regexp: corrupted pointers\n"); -+ return(0); -+} -+ -+/* -+ - regrepeat - repeatedly match something simple, report how many -+ */ -+static int -+regrepeat(struct match_globals *g, char *p) -+{ -+ register int count = 0; -+ register char *scan; -+ register char *opnd; -+ -+ scan = g->reginput; -+ opnd = OPERAND(p); -+ switch (OP(p)) { -+ case ANY: -+ count = strlen(scan); -+ scan += count; -+ break; -+ case EXACTLY: -+ while (*opnd == *scan) { -+ count++; -+ scan++; -+ } -+ break; -+ case ANYOF: -+ while (*scan != '\0' && strchr(opnd, *scan) != NULL) { -+ count++; -+ scan++; -+ } -+ break; -+ case ANYBUT: -+ while (*scan != '\0' && strchr(opnd, *scan) == NULL) { -+ count++; -+ scan++; -+ } -+ break; -+ default: /* Oh dear. Called inappropriately. */ -+ printk("<3>Regexp: internal foulup\n"); -+ count = 0; /* Best compromise. */ -+ break; -+ } -+ g->reginput = scan; -+ -+ return(count); -+} -+ -+/* -+ - regnext - dig the "next" pointer out of a node -+ */ -+static char* -+regnext(struct match_globals *g, char *p) -+{ -+ register int offset; -+ -+ if (p == &g->regdummy) -+ return(NULL); -+ -+ offset = NEXT(p); -+ if (offset == 0) -+ return(NULL); -+ -+ if (OP(p) == BACK) -+ return(p-offset); -+ else -+ return(p+offset); -+} -+ -+#ifdef DEBUG -+ -+STATIC char *regprop(); -+ -+/* -+ - regdump - dump a regexp onto stdout in vaguely comprehensible form -+ */ -+void -+regdump(regexp *r) -+{ -+ register char *s; -+ register char op = EXACTLY; /* Arbitrary non-END op. */ -+ register char *next; -+ /* extern char *strchr(); */ -+ -+ -+ s = r->program + 1; -+ while (op != END) { /* While that wasn't END last time... */ -+ op = OP(s); -+ printf("%2d%s", s-r->program, regprop(s)); /* Where, what. */ -+ next = regnext(s); -+ if (next == NULL) /* Next ptr. */ -+ printf("(0)"); -+ else -+ printf("(%d)", (s-r->program)+(next-s)); -+ s += 3; -+ if (op == ANYOF || op == ANYBUT || op == EXACTLY) { -+ /* Literal string, where present. */ -+ while (*s != '\0') { -+ putchar(*s); -+ s++; -+ } -+ s++; -+ } -+ putchar('\n'); -+ } -+ -+ /* Header fields of interest. */ -+ if (r->regstart != '\0') -+ printf("start `%c' ", r->regstart); -+ if (r->reganch) -+ printf("anchored "); -+ if (r->regmust != NULL) -+ printf("must have "%s"", r->regmust); -+ printf("\n"); -+} -+ -+/* -+ - regprop - printable representation of opcode -+ */ -+static char * -+regprop(char *op) -+{ -+#define BUFLEN 50 -+ register char *p; -+ static char buf[BUFLEN]; -+ -+ strcpy(buf, ":"); -+ -+ switch (OP(op)) { -+ case BOL: -+ p = "BOL"; -+ break; -+ case EOL: -+ p = "EOL"; -+ break; -+ case ANY: -+ p = "ANY"; -+ break; -+ case ANYOF: -+ p = "ANYOF"; -+ break; -+ case ANYBUT: -+ p = "ANYBUT"; -+ break; -+ case BRANCH: -+ p = "BRANCH"; -+ break; -+ case EXACTLY: -+ p = "EXACTLY"; -+ break; -+ case NOTHING: -+ p = "NOTHING"; -+ break; -+ case BACK: -+ p = "BACK"; -+ break; -+ case END: -+ p = "END"; -+ break; -+ case OPEN+1: -+ case OPEN+2: -+ case OPEN+3: -+ case OPEN+4: -+ case OPEN+5: -+ case OPEN+6: -+ case OPEN+7: -+ case OPEN+8: -+ case OPEN+9: -+ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "OPEN%d", OP(op)-OPEN); -+ p = NULL; -+ break; -+ case CLOSE+1: -+ case CLOSE+2: -+ case CLOSE+3: -+ case CLOSE+4: -+ case CLOSE+5: -+ case CLOSE+6: -+ case CLOSE+7: -+ case CLOSE+8: -+ case CLOSE+9: -+ snprintf(buf+strlen(buf),BUFLEN-strlen(buf), "CLOSE%d", OP(op)-CLOSE); -+ p = NULL; -+ break; -+ case STAR: -+ p = "STAR"; -+ break; -+ case PLUS: -+ p = "PLUS"; -+ break; -+ default: -+ printk("<3>Regexp: corrupted opcode\n"); -+ break; -+ } -+ if (p != NULL) -+ strncat(buf, p, BUFLEN-strlen(buf)); -+ return(buf); -+} -+#endif -+ -+ -diff --git a/net/netfilter/regexp/regexp.h b/net/netfilter/regexp/regexp.h -new file mode 100644 -index 0000000..a72eba7 ---- /dev/null -+++ b/net/netfilter/regexp/regexp.h -@@ -0,0 +1,41 @@ -+/* -+ * Definitions etc. for regexp(3) routines. -+ * -+ * Caveat: this is V8 regexp(3) [actually, a reimplementation thereof], -+ * not the System V one. -+ */ -+ -+#ifndef REGEXP_H -+#define REGEXP_H -+ -+ -+/* -+http://www.opensource.apple.com/darwinsource/10.3/expect-1/expect/expect.h , -+which contains a version of this library, says: -+ -+ * -+ * NSUBEXP must be at least 10, and no greater than 117 or the parser -+ * will not work properly. -+ * -+ -+However, it looks rather like this library is limited to 10. If you think -+otherwise, let us know. -+*/ -+ -+#define NSUBEXP 10 -+typedef struct regexp { -+ char *startp[NSUBEXP]; -+ char *endp[NSUBEXP]; -+ char regstart; /* Internal use only. */ -+ char reganch; /* Internal use only. */ -+ char *regmust; /* Internal use only. */ -+ int regmlen; /* Internal use only. */ -+ char program[1]; /* Unwarranted chumminess with compiler. */ -+} regexp; -+ -+regexp * regcomp(char *exp, int *patternsize); -+int regexec(regexp *prog, char *string); -+void regsub(regexp *prog, char *source, char *dest); -+void regerror(char *s); -+ -+#endif -diff --git a/net/netfilter/regexp/regmagic.h b/net/netfilter/regexp/regmagic.h -new file mode 100644 -index 0000000..5acf447 ---- /dev/null -+++ b/net/netfilter/regexp/regmagic.h -@@ -0,0 +1,5 @@ -+/* -+ * The first byte of the regexp internal "program" is actually this magic -+ * number; the start node begins in the second byte. -+ */ -+#define MAGIC 0234 -diff --git a/net/netfilter/regexp/regsub.c b/net/netfilter/regexp/regsub.c -new file mode 100644 -index 0000000..339631f ---- /dev/null -+++ b/net/netfilter/regexp/regsub.c -@@ -0,0 +1,95 @@ -+/* -+ * regsub -+ * @(#)regsub.c 1.3 of 2 April 86 -+ * -+ * Copyright (c) 1986 by University of Toronto. -+ * Written by Henry Spencer. Not derived from licensed software. -+ * -+ * Permission is granted to anyone to use this software for any -+ * purpose on any computer system, and to redistribute it freely, -+ * subject to the following restrictions: -+ * -+ * 1. The author is not responsible for the consequences of use of -+ * this software, no matter how awful, even if they arise -+ * from defects in it. -+ * -+ * 2. The origin of this software must not be misrepresented, either -+ * by explicit claim or by omission. -+ * -+ * 3. Altered versions must be plainly marked as such, and must not -+ * be misrepresented as being the original software. -+ * -+ * -+ * This code was modified by Ethan Sommer to work within the kernel -+ * (it now uses kmalloc etc..) -+ * -+ */ -+#include "regexp.h" -+#include "regmagic.h" -+#include <linux/string.h> -+ -+ -+#ifndef CHARBITS -+#define UCHARAT(p) ((int)*(unsigned char *)(p)) -+#else -+#define UCHARAT(p) ((int)*(p)&CHARBITS) -+#endif -+ -+#if 0 -+//void regerror(char * s) -+//{ -+// printk("regexp(3): %s", s); -+// /* NOTREACHED */ -+//} -+#endif -+ -+/* -+ - regsub - perform substitutions after a regexp match -+ */ -+void -+regsub(regexp * prog, char * source, char * dest) -+{ -+ register char *src; -+ register char *dst; -+ register char c; -+ register int no; -+ register int len; -+ -+ /* Not necessary and gcc doesn't like it -MLS */ -+ /*extern char *strncpy();*/ -+ -+ if (prog == NULL || source == NULL || dest == NULL) { -+ regerror("NULL parm to regsub"); -+ return; -+ } -+ if (UCHARAT(prog->program) != MAGIC) { -+ regerror("damaged regexp fed to regsub"); -+ return; -+ } -+ -+ src = source; -+ dst = dest; -+ while ((c = *src++) != '\0') { -+ if (c == '&') -+ no = 0; -+ else if (c == '\' && '0' <= *src && *src <= '9') -+ no = *src++ - '0'; -+ else -+ no = -1; -+ -+ if (no < 0) { /* Ordinary character. */ -+ if (c == '\' && (*src == '\' || *src == '&')) -+ c = *src++; -+ *dst++ = c; -+ } else if (prog->startp[no] != NULL && prog->endp[no] != NULL) { -+ len = prog->endp[no] - prog->startp[no]; -+ (void) strncpy(dst, prog->startp[no], len); -+ dst += len; -+ if (len != 0 && *(dst-1) == '\0') { /* strncpy hit NUL. */ -+ regerror("damaged match string"); -+ return; -+ } -+ } -+ } -+ *dst++ = '\0'; -+} -diff --git a/net/netfilter/xt_layer7.c b/net/netfilter/xt_layer7.c -new file mode 100644 -index 0000000..1573e9d ---- /dev/null -+++ b/net/netfilter/xt_layer7.c -@@ -0,0 +1,665 @@ -+/* -+ Kernel module to match application layer (OSI layer 7) data in connections. -+ -+ http://l7-filter.sf.net -+ -+ (C) 2003-2009 Matthew Strait and Ethan Sommer. -+ -+ This program is free software; you can redistribute it and/or -+ modify it under the terms of the GNU General Public License -+ as published by the Free Software Foundation; either version -+ 2 of the License, or (at your option) any later version. -+ http://www.gnu.org/licenses/gpl.txt -+ -+ Based on ipt_string.c (C) 2000 Emmanuel Roger winfield@freegates.be, -+ xt_helper.c (C) 2002 Harald Welte and cls_layer7.c (C) 2003 Matthew Strait, -+ Ethan Sommer, Justin Levandoski. -+*/ -+ -+#include <linux/spinlock.h> -+#include <linux/version.h> -+#include <net/ip.h> -+#include <net/tcp.h> -+#include <linux/module.h> -+#include <linux/seq_file.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter.h> -+#include <net/netfilter/nf_conntrack.h> -+#include <net/netfilter/nf_conntrack_core.h> -+#include <net/netfilter/nf_conntrack_extend.h> -+#include <net/netfilter/nf_conntrack_acct.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_layer7.h> -+#include <linux/ctype.h> -+#include <linux/proc_fs.h> -+ -+#include "regexp/regexp.c" -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Matthew Strait quadong@users.sf.net, Ethan Sommer sommere@users.sf.net"); -+MODULE_DESCRIPTION("iptables application layer match module"); -+MODULE_ALIAS("ipt_layer7"); -+MODULE_VERSION("2.21"); -+ -+static int maxdatalen = 2048; // this is the default -+module_param(maxdatalen, int, 0444); -+MODULE_PARM_DESC(maxdatalen, "maximum bytes of data looked at by l7-filter"); -+#ifdef CONFIG_NETFILTER_XT_MATCH_LAYER7_DEBUG -+ #define DPRINTK(format,args...) printk(format,##args) -+#else -+ #define DPRINTK(format,args...) -+#endif -+ -+/* Number of packets whose data we look at. -+This can be modified through /proc/net/layer7_numpackets */ -+static int num_packets = 10; -+ -+static struct pattern_cache { -+ char * regex_string; -+ regexp * pattern; -+ struct pattern_cache * next; -+} * first_pattern_cache = NULL; -+ -+DEFINE_SPINLOCK(l7_lock); -+ -+static int total_acct_packets(struct nf_conn *ct) -+{ -+ struct nf_conn_counter *acct; -+ -+ BUG_ON(ct == NULL); -+ acct = nf_conn_acct_find(ct); -+ if (!acct) -+ return 0; -+ return (atomic64_read(&acct[IP_CT_DIR_ORIGINAL].packets) + atomic64_read(&acct[IP_CT_DIR_REPLY].packets)); -+} -+ -+#ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG -+/* Converts an unfriendly string into a friendly one by -+replacing unprintables with periods and all whitespace with " ". */ -+static char * friendly_print(unsigned char * s) -+{ -+ char * f = kmalloc(strlen(s) + 1, GFP_ATOMIC); -+ int i; -+ -+ if(!f) { -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "friendly_print, bailing.\n"); -+ return NULL; -+ } -+ -+ for(i = 0; i < strlen(s); i++){ -+ if(isprint(s[i]) && s[i] < 128) f[i] = s[i]; -+ else if(isspace(s[i])) f[i] = ' '; -+ else f[i] = '.'; -+ } -+ f[i] = '\0'; -+ return f; -+} -+ -+static char dec2hex(int i) -+{ -+ switch (i) { -+ case 0 ... 9: -+ return (i + '0'); -+ break; -+ case 10 ... 15: -+ return (i - 10 + 'a'); -+ break; -+ default: -+ if (net_ratelimit()) -+ printk("layer7: Problem in dec2hex\n"); -+ return '\0'; -+ } -+} -+ -+static char * hex_print(unsigned char * s) -+{ -+ char * g = kmalloc(strlen(s)*3 + 1, GFP_ATOMIC); -+ int i; -+ -+ if(!g) { -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in hex_print, " -+ "bailing.\n"); -+ return NULL; -+ } -+ -+ for(i = 0; i < strlen(s); i++) { -+ g[i*3 ] = dec2hex(s[i]/16); -+ g[i*3 + 1] = dec2hex(s[i]%16); -+ g[i*3 + 2] = ' '; -+ } -+ g[i*3] = '\0'; -+ -+ return g; -+} -+#endif // DEBUG -+ -+/* Use instead of regcomp. As we expect to be seeing the same regexps over and -+over again, it make sense to cache the results. */ -+static regexp * compile_and_cache(const char * regex_string, -+ const char * protocol) -+{ -+ struct pattern_cache * node = first_pattern_cache; -+ struct pattern_cache * last_pattern_cache = first_pattern_cache; -+ struct pattern_cache * tmp; -+ unsigned int len; -+ -+ while (node != NULL) { -+ if (!strcmp(node->regex_string, regex_string)) -+ return node->pattern; -+ -+ last_pattern_cache = node;/* points at the last non-NULL node */ -+ node = node->next; -+ } -+ -+ /* If we reach the end of the list, then we have not yet cached -+ the pattern for this regex. Let's do that now. -+ Be paranoid about running out of memory to avoid list corruption. */ -+ tmp = kmalloc(sizeof(struct pattern_cache), GFP_ATOMIC); -+ -+ if(!tmp) { -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "compile_and_cache, bailing.\n"); -+ return NULL; -+ } -+ -+ tmp->regex_string = kmalloc(strlen(regex_string) + 1, GFP_ATOMIC); -+ tmp->pattern = kmalloc(sizeof(struct regexp), GFP_ATOMIC); -+ tmp->next = NULL; -+ -+ if(!tmp->regex_string || !tmp->pattern) { -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "compile_and_cache, bailing.\n"); -+ kfree(tmp->regex_string); -+ kfree(tmp->pattern); -+ kfree(tmp); -+ return NULL; -+ } -+ -+ /* Ok. The new node is all ready now. */ -+ node = tmp; -+ -+ if(first_pattern_cache == NULL) /* list is empty */ -+ first_pattern_cache = node; /* make node the beginning */ -+ else -+ last_pattern_cache->next = node; /* attach node to the end */ -+ -+ /* copy the string and compile the regex */ -+ len = strlen(regex_string); -+ DPRINTK("About to compile this: "%s"\n", regex_string); -+ node->pattern = regcomp((char *)regex_string, &len); -+ if ( !node->pattern ) { -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: Error compiling regexp " -+ ""%s" (%s)\n", -+ regex_string, protocol); -+ /* pattern is now cached as NULL, so we won't try again. */ -+ } -+ -+ strcpy(node->regex_string, regex_string); -+ return node->pattern; -+} -+ -+static int can_handle(const struct sk_buff *skb) -+{ -+ struct iphdr iphdr_tmp; -+ struct iphdr *iphdr; -+ int offset; -+ -+ if (!ip_hdr(skb)) -+ return 0; -+ -+ offset = ((uintptr_t)ip_hdr(skb)) - ((uintptr_t)skb->data); -+ -+ iphdr = skb_header_pointer(skb, offset, sizeof(*iphdr), &iphdr_tmp); -+ if (!iphdr) -+ return 0; -+ -+ if (iphdr->protocol == IPPROTO_TCP || -+ iphdr->protocol == IPPROTO_UDP || -+ iphdr->protocol == IPPROTO_ICMP) -+ return 1; -+ -+ return 0; -+} -+ -+static int app_data_offset(const struct sk_buff *skb) -+{ -+ int offset; -+ struct iphdr iphdr_tmp; -+ struct iphdr *iphdr; -+ struct tcphdr tcphdr_tmp; -+ struct tcphdr *tcphdr; -+ -+ if (!ip_hdr(skb)) -+ return -1; -+ -+ offset = ((uintptr_t)ip_hdr(skb)) - ((uintptr_t)skb->data); -+ -+ iphdr = skb_header_pointer(skb, offset, sizeof(*iphdr), &iphdr_tmp); -+ if (!iphdr) -+ return -1; -+ -+ offset += iphdr->ihl * 4; -+ -+ if (iphdr->protocol == IPPROTO_TCP) { -+ tcphdr = skb_header_pointer(skb, offset, sizeof(*tcphdr), -+ &tcphdr_tmp); -+ if (!tcphdr) -+ return -1; -+ -+ offset += tcphdr->doff * 4; -+ -+ return offset; -+ } -+ -+ if (iphdr->protocol == IPPROTO_UDP) -+ return offset + 8; -+ -+ if (iphdr->protocol == IPPROTO_ICMP) -+ return offset + 8; -+ -+ if (net_ratelimit()) -+ pr_err(KERN_ERR "layer7: tried to handle unknown protocol!\n"); -+ -+ return offset + 8; /* something reasonable */ -+} -+ -+/* handles whether there's a match when we aren't appending data anymore */ -+static int match_no_append(struct nf_conn * conntrack, -+ struct nf_conn * master_conntrack, -+ enum ip_conntrack_info ctinfo, -+ enum ip_conntrack_info master_ctinfo, -+ const struct xt_layer7_info * info) -+{ -+ /* If we're in here, throw the app data away */ -+ if(master_conntrack->layer7.app_data != NULL) { -+ -+ #ifdef CONFIG_IP_NF_MATCH_LAYER7_DEBUG -+ if(!master_conntrack->layer7.app_proto) { -+ char * f = -+ friendly_print(master_conntrack->layer7.app_data); -+ char * g = -+ hex_print(master_conntrack->layer7.app_data); -+ DPRINTK("\nl7-filter gave up after %d bytes " -+ "(%d packets):\n%s\n", -+ strlen(f), total_acct_packets(master_conntrack), f); -+ kfree(f); -+ DPRINTK("In hex: %s\n", g); -+ kfree(g); -+ } -+ #endif -+ -+ kfree(master_conntrack->layer7.app_data); -+ master_conntrack->layer7.app_data = NULL; /* don't free again */ -+ } -+ -+ if(master_conntrack->layer7.app_proto){ -+ /* Here child connections set their .app_proto (for /proc) */ -+ if(!conntrack->layer7.app_proto) { -+ conntrack->layer7.app_proto = -+ kmalloc(strlen(master_conntrack->layer7.app_proto)+1, -+ GFP_ATOMIC); -+ if(!conntrack->layer7.app_proto){ -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory " -+ "in match_no_append, " -+ "bailing.\n"); -+ return 1; -+ } -+ strcpy(conntrack->layer7.app_proto, -+ master_conntrack->layer7.app_proto); -+ } -+ -+ return (!strcmp(master_conntrack->layer7.app_proto, -+ info->protocol)); -+ } -+ else { -+ /* If not classified, set to "unknown" to distinguish from -+ connections that are still being tested. */ -+ master_conntrack->layer7.app_proto = -+ kmalloc(strlen("unknown")+1, GFP_ATOMIC); -+ if(!master_conntrack->layer7.app_proto){ -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "match_no_append, bailing.\n"); -+ return 1; -+ } -+ strcpy(master_conntrack->layer7.app_proto, "unknown"); -+ return 0; -+ } -+} -+ -+/* add the new app data to the conntrack. Return number of bytes added. */ -+static int add_datastr(char *target, int offset, char *app_data, int len) -+{ -+ int length = 0, i; -+ if (!target) return 0; -+ -+ /* Strip nulls. Make everything lower case (our regex lib doesn't -+ do case insensitivity). Add it to the end of the current data. */ -+ for(i = 0; i < maxdatalen-offset-1 && i < len; i++) { -+ if(app_data[i] != '\0') { -+ /* the kernel version of tolower mungs 'upper ascii' */ -+ target[length+offset] = -+ isascii(app_data[i])? -+ tolower(app_data[i]) : app_data[i]; -+ length++; -+ } -+ } -+ target[length+offset] = '\0'; -+ -+ return length; -+} -+ -+/* add the new app data to the buffer. Return number of bytes added. */ -+static int add_data(char *target, int offset, const struct sk_buff *skb) -+{ -+ int length, length_sum = 0; -+ int data_start = app_data_offset(skb); -+ int remaining = skb->len - data_start; -+ int to_copy; -+ uint8_t buf[512]; -+ uint8_t *data; -+ -+ while ((offset < maxdatalen - 1) && (remaining > 0)) { -+ to_copy = min_t(int, remaining, sizeof(buf)); -+ -+ data = skb_header_pointer(skb, data_start, to_copy, buf); -+ length = add_datastr(target, offset, data, to_copy); -+ -+ remaining -= to_copy; -+ data_start += to_copy; -+ offset += length; -+ length_sum += length; -+ } -+ -+ return length_sum; -+} -+ -+/* add the new app data to the conntrack. Return number of bytes added. */ -+static int add_data_conntrack(struct nf_conn *master_conntrack, -+ const struct sk_buff *skb) -+{ -+ int length; -+ -+ length = add_data(master_conntrack->layer7.app_data, -+ master_conntrack->layer7.app_data_len, skb); -+ master_conntrack->layer7.app_data_len += length; -+ -+ return length; -+} -+ -+/* taken from drivers/video/modedb.c */ -+static int my_atoi(const char *s) -+{ -+ int val = 0; -+ -+ for (;; s++) { -+ switch (*s) { -+ case '0'...'9': -+ val = 10*val+(*s-'0'); -+ break; -+ default: -+ return val; -+ } -+ } -+} -+ -+static int layer7_numpackets_proc_show(struct seq_file *s, void *p) { -+ seq_printf(s, "%d\n", num_packets); -+ -+ return 0; -+} -+ -+static int layer7_numpackets_proc_open(struct inode *inode, struct file *file) { -+ return single_open(file, layer7_numpackets_proc_show, NULL); -+} -+ -+/* Read in num_packets from userland */ -+static ssize_t layer7_numpackets_write_proc(struct file* file, const char __user *buffer, -+ size_t count, loff_t *data) { -+ char value[1024]; -+ int new_num_packets; -+ -+ if (copy_from_user(&value, buffer, sizeof(value))) -+ return -EFAULT; -+ -+ new_num_packets = my_atoi(value); -+ -+ if ((new_num_packets < 1) || (new_num_packets > 99)) { -+ printk(KERN_WARNING "layer7: numpackets must be between 1 and 99\n"); -+ return -EFAULT; -+ } -+ -+ num_packets = new_num_packets; -+ -+ return count; -+} -+ -+static bool match(const struct sk_buff *skbin, struct xt_action_param *par) -+{ -+ /* sidestep const without getting a compiler warning... */ -+ struct sk_buff *skb = (struct sk_buff *)skbin; -+ -+ const struct xt_layer7_info * info = par->matchinfo; -+ -+ enum ip_conntrack_info master_ctinfo, ctinfo; -+ struct nf_conn *master_conntrack, *conntrack; -+ unsigned char *tmp_data; -+ unsigned int pattern_result; -+ regexp * comppattern; -+ -+ /* Be paranoid/incompetent - lock the entire match function. */ -+ spin_lock_bh(&l7_lock); -+ -+ if (!can_handle(skbin)) { -+ DPRINTK("layer7: This is some protocol I can't handle.\n"); -+ spin_unlock_bh(&l7_lock); -+ return info->invert; -+ } -+ -+ /* Treat parent & all its children together as one connection, except -+ for the purpose of setting conntrack->layer7.app_proto in the actual -+ connection. This makes /proc/net/ip_conntrack more satisfying. */ -+ conntrack = nf_ct_get(skbin, &ctinfo); -+ master_conntrack = nf_ct_get(skbin, &master_ctinfo); -+ if (!conntrack || !master_conntrack) { -+ DPRINTK("layer7: couldn't get conntrack.\n"); -+ spin_unlock_bh(&l7_lock); -+ return info->invert; -+ } -+ -+ /* Try to get a master conntrack (and its master etc) for FTP, etc. */ -+ while (master_ct(master_conntrack) != NULL) -+ master_conntrack = master_ct(master_conntrack); -+ -+ /* if we've classified it or seen too many packets */ -+ if(!info->pkt && (total_acct_packets(master_conntrack) > num_packets || -+ master_conntrack->layer7.app_proto)) { -+ -+ pattern_result = match_no_append(conntrack, master_conntrack, -+ ctinfo, master_ctinfo, info); -+ -+ /* skb->cb[0] == seen. Don't do things twice if there are -+ multiple l7 rules. I'm not sure that using cb for this purpose -+ is correct, even though it says "put your private variables -+ there". But it doesn't look like it is being used for anything -+ else in the skbs that make it here. */ -+ skb->cb[0] = 1; /* marking it seen here's probably irrelevant */ -+ -+ spin_unlock_bh(&l7_lock); -+ return (pattern_result ^ info->invert); -+ } -+ -+ /* the return value gets checked later, when we're ready to use it */ -+ comppattern = compile_and_cache(info->pattern, info->protocol); -+ -+ if (info->pkt) { -+ tmp_data = kmalloc(maxdatalen, GFP_ATOMIC); -+ if(!tmp_data){ -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in match, bailing.\n"); -+ return info->invert; -+ } -+ -+ tmp_data[0] = '\0'; -+ add_data(tmp_data, 0, skbin); -+ pattern_result = ((comppattern && regexec(comppattern, tmp_data)) ? 1 : 0); -+ -+ kfree(tmp_data); -+ tmp_data = NULL; -+ spin_unlock_bh(&l7_lock); -+ -+ return (pattern_result ^ info->invert); -+ } -+ -+ /* On the first packet of a connection, allocate space for app data */ -+ if(total_acct_packets(master_conntrack) == 1 && !skb->cb[0] && -+ !master_conntrack->layer7.app_data){ -+ master_conntrack->layer7.app_data = -+ kmalloc(maxdatalen, GFP_ATOMIC); -+ if(!master_conntrack->layer7.app_data){ -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "match, bailing.\n"); -+ spin_unlock_bh(&l7_lock); -+ return info->invert; -+ } -+ -+ master_conntrack->layer7.app_data[0] = '\0'; -+ } -+ -+ /* Can be here, but unallocated, if numpackets is increased near -+ the beginning of a connection */ -+ if(master_conntrack->layer7.app_data == NULL){ -+ spin_unlock_bh(&l7_lock); -+ return info->invert; /* unmatched */ -+ } -+ -+ if(!skb->cb[0]){ -+ int newbytes; -+ newbytes = add_data_conntrack(master_conntrack, skb); -+ -+ if(newbytes == 0) { /* didn't add any data */ -+ skb->cb[0] = 1; -+ /* Didn't match before, not going to match now */ -+ spin_unlock_bh(&l7_lock); -+ return info->invert; -+ } -+ } -+ -+ /* If looking for "unknown", then never match. "Unknown" means that -+ we've given up; we're still trying with these packets. */ -+ if(!strcmp(info->protocol, "unknown")) { -+ pattern_result = 0; -+ /* If looking for "unset", then always match. "Unset" means that we -+ haven't yet classified the connection. */ -+ } else if(!strcmp(info->protocol, "unset")) { -+ pattern_result = 2; -+ DPRINTK("layer7: matched unset: not yet classified " -+ "(%d/%d packets)\n", -+ total_acct_packets(master_conntrack), num_packets); -+ /* If the regexp failed to compile, don't bother running it */ -+ } else if(comppattern && -+ regexec(comppattern, master_conntrack->layer7.app_data)){ -+ DPRINTK("layer7: matched %s\n", info->protocol); -+ pattern_result = 1; -+ } else pattern_result = 0; -+ -+ if(pattern_result == 1) { -+ master_conntrack->layer7.app_proto = -+ kmalloc(strlen(info->protocol)+1, GFP_ATOMIC); -+ if(!master_conntrack->layer7.app_proto){ -+ if (net_ratelimit()) -+ printk(KERN_ERR "layer7: out of memory in " -+ "match, bailing.\n"); -+ spin_unlock_bh(&l7_lock); -+ return (pattern_result ^ info->invert); -+ } -+ strcpy(master_conntrack->layer7.app_proto, info->protocol); -+ } else if(pattern_result > 1) { /* cleanup from "unset" */ -+ pattern_result = 1; -+ } -+ -+ /* mark the packet seen */ -+ skb->cb[0] = 1; -+ -+ spin_unlock_bh(&l7_lock); -+ return (pattern_result ^ info->invert); -+} -+ -+// load nf_conntrack_ipv4 -+static int check(const struct xt_mtchk_param *par) -+{ -+ if (nf_ct_l3proto_try_module_get(par->match->family) < 0) { -+ printk(KERN_WARNING "can't load conntrack support for " -+ "proto=%d\n", par->match->family); -+ return -EINVAL; -+ } -+ return 0; -+} -+ -+ -+static void destroy(const struct xt_mtdtor_param *par) -+{ -+ nf_ct_l3proto_module_put(par->match->family); -+} -+ -+static struct xt_match xt_layer7_match[] __read_mostly = { -+{ -+ .name = "layer7", -+ .family = AF_INET, -+ .checkentry = check, -+ .match = match, -+ .destroy = destroy, -+ .matchsize = sizeof(struct xt_layer7_info), -+ .me = THIS_MODULE -+} -+}; -+ -+static const struct file_operations layer7_numpackets_proc_fops = { -+ .owner = THIS_MODULE, -+ .open = layer7_numpackets_proc_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+ .write = layer7_numpackets_write_proc, -+}; -+ -+static int __init xt_layer7_init(void) -+{ -+ need_conntrack(); -+ -+ // Register proc interface -+ proc_create_data("layer7_numpackets", 0644, -+ init_net.proc_net, &layer7_numpackets_proc_fops, NULL); -+ -+ if(maxdatalen < 1) { -+ printk(KERN_WARNING "layer7: maxdatalen can't be < 1, " -+ "using 1\n"); -+ maxdatalen = 1; -+ } -+ /* This is not a hard limit. It's just here to prevent people from -+ bringing their slow machines to a grinding halt. */ -+ else if(maxdatalen > 65536) { -+ printk(KERN_WARNING "layer7: maxdatalen can't be > 65536, " -+ "using 65536\n"); -+ maxdatalen = 65536; -+ } -+ return xt_register_matches(xt_layer7_match, -+ ARRAY_SIZE(xt_layer7_match)); -+} -+ -+static void __exit xt_layer7_fini(void) -+{ -+ remove_proc_entry("layer7_numpackets", init_net.proc_net); -+ xt_unregister_matches(xt_layer7_match, ARRAY_SIZE(xt_layer7_match)); -+} -+ -+module_init(xt_layer7_init); -+module_exit(xt_layer7_fini); diff --git a/src/patches/linux-3.10.10-arm_kirkwood_setups.patch b/src/patches/linux-3.10.10-arm_kirkwood_setups.patch deleted file mode 100644 index 3564465..0000000 --- a/src/patches/linux-3.10.10-arm_kirkwood_setups.patch +++ /dev/null @@ -1,704 +0,0 @@ -diff -Naur linux-3.10.10.org/arch/arm/Kconfig linux-3.10.10/arch/arm/Kconfig ---- linux-3.10.10.org/arch/arm/Kconfig 2013-08-29 18:47:51.000000000 +0200 -+++ linux-3.10.10/arch/arm/Kconfig 2013-09-02 19:37:01.000000000 +0200 -@@ -217,7 +217,7 @@ - - config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" if EMBEDDED -- default y -+ default n - depends on !XIP_KERNEL && MMU - depends on !ARCH_REALVIEW || !SPARSEMEM - help -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/dreamplug-setup.c linux-3.10.10/arch/arm/mach-kirkwood/dreamplug-setup.c ---- linux-3.10.10.org/arch/arm/mach-kirkwood/dreamplug-setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.10/arch/arm/mach-kirkwood/dreamplug-setup.c 2013-09-02 21:29:28.000000000 +0200 -@@ -0,0 +1,151 @@ -+/* -+ * arch/arm/mach-kirkwood/dreamplug-setup.c -+ * -+ * Marvell DreamPlug Reference Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/leds.h> -+#include <linux/spi/flash.h> -+#include <linux/spi/spi.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include <linux/platform_data/mmc-mvsdio.h> -+#include "common.h" -+#include "mpp.h" -+ -+static const struct flash_platform_data dreamplug_spi_slave_data = { -+ .type = "mx25l1606e", -+}; -+ -+static struct spi_board_info __initdata dreamplug_spi_slave_info[] = { -+ { -+ .modalias = "m25p80", -+ .platform_data = &dreamplug_spi_slave_data, -+ .irq = -1, -+ .max_speed_hz = 50000000, -+ .bus_num = 0, -+ .chip_select = 0, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data dreamplug_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(0), -+}; -+ -+static struct mv643xx_eth_platform_data dreamplug_ge01_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(1), -+}; -+ -+static struct mv_sata_platform_data dreamplug_sata_data = { -+ .n_ports = 1, -+}; -+ -+static struct mvsdio_platform_data dreamplug_mvsdio_data = { -+ /* unfortunately the CD signal has not been connected */ -+}; -+ -+static struct gpio_led dreamplug_led_pins[] = { -+ { -+ .name = "dreamplug:blue:bluetooth", -+ .gpio = 47, -+ .active_low = 1, -+ }, -+ { -+ .name = "dreamplug:green:wlan", -+ .gpio = 48, -+ .active_low = 1, -+ }, -+ { -+ .name = "dreamplug:blue:wlanap", -+ .gpio = 49, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led_platform_data dreamplug_led_data = { -+ .leds = dreamplug_led_pins, -+ .num_leds = ARRAY_SIZE(dreamplug_led_pins), -+}; -+ -+static struct platform_device dreamplug_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &dreamplug_led_data, -+ } -+}; -+ -+static unsigned int dreamplug_mpp_config[] __initdata = { -+ MPP0_SPI_SCn, -+ MPP1_SPI_MOSI, -+ MPP2_SPI_SCK, -+ MPP3_SPI_MISO, -+ MPP4_GPIO, -+ MPP5_GPO, -+ MPP7_GPO, -+ MPP18_GPO, -+ MPP19_GPO, -+ MPP47_GPIO, /* B_BLED */ -+ MPP48_GPIO, /* W_GLED */ -+ MPP49_GPIO, /* W_BLED */ -+ 0 -+}; -+ -+static void __init dreamplug_legacy_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(dreamplug_mpp_config); -+ -+ kirkwood_uart0_init(); -+ -+ spi_register_board_info(dreamplug_spi_slave_info, -+ ARRAY_SIZE(dreamplug_spi_slave_info)); -+ -+ kirkwood_spi_init(); -+ kirkwood_ehci_init(); -+ -+ kirkwood_ge00_init(&dreamplug_ge00_data); -+ kirkwood_ge01_init(&dreamplug_ge01_data); -+ kirkwood_sata_init(&dreamplug_sata_data); -+ kirkwood_sdio_init(&dreamplug_mvsdio_data); -+ -+ platform_device_register(&dreamplug_leds); -+} -+ -+MACHINE_START(DREAMPLUG, "Marvell DreamPlug Reference Board") -+ /* Maintainer: Siddarth Gore <gores <at> marvell.com> */ -+ .atag_offset = 0x100, -+ .init_machine = dreamplug_legacy_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .init_time = kirkwood_timer_init, -+ .restart = kirkwood_restart, -+MACHINE_END -+ -+MACHINE_START(DREAMPLUG1, "Marvell DreamPlug Reference Board") -+ .atag_offset = 0x100, -+ .init_machine = dreamplug_legacy_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .init_time = kirkwood_timer_init, -+ .restart = kirkwood_restart, -+ -+MACHINE_END -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/guruplug-setup.c linux-3.10.10/arch/arm/mach-kirkwood/guruplug-setup.c ---- linux-3.10.10.org/arch/arm/mach-kirkwood/guruplug-setup.c 2013-08-29 18:47:51.000000000 +0200 -+++ linux-3.10.10/arch/arm/mach-kirkwood/guruplug-setup.c 2013-09-02 19:37:02.000000000 +0200 -@@ -11,6 +11,7 @@ - #include <linux/kernel.h> - #include <linux/init.h> - #include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> - #include <linux/mtd/partitions.h> - #include <linux/ata_platform.h> - #include <linux/mv643xx_eth.h> -@@ -27,15 +28,16 @@ - { - .name = "u-boot", - .offset = 0, -- .size = SZ_1M -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, -- .size = SZ_4M -+ .size = SZ_4M, - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, -- .size = MTDPART_SIZ_FULL -+ .size = MTDPART_SIZ_FULL, - }, - }; - -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/iconnect-setup.c linux-3.10.10/arch/arm/mach-kirkwood/iconnect-setup.c ---- linux-3.10.10.org/arch/arm/mach-kirkwood/iconnect-setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.10/arch/arm/mach-kirkwood/iconnect-setup.c 2013-09-02 21:31:09.000000000 +0200 -@@ -0,0 +1,214 @@ -+/* -+ * arch/arm/mach-kirkwood/iconnect-setup.c -+ * -+ * Iomega iConnect Wireless Data Station Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/gpio_keys.h> -+#include <linux/i2c.h> -+#include <linux/input.h> -+#include <linux/leds.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include "common.h" -+#include "mpp.h" -+ -+static struct mtd_partition iconnect_nand_parts[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ -+ }, { -+ .name = "uImage", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = 0x440000, -+ }, { -+ .name = "uInit", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = 0x440000, -+ }, { -+ .name = "root", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data iconnect_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(0xB), -+}; -+ -+static struct gpio_led iconnect_led_pins[] = { -+ { -+ .name = "iconnect:led_level", -+ .default_trigger = "default-on", -+ .gpio = 41, -+ .active_low = 0, -+ }, -+ -+ { -+ .name = "iconnect:blue:power", -+ .default_trigger = "default-on", -+ .gpio = 42, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:red:power", -+ .default_trigger = "none", -+ .gpio = 43, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_1", -+ .default_trigger = "none", -+ .gpio = 44, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_2", -+ .default_trigger = "none", -+ .gpio = 45, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_3", -+ .default_trigger = "none", -+ .gpio = 46, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_4", -+ .default_trigger = "none", -+ .gpio = 47, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:otb", -+ .default_trigger = "none", -+ .gpio = 48, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_led_platform_data iconnect_led_data = { -+ .leds = iconnect_led_pins, -+ .num_leds = ARRAY_SIZE(iconnect_led_pins), -+}; -+ -+static struct platform_device iconnect_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &iconnect_led_data, -+ } -+}; -+ -+static struct gpio_keys_button iconnect_buttons[] = { -+ { -+ .code = KEY_COPY, -+ .gpio = 35, -+ .desc = "OTB Button", -+ .active_low = 1, -+ }, -+ { -+ .code = KEY_RESTART, -+ .gpio = 12, -+ .desc = "Reset", -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_platform_data iconnect_button_data = { -+ .buttons = iconnect_buttons, -+ .nbuttons = ARRAY_SIZE(iconnect_buttons), -+}; -+ -+static struct platform_device iconnect_button_device = { -+ .name = "gpio-keys", -+ .id = -1, -+ .num_resources = 0, -+ .dev = { -+ .platform_data = &iconnect_button_data, -+ } -+}; -+ -+static unsigned int iconnect_mpp_config[] __initdata = { -+ MPP0_NF_IO2, -+ MPP1_NF_IO3, -+ MPP2_NF_IO4, -+ MPP3_NF_IO5, -+ MPP4_NF_IO6, -+ MPP5_NF_IO7, -+ MPP18_NF_IO0, -+ MPP19_NF_IO1, -+ MPP12_GPIO, /* Reset Button */ -+ MPP35_GPIO, /* OTB Button */ -+ -+ MPP41_GPIO, /* LED Level */ -+ MPP42_GPIO, /* Power LED blue */ -+ MPP43_GPIO, /* Power LED red */ -+ MPP44_GPIO, /* USB LED 1 */ -+ MPP45_GPIO, /* USB LED 2 */ -+ MPP46_GPIO, /* USB LED 3 */ -+ MPP47_GPIO, /* USB LED 4 */ -+ MPP48_GPIO, /* OTB LED */ -+ 0 -+}; -+ -+static struct i2c_board_info __initdata iconnect_i2c = { -+ I2C_BOARD_INFO("lm63", 0x4c), -+}; -+ -+static void __init iconnect_legacy_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(iconnect_mpp_config); -+ -+ kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25); -+ kirkwood_ehci_init(); -+ kirkwood_ge00_init(&iconnect_ge00_data); -+ -+ kirkwood_uart0_init(); -+ platform_device_register(&iconnect_leds); -+ platform_device_register(&iconnect_button_device); -+ -+ kirkwood_i2c_init(); -+ i2c_register_board_info(0, &iconnect_i2c,1); -+} -+ -+static int __init iconnect_pci_init(void) -+{ -+ if (machine_is_iconnect()) { -+ kirkwood_pcie_init(KW_PCIE0); -+ } -+ return 0; -+} -+subsys_initcall(iconnect_pci_init); -+ -+MACHINE_START(ICONNECT, "Iomega iConnect Wireless Data Station") -+ /* Maintainer: Arne Fitzenreiter arne_f@ipfire.org */ -+ .atag_offset = 0x100, -+ .init_machine = iconnect_legacy_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .init_time = kirkwood_timer_init, -+ .restart = kirkwood_restart, -+ -+MACHINE_END -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/Kconfig linux-3.10.10/arch/arm/mach-kirkwood/Kconfig ---- linux-3.10.10.org/arch/arm/mach-kirkwood/Kconfig 2013-08-29 18:47:51.000000000 +0200 -+++ linux-3.10.10/arch/arm/mach-kirkwood/Kconfig 2013-09-02 19:37:02.000000000 +0200 -@@ -116,6 +116,12 @@ - Say 'Y' here if you want your kernel to support the - HP t5325 Thin Client. - -+config MACH_DREAMPLUG -+ bool "Marvell DreamPlug Reference Board" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Marvell DreamPlug Reference Board. -+ - config MACH_TS219 - bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" - help -@@ -317,6 +323,18 @@ - or MV6282. If you have the wrong one, the buttons will not - work. - -+config MACH_ICONNECT -+ bool "Iomega iConnect Wireless Data Station" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Iomega iConnect Wireless Data Station. -+ -+config MACH_NAS6210 -+ bool "Raidsonic ICY BOX IB-62x0" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Raidsonic ICY BOX IB-62x0. -+ - endmenu - - endif -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/Makefile linux-3.10.10/arch/arm/mach-kirkwood/Makefile ---- linux-3.10.10.org/arch/arm/mach-kirkwood/Makefile 2013-08-29 18:47:51.000000000 +0200 -+++ linux-3.10.10/arch/arm/mach-kirkwood/Makefile 2013-09-02 19:50:19.000000000 +0200 -@@ -5,6 +5,7 @@ - obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o - obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o - obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o -+obj-$(CONFIG_MACH_DREAMPLUG) += dreamplug-setup.o - obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o lacie_v2-common.o - obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o - obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o -@@ -18,6 +19,8 @@ - obj-$(CONFIG_MACH_T5325) += t5325-setup.o - obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o - obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o -+obj-$(CONFIG_MACH_ICONNECT) += iconnect-setup.o -+obj-$(CONFIG_MACH_NAS6210) += nas6210-setup.o - - obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o - obj-$(CONFIG_MACH_CLOUDBOX_DT) += board-ns2.o -diff -Naur linux-3.10.10.org/arch/arm/mach-kirkwood/nas6210-setup.c linux-3.10.10/arch/arm/mach-kirkwood/nas6210-setup.c ---- linux-3.10.10.org/arch/arm/mach-kirkwood/nas6210-setup.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.10/arch/arm/mach-kirkwood/nas6210-setup.c 2013-09-02 21:32:36.000000000 +0200 -@@ -0,0 +1,185 @@ -+/* -+ * arch/arm/mach-kirkwood/nas6210-setup.c -+ * -+ * Raidsonic ICYBOX NAS6210 and 6220 Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/gpio_keys.h> -+#include <linux/i2c.h> -+#include <linux/input.h> -+#include <linux/leds.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include "common.h" -+#include "mpp.h" -+ -+#define NAS6210_GPIO_POWER_OFF 24 -+ -+static struct mtd_partition nas6210_nand_parts[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ -+ }, { -+ .name = "uImage", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = (SZ_1M*6), -+ }, { -+ .name = "root", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data nas6210_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(8), -+}; -+ -+static struct mv_sata_platform_data nas6210_sata_data = { -+ .n_ports = 2, -+}; -+ -+static struct gpio_led nas6210_led_pins[] = { -+ { -+ .name = "nas6210:green:power", -+ .default_trigger = "default-on", -+ .gpio = 25, -+ .active_low = 0, -+ }, -+ { -+ .name = "nas6210:red:power", -+ .default_trigger = "none", -+ .gpio = 22, -+ .active_low = 0, -+ }, -+ { -+ .name = "nas6210:red:usb_copy", -+ .default_trigger = "none", -+ .gpio = 27, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_led_platform_data nas6210_led_data = { -+ .leds = nas6210_led_pins, -+ .num_leds = ARRAY_SIZE(nas6210_led_pins), -+}; -+ -+static struct platform_device nas6210_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &nas6210_led_data, -+ } -+}; -+ -+static struct gpio_keys_button nas6210_buttons[] = { -+ { -+ .code = KEY_COPY, -+ .gpio = 29, -+ .desc = "USB Copy", -+ .active_low = 1, -+ }, -+ { -+ .code = KEY_RESTART, -+ .gpio = 28, -+ .desc = "Reset", -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_platform_data nas6210_button_data = { -+ .buttons = nas6210_buttons, -+ .nbuttons = ARRAY_SIZE(nas6210_buttons), -+}; -+ -+static struct platform_device nas6210_button_device = { -+ .name = "gpio-keys", -+ .id = -1, -+ .num_resources = 0, -+ .dev = { -+ .platform_data = &nas6210_button_data, -+ } -+}; -+ -+static unsigned int nas6210_mpp_config[] __initdata = { -+ MPP0_NF_IO2, -+ MPP1_NF_IO3, -+ MPP2_NF_IO4, -+ MPP3_NF_IO5, -+ MPP4_NF_IO6, -+ MPP5_NF_IO7, -+ MPP18_NF_IO0, -+ MPP19_NF_IO1, -+ MPP22_GPIO, /* Power LED red */ -+ MPP24_GPIO, /* Power off */ -+ MPP25_GPIO, /* Power LED green */ -+ MPP27_GPIO, /* USB transfer LED */ -+ MPP28_GPIO, /* Reset button */ -+ MPP29_GPIO, /* USB Copy button */ -+ 0 -+}; -+ -+void nas6210_power_off(void) -+{ -+ gpio_set_value(NAS6210_GPIO_POWER_OFF, 1); -+ while(1); -+} -+ -+static void __init nas6210_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(nas6210_mpp_config); -+ -+ kirkwood_nand_init(ARRAY_AND_SIZE(nas6210_nand_parts), 25); -+ kirkwood_ehci_init(); -+ kirkwood_ge00_init(&nas6210_ge00_data); -+ kirkwood_sata_init(&nas6210_sata_data); -+ kirkwood_uart0_init(); -+ platform_device_register(&nas6210_leds); -+ platform_device_register(&nas6210_button_device); -+ -+ if (gpio_request(NAS6210_GPIO_POWER_OFF, "power-off") == 0 && -+ gpio_direction_output(NAS6210_GPIO_POWER_OFF, 0) == 0) -+ pm_power_off = nas6210_power_off; -+ -+ else -+ pr_err("nas6210: failed to configure power-off gpio pin"); -+} -+ -+static int __init nas6210_pci_init(void) -+{ -+ if (machine_is_nas6210()) { -+ kirkwood_pcie_init(KW_PCIE0); -+ } -+ return 0; -+} -+subsys_initcall(nas6210_pci_init); -+ -+MACHINE_START(NAS6210, "RaidSonic ICY BOX IB-NAS62x0") -+ /* Maintainer: Arne Fitzenreiter arne_f@ipfire.org */ -+ .atag_offset = 0x00000100, -+ .init_machine = nas6210_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .init_time = kirkwood_timer_init, -+ .restart = kirkwood_restart, -+MACHINE_END -diff -Naur linux-3.10.10.org/arch/arm/tools/mach-types linux-3.10.10/arch/arm/tools/mach-types ---- linux-3.10.10.org/arch/arm/tools/mach-types 2013-08-29 18:47:51.000000000 +0200 -+++ linux-3.10.10/arch/arm/tools/mach-types 2013-09-02 22:06:34.000000000 +0200 -@@ -447,6 +447,7 @@ - smartq5 MACH_SMARTQ5 SMARTQ5 2534 - davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 - mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 -+guruplug MACH_GURUPLUG GURUPLUG 2601 - capc7117 MACH_CAPC7117 CAPC7117 2612 - icontrol MACH_ICONTROL ICONTROL 2624 - gplugd MACH_GPLUGD GPLUGD 2625 -@@ -454,7 +455,7 @@ - mx23evk MACH_MX23EVK MX23EVK 2629 - ap4evb MACH_AP4EVB AP4EVB 2630 - mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 --guruplug MACH_GURUPLUG GURUPLUG 2659 -+dreamplug1 MACH_DREAMPLUG1 DREAMPLUG1 2659 - spear310 MACH_SPEAR310 SPEAR310 2660 - spear320 MACH_SPEAR320 SPEAR320 2661 - aquila MACH_AQUILA AQUILA 2676 -@@ -491,6 +492,7 @@ - t5325 MACH_T5325 T5325 2846 - income MACH_INCOME INCOME 2849 - goni MACH_GONI GONI 2862 -+iconnect MACH_ICONNECT ICONNECT 2870 - bv07 MACH_BV07 BV07 2882 - openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884 - devixp MACH_DEVIXP DEVIXP 2885 -@@ -520,6 +522,7 @@ - vpr200 MACH_VPR200 VPR200 3087 - torbreck MACH_TORBRECK TORBRECK 3090 - prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 -+nas6210 MACH_NAS6210 NAS6210 3104 - paz00 MACH_PAZ00 PAZ00 3128 - acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 - ag5evm MACH_AG5EVM AG5EVM 3189 -@@ -544,6 +547,7 @@ - nspire MACH_NSPIRE NSPIRE 3503 - nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522 - mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543 -+dreamplug MACH_DREAMPLUG DREAMPLUG 3550 - deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568 - m28evk MACH_M28EVK M28EVK 3613 - kota2 MACH_KOTA2 KOTA2 3616 diff --git a/src/patches/linux-3.10.27-fs-exec-atomic64-operand-requires-impossible-reload.patch b/src/patches/linux-3.10.27-fs-exec-atomic64-operand-requires-impossible-reload.patch deleted file mode 100644 index a829790..0000000 --- a/src/patches/linux-3.10.27-fs-exec-atomic64-operand-requires-impossible-reload.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/fs/Makefile.orig 2014-01-16 20:17:03.000000000 +0000 -+++ b/fs/Makefile 2014-01-16 20:25:05.000000000 +0000 -@@ -13,6 +13,8 @@ - pnode.o splice.o sync.o utimes.o \ - stack.o fs_struct.o statfs.o - -+CFLAGS_exec.o += -O1 -+ - ifeq ($(CONFIG_BLOCK),y) - obj-y += buffer.o bio.o block_dev.o direct-io.o mpage.o ioprio.o - else diff --git a/src/patches/linux-3.10.30-imq.patch b/src/patches/linux-3.10.30-imq.patch deleted file mode 100644 index 7eebd69..0000000 --- a/src/patches/linux-3.10.30-imq.patch +++ /dev/null @@ -1,3304 +0,0 @@ -diff -Naur linux-3.10.30.org/drivers/net/imq.c linux-3.10.30/drivers/net/imq.c ---- linux-3.10.30.org/drivers/net/imq.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/drivers/net/imq.c 2014-02-14 20:29:05.379402305 +0100 -@@ -0,0 +1,1001 @@ -+/* -+ * Pseudo-driver for the intermediate queue device. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Authors: Patrick McHardy, kaber@trash.net -+ * -+ * The first version was written by Martin Devera, devik@cdi.cz -+ * -+ * Credits: Jan Rafaj imq2t@cedric.vabo.cz -+ * - Update patch to 2.4.21 -+ * Sebastian Strollo sstrollo@nortelnetworks.com -+ * - Fix "Dead-loop on netdevice imq"-issue -+ * Marcel Sebek sebek64@post.cz -+ * - Update to 2.6.2-rc1 -+ * -+ * After some time of inactivity there is a group taking care -+ * of IMQ again: http://www.linuximq.net -+ * -+ * -+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 -+ * including the following changes: -+ * -+ * - Correction of ipv6 support "+"s issue (Hasso Tepper) -+ * - Correction of imq_init_devs() issue that resulted in -+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller) -+ * - Addition of functionality to choose number of IMQ devices -+ * during kernel config (Andre Correa) -+ * - Addition of functionality to choose how IMQ hooks on -+ * PRE and POSTROUTING (after or before NAT) (Andre Correa) -+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa) -+ * -+ * -+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were -+ * released with almost no problems. 2.6.14-x was released -+ * with some important changes: nfcache was removed; After -+ * some weeks of trouble we figured out that some IMQ fields -+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header. -+ * These functions are correctly patched by this new patch version. -+ * -+ * Thanks for all who helped to figure out all the problems with -+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX, -+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully -+ * I didn't forget anybody). I apologize again for my lack of time. -+ * -+ * -+ * 2008/06/17 - 2.6.25 - Changed imq.c to use qdisc_run() instead -+ * of qdisc_restart() and moved qdisc_run() to tasklet to avoid -+ * recursive locking. New initialization routines to fix 'rmmod' not -+ * working anymore. Used code from ifb.c. (Jussi Kivilinna) -+ * -+ * 2008/08/06 - 2.6.26 - (JK) -+ * - Replaced tasklet with 'netif_schedule()'. -+ * - Cleaned up and added comments for imq_nf_queue(). -+ * -+ * 2009/04/12 -+ * - Add skb_save_cb/skb_restore_cb helper functions for backuping -+ * control buffer. This is needed because qdisc-layer on kernels -+ * 2.6.27 and newer overwrite control buffer. (Jussi Kivilinna) -+ * - Add better locking for IMQ device. Hopefully this will solve -+ * SMP issues. (Jussi Kivilinna) -+ * - Port to 2.6.27 -+ * - Port to 2.6.28 -+ * - Port to 2.6.29 + fix rmmod not working -+ * -+ * 2009/04/20 - (Jussi Kivilinna) -+ * - Use netdevice feature flags to avoid extra packet handling -+ * by core networking layer and possibly increase performance. -+ * -+ * 2009/09/26 - (Jussi Kivilinna) -+ * - Add imq_nf_reinject_lockless to fix deadlock with -+ * imq_nf_queue/imq_nf_reinject. -+ * -+ * 2009/12/08 - (Jussi Kivilinna) -+ * - Port to 2.6.32 -+ * - Add check for skb->nf_queue_entry==NULL in imq_dev_xmit() -+ * - Also add better error checking for skb->nf_queue_entry usage -+ * -+ * 2010/02/25 - (Jussi Kivilinna) -+ * - Port to 2.6.33 -+ * -+ * 2010/08/15 - (Jussi Kivilinna) -+ * - Port to 2.6.35 -+ * - Simplify hook registration by using nf_register_hooks. -+ * - nf_reinject doesn't need spinlock around it, therefore remove -+ * imq_nf_reinject function. Other nf_reinject users protect -+ * their own data with spinlock. With IMQ however all data is -+ * needed is stored per skbuff, so no locking is needed. -+ * - Changed IMQ to use 'separate' NF_IMQ_QUEUE instead of -+ * NF_QUEUE, this allows working coexistance of IMQ and other -+ * NF_QUEUE users. -+ * - Make IMQ multi-queue. Number of IMQ device queues can be -+ * increased with 'numqueues' module parameters. Default number -+ * of queues is 1, in other words by default IMQ works as -+ * single-queue device. Multi-queue selection is based on -+ * IFB multi-queue patch by Changli Gao xiaosuo@gmail.com. -+ * -+ * 2011/03/18 - (Jussi Kivilinna) -+ * - Port to 2.6.38 -+ * -+ * 2011/07/12 - (syoder89@gmail.com) -+ * - Crash fix that happens when the receiving interface has more -+ * than one queue (add missing skb_set_queue_mapping in -+ * imq_select_queue). -+ * -+ * 2011/07/26 - (Jussi Kivilinna) -+ * - Add queue mapping checks for packets exiting IMQ. -+ * - Port to 3.0 -+ * -+ * 2011/08/16 - (Jussi Kivilinna) -+ * - Clear IFF_TX_SKB_SHARING flag that was added for linux 3.0.2 -+ * -+ * 2011/11/03 - Germano Michel germanomichel@gmail.com -+ * - Fix IMQ for net namespaces -+ * -+ * 2011/11/04 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.1 -+ * - Clean-up, move 'get imq device pointer by imqX name' to -+ * separate function from imq_nf_queue(). -+ * -+ * 2012/01/05 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.2 -+ * -+ * 2012/03/19 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.3 -+ * -+ * 2012/12/12 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.7 -+ * - Fix checkpatch.pl warnings -+ * -+ * 2013/09/10 - Jussi Kivilinna jussi.kivilinna@iki.fi -+ * - Fixed GSO handling for 3.10, see imq_nf_queue() for comments. -+ * - Don't copy skb->cb_next when copying or cloning skbuffs. -+ * -+ * Also, many thanks to pablo Sebastian Greco for making the initial -+ * patch and to those who helped the testing. -+ * -+ * More info at: http://www.linuximq.net/ (Andre Correa) -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/moduleparam.h> -+#include <linux/list.h> -+#include <linux/skbuff.h> -+#include <linux/netdevice.h> -+#include <linux/etherdevice.h> -+#include <linux/rtnetlink.h> -+#include <linux/if_arp.h> -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv4.h> -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ #include <linux/netfilter_ipv6.h> -+#endif -+#include <linux/imq.h> -+#include <net/pkt_sched.h> -+#include <net/netfilter/nf_queue.h> -+#include <net/sock.h> -+#include <linux/ip.h> -+#include <linux/ipv6.h> -+#include <linux/if_vlan.h> -+#include <linux/if_pppox.h> -+#include <net/ip.h> -+#include <net/ipv6.h> -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num); -+ -+static nf_hookfn imq_nf_hook; -+ -+static struct nf_hook_ops imq_ops[] = { -+ { -+ /* imq_ingress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP_PRI_LAST, -+#else -+ .priority = NF_IP_PRI_NAT_SRC - 1, -+#endif -+ }, -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ { -+ /* imq_ingress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP6_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP6_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP6_PRI_LAST, -+#else -+ .priority = NF_IP6_PRI_NAT_SRC - 1, -+#endif -+ }, -+#endif -+}; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+static int numdevs = CONFIG_IMQ_NUM_DEVS; -+#else -+static int numdevs = IMQ_MAX_DEVS; -+#endif -+ -+static struct net_device *imq_devs_cache[IMQ_MAX_DEVS]; -+ -+#define IMQ_MAX_QUEUES 32 -+static int numqueues = 1; -+static u32 imq_hashrnd; -+ -+static inline __be16 pppoe_proto(const struct sk_buff *skb) -+{ -+ return *((__be16 *)(skb_mac_header(skb) + ETH_HLEN + -+ sizeof(struct pppoe_hdr))); -+} -+ -+static u16 imq_hash(struct net_device *dev, struct sk_buff *skb) -+{ -+ unsigned int pull_len; -+ u16 protocol = skb->protocol; -+ u32 addr1, addr2; -+ u32 hash, ihl = 0; -+ union { -+ u16 in16[2]; -+ u32 in32; -+ } ports; -+ u8 ip_proto; -+ -+ pull_len = 0; -+ -+recheck: -+ switch (protocol) { -+ case htons(ETH_P_8021Q): { -+ if (unlikely(skb_pull(skb, VLAN_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += VLAN_HLEN; -+ skb->network_header += VLAN_HLEN; -+ -+ protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; -+ goto recheck; -+ } -+ -+ case htons(ETH_P_PPP_SES): { -+ if (unlikely(skb_pull(skb, PPPOE_SES_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += PPPOE_SES_HLEN; -+ skb->network_header += PPPOE_SES_HLEN; -+ -+ protocol = pppoe_proto(skb); -+ goto recheck; -+ } -+ -+ case htons(ETH_P_IP): { -+ const struct iphdr *iph = ip_hdr(skb); -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct iphdr)))) -+ goto other; -+ -+ addr1 = iph->daddr; -+ addr2 = iph->saddr; -+ -+ ip_proto = !(ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) ? -+ iph->protocol : 0; -+ ihl = ip_hdrlen(skb); -+ -+ break; -+ } -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ case htons(ETH_P_IPV6): { -+ const struct ipv6hdr *iph = ipv6_hdr(skb); -+ __be16 fo = 0; -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct ipv6hdr)))) -+ goto other; -+ -+ addr1 = iph->daddr.s6_addr32[3]; -+ addr2 = iph->saddr.s6_addr32[3]; -+ ihl = ipv6_skip_exthdr(skb, sizeof(struct ipv6hdr), &ip_proto, -+ &fo); -+ if (unlikely(ihl < 0)) -+ goto other; -+ -+ break; -+ } -+#endif -+ default: -+other: -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ return (u16)(ntohs(protocol) % dev->real_num_tx_queues); -+ } -+ -+ if (addr1 > addr2) -+ swap(addr1, addr2); -+ -+ switch (ip_proto) { -+ case IPPROTO_TCP: -+ case IPPROTO_UDP: -+ case IPPROTO_DCCP: -+ case IPPROTO_ESP: -+ case IPPROTO_AH: -+ case IPPROTO_SCTP: -+ case IPPROTO_UDPLITE: { -+ if (likely(skb_copy_bits(skb, ihl, &ports.in32, 4) >= 0)) { -+ if (ports.in16[0] > ports.in16[1]) -+ swap(ports.in16[0], ports.in16[1]); -+ break; -+ } -+ /* fall-through */ -+ } -+ default: -+ ports.in32 = 0; -+ break; -+ } -+ -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ hash = jhash_3words(addr1, addr2, ports.in32, imq_hashrnd ^ ip_proto); -+ -+ return (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+} -+ -+static inline bool sk_tx_queue_recorded(struct sock *sk) -+{ -+ return (sk_tx_queue_get(sk) >= 0); -+} -+ -+static struct netdev_queue *imq_select_queue(struct net_device *dev, -+ struct sk_buff *skb) -+{ -+ u16 queue_index = 0; -+ u32 hash; -+ -+ if (likely(dev->real_num_tx_queues == 1)) -+ goto out; -+ -+ /* IMQ can be receiving ingress or engress packets. */ -+ -+ /* Check first for if rx_queue is set */ -+ if (skb_rx_queue_recorded(skb)) { -+ queue_index = skb_get_rx_queue(skb); -+ goto out; -+ } -+ -+ /* Check if socket has tx_queue set */ -+ if (sk_tx_queue_recorded(skb->sk)) { -+ queue_index = sk_tx_queue_get(skb->sk); -+ goto out; -+ } -+ -+ /* Try use socket hash */ -+ if (skb->sk && skb->sk->sk_hash) { -+ hash = skb->sk->sk_hash; -+ queue_index = -+ (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+ goto out; -+ } -+ -+ /* Generate hash from packet data */ -+ queue_index = imq_hash(dev, skb); -+ -+out: -+ if (unlikely(queue_index >= dev->real_num_tx_queues)) -+ queue_index = (u16)((u32)queue_index % dev->real_num_tx_queues); -+ -+ skb_set_queue_mapping(skb, queue_index); -+ return netdev_get_tx_queue(dev, queue_index); -+} -+ -+static struct net_device_stats *imq_get_stats(struct net_device *dev) -+{ -+ return &dev->stats; -+} -+ -+/* called for packets kfree'd in qdiscs at places other than enqueue */ -+static void imq_skb_destructor(struct sk_buff *skb) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ -+ if (entry) { -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+ } -+ -+ skb_restore_cb(skb); /* kfree backup */ -+} -+ -+static void imq_done_check_queue_mapping(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ unsigned int queue_index; -+ -+ /* Don't let queue_mapping be left too large after exiting IMQ */ -+ if (likely(skb->dev != dev && skb->dev != NULL)) { -+ queue_index = skb_get_queue_mapping(skb); -+ if (unlikely(queue_index >= skb->dev->real_num_tx_queues)) { -+ queue_index = (u16)((u32)queue_index % -+ skb->dev->real_num_tx_queues); -+ skb_set_queue_mapping(skb, queue_index); -+ } -+ } else { -+ /* skb->dev was IMQ device itself or NULL, be on safe side and -+ * just clear queue mapping. -+ */ -+ skb_set_queue_mapping(skb, 0); -+ } -+} -+ -+static netdev_tx_t imq_dev_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ dev->trans_start = jiffies; -+ -+ dev->stats.tx_bytes += skb->len; -+ dev->stats.tx_packets++; -+ -+ if (unlikely(entry == NULL)) { -+ /* We don't know what is going on here.. packet is queued for -+ * imq device, but (probably) not by us. -+ * -+ * If this packet was not send here by imq_nf_queue(), then -+ * skb_save_cb() was not used and skb_free() should not show: -+ * WARNING: IMQ: kfree_skb: skb->cb_next:.. -+ * and/or -+ * WARNING: IMQ: kfree_skb: skb->nf_queue_entry... -+ * -+ * However if this message is shown, then IMQ is somehow broken -+ * and you should report this to linuximq.net. -+ */ -+ -+ /* imq_dev_xmit is black hole that eats all packets, report that -+ * we eat this packet happily and increase dropped counters. -+ */ -+ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ return NETDEV_TX_OK; -+ } -+ -+ skb_restore_cb(skb); /* restore skb->cb */ -+ -+ skb->imq_flags = 0; -+ skb->destructor = NULL; -+ -+ imq_done_check_queue_mapping(skb, dev); -+ -+ nf_reinject(entry, NF_ACCEPT); -+ -+ return NETDEV_TX_OK; -+} -+ -+static struct net_device *get_imq_device_by_index(int index) -+{ -+ struct net_device *dev = NULL; -+ struct net *net; -+ char buf[8]; -+ -+ /* get device by name and cache result */ -+ snprintf(buf, sizeof(buf), "imq%d", index); -+ -+ /* Search device from all namespaces. */ -+ for_each_net(net) { -+ dev = dev_get_by_name(net, buf); -+ if (dev) -+ break; -+ } -+ -+ if (WARN_ON_ONCE(dev == NULL)) { -+ /* IMQ device not found. Exotic config? */ -+ return ERR_PTR(-ENODEV); -+ } -+ -+ imq_devs_cache[index] = dev; -+ dev_put(dev); -+ -+ return dev; -+} -+ -+static struct nf_queue_entry *nf_queue_entry_dup(struct nf_queue_entry *e) -+{ -+ struct nf_queue_entry *entry = kmemdup(e, e->size, GFP_ATOMIC); -+ if (entry) { -+ if (nf_queue_entry_get_refs(entry)) -+ return entry; -+ kfree(entry); -+ } -+ return NULL; -+} -+ -+#ifdef CONFIG_BRIDGE_NETFILTER -+/* When called from bridge netfilter, skb->data must point to MAC header -+ * before calling skb_gso_segment(). Else, original MAC header is lost -+ * and segmented skbs will be sent to wrong destination. -+ */ -+static void nf_bridge_adjust_skb_data(struct sk_buff *skb) -+{ -+ if (skb->nf_bridge) -+ __skb_push(skb, skb->network_header - skb->mac_header); -+} -+ -+static void nf_bridge_adjust_segmented_data(struct sk_buff *skb) -+{ -+ if (skb->nf_bridge) -+ __skb_pull(skb, skb->network_header - skb->mac_header); -+} -+#else -+#define nf_bridge_adjust_skb_data(s) do {} while (0) -+#define nf_bridge_adjust_segmented_data(s) do {} while (0) -+#endif -+ -+static void free_entry(struct nf_queue_entry *entry) -+{ -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+} -+ -+static int __imq_nf_queue(struct nf_queue_entry *entry, struct net_device *dev); -+ -+static int __imq_nf_queue_gso(struct nf_queue_entry *entry, -+ struct net_device *dev, struct sk_buff *skb) -+{ -+ int ret = -ENOMEM; -+ struct nf_queue_entry *entry_seg; -+ -+ nf_bridge_adjust_segmented_data(skb); -+ -+ if (skb->next == NULL) { /* last packet, no need to copy entry */ -+ struct sk_buff *gso_skb = entry->skb; -+ entry->skb = skb; -+ ret = __imq_nf_queue(entry, dev); -+ if (ret) -+ entry->skb = gso_skb; -+ return ret; -+ } -+ -+ skb->next = NULL; -+ -+ entry_seg = nf_queue_entry_dup(entry); -+ if (entry_seg) { -+ entry_seg->skb = skb; -+ ret = __imq_nf_queue(entry_seg, dev); -+ if (ret) -+ free_entry(entry_seg); -+ } -+ return ret; -+} -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num) -+{ -+ struct sk_buff *skb, *segs; -+ struct net_device *dev; -+ unsigned int queued; -+ int index, retval, err; -+ -+ index = entry->skb->imq_flags & IMQ_F_IFMASK; -+ if (unlikely(index > numdevs - 1)) { -+ if (net_ratelimit()) -+ pr_warn("IMQ: invalid device specified, highest is %u\n", -+ numdevs - 1); -+ retval = -EINVAL; -+ goto out_no_dev; -+ } -+ -+ /* check for imq device by index from cache */ -+ dev = imq_devs_cache[index]; -+ if (unlikely(!dev)) { -+ dev = get_imq_device_by_index(index); -+ if (IS_ERR(dev)) { -+ retval = PTR_ERR(dev); -+ goto out_no_dev; -+ } -+ } -+ -+ if (unlikely(!(dev->flags & IFF_UP))) { -+ entry->skb->imq_flags = 0; -+ retval = -ECANCELED; -+ goto out_no_dev; -+ } -+ -+ if (!skb_is_gso(entry->skb)) -+ return __imq_nf_queue(entry, dev); -+ -+ /* Since 3.10.x, GSO handling moved here as result of upstream commit -+ * a5fedd43d5f6c94c71053a66e4c3d2e35f1731a2 (netfilter: move -+ * skb_gso_segment into nfnetlink_queue module). -+ * -+ * Following code replicates the gso handling from -+ * 'net/netfilter/nfnetlink_queue_core.c':nfqnl_enqueue_packet(). -+ */ -+ -+ skb = entry->skb; -+ -+ switch (entry->pf) { -+ case NFPROTO_IPV4: -+ skb->protocol = htons(ETH_P_IP); -+ break; -+ case NFPROTO_IPV6: -+ skb->protocol = htons(ETH_P_IPV6); -+ break; -+ } -+ -+ nf_bridge_adjust_skb_data(skb); -+ segs = skb_gso_segment(skb, 0); -+ /* Does not use PTR_ERR to limit the number of error codes that can be -+ * returned by nf_queue. For instance, callers rely on -ECANCELED to -+ * mean 'ignore this hook'. -+ */ -+ err = -ENOBUFS; -+ if (IS_ERR(segs)) -+ goto out_err; -+ queued = 0; -+ err = 0; -+ do { -+ struct sk_buff *nskb = segs->next; -+ if (nskb && nskb->next) -+ nskb->cb_next = NULL; -+ if (err == 0) -+ err = __imq_nf_queue_gso(entry, dev, segs); -+ if (err == 0) -+ queued++; -+ else -+ kfree_skb(segs); -+ segs = nskb; -+ } while (segs); -+ -+ if (queued) { -+ if (err) /* some segments are already queued */ -+ free_entry(entry); -+ kfree_skb(skb); -+ return 0; -+ } -+ -+out_err: -+ nf_bridge_adjust_segmented_data(skb); -+ retval = err; -+out_no_dev: -+ return retval; -+} -+ -+static int __imq_nf_queue(struct nf_queue_entry *entry, struct net_device *dev) -+{ -+ struct sk_buff *skb_orig, *skb, *skb_shared; -+ struct Qdisc *q; -+ struct netdev_queue *txq; -+ spinlock_t *root_lock; -+ int users; -+ int retval = -EINVAL; -+ unsigned int orig_queue_index; -+ -+ dev->last_rx = jiffies; -+ -+ skb = entry->skb; -+ skb_orig = NULL; -+ -+ /* skb has owner? => make clone */ -+ if (unlikely(skb->destructor)) { -+ skb_orig = skb; -+ skb = skb_clone(skb, GFP_ATOMIC); -+ if (unlikely(!skb)) { -+ retval = -ENOMEM; -+ goto out; -+ } -+ skb->cb_next = NULL; -+ entry->skb = skb; -+ } -+ -+ skb->nf_queue_entry = entry; -+ -+ dev->stats.rx_bytes += skb->len; -+ dev->stats.rx_packets++; -+ -+ if (!skb->dev) { -+ /* skb->dev == NULL causes problems, try the find cause. */ -+ if (net_ratelimit()) { -+ dev_warn(&dev->dev, -+ "received packet with skb->dev == NULL\n"); -+ dump_stack(); -+ } -+ -+ skb->dev = dev; -+ } -+ -+ /* Disables softirqs for lock below */ -+ rcu_read_lock_bh(); -+ -+ /* Multi-queue selection */ -+ orig_queue_index = skb_get_queue_mapping(skb); -+ txq = imq_select_queue(dev, skb); -+ -+ q = rcu_dereference(txq->qdisc); -+ if (unlikely(!q->enqueue)) -+ goto packet_not_eaten_by_imq_dev; -+ -+ root_lock = qdisc_lock(q); -+ spin_lock(root_lock); -+ -+ users = atomic_read(&skb->users); -+ -+ skb_shared = skb_get(skb); /* increase reference count by one */ -+ -+ /* backup skb->cb, as qdisc layer will overwrite it */ -+ skb_save_cb(skb_shared); -+ qdisc_enqueue_root(skb_shared, q); /* might kfree_skb */ -+ -+ if (likely(atomic_read(&skb_shared->users) == users + 1)) { -+ kfree_skb(skb_shared); /* decrease reference count by one */ -+ -+ skb->destructor = &imq_skb_destructor; -+ -+ /* cloned? */ -+ if (unlikely(skb_orig)) -+ kfree_skb(skb_orig); /* free original */ -+ -+ spin_unlock(root_lock); -+ rcu_read_unlock_bh(); -+ -+ /* schedule qdisc dequeue */ -+ __netif_schedule(q); -+ -+ retval = 0; -+ goto out; -+ } else { -+ skb_restore_cb(skb_shared); /* restore skb->cb */ -+ skb->nf_queue_entry = NULL; -+ /* -+ * qdisc dropped packet and decreased skb reference count of -+ * skb, so we don't really want to and try refree as that would -+ * actually destroy the skb. -+ */ -+ spin_unlock(root_lock); -+ goto packet_not_eaten_by_imq_dev; -+ } -+ -+packet_not_eaten_by_imq_dev: -+ skb_set_queue_mapping(skb, orig_queue_index); -+ rcu_read_unlock_bh(); -+ -+ /* cloned? restore original */ -+ if (unlikely(skb_orig)) { -+ kfree_skb(skb); -+ entry->skb = skb_orig; -+ } -+ retval = -1; -+out: -+ return retval; -+} -+ -+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff *pskb, -+ const struct net_device *indev, -+ const struct net_device *outdev, -+ int (*okfn)(struct sk_buff *)) -+{ -+ return (pskb->imq_flags & IMQ_F_ENQUEUE) ? NF_IMQ_QUEUE : NF_ACCEPT; -+} -+ -+static int imq_close(struct net_device *dev) -+{ -+ netif_stop_queue(dev); -+ return 0; -+} -+ -+static int imq_open(struct net_device *dev) -+{ -+ netif_start_queue(dev); -+ return 0; -+} -+ -+static const struct net_device_ops imq_netdev_ops = { -+ .ndo_open = imq_open, -+ .ndo_stop = imq_close, -+ .ndo_start_xmit = imq_dev_xmit, -+ .ndo_get_stats = imq_get_stats, -+}; -+ -+static void imq_setup(struct net_device *dev) -+{ -+ dev->netdev_ops = &imq_netdev_ops; -+ dev->type = ARPHRD_VOID; -+ dev->mtu = 16000; /* too small? */ -+ dev->tx_queue_len = 11000; /* too big? */ -+ dev->flags = IFF_NOARP; -+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | -+ NETIF_F_GSO | NETIF_F_HW_CSUM | -+ NETIF_F_HIGHDMA; -+ dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | -+ IFF_TX_SKB_SHARING); -+} -+ -+static int imq_validate(struct nlattr *tb[], struct nlattr *data[]) -+{ -+ int ret = 0; -+ -+ if (tb[IFLA_ADDRESS]) { -+ if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN) { -+ ret = -EINVAL; -+ goto end; -+ } -+ if (!is_valid_ether_addr(nla_data(tb[IFLA_ADDRESS]))) { -+ ret = -EADDRNOTAVAIL; -+ goto end; -+ } -+ } -+ return 0; -+end: -+ pr_warn("IMQ: imq_validate failed (%d)\n", ret); -+ return ret; -+} -+ -+static struct rtnl_link_ops imq_link_ops __read_mostly = { -+ .kind = "imq", -+ .priv_size = 0, -+ .setup = imq_setup, -+ .validate = imq_validate, -+}; -+ -+static const struct nf_queue_handler imq_nfqh = { -+ .outfn = imq_nf_queue, -+}; -+ -+static int __init imq_init_hooks(void) -+{ -+ int ret; -+ -+ nf_register_queue_imq_handler(&imq_nfqh); -+ -+ ret = nf_register_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ if (ret < 0) -+ nf_unregister_queue_imq_handler(); -+ -+ return ret; -+} -+ -+static int __init imq_init_one(int index) -+{ -+ struct net_device *dev; -+ int ret; -+ -+ dev = alloc_netdev_mq(0, "imq%d", imq_setup, numqueues); -+ if (!dev) -+ return -ENOMEM; -+ -+ ret = dev_alloc_name(dev, dev->name); -+ if (ret < 0) -+ goto fail; -+ -+ dev->rtnl_link_ops = &imq_link_ops; -+ ret = register_netdevice(dev); -+ if (ret < 0) -+ goto fail; -+ -+ return 0; -+fail: -+ free_netdev(dev); -+ return ret; -+} -+ -+static int __init imq_init_devs(void) -+{ -+ int err, i; -+ -+ if (numdevs < 1 || numdevs > IMQ_MAX_DEVS) { -+ pr_err("IMQ: numdevs has to be betweed 1 and %u\n", -+ IMQ_MAX_DEVS); -+ return -EINVAL; -+ } -+ -+ if (numqueues < 1 || numqueues > IMQ_MAX_QUEUES) { -+ pr_err("IMQ: numqueues has to be betweed 1 and %u\n", -+ IMQ_MAX_QUEUES); -+ return -EINVAL; -+ } -+ -+ get_random_bytes(&imq_hashrnd, sizeof(imq_hashrnd)); -+ -+ rtnl_lock(); -+ err = __rtnl_link_register(&imq_link_ops); -+ -+ for (i = 0; i < numdevs && !err; i++) -+ err = imq_init_one(i); -+ -+ if (err) { -+ __rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ } -+ rtnl_unlock(); -+ -+ return err; -+} -+ -+static int __init imq_init_module(void) -+{ -+ int err; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS > 16); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS < 2); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS - 1 > IMQ_F_IFMASK); -+#endif -+ -+ err = imq_init_devs(); -+ if (err) { -+ pr_err("IMQ: Error trying imq_init_devs(net)\n"); -+ return err; -+ } -+ -+ err = imq_init_hooks(); -+ if (err) { -+ pr_err(KERN_ERR "IMQ: Error trying imq_init_hooks()\n"); -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ return err; -+ } -+ -+ pr_info("IMQ driver loaded successfully. (numdevs = %d, numqueues = %d)\n", -+ numdevs, numqueues); -+ -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ pr_info("\tHooking IMQ before NAT on PREROUTING.\n"); -+#else -+ pr_info("\tHooking IMQ after NAT on PREROUTING.\n"); -+#endif -+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ pr_info("\tHooking IMQ before NAT on POSTROUTING.\n"); -+#else -+ pr_info("\tHooking IMQ after NAT on POSTROUTING.\n"); -+#endif -+ -+ return 0; -+} -+ -+static void __exit imq_unhook(void) -+{ -+ nf_unregister_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ nf_unregister_queue_imq_handler(); -+} -+ -+static void __exit imq_cleanup_devs(void) -+{ -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+} -+ -+static void __exit imq_exit_module(void) -+{ -+ imq_unhook(); -+ imq_cleanup_devs(); -+ pr_info("IMQ driver unloaded successfully.\n"); -+} -+ -+module_init(imq_init_module); -+module_exit(imq_exit_module); -+ -+module_param(numdevs, int, 0); -+module_param(numqueues, int, 0); -+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will be created)"); -+MODULE_PARM_DESC(numqueues, "number of queues per IMQ device"); -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_RTNL_LINK("imq"); -+ -diff -Naur linux-3.10.30.org/drivers/net/Kconfig linux-3.10.30/drivers/net/Kconfig ---- linux-3.10.30.org/drivers/net/Kconfig 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/drivers/net/Kconfig 2014-02-14 20:29:05.379402305 +0100 -@@ -207,6 +207,125 @@ - depends on RIONET - default "128" - -+config IMQ -+ tristate "IMQ (intermediate queueing device) support" -+ depends on NETDEVICES && NETFILTER -+ ---help--- -+ The IMQ device(s) is used as placeholder for QoS queueing -+ disciplines. Every packet entering/leaving the IP stack can be -+ directed through the IMQ device where it's enqueued/dequeued to the -+ attached qdisc. This allows you to treat network devices as classes -+ and distribute bandwidth among them. Iptables is used to specify -+ through which IMQ device, if any, packets travel. -+ -+ More information at: http://www.linuximq.net/ -+ -+ To compile this driver as a module, choose M here: the module -+ will be called imq. If unsure, say N. -+ -+choice -+ prompt "IMQ behavior (PRE/POSTROUTING)" -+ depends on IMQ -+ default IMQ_BEHAVIOR_AB -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ IMQ can work in any of the following ways: -+ -+ PREROUTING | POSTROUTING -+ -----------------|------------------- -+ #1 After NAT | After NAT -+ #2 After NAT | Before NAT -+ #3 Before NAT | After NAT -+ #4 Before NAT | Before NAT -+ -+ The default behavior is to hook before NAT on PREROUTING -+ and after NAT on POSTROUTING (#3). -+ -+ This settings are specially usefull when trying to use IMQ -+ to shape NATed clients. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AA -+ bool "IMQ AA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AB -+ bool "IMQ AB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BA -+ bool "IMQ BA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BB -+ bool "IMQ BB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+endchoice -+ -+config IMQ_NUM_DEVS -+ int "Number of IMQ devices" -+ range 2 16 -+ depends on IMQ -+ default "16" -+ help -+ This setting defines how many IMQ devices will be created. -+ -+ The default value is 16. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ - config TUN - tristate "Universal TUN/TAP device driver support" - select CRC32 -diff -Naur linux-3.10.30.org/drivers/net/Makefile linux-3.10.30/drivers/net/Makefile ---- linux-3.10.30.org/drivers/net/Makefile 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/drivers/net/Makefile 2014-02-14 20:29:05.379402305 +0100 -@@ -9,6 +9,7 @@ - obj-$(CONFIG_DUMMY) += dummy.o - obj-$(CONFIG_EQUALIZER) += eql.o - obj-$(CONFIG_IFB) += ifb.o -+obj-$(CONFIG_IMQ) += imq.o - obj-$(CONFIG_MACVLAN) += macvlan.o - obj-$(CONFIG_MACVTAP) += macvtap.o - obj-$(CONFIG_MII) += mii.o -diff -Naur linux-3.10.30.org/include/linux/imq.h linux-3.10.30/include/linux/imq.h ---- linux-3.10.30.org/include/linux/imq.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/include/linux/imq.h 2014-02-14 20:29:05.379402305 +0100 -@@ -0,0 +1,13 @@ -+#ifndef _IMQ_H -+#define _IMQ_H -+ -+/* IFMASK (16 device indexes, 0 to 15) and flag(s) fit in 5 bits */ -+#define IMQ_F_BITS 5 -+ -+#define IMQ_F_IFMASK 0x0f -+#define IMQ_F_ENQUEUE 0x10 -+ -+#define IMQ_MAX_DEVS (IMQ_F_IFMASK + 1) -+ -+#endif /* _IMQ_H */ -+ -diff -Naur linux-3.10.30.org/include/linux/netfilter/xt_IMQ.h linux-3.10.30/include/linux/netfilter/xt_IMQ.h ---- linux-3.10.30.org/include/linux/netfilter/xt_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/include/linux/netfilter/xt_IMQ.h 2014-02-14 20:29:05.379402305 +0100 -@@ -0,0 +1,9 @@ -+#ifndef _XT_IMQ_H -+#define _XT_IMQ_H -+ -+struct xt_imq_info { -+ unsigned int todev; /* target imq device */ -+}; -+ -+#endif /* _XT_IMQ_H */ -+ -diff -Naur linux-3.10.30.org/include/linux/netfilter_ipv4/ipt_IMQ.h linux-3.10.30/include/linux/netfilter_ipv4/ipt_IMQ.h ---- linux-3.10.30.org/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/include/linux/netfilter_ipv4/ipt_IMQ.h 2014-02-14 20:29:05.379402305 +0100 -@@ -0,0 +1,10 @@ -+#ifndef _IPT_IMQ_H -+#define _IPT_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ipt_imq_info xt_imq_info -+ -+#endif /* _IPT_IMQ_H */ -+ -diff -Naur linux-3.10.30.org/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-3.10.30/include/linux/netfilter_ipv6/ip6t_IMQ.h ---- linux-3.10.30.org/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/include/linux/netfilter_ipv6/ip6t_IMQ.h 2014-02-14 20:29:05.379402305 +0100 -@@ -0,0 +1,10 @@ -+#ifndef _IP6T_IMQ_H -+#define _IP6T_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ip6t_imq_info xt_imq_info -+ -+#endif /* _IP6T_IMQ_H */ -+ -diff -Naur linux-3.10.30.org/include/linux/skbuff.h linux-3.10.30/include/linux/skbuff.h ---- linux-3.10.30.org/include/linux/skbuff.h 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/include/linux/skbuff.h 2014-02-14 20:29:05.379402305 +0100 -@@ -33,6 +33,9 @@ - #include <linux/dma-mapping.h> - #include <linux/netdev_features.h> - #include <net/flow_keys.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - /* Don't change this without changing skb_csum_unnecessary! */ - #define CHECKSUM_NONE 0 -@@ -414,6 +417,9 @@ - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48] __aligned(8); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ void *cb_next; -+#endif - - unsigned long _skb_refdst; - #ifdef CONFIG_XFRM -@@ -449,6 +455,9 @@ - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - struct nf_conntrack *nfct; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ struct nf_queue_entry *nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; - #endif -@@ -487,7 +496,9 @@ - __u8 encapsulation:1; - /* 7/9 bit hole (depending on ndisc_nodetype presence) */ - kmemcheck_bitfield_end(flags2); -- -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ __u8 imq_flags:IMQ_F_BITS; -+#endif - #ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; - #endif -@@ -616,7 +627,10 @@ - { - return (struct rtable *)skb_dst(skb); - } -- -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern int skb_save_cb(struct sk_buff *skb); -+extern int skb_restore_cb(struct sk_buff *skb); -+#endif - extern void kfree_skb(struct sk_buff *skb); - extern void kfree_skb_list(struct sk_buff *segs); - extern void skb_tx_error(struct sk_buff *skb); -@@ -2735,6 +2749,10 @@ - nf_conntrack_get(src->nfct); - dst->nfctinfo = src->nfctinfo; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ dst->imq_flags = src->imq_flags; -+ dst->nf_queue_entry = src->nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - dst->nf_bridge = src->nf_bridge; - nf_bridge_get(src->nf_bridge); -diff -Naur linux-3.10.30.org/include/net/netfilter/nf_queue.h linux-3.10.30/include/net/netfilter/nf_queue.h ---- linux-3.10.30.org/include/net/netfilter/nf_queue.h 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/include/net/netfilter/nf_queue.h 2014-02-14 20:29:05.382736249 +0100 -@@ -29,6 +29,12 @@ - void nf_register_queue_handler(const struct nf_queue_handler *qh); - void nf_unregister_queue_handler(void); - extern void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict); -+extern void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern void nf_register_queue_imq_handler(const struct nf_queue_handler *qh); -+extern void nf_unregister_queue_imq_handler(void); -+#endif - - bool nf_queue_entry_get_refs(struct nf_queue_entry *entry); - void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -diff -Naur linux-3.10.30.org/include/uapi/linux/netfilter.h linux-3.10.30/include/uapi/linux/netfilter.h ---- linux-3.10.30.org/include/uapi/linux/netfilter.h 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/include/uapi/linux/netfilter.h 2014-02-14 20:29:05.382736249 +0100 -@@ -13,7 +13,8 @@ - #define NF_QUEUE 3 - #define NF_REPEAT 4 - #define NF_STOP 5 --#define NF_MAX_VERDICT NF_STOP -+#define NF_IMQ_QUEUE 6 -+#define NF_MAX_VERDICT NF_IMQ_QUEUE - - /* we overload the higher bits for encoding auxiliary data such as the queue - * number or errno values. Not nice, but better than additional function -diff -Naur linux-3.10.30.org/net/core/dev.c linux-3.10.30/net/core/dev.c ---- linux-3.10.30.org/net/core/dev.c 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/core/dev.c 2014-02-14 20:29:05.382736249 +0100 -@@ -129,6 +129,9 @@ - #include <linux/inetdevice.h> - #include <linux/cpu_rmap.h> - #include <linux/static_key.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - #include "net-sysfs.h" - -@@ -2573,7 +2576,12 @@ - } - } - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ if (!list_empty(&ptype_all) && -+ !(skb->imq_flags & IMQ_F_ENQUEUE)) -+#else - if (!list_empty(&ptype_all)) -+#endif - dev_queue_xmit_nit(skb, dev); - - skb_len = skb->len; -diff -Naur linux-3.10.30.org/net/core/skbuff.c linux-3.10.30/net/core/skbuff.c ---- linux-3.10.30.org/net/core/skbuff.c 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/core/skbuff.c 2014-02-14 21:47:17.286039229 +0100 -@@ -73,6 +73,9 @@ - - struct kmem_cache *skbuff_head_cache __read_mostly; - static struct kmem_cache *skbuff_fclone_cache __read_mostly; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static struct kmem_cache *skbuff_cb_store_cache __read_mostly; -+#endif - - /** - * skb_panic - private function for out-of-line support -@@ -552,6 +555,29 @@ - WARN_ON(in_irq()); - skb->destructor(skb); - } -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ /* -+ * This should not happen. When it does, avoid memleak by restoring -+ * the chain of cb-backups. -+ */ -+ while (skb->cb_next != NULL) { -+ if (net_ratelimit()) -+ pr_warn("IMQ: kfree_skb: skb->cb_next: %08x\n", -+ (unsigned int)skb->cb_next); -+ -+ skb_restore_cb(skb); -+ } -+ /* -+ * This should not happen either, nf_queue_entry is nullified in -+ * imq_dev_xmit(). If we have non-NULL nf_queue_entry then we are -+ * leaking entry pointers, maybe memory. We don't know if this is -+ * pointer to already freed memory, or should this be freed. -+ * If this happens we need to add refcounting, etc for nf_queue_entry. -+ */ -+ if (skb->nf_queue_entry && net_ratelimit()) -+ pr_warn("%s\n", "IMQ: kfree_skb: skb->nf_queue_entry != NULL"); -+#endif -+ - #if IS_ENABLED(CONFIG_NF_CONNTRACK) - nf_conntrack_put(skb->nfct); - #endif -@@ -683,6 +709,10 @@ - new->sp = secpath_get(old->sp); - #endif - memcpy(new->cb, old->cb, sizeof(old->cb)); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ new->cb_next = NULL; -+ /*skb_copy_stored_cb(new, old);*/ -+#endif - new->csum = old->csum; - new->local_df = old->local_df; - new->pkt_type = old->pkt_type; -@@ -3050,6 +3080,15 @@ - } - EXPORT_SYMBOL_GPL(skb_gro_receive); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+/* Control buffer save/restore for IMQ devices */ -+struct skb_cb_table { -+ char cb[48] __aligned(8); -+ void *cb_next; -+ atomic_t refcnt; -+}; -+#endif -+ - void __init skb_init(void) - { - skbuff_head_cache = kmem_cache_create("skbuff_head_cache", -@@ -3063,6 +3102,13 @@ - 0, - SLAB_HWCACHE_ALIGN|SLAB_PANIC, - NULL); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skbuff_cb_store_cache = kmem_cache_create("skbuff_cb_store_cache", -+ sizeof(struct skb_cb_table), -+ 0, -+ SLAB_HWCACHE_ALIGN|SLAB_PANIC, -+ NULL); -+#endif - } - - /** -@@ -3348,6 +3394,76 @@ - EXPORT_SYMBOL_GPL(skb_complete_wifi_ack); - - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static DEFINE_SPINLOCK(skb_cb_store_lock); -+ -+int skb_save_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ next = kmem_cache_alloc(skbuff_cb_store_cache, GFP_ATOMIC); -+ if (!next) -+ return -ENOMEM; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(next->cb, skb->cb, sizeof(skb->cb)); -+ next->cb_next = skb->cb_next; -+ -+ atomic_set(&next->refcnt, 1); -+ -+ skb->cb_next = next; -+ return 0; -+} -+EXPORT_SYMBOL(skb_save_cb); -+ -+int skb_restore_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ if (!skb->cb_next) -+ return 0; -+ -+ next = skb->cb_next; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(skb->cb, next->cb, sizeof(skb->cb)); -+ skb->cb_next = next->cb_next; -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ if (atomic_dec_and_test(&next->refcnt)) -+ kmem_cache_free(skbuff_cb_store_cache, next); -+ -+ spin_unlock(&skb_cb_store_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(skb_restore_cb); -+ -+static void skb_copy_stored_cb(struct sk_buff *new, const struct sk_buff *__old) -+{ -+ struct skb_cb_table *next; -+ struct sk_buff *old; -+ -+ if (!__old->cb_next) { -+ new->cb_next = NULL; -+ return; -+ } -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ old = (struct sk_buff *)__old; -+ -+ next = old->cb_next; -+ atomic_inc(&next->refcnt); -+ new->cb_next = next; -+ -+ spin_unlock(&skb_cb_store_lock); -+} -+#endif -+ - /** - * skb_partial_csum_set - set up and verify partial csum values for packet - * @skb: the skb to set -diff -Naur linux-3.10.30.org/net/ipv6/ip6_output.c linux-3.10.30/net/ipv6/ip6_output.c ---- linux-3.10.30.org/net/ipv6/ip6_output.c 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/ipv6/ip6_output.c 2014-02-14 20:29:05.392738001 +0100 -@@ -89,9 +89,6 @@ - struct in6_addr *nexthop; - int ret; - -- skb->protocol = htons(ETH_P_IPV6); -- skb->dev = dev; -- - if (ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr)) { - struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); - -@@ -168,6 +165,13 @@ - return 0; - } - -+ /* -+ * IMQ-patch: moved setting skb->dev and skb->protocol from -+ * ip6_finish_output2 to fix crashing at netif_skb_features(). -+ */ -+ skb->protocol = htons(ETH_P_IPV6); -+ skb->dev = dev; -+ - return NF_HOOK_COND(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL, dev, - ip6_finish_output, - !(IP6CB(skb)->flags & IP6SKB_REROUTED)); -diff -Naur linux-3.10.30.org/net/ipv6/ip6_output.c.orig linux-3.10.30/net/ipv6/ip6_output.c.orig ---- linux-3.10.30.org/net/ipv6/ip6_output.c.orig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/net/ipv6/ip6_output.c.orig 2014-02-14 20:29:05.392738001 +0100 -@@ -0,0 +1,1580 @@ -+/* -+ * IPv6 output functions -+ * Linux INET6 implementation -+ * -+ * Authors: -+ * Pedro Roque roque@di.fc.ul.pt -+ * -+ * Based on linux/net/ipv4/ip_output.c -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Changes: -+ * A.N.Kuznetsov : airthmetics in fragmentation. -+ * extension headers are implemented. -+ * route changes now work. -+ * ip6_forward does not confuse sniffers. -+ * etc. -+ * -+ * H. von Brand : Added missing #include <linux/string.h> -+ * Imran Patel : frag id should be in NBO -+ * Kazunori MIYAZAWA @USAGI -+ * : add ip6_append_data and related functions -+ * for datagram xmit -+ */ -+ -+#include <linux/errno.h> -+#include <linux/kernel.h> -+#include <linux/string.h> -+#include <linux/socket.h> -+#include <linux/net.h> -+#include <linux/netdevice.h> -+#include <linux/if_arp.h> -+#include <linux/in6.h> -+#include <linux/tcp.h> -+#include <linux/route.h> -+#include <linux/module.h> -+#include <linux/slab.h> -+ -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv6.h> -+ -+#include <net/sock.h> -+#include <net/snmp.h> -+ -+#include <net/ipv6.h> -+#include <net/ndisc.h> -+#include <net/protocol.h> -+#include <net/ip6_route.h> -+#include <net/addrconf.h> -+#include <net/rawv6.h> -+#include <net/icmp.h> -+#include <net/xfrm.h> -+#include <net/checksum.h> -+#include <linux/mroute6.h> -+ -+int __ip6_local_out(struct sk_buff *skb) -+{ -+ int len; -+ -+ len = skb->len - sizeof(struct ipv6hdr); -+ if (len > IPV6_MAXPLEN) -+ len = 0; -+ ipv6_hdr(skb)->payload_len = htons(len); -+ -+ return nf_hook(NFPROTO_IPV6, NF_INET_LOCAL_OUT, skb, NULL, -+ skb_dst(skb)->dev, dst_output); -+} -+ -+int ip6_local_out(struct sk_buff *skb) -+{ -+ int err; -+ -+ err = __ip6_local_out(skb); -+ if (likely(err == 1)) -+ err = dst_output(skb); -+ -+ return err; -+} -+EXPORT_SYMBOL_GPL(ip6_local_out); -+ -+static int ip6_finish_output2(struct sk_buff *skb) -+{ -+ struct dst_entry *dst = skb_dst(skb); -+ struct net_device *dev = dst->dev; -+ struct neighbour *neigh; -+ struct in6_addr *nexthop; -+ int ret; -+ -+ skb->protocol = htons(ETH_P_IPV6); -+ skb->dev = dev; -+ -+ if (ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr)) { -+ struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); -+ -+ if (!(dev->flags & IFF_LOOPBACK) && sk_mc_loop(skb->sk) && -+ ((mroute6_socket(dev_net(dev), skb) && -+ !(IP6CB(skb)->flags & IP6SKB_FORWARDED)) || -+ ipv6_chk_mcast_addr(dev, &ipv6_hdr(skb)->daddr, -+ &ipv6_hdr(skb)->saddr))) { -+ struct sk_buff *newskb = skb_clone(skb, GFP_ATOMIC); -+ -+ /* Do not check for IFF_ALLMULTI; multicast routing -+ is not supported in any case. -+ */ -+ if (newskb) -+ NF_HOOK(NFPROTO_IPV6, NF_INET_POST_ROUTING, -+ newskb, NULL, newskb->dev, -+ dev_loopback_xmit); -+ -+ if (ipv6_hdr(skb)->hop_limit == 0) { -+ IP6_INC_STATS(dev_net(dev), idev, -+ IPSTATS_MIB_OUTDISCARDS); -+ kfree_skb(skb); -+ return 0; -+ } -+ } -+ -+ IP6_UPD_PO_STATS(dev_net(dev), idev, IPSTATS_MIB_OUTMCAST, -+ skb->len); -+ -+ if (IPV6_ADDR_MC_SCOPE(&ipv6_hdr(skb)->daddr) <= -+ IPV6_ADDR_SCOPE_NODELOCAL && -+ !(dev->flags & IFF_LOOPBACK)) { -+ kfree_skb(skb); -+ return 0; -+ } -+ } -+ -+ rcu_read_lock_bh(); -+ nexthop = rt6_nexthop((struct rt6_info *)dst); -+ neigh = __ipv6_neigh_lookup_noref(dst->dev, nexthop); -+ if (unlikely(!neigh)) -+ neigh = __neigh_create(&nd_tbl, nexthop, dst->dev, false); -+ if (!IS_ERR(neigh)) { -+ ret = dst_neigh_output(dst, neigh, skb); -+ rcu_read_unlock_bh(); -+ return ret; -+ } -+ rcu_read_unlock_bh(); -+ -+ IP6_INC_STATS(dev_net(dst->dev), -+ ip6_dst_idev(dst), IPSTATS_MIB_OUTNOROUTES); -+ kfree_skb(skb); -+ return -EINVAL; -+} -+ -+static int ip6_finish_output(struct sk_buff *skb) -+{ -+ if ((skb->len > ip6_skb_dst_mtu(skb) && !skb_is_gso(skb)) || -+ dst_allfrag(skb_dst(skb)) || -+ (IP6CB(skb)->frag_max_size && skb->len > IP6CB(skb)->frag_max_size)) -+ return ip6_fragment(skb, ip6_finish_output2); -+ else -+ return ip6_finish_output2(skb); -+} -+ -+int ip6_output(struct sk_buff *skb) -+{ -+ struct net_device *dev = skb_dst(skb)->dev; -+ struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); -+ if (unlikely(idev->cnf.disable_ipv6)) { -+ IP6_INC_STATS(dev_net(dev), idev, -+ IPSTATS_MIB_OUTDISCARDS); -+ kfree_skb(skb); -+ return 0; -+ } -+ -+ return NF_HOOK_COND(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL, dev, -+ ip6_finish_output, -+ !(IP6CB(skb)->flags & IP6SKB_REROUTED)); -+} -+ -+/* -+ * xmit an sk_buff (used by TCP, SCTP and DCCP) -+ */ -+ -+int ip6_xmit(struct sock *sk, struct sk_buff *skb, struct flowi6 *fl6, -+ struct ipv6_txoptions *opt, int tclass) -+{ -+ struct net *net = sock_net(sk); -+ struct ipv6_pinfo *np = inet6_sk(sk); -+ struct in6_addr *first_hop = &fl6->daddr; -+ struct dst_entry *dst = skb_dst(skb); -+ struct ipv6hdr *hdr; -+ u8 proto = fl6->flowi6_proto; -+ int seg_len = skb->len; -+ int hlimit = -1; -+ u32 mtu; -+ -+ if (opt) { -+ unsigned int head_room; -+ -+ /* First: exthdrs may take lots of space (~8K for now) -+ MAX_HEADER is not enough. -+ */ -+ head_room = opt->opt_nflen + opt->opt_flen; -+ seg_len += head_room; -+ head_room += sizeof(struct ipv6hdr) + LL_RESERVED_SPACE(dst->dev); -+ -+ if (skb_headroom(skb) < head_room) { -+ struct sk_buff *skb2 = skb_realloc_headroom(skb, head_room); -+ if (skb2 == NULL) { -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_OUTDISCARDS); -+ kfree_skb(skb); -+ return -ENOBUFS; -+ } -+ consume_skb(skb); -+ skb = skb2; -+ skb_set_owner_w(skb, sk); -+ } -+ if (opt->opt_flen) -+ ipv6_push_frag_opts(skb, opt, &proto); -+ if (opt->opt_nflen) -+ ipv6_push_nfrag_opts(skb, opt, &proto, &first_hop); -+ } -+ -+ skb_push(skb, sizeof(struct ipv6hdr)); -+ skb_reset_network_header(skb); -+ hdr = ipv6_hdr(skb); -+ -+ /* -+ * Fill in the IPv6 header -+ */ -+ if (np) -+ hlimit = np->hop_limit; -+ if (hlimit < 0) -+ hlimit = ip6_dst_hoplimit(dst); -+ -+ ip6_flow_hdr(hdr, tclass, fl6->flowlabel); -+ -+ hdr->payload_len = htons(seg_len); -+ hdr->nexthdr = proto; -+ hdr->hop_limit = hlimit; -+ -+ hdr->saddr = fl6->saddr; -+ hdr->daddr = *first_hop; -+ -+ skb->priority = sk->sk_priority; -+ skb->mark = sk->sk_mark; -+ -+ mtu = dst_mtu(dst); -+ if ((skb->len <= mtu) || skb->local_df || skb_is_gso(skb)) { -+ IP6_UPD_PO_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_OUT, skb->len); -+ return NF_HOOK(NFPROTO_IPV6, NF_INET_LOCAL_OUT, skb, NULL, -+ dst->dev, dst_output); -+ } -+ -+ skb->dev = dst->dev; -+ ipv6_local_error(sk, EMSGSIZE, fl6, mtu); -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), IPSTATS_MIB_FRAGFAILS); -+ kfree_skb(skb); -+ return -EMSGSIZE; -+} -+ -+EXPORT_SYMBOL(ip6_xmit); -+ -+static int ip6_call_ra_chain(struct sk_buff *skb, int sel) -+{ -+ struct ip6_ra_chain *ra; -+ struct sock *last = NULL; -+ -+ read_lock(&ip6_ra_lock); -+ for (ra = ip6_ra_chain; ra; ra = ra->next) { -+ struct sock *sk = ra->sk; -+ if (sk && ra->sel == sel && -+ (!sk->sk_bound_dev_if || -+ sk->sk_bound_dev_if == skb->dev->ifindex)) { -+ if (last) { -+ struct sk_buff *skb2 = skb_clone(skb, GFP_ATOMIC); -+ if (skb2) -+ rawv6_rcv(last, skb2); -+ } -+ last = sk; -+ } -+ } -+ -+ if (last) { -+ rawv6_rcv(last, skb); -+ read_unlock(&ip6_ra_lock); -+ return 1; -+ } -+ read_unlock(&ip6_ra_lock); -+ return 0; -+} -+ -+static int ip6_forward_proxy_check(struct sk_buff *skb) -+{ -+ struct ipv6hdr *hdr = ipv6_hdr(skb); -+ u8 nexthdr = hdr->nexthdr; -+ __be16 frag_off; -+ int offset; -+ -+ if (ipv6_ext_hdr(nexthdr)) { -+ offset = ipv6_skip_exthdr(skb, sizeof(*hdr), &nexthdr, &frag_off); -+ if (offset < 0) -+ return 0; -+ } else -+ offset = sizeof(struct ipv6hdr); -+ -+ if (nexthdr == IPPROTO_ICMPV6) { -+ struct icmp6hdr *icmp6; -+ -+ if (!pskb_may_pull(skb, (skb_network_header(skb) + -+ offset + 1 - skb->data))) -+ return 0; -+ -+ icmp6 = (struct icmp6hdr *)(skb_network_header(skb) + offset); -+ -+ switch (icmp6->icmp6_type) { -+ case NDISC_ROUTER_SOLICITATION: -+ case NDISC_ROUTER_ADVERTISEMENT: -+ case NDISC_NEIGHBOUR_SOLICITATION: -+ case NDISC_NEIGHBOUR_ADVERTISEMENT: -+ case NDISC_REDIRECT: -+ /* For reaction involving unicast neighbor discovery -+ * message destined to the proxied address, pass it to -+ * input function. -+ */ -+ return 1; -+ default: -+ break; -+ } -+ } -+ -+ /* -+ * The proxying router can't forward traffic sent to a link-local -+ * address, so signal the sender and discard the packet. This -+ * behavior is clarified by the MIPv6 specification. -+ */ -+ if (ipv6_addr_type(&hdr->daddr) & IPV6_ADDR_LINKLOCAL) { -+ dst_link_failure(skb); -+ return -1; -+ } -+ -+ return 0; -+} -+ -+static inline int ip6_forward_finish(struct sk_buff *skb) -+{ -+ return dst_output(skb); -+} -+ -+int ip6_forward(struct sk_buff *skb) -+{ -+ struct dst_entry *dst = skb_dst(skb); -+ struct ipv6hdr *hdr = ipv6_hdr(skb); -+ struct inet6_skb_parm *opt = IP6CB(skb); -+ struct net *net = dev_net(dst->dev); -+ u32 mtu; -+ -+ if (net->ipv6.devconf_all->forwarding == 0) -+ goto error; -+ -+ if (skb_warn_if_lro(skb)) -+ goto drop; -+ -+ if (!xfrm6_policy_check(NULL, XFRM_POLICY_FWD, skb)) { -+ IP6_INC_STATS(net, ip6_dst_idev(dst), IPSTATS_MIB_INDISCARDS); -+ goto drop; -+ } -+ -+ if (skb->pkt_type != PACKET_HOST) -+ goto drop; -+ -+ skb_forward_csum(skb); -+ -+ /* -+ * We DO NOT make any processing on -+ * RA packets, pushing them to user level AS IS -+ * without ane WARRANTY that application will be able -+ * to interpret them. The reason is that we -+ * cannot make anything clever here. -+ * -+ * We are not end-node, so that if packet contains -+ * AH/ESP, we cannot make anything. -+ * Defragmentation also would be mistake, RA packets -+ * cannot be fragmented, because there is no warranty -+ * that different fragments will go along one path. --ANK -+ */ -+ if (unlikely(opt->flags & IP6SKB_ROUTERALERT)) { -+ if (ip6_call_ra_chain(skb, ntohs(opt->ra))) -+ return 0; -+ } -+ -+ /* -+ * check and decrement ttl -+ */ -+ if (hdr->hop_limit <= 1) { -+ /* Force OUTPUT device used as source address */ -+ skb->dev = dst->dev; -+ icmpv6_send(skb, ICMPV6_TIME_EXCEED, ICMPV6_EXC_HOPLIMIT, 0); -+ IP6_INC_STATS_BH(net, -+ ip6_dst_idev(dst), IPSTATS_MIB_INHDRERRORS); -+ -+ kfree_skb(skb); -+ return -ETIMEDOUT; -+ } -+ -+ /* XXX: idev->cnf.proxy_ndp? */ -+ if (net->ipv6.devconf_all->proxy_ndp && -+ pneigh_lookup(&nd_tbl, net, &hdr->daddr, skb->dev, 0)) { -+ int proxied = ip6_forward_proxy_check(skb); -+ if (proxied > 0) -+ return ip6_input(skb); -+ else if (proxied < 0) { -+ IP6_INC_STATS(net, ip6_dst_idev(dst), -+ IPSTATS_MIB_INDISCARDS); -+ goto drop; -+ } -+ } -+ -+ if (!xfrm6_route_forward(skb)) { -+ IP6_INC_STATS(net, ip6_dst_idev(dst), IPSTATS_MIB_INDISCARDS); -+ goto drop; -+ } -+ dst = skb_dst(skb); -+ -+ /* IPv6 specs say nothing about it, but it is clear that we cannot -+ send redirects to source routed frames. -+ We don't send redirects to frames decapsulated from IPsec. -+ */ -+ if (skb->dev == dst->dev && opt->srcrt == 0 && !skb_sec_path(skb)) { -+ struct in6_addr *target = NULL; -+ struct inet_peer *peer; -+ struct rt6_info *rt; -+ -+ /* -+ * incoming and outgoing devices are the same -+ * send a redirect. -+ */ -+ -+ rt = (struct rt6_info *) dst; -+ if (rt->rt6i_flags & RTF_GATEWAY) -+ target = &rt->rt6i_gateway; -+ else -+ target = &hdr->daddr; -+ -+ peer = inet_getpeer_v6(net->ipv6.peers, &rt->rt6i_dst.addr, 1); -+ -+ /* Limit redirects both by destination (here) -+ and by source (inside ndisc_send_redirect) -+ */ -+ if (inet_peer_xrlim_allow(peer, 1*HZ)) -+ ndisc_send_redirect(skb, target); -+ if (peer) -+ inet_putpeer(peer); -+ } else { -+ int addrtype = ipv6_addr_type(&hdr->saddr); -+ -+ /* This check is security critical. */ -+ if (addrtype == IPV6_ADDR_ANY || -+ addrtype & (IPV6_ADDR_MULTICAST | IPV6_ADDR_LOOPBACK)) -+ goto error; -+ if (addrtype & IPV6_ADDR_LINKLOCAL) { -+ icmpv6_send(skb, ICMPV6_DEST_UNREACH, -+ ICMPV6_NOT_NEIGHBOUR, 0); -+ goto error; -+ } -+ } -+ -+ mtu = dst_mtu(dst); -+ if (mtu < IPV6_MIN_MTU) -+ mtu = IPV6_MIN_MTU; -+ -+ if ((!skb->local_df && skb->len > mtu && !skb_is_gso(skb)) || -+ (IP6CB(skb)->frag_max_size && IP6CB(skb)->frag_max_size > mtu)) { -+ /* Again, force OUTPUT device used as source address */ -+ skb->dev = dst->dev; -+ icmpv6_send(skb, ICMPV6_PKT_TOOBIG, 0, mtu); -+ IP6_INC_STATS_BH(net, -+ ip6_dst_idev(dst), IPSTATS_MIB_INTOOBIGERRORS); -+ IP6_INC_STATS_BH(net, -+ ip6_dst_idev(dst), IPSTATS_MIB_FRAGFAILS); -+ kfree_skb(skb); -+ return -EMSGSIZE; -+ } -+ -+ if (skb_cow(skb, dst->dev->hard_header_len)) { -+ IP6_INC_STATS(net, ip6_dst_idev(dst), IPSTATS_MIB_OUTDISCARDS); -+ goto drop; -+ } -+ -+ hdr = ipv6_hdr(skb); -+ -+ /* Mangling hops number delayed to point after skb COW */ -+ -+ hdr->hop_limit--; -+ -+ IP6_INC_STATS_BH(net, ip6_dst_idev(dst), IPSTATS_MIB_OUTFORWDATAGRAMS); -+ IP6_ADD_STATS_BH(net, ip6_dst_idev(dst), IPSTATS_MIB_OUTOCTETS, skb->len); -+ return NF_HOOK(NFPROTO_IPV6, NF_INET_FORWARD, skb, skb->dev, dst->dev, -+ ip6_forward_finish); -+ -+error: -+ IP6_INC_STATS_BH(net, ip6_dst_idev(dst), IPSTATS_MIB_INADDRERRORS); -+drop: -+ kfree_skb(skb); -+ return -EINVAL; -+} -+ -+static void ip6_copy_metadata(struct sk_buff *to, struct sk_buff *from) -+{ -+ to->pkt_type = from->pkt_type; -+ to->priority = from->priority; -+ to->protocol = from->protocol; -+ skb_dst_drop(to); -+ skb_dst_set(to, dst_clone(skb_dst(from))); -+ to->dev = from->dev; -+ to->mark = from->mark; -+ -+#ifdef CONFIG_NET_SCHED -+ to->tc_index = from->tc_index; -+#endif -+ nf_copy(to, from); -+#if IS_ENABLED(CONFIG_NETFILTER_XT_TARGET_TRACE) -+ to->nf_trace = from->nf_trace; -+#endif -+ skb_copy_secmark(to, from); -+} -+ -+int ip6_fragment(struct sk_buff *skb, int (*output)(struct sk_buff *)) -+{ -+ struct sk_buff *frag; -+ struct rt6_info *rt = (struct rt6_info*)skb_dst(skb); -+ struct ipv6_pinfo *np = skb->sk ? inet6_sk(skb->sk) : NULL; -+ struct ipv6hdr *tmp_hdr; -+ struct frag_hdr *fh; -+ unsigned int mtu, hlen, left, len; -+ int hroom, troom; -+ __be32 frag_id = 0; -+ int ptr, offset = 0, err=0; -+ u8 *prevhdr, nexthdr = 0; -+ struct net *net = dev_net(skb_dst(skb)->dev); -+ -+ hlen = ip6_find_1stfragopt(skb, &prevhdr); -+ nexthdr = *prevhdr; -+ -+ mtu = ip6_skb_dst_mtu(skb); -+ -+ /* We must not fragment if the socket is set to force MTU discovery -+ * or if the skb it not generated by a local socket. -+ */ -+ if (unlikely(!skb->local_df && skb->len > mtu) || -+ (IP6CB(skb)->frag_max_size && -+ IP6CB(skb)->frag_max_size > mtu)) { -+ if (skb->sk && dst_allfrag(skb_dst(skb))) -+ sk_nocaps_add(skb->sk, NETIF_F_GSO_MASK); -+ -+ skb->dev = skb_dst(skb)->dev; -+ icmpv6_send(skb, ICMPV6_PKT_TOOBIG, 0, mtu); -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGFAILS); -+ kfree_skb(skb); -+ return -EMSGSIZE; -+ } -+ -+ if (np && np->frag_size < mtu) { -+ if (np->frag_size) -+ mtu = np->frag_size; -+ } -+ mtu -= hlen + sizeof(struct frag_hdr); -+ -+ if (skb_has_frag_list(skb)) { -+ int first_len = skb_pagelen(skb); -+ struct sk_buff *frag2; -+ -+ if (first_len - hlen > mtu || -+ ((first_len - hlen) & 7) || -+ skb_cloned(skb)) -+ goto slow_path; -+ -+ skb_walk_frags(skb, frag) { -+ /* Correct geometry. */ -+ if (frag->len > mtu || -+ ((frag->len & 7) && frag->next) || -+ skb_headroom(frag) < hlen) -+ goto slow_path_clean; -+ -+ /* Partially cloned skb? */ -+ if (skb_shared(frag)) -+ goto slow_path_clean; -+ -+ BUG_ON(frag->sk); -+ if (skb->sk) { -+ frag->sk = skb->sk; -+ frag->destructor = sock_wfree; -+ } -+ skb->truesize -= frag->truesize; -+ } -+ -+ err = 0; -+ offset = 0; -+ frag = skb_shinfo(skb)->frag_list; -+ skb_frag_list_init(skb); -+ /* BUILD HEADER */ -+ -+ *prevhdr = NEXTHDR_FRAGMENT; -+ tmp_hdr = kmemdup(skb_network_header(skb), hlen, GFP_ATOMIC); -+ if (!tmp_hdr) { -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGFAILS); -+ return -ENOMEM; -+ } -+ -+ __skb_pull(skb, hlen); -+ fh = (struct frag_hdr*)__skb_push(skb, sizeof(struct frag_hdr)); -+ __skb_push(skb, hlen); -+ skb_reset_network_header(skb); -+ memcpy(skb_network_header(skb), tmp_hdr, hlen); -+ -+ ipv6_select_ident(fh, rt); -+ fh->nexthdr = nexthdr; -+ fh->reserved = 0; -+ fh->frag_off = htons(IP6_MF); -+ frag_id = fh->identification; -+ -+ first_len = skb_pagelen(skb); -+ skb->data_len = first_len - skb_headlen(skb); -+ skb->len = first_len; -+ ipv6_hdr(skb)->payload_len = htons(first_len - -+ sizeof(struct ipv6hdr)); -+ -+ dst_hold(&rt->dst); -+ -+ for (;;) { -+ /* Prepare header of the next frame, -+ * before previous one went down. */ -+ if (frag) { -+ frag->ip_summed = CHECKSUM_NONE; -+ skb_reset_transport_header(frag); -+ fh = (struct frag_hdr*)__skb_push(frag, sizeof(struct frag_hdr)); -+ __skb_push(frag, hlen); -+ skb_reset_network_header(frag); -+ memcpy(skb_network_header(frag), tmp_hdr, -+ hlen); -+ offset += skb->len - hlen - sizeof(struct frag_hdr); -+ fh->nexthdr = nexthdr; -+ fh->reserved = 0; -+ fh->frag_off = htons(offset); -+ if (frag->next != NULL) -+ fh->frag_off |= htons(IP6_MF); -+ fh->identification = frag_id; -+ ipv6_hdr(frag)->payload_len = -+ htons(frag->len - -+ sizeof(struct ipv6hdr)); -+ ip6_copy_metadata(frag, skb); -+ } -+ -+ err = output(skb); -+ if(!err) -+ IP6_INC_STATS(net, ip6_dst_idev(&rt->dst), -+ IPSTATS_MIB_FRAGCREATES); -+ -+ if (err || !frag) -+ break; -+ -+ skb = frag; -+ frag = skb->next; -+ skb->next = NULL; -+ } -+ -+ kfree(tmp_hdr); -+ -+ if (err == 0) { -+ IP6_INC_STATS(net, ip6_dst_idev(&rt->dst), -+ IPSTATS_MIB_FRAGOKS); -+ ip6_rt_put(rt); -+ return 0; -+ } -+ -+ while (frag) { -+ skb = frag->next; -+ kfree_skb(frag); -+ frag = skb; -+ } -+ -+ IP6_INC_STATS(net, ip6_dst_idev(&rt->dst), -+ IPSTATS_MIB_FRAGFAILS); -+ ip6_rt_put(rt); -+ return err; -+ -+slow_path_clean: -+ skb_walk_frags(skb, frag2) { -+ if (frag2 == frag) -+ break; -+ frag2->sk = NULL; -+ frag2->destructor = NULL; -+ skb->truesize += frag2->truesize; -+ } -+ } -+ -+slow_path: -+ if ((skb->ip_summed == CHECKSUM_PARTIAL) && -+ skb_checksum_help(skb)) -+ goto fail; -+ -+ left = skb->len - hlen; /* Space per frame */ -+ ptr = hlen; /* Where to start from */ -+ -+ /* -+ * Fragment the datagram. -+ */ -+ -+ *prevhdr = NEXTHDR_FRAGMENT; -+ hroom = LL_RESERVED_SPACE(rt->dst.dev); -+ troom = rt->dst.dev->needed_tailroom; -+ -+ /* -+ * Keep copying data until we run out. -+ */ -+ while(left > 0) { -+ len = left; -+ /* IF: it doesn't fit, use 'mtu' - the data space left */ -+ if (len > mtu) -+ len = mtu; -+ /* IF: we are not sending up to and including the packet end -+ then align the next start on an eight byte boundary */ -+ if (len < left) { -+ len &= ~7; -+ } -+ /* -+ * Allocate buffer. -+ */ -+ -+ if ((frag = alloc_skb(len + hlen + sizeof(struct frag_hdr) + -+ hroom + troom, GFP_ATOMIC)) == NULL) { -+ NETDEBUG(KERN_INFO "IPv6: frag: no memory for new fragment!\n"); -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGFAILS); -+ err = -ENOMEM; -+ goto fail; -+ } -+ -+ /* -+ * Set up data on packet -+ */ -+ -+ ip6_copy_metadata(frag, skb); -+ skb_reserve(frag, hroom); -+ skb_put(frag, len + hlen + sizeof(struct frag_hdr)); -+ skb_reset_network_header(frag); -+ fh = (struct frag_hdr *)(skb_network_header(frag) + hlen); -+ frag->transport_header = (frag->network_header + hlen + -+ sizeof(struct frag_hdr)); -+ -+ /* -+ * Charge the memory for the fragment to any owner -+ * it might possess -+ */ -+ if (skb->sk) -+ skb_set_owner_w(frag, skb->sk); -+ -+ /* -+ * Copy the packet header into the new buffer. -+ */ -+ skb_copy_from_linear_data(skb, skb_network_header(frag), hlen); -+ -+ /* -+ * Build fragment header. -+ */ -+ fh->nexthdr = nexthdr; -+ fh->reserved = 0; -+ if (!frag_id) { -+ ipv6_select_ident(fh, rt); -+ frag_id = fh->identification; -+ } else -+ fh->identification = frag_id; -+ -+ /* -+ * Copy a block of the IP datagram. -+ */ -+ if (skb_copy_bits(skb, ptr, skb_transport_header(frag), len)) -+ BUG(); -+ left -= len; -+ -+ fh->frag_off = htons(offset); -+ if (left > 0) -+ fh->frag_off |= htons(IP6_MF); -+ ipv6_hdr(frag)->payload_len = htons(frag->len - -+ sizeof(struct ipv6hdr)); -+ -+ ptr += len; -+ offset += len; -+ -+ /* -+ * Put this fragment into the sending queue. -+ */ -+ err = output(frag); -+ if (err) -+ goto fail; -+ -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGCREATES); -+ } -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGOKS); -+ consume_skb(skb); -+ return err; -+ -+fail: -+ IP6_INC_STATS(net, ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_FRAGFAILS); -+ kfree_skb(skb); -+ return err; -+} -+ -+static inline int ip6_rt_check(const struct rt6key *rt_key, -+ const struct in6_addr *fl_addr, -+ const struct in6_addr *addr_cache) -+{ -+ return (rt_key->plen != 128 || !ipv6_addr_equal(fl_addr, &rt_key->addr)) && -+ (addr_cache == NULL || !ipv6_addr_equal(fl_addr, addr_cache)); -+} -+ -+static struct dst_entry *ip6_sk_dst_check(struct sock *sk, -+ struct dst_entry *dst, -+ const struct flowi6 *fl6) -+{ -+ struct ipv6_pinfo *np = inet6_sk(sk); -+ struct rt6_info *rt; -+ -+ if (!dst) -+ goto out; -+ -+ if (dst->ops->family != AF_INET6) { -+ dst_release(dst); -+ return NULL; -+ } -+ -+ rt = (struct rt6_info *)dst; -+ /* Yes, checking route validity in not connected -+ * case is not very simple. Take into account, -+ * that we do not support routing by source, TOS, -+ * and MSG_DONTROUTE --ANK (980726) -+ * -+ * 1. ip6_rt_check(): If route was host route, -+ * check that cached destination is current. -+ * If it is network route, we still may -+ * check its validity using saved pointer -+ * to the last used address: daddr_cache. -+ * We do not want to save whole address now, -+ * (because main consumer of this service -+ * is tcp, which has not this problem), -+ * so that the last trick works only on connected -+ * sockets. -+ * 2. oif also should be the same. -+ */ -+ if (ip6_rt_check(&rt->rt6i_dst, &fl6->daddr, np->daddr_cache) || -+#ifdef CONFIG_IPV6_SUBTREES -+ ip6_rt_check(&rt->rt6i_src, &fl6->saddr, np->saddr_cache) || -+#endif -+ (fl6->flowi6_oif && fl6->flowi6_oif != dst->dev->ifindex)) { -+ dst_release(dst); -+ dst = NULL; -+ } -+ -+out: -+ return dst; -+} -+ -+static int ip6_dst_lookup_tail(struct sock *sk, -+ struct dst_entry **dst, struct flowi6 *fl6) -+{ -+ struct net *net = sock_net(sk); -+#ifdef CONFIG_IPV6_OPTIMISTIC_DAD -+ struct neighbour *n; -+ struct rt6_info *rt; -+#endif -+ int err; -+ -+ if (*dst == NULL) -+ *dst = ip6_route_output(net, sk, fl6); -+ -+ if ((err = (*dst)->error)) -+ goto out_err_release; -+ -+ if (ipv6_addr_any(&fl6->saddr)) { -+ struct rt6_info *rt = (struct rt6_info *) *dst; -+ err = ip6_route_get_saddr(net, rt, &fl6->daddr, -+ sk ? inet6_sk(sk)->srcprefs : 0, -+ &fl6->saddr); -+ if (err) -+ goto out_err_release; -+ } -+ -+#ifdef CONFIG_IPV6_OPTIMISTIC_DAD -+ /* -+ * Here if the dst entry we've looked up -+ * has a neighbour entry that is in the INCOMPLETE -+ * state and the src address from the flow is -+ * marked as OPTIMISTIC, we release the found -+ * dst entry and replace it instead with the -+ * dst entry of the nexthop router -+ */ -+ rt = (struct rt6_info *) *dst; -+ rcu_read_lock_bh(); -+ n = __ipv6_neigh_lookup_noref(rt->dst.dev, rt6_nexthop(rt)); -+ err = n && !(n->nud_state & NUD_VALID) ? -EINVAL : 0; -+ rcu_read_unlock_bh(); -+ -+ if (err) { -+ struct inet6_ifaddr *ifp; -+ struct flowi6 fl_gw6; -+ int redirect; -+ -+ ifp = ipv6_get_ifaddr(net, &fl6->saddr, -+ (*dst)->dev, 1); -+ -+ redirect = (ifp && ifp->flags & IFA_F_OPTIMISTIC); -+ if (ifp) -+ in6_ifa_put(ifp); -+ -+ if (redirect) { -+ /* -+ * We need to get the dst entry for the -+ * default router instead -+ */ -+ dst_release(*dst); -+ memcpy(&fl_gw6, fl6, sizeof(struct flowi6)); -+ memset(&fl_gw6.daddr, 0, sizeof(struct in6_addr)); -+ *dst = ip6_route_output(net, sk, &fl_gw6); -+ if ((err = (*dst)->error)) -+ goto out_err_release; -+ } -+ } -+#endif -+ -+ return 0; -+ -+out_err_release: -+ if (err == -ENETUNREACH) -+ IP6_INC_STATS_BH(net, NULL, IPSTATS_MIB_OUTNOROUTES); -+ dst_release(*dst); -+ *dst = NULL; -+ return err; -+} -+ -+/** -+ * ip6_dst_lookup - perform route lookup on flow -+ * @sk: socket which provides route info -+ * @dst: pointer to dst_entry * for result -+ * @fl6: flow to lookup -+ * -+ * This function performs a route lookup on the given flow. -+ * -+ * It returns zero on success, or a standard errno code on error. -+ */ -+int ip6_dst_lookup(struct sock *sk, struct dst_entry **dst, struct flowi6 *fl6) -+{ -+ *dst = NULL; -+ return ip6_dst_lookup_tail(sk, dst, fl6); -+} -+EXPORT_SYMBOL_GPL(ip6_dst_lookup); -+ -+/** -+ * ip6_dst_lookup_flow - perform route lookup on flow with ipsec -+ * @sk: socket which provides route info -+ * @fl6: flow to lookup -+ * @final_dst: final destination address for ipsec lookup -+ * @can_sleep: we are in a sleepable context -+ * -+ * This function performs a route lookup on the given flow. -+ * -+ * It returns a valid dst pointer on success, or a pointer encoded -+ * error code. -+ */ -+struct dst_entry *ip6_dst_lookup_flow(struct sock *sk, struct flowi6 *fl6, -+ const struct in6_addr *final_dst, -+ bool can_sleep) -+{ -+ struct dst_entry *dst = NULL; -+ int err; -+ -+ err = ip6_dst_lookup_tail(sk, &dst, fl6); -+ if (err) -+ return ERR_PTR(err); -+ if (final_dst) -+ fl6->daddr = *final_dst; -+ if (can_sleep) -+ fl6->flowi6_flags |= FLOWI_FLAG_CAN_SLEEP; -+ -+ return xfrm_lookup(sock_net(sk), dst, flowi6_to_flowi(fl6), sk, 0); -+} -+EXPORT_SYMBOL_GPL(ip6_dst_lookup_flow); -+ -+/** -+ * ip6_sk_dst_lookup_flow - perform socket cached route lookup on flow -+ * @sk: socket which provides the dst cache and route info -+ * @fl6: flow to lookup -+ * @final_dst: final destination address for ipsec lookup -+ * @can_sleep: we are in a sleepable context -+ * -+ * This function performs a route lookup on the given flow with the -+ * possibility of using the cached route in the socket if it is valid. -+ * It will take the socket dst lock when operating on the dst cache. -+ * As a result, this function can only be used in process context. -+ * -+ * It returns a valid dst pointer on success, or a pointer encoded -+ * error code. -+ */ -+struct dst_entry *ip6_sk_dst_lookup_flow(struct sock *sk, struct flowi6 *fl6, -+ const struct in6_addr *final_dst, -+ bool can_sleep) -+{ -+ struct dst_entry *dst = sk_dst_check(sk, inet6_sk(sk)->dst_cookie); -+ int err; -+ -+ dst = ip6_sk_dst_check(sk, dst, fl6); -+ -+ err = ip6_dst_lookup_tail(sk, &dst, fl6); -+ if (err) -+ return ERR_PTR(err); -+ if (final_dst) -+ fl6->daddr = *final_dst; -+ if (can_sleep) -+ fl6->flowi6_flags |= FLOWI_FLAG_CAN_SLEEP; -+ -+ return xfrm_lookup(sock_net(sk), dst, flowi6_to_flowi(fl6), sk, 0); -+} -+EXPORT_SYMBOL_GPL(ip6_sk_dst_lookup_flow); -+ -+static inline int ip6_ufo_append_data(struct sock *sk, -+ int getfrag(void *from, char *to, int offset, int len, -+ int odd, struct sk_buff *skb), -+ void *from, int length, int hh_len, int fragheaderlen, -+ int transhdrlen, int mtu,unsigned int flags, -+ struct rt6_info *rt) -+ -+{ -+ struct sk_buff *skb; -+ int err; -+ -+ /* There is support for UDP large send offload by network -+ * device, so create one single skb packet containing complete -+ * udp datagram -+ */ -+ if ((skb = skb_peek_tail(&sk->sk_write_queue)) == NULL) { -+ struct frag_hdr fhdr; -+ -+ skb = sock_alloc_send_skb(sk, -+ hh_len + fragheaderlen + transhdrlen + 20, -+ (flags & MSG_DONTWAIT), &err); -+ if (skb == NULL) -+ return err; -+ -+ /* reserve space for Hardware header */ -+ skb_reserve(skb, hh_len); -+ -+ /* create space for UDP/IP header */ -+ skb_put(skb,fragheaderlen + transhdrlen); -+ -+ /* initialize network header pointer */ -+ skb_reset_network_header(skb); -+ -+ /* initialize protocol header pointer */ -+ skb->transport_header = skb->network_header + fragheaderlen; -+ -+ skb->ip_summed = CHECKSUM_PARTIAL; -+ skb->csum = 0; -+ -+ /* Specify the length of each IPv6 datagram fragment. -+ * It has to be a multiple of 8. -+ */ -+ skb_shinfo(skb)->gso_size = (mtu - fragheaderlen - -+ sizeof(struct frag_hdr)) & ~7; -+ skb_shinfo(skb)->gso_type = SKB_GSO_UDP; -+ ipv6_select_ident(&fhdr, rt); -+ skb_shinfo(skb)->ip6_frag_id = fhdr.identification; -+ __skb_queue_tail(&sk->sk_write_queue, skb); -+ } -+ -+ return skb_append_datato_frags(sk, skb, getfrag, from, -+ (length - transhdrlen)); -+} -+ -+static inline struct ipv6_opt_hdr *ip6_opt_dup(struct ipv6_opt_hdr *src, -+ gfp_t gfp) -+{ -+ return src ? kmemdup(src, (src->hdrlen + 1) * 8, gfp) : NULL; -+} -+ -+static inline struct ipv6_rt_hdr *ip6_rthdr_dup(struct ipv6_rt_hdr *src, -+ gfp_t gfp) -+{ -+ return src ? kmemdup(src, (src->hdrlen + 1) * 8, gfp) : NULL; -+} -+ -+static void ip6_append_data_mtu(unsigned int *mtu, -+ int *maxfraglen, -+ unsigned int fragheaderlen, -+ struct sk_buff *skb, -+ struct rt6_info *rt, -+ bool pmtuprobe) -+{ -+ if (!(rt->dst.flags & DST_XFRM_TUNNEL)) { -+ if (skb == NULL) { -+ /* first fragment, reserve header_len */ -+ *mtu = *mtu - rt->dst.header_len; -+ -+ } else { -+ /* -+ * this fragment is not first, the headers -+ * space is regarded as data space. -+ */ -+ *mtu = min(*mtu, pmtuprobe ? -+ rt->dst.dev->mtu : -+ dst_mtu(rt->dst.path)); -+ } -+ *maxfraglen = ((*mtu - fragheaderlen) & ~7) -+ + fragheaderlen - sizeof(struct frag_hdr); -+ } -+} -+ -+int ip6_append_data(struct sock *sk, int getfrag(void *from, char *to, -+ int offset, int len, int odd, struct sk_buff *skb), -+ void *from, int length, int transhdrlen, -+ int hlimit, int tclass, struct ipv6_txoptions *opt, struct flowi6 *fl6, -+ struct rt6_info *rt, unsigned int flags, int dontfrag) -+{ -+ struct inet_sock *inet = inet_sk(sk); -+ struct ipv6_pinfo *np = inet6_sk(sk); -+ struct inet_cork *cork; -+ struct sk_buff *skb, *skb_prev = NULL; -+ unsigned int maxfraglen, fragheaderlen, mtu; -+ int exthdrlen; -+ int dst_exthdrlen; -+ int hh_len; -+ int copy; -+ int err; -+ int offset = 0; -+ __u8 tx_flags = 0; -+ -+ if (flags&MSG_PROBE) -+ return 0; -+ cork = &inet->cork.base; -+ if (skb_queue_empty(&sk->sk_write_queue)) { -+ /* -+ * setup for corking -+ */ -+ if (opt) { -+ if (WARN_ON(np->cork.opt)) -+ return -EINVAL; -+ -+ np->cork.opt = kzalloc(opt->tot_len, sk->sk_allocation); -+ if (unlikely(np->cork.opt == NULL)) -+ return -ENOBUFS; -+ -+ np->cork.opt->tot_len = opt->tot_len; -+ np->cork.opt->opt_flen = opt->opt_flen; -+ np->cork.opt->opt_nflen = opt->opt_nflen; -+ -+ np->cork.opt->dst0opt = ip6_opt_dup(opt->dst0opt, -+ sk->sk_allocation); -+ if (opt->dst0opt && !np->cork.opt->dst0opt) -+ return -ENOBUFS; -+ -+ np->cork.opt->dst1opt = ip6_opt_dup(opt->dst1opt, -+ sk->sk_allocation); -+ if (opt->dst1opt && !np->cork.opt->dst1opt) -+ return -ENOBUFS; -+ -+ np->cork.opt->hopopt = ip6_opt_dup(opt->hopopt, -+ sk->sk_allocation); -+ if (opt->hopopt && !np->cork.opt->hopopt) -+ return -ENOBUFS; -+ -+ np->cork.opt->srcrt = ip6_rthdr_dup(opt->srcrt, -+ sk->sk_allocation); -+ if (opt->srcrt && !np->cork.opt->srcrt) -+ return -ENOBUFS; -+ -+ /* need source address above miyazawa*/ -+ } -+ dst_hold(&rt->dst); -+ cork->dst = &rt->dst; -+ inet->cork.fl.u.ip6 = *fl6; -+ np->cork.hop_limit = hlimit; -+ np->cork.tclass = tclass; -+ if (rt->dst.flags & DST_XFRM_TUNNEL) -+ mtu = np->pmtudisc == IPV6_PMTUDISC_PROBE ? -+ rt->dst.dev->mtu : dst_mtu(&rt->dst); -+ else -+ mtu = np->pmtudisc == IPV6_PMTUDISC_PROBE ? -+ rt->dst.dev->mtu : dst_mtu(rt->dst.path); -+ if (np->frag_size < mtu) { -+ if (np->frag_size) -+ mtu = np->frag_size; -+ } -+ cork->fragsize = mtu; -+ if (dst_allfrag(rt->dst.path)) -+ cork->flags |= IPCORK_ALLFRAG; -+ cork->length = 0; -+ exthdrlen = (opt ? opt->opt_flen : 0); -+ length += exthdrlen; -+ transhdrlen += exthdrlen; -+ dst_exthdrlen = rt->dst.header_len - rt->rt6i_nfheader_len; -+ } else { -+ rt = (struct rt6_info *)cork->dst; -+ fl6 = &inet->cork.fl.u.ip6; -+ opt = np->cork.opt; -+ transhdrlen = 0; -+ exthdrlen = 0; -+ dst_exthdrlen = 0; -+ mtu = cork->fragsize; -+ } -+ -+ hh_len = LL_RESERVED_SPACE(rt->dst.dev); -+ -+ fragheaderlen = sizeof(struct ipv6hdr) + rt->rt6i_nfheader_len + -+ (opt ? opt->opt_nflen : 0); -+ maxfraglen = ((mtu - fragheaderlen) & ~7) + fragheaderlen - sizeof(struct frag_hdr); -+ -+ if (mtu <= sizeof(struct ipv6hdr) + IPV6_MAXPLEN) { -+ if (cork->length + length > sizeof(struct ipv6hdr) + IPV6_MAXPLEN - fragheaderlen) { -+ ipv6_local_error(sk, EMSGSIZE, fl6, mtu-exthdrlen); -+ return -EMSGSIZE; -+ } -+ } -+ -+ /* For UDP, check if TX timestamp is enabled */ -+ if (sk->sk_type == SOCK_DGRAM) -+ sock_tx_timestamp(sk, &tx_flags); -+ -+ /* -+ * Let's try using as much space as possible. -+ * Use MTU if total length of the message fits into the MTU. -+ * Otherwise, we need to reserve fragment header and -+ * fragment alignment (= 8-15 octects, in total). -+ * -+ * Note that we may need to "move" the data from the tail of -+ * of the buffer to the new fragment when we split -+ * the message. -+ * -+ * FIXME: It may be fragmented into multiple chunks -+ * at once if non-fragmentable extension headers -+ * are too large. -+ * --yoshfuji -+ */ -+ -+ if ((length > mtu) && dontfrag && (sk->sk_protocol == IPPROTO_UDP || -+ sk->sk_protocol == IPPROTO_RAW)) { -+ ipv6_local_rxpmtu(sk, fl6, mtu-exthdrlen); -+ return -EMSGSIZE; -+ } -+ -+ skb = skb_peek_tail(&sk->sk_write_queue); -+ cork->length += length; -+ if (((length > mtu) || -+ (skb && skb_has_frags(skb))) && -+ (sk->sk_protocol == IPPROTO_UDP) && -+ (rt->dst.dev->features & NETIF_F_UFO)) { -+ err = ip6_ufo_append_data(sk, getfrag, from, length, -+ hh_len, fragheaderlen, -+ transhdrlen, mtu, flags, rt); -+ if (err) -+ goto error; -+ return 0; -+ } -+ -+ if (!skb) -+ goto alloc_new_skb; -+ -+ while (length > 0) { -+ /* Check if the remaining data fits into current packet. */ -+ copy = (cork->length <= mtu && !(cork->flags & IPCORK_ALLFRAG) ? mtu : maxfraglen) - skb->len; -+ if (copy < length) -+ copy = maxfraglen - skb->len; -+ -+ if (copy <= 0) { -+ char *data; -+ unsigned int datalen; -+ unsigned int fraglen; -+ unsigned int fraggap; -+ unsigned int alloclen; -+alloc_new_skb: -+ /* There's no room in the current skb */ -+ if (skb) -+ fraggap = skb->len - maxfraglen; -+ else -+ fraggap = 0; -+ /* update mtu and maxfraglen if necessary */ -+ if (skb == NULL || skb_prev == NULL) -+ ip6_append_data_mtu(&mtu, &maxfraglen, -+ fragheaderlen, skb, rt, -+ np->pmtudisc == -+ IPV6_PMTUDISC_PROBE); -+ -+ skb_prev = skb; -+ -+ /* -+ * If remaining data exceeds the mtu, -+ * we know we need more fragment(s). -+ */ -+ datalen = length + fraggap; -+ -+ if (datalen > (cork->length <= mtu && !(cork->flags & IPCORK_ALLFRAG) ? mtu : maxfraglen) - fragheaderlen) -+ datalen = maxfraglen - fragheaderlen - rt->dst.trailer_len; -+ if ((flags & MSG_MORE) && -+ !(rt->dst.dev->features&NETIF_F_SG)) -+ alloclen = mtu; -+ else -+ alloclen = datalen + fragheaderlen; -+ -+ alloclen += dst_exthdrlen; -+ -+ if (datalen != length + fraggap) { -+ /* -+ * this is not the last fragment, the trailer -+ * space is regarded as data space. -+ */ -+ datalen += rt->dst.trailer_len; -+ } -+ -+ alloclen += rt->dst.trailer_len; -+ fraglen = datalen + fragheaderlen; -+ -+ /* -+ * We just reserve space for fragment header. -+ * Note: this may be overallocation if the message -+ * (without MSG_MORE) fits into the MTU. -+ */ -+ alloclen += sizeof(struct frag_hdr); -+ -+ if (transhdrlen) { -+ skb = sock_alloc_send_skb(sk, -+ alloclen + hh_len, -+ (flags & MSG_DONTWAIT), &err); -+ } else { -+ skb = NULL; -+ if (atomic_read(&sk->sk_wmem_alloc) <= -+ 2 * sk->sk_sndbuf) -+ skb = sock_wmalloc(sk, -+ alloclen + hh_len, 1, -+ sk->sk_allocation); -+ if (unlikely(skb == NULL)) -+ err = -ENOBUFS; -+ else { -+ /* Only the initial fragment -+ * is time stamped. -+ */ -+ tx_flags = 0; -+ } -+ } -+ if (skb == NULL) -+ goto error; -+ /* -+ * Fill in the control structures -+ */ -+ skb->ip_summed = CHECKSUM_NONE; -+ skb->csum = 0; -+ /* reserve for fragmentation and ipsec header */ -+ skb_reserve(skb, hh_len + sizeof(struct frag_hdr) + -+ dst_exthdrlen); -+ -+ if (sk->sk_type == SOCK_DGRAM) -+ skb_shinfo(skb)->tx_flags = tx_flags; -+ -+ /* -+ * Find where to start putting bytes -+ */ -+ data = skb_put(skb, fraglen); -+ skb_set_network_header(skb, exthdrlen); -+ data += fragheaderlen; -+ skb->transport_header = (skb->network_header + -+ fragheaderlen); -+ if (fraggap) { -+ skb->csum = skb_copy_and_csum_bits( -+ skb_prev, maxfraglen, -+ data + transhdrlen, fraggap, 0); -+ skb_prev->csum = csum_sub(skb_prev->csum, -+ skb->csum); -+ data += fraggap; -+ pskb_trim_unique(skb_prev, maxfraglen); -+ } -+ copy = datalen - transhdrlen - fraggap; -+ -+ if (copy < 0) { -+ err = -EINVAL; -+ kfree_skb(skb); -+ goto error; -+ } else if (copy > 0 && getfrag(from, data + transhdrlen, offset, copy, fraggap, skb) < 0) { -+ err = -EFAULT; -+ kfree_skb(skb); -+ goto error; -+ } -+ -+ offset += copy; -+ length -= datalen - fraggap; -+ transhdrlen = 0; -+ exthdrlen = 0; -+ dst_exthdrlen = 0; -+ -+ /* -+ * Put the packet on the pending queue -+ */ -+ __skb_queue_tail(&sk->sk_write_queue, skb); -+ continue; -+ } -+ -+ if (copy > length) -+ copy = length; -+ -+ if (!(rt->dst.dev->features&NETIF_F_SG)) { -+ unsigned int off; -+ -+ off = skb->len; -+ if (getfrag(from, skb_put(skb, copy), -+ offset, copy, off, skb) < 0) { -+ __skb_trim(skb, off); -+ err = -EFAULT; -+ goto error; -+ } -+ } else { -+ int i = skb_shinfo(skb)->nr_frags; -+ struct page_frag *pfrag = sk_page_frag(sk); -+ -+ err = -ENOMEM; -+ if (!sk_page_frag_refill(sk, pfrag)) -+ goto error; -+ -+ if (!skb_can_coalesce(skb, i, pfrag->page, -+ pfrag->offset)) { -+ err = -EMSGSIZE; -+ if (i == MAX_SKB_FRAGS) -+ goto error; -+ -+ __skb_fill_page_desc(skb, i, pfrag->page, -+ pfrag->offset, 0); -+ skb_shinfo(skb)->nr_frags = ++i; -+ get_page(pfrag->page); -+ } -+ copy = min_t(int, copy, pfrag->size - pfrag->offset); -+ if (getfrag(from, -+ page_address(pfrag->page) + pfrag->offset, -+ offset, copy, skb->len, skb) < 0) -+ goto error_efault; -+ -+ pfrag->offset += copy; -+ skb_frag_size_add(&skb_shinfo(skb)->frags[i - 1], copy); -+ skb->len += copy; -+ skb->data_len += copy; -+ skb->truesize += copy; -+ atomic_add(copy, &sk->sk_wmem_alloc); -+ } -+ offset += copy; -+ length -= copy; -+ } -+ -+ return 0; -+ -+error_efault: -+ err = -EFAULT; -+error: -+ cork->length -= length; -+ IP6_INC_STATS(sock_net(sk), rt->rt6i_idev, IPSTATS_MIB_OUTDISCARDS); -+ return err; -+} -+EXPORT_SYMBOL_GPL(ip6_append_data); -+ -+static void ip6_cork_release(struct inet_sock *inet, struct ipv6_pinfo *np) -+{ -+ if (np->cork.opt) { -+ kfree(np->cork.opt->dst0opt); -+ kfree(np->cork.opt->dst1opt); -+ kfree(np->cork.opt->hopopt); -+ kfree(np->cork.opt->srcrt); -+ kfree(np->cork.opt); -+ np->cork.opt = NULL; -+ } -+ -+ if (inet->cork.base.dst) { -+ dst_release(inet->cork.base.dst); -+ inet->cork.base.dst = NULL; -+ inet->cork.base.flags &= ~IPCORK_ALLFRAG; -+ } -+ memset(&inet->cork.fl, 0, sizeof(inet->cork.fl)); -+} -+ -+int ip6_push_pending_frames(struct sock *sk) -+{ -+ struct sk_buff *skb, *tmp_skb; -+ struct sk_buff **tail_skb; -+ struct in6_addr final_dst_buf, *final_dst = &final_dst_buf; -+ struct inet_sock *inet = inet_sk(sk); -+ struct ipv6_pinfo *np = inet6_sk(sk); -+ struct net *net = sock_net(sk); -+ struct ipv6hdr *hdr; -+ struct ipv6_txoptions *opt = np->cork.opt; -+ struct rt6_info *rt = (struct rt6_info *)inet->cork.base.dst; -+ struct flowi6 *fl6 = &inet->cork.fl.u.ip6; -+ unsigned char proto = fl6->flowi6_proto; -+ int err = 0; -+ -+ if ((skb = __skb_dequeue(&sk->sk_write_queue)) == NULL) -+ goto out; -+ tail_skb = &(skb_shinfo(skb)->frag_list); -+ -+ /* move skb->data to ip header from ext header */ -+ if (skb->data < skb_network_header(skb)) -+ __skb_pull(skb, skb_network_offset(skb)); -+ while ((tmp_skb = __skb_dequeue(&sk->sk_write_queue)) != NULL) { -+ __skb_pull(tmp_skb, skb_network_header_len(skb)); -+ *tail_skb = tmp_skb; -+ tail_skb = &(tmp_skb->next); -+ skb->len += tmp_skb->len; -+ skb->data_len += tmp_skb->len; -+ skb->truesize += tmp_skb->truesize; -+ tmp_skb->destructor = NULL; -+ tmp_skb->sk = NULL; -+ } -+ -+ /* Allow local fragmentation. */ -+ if (np->pmtudisc < IPV6_PMTUDISC_DO) -+ skb->local_df = 1; -+ -+ *final_dst = fl6->daddr; -+ __skb_pull(skb, skb_network_header_len(skb)); -+ if (opt && opt->opt_flen) -+ ipv6_push_frag_opts(skb, opt, &proto); -+ if (opt && opt->opt_nflen) -+ ipv6_push_nfrag_opts(skb, opt, &proto, &final_dst); -+ -+ skb_push(skb, sizeof(struct ipv6hdr)); -+ skb_reset_network_header(skb); -+ hdr = ipv6_hdr(skb); -+ -+ ip6_flow_hdr(hdr, np->cork.tclass, fl6->flowlabel); -+ hdr->hop_limit = np->cork.hop_limit; -+ hdr->nexthdr = proto; -+ hdr->saddr = fl6->saddr; -+ hdr->daddr = *final_dst; -+ -+ skb->priority = sk->sk_priority; -+ skb->mark = sk->sk_mark; -+ -+ skb_dst_set(skb, dst_clone(&rt->dst)); -+ IP6_UPD_PO_STATS(net, rt->rt6i_idev, IPSTATS_MIB_OUT, skb->len); -+ if (proto == IPPROTO_ICMPV6) { -+ struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); -+ -+ ICMP6MSGOUT_INC_STATS_BH(net, idev, icmp6_hdr(skb)->icmp6_type); -+ ICMP6_INC_STATS_BH(net, idev, ICMP6_MIB_OUTMSGS); -+ } -+ -+ err = ip6_local_out(skb); -+ if (err) { -+ if (err > 0) -+ err = net_xmit_errno(err); -+ if (err) -+ goto error; -+ } -+ -+out: -+ ip6_cork_release(inet, np); -+ return err; -+error: -+ IP6_INC_STATS(net, rt->rt6i_idev, IPSTATS_MIB_OUTDISCARDS); -+ goto out; -+} -+EXPORT_SYMBOL_GPL(ip6_push_pending_frames); -+ -+void ip6_flush_pending_frames(struct sock *sk) -+{ -+ struct sk_buff *skb; -+ -+ while ((skb = __skb_dequeue_tail(&sk->sk_write_queue)) != NULL) { -+ if (skb_dst(skb)) -+ IP6_INC_STATS(sock_net(sk), ip6_dst_idev(skb_dst(skb)), -+ IPSTATS_MIB_OUTDISCARDS); -+ kfree_skb(skb); -+ } -+ -+ ip6_cork_release(inet_sk(sk), inet6_sk(sk)); -+} -+EXPORT_SYMBOL_GPL(ip6_flush_pending_frames); -diff -Naur linux-3.10.30.org/net/netfilter/core.c linux-3.10.30/net/netfilter/core.c ---- linux-3.10.30.org/net/netfilter/core.c 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/netfilter/core.c 2014-02-14 20:29:05.392738001 +0100 -@@ -191,9 +191,11 @@ - ret = NF_DROP_GETERR(verdict); - if (ret == 0) - ret = -EPERM; -- } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE) { -+ } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE || -+ (verdict & NF_VERDICT_MASK) == NF_IMQ_QUEUE) { - int err = nf_queue(skb, elem, pf, hook, indev, outdev, okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (err < 0) { - if (err == -ECANCELED) - goto next_hook; -diff -Naur linux-3.10.30.org/net/netfilter/Kconfig linux-3.10.30/net/netfilter/Kconfig ---- linux-3.10.30.org/net/netfilter/Kconfig 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/netfilter/Kconfig 2014-02-14 20:29:05.396071847 +0100 -@@ -641,6 +641,18 @@ - - To compile it as a module, choose M here. If unsure, say N. - -+config NETFILTER_XT_TARGET_IMQ -+ tristate '"IMQ" target support' -+ depends on NETFILTER_XTABLES -+ depends on IP_NF_MANGLE || IP6_NF_MANGLE -+ select IMQ -+ default m if NETFILTER_ADVANCED=n -+ help -+ This option adds a `IMQ' target which is used to specify if and -+ to which imq device packets should get enqueued/dequeued. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ - config NETFILTER_XT_TARGET_MARK - tristate '"MARK" target support' - depends on NETFILTER_ADVANCED -diff -Naur linux-3.10.30.org/net/netfilter/Makefile linux-3.10.30/net/netfilter/Makefile ---- linux-3.10.30.org/net/netfilter/Makefile 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/netfilter/Makefile 2014-02-14 20:29:05.396071847 +0100 -@@ -82,6 +82,7 @@ - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HMARK) += xt_HMARK.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_IMQ) += xt_IMQ.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LOG) += xt_LOG.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NETMAP) += xt_NETMAP.o -diff -Naur linux-3.10.30.org/net/netfilter/nf_internals.h linux-3.10.30/net/netfilter/nf_internals.h ---- linux-3.10.30.org/net/netfilter/nf_internals.h 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/netfilter/nf_internals.h 2014-02-14 20:29:05.396071847 +0100 -@@ -29,7 +29,7 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum); -+ unsigned int queuenum, unsigned int queuetype); - extern int __init netfilter_queue_init(void); - - /* nf_log.c */ -diff -Naur linux-3.10.30.org/net/netfilter/nf_queue.c linux-3.10.30/net/netfilter/nf_queue.c ---- linux-3.10.30.org/net/netfilter/nf_queue.c 2014-02-13 22:48:15.000000000 +0100 -+++ linux-3.10.30/net/netfilter/nf_queue.c 2014-02-14 20:29:05.396071847 +0100 -@@ -27,6 +27,23 @@ - */ - static const struct nf_queue_handler __rcu *queue_handler __read_mostly; - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static const struct nf_queue_handler __rcu *queue_imq_handler __read_mostly; -+ -+void nf_register_queue_imq_handler(const struct nf_queue_handler *qh) -+{ -+ rcu_assign_pointer(queue_imq_handler, qh); -+} -+EXPORT_SYMBOL_GPL(nf_register_queue_imq_handler); -+ -+void nf_unregister_queue_imq_handler(void) -+{ -+ RCU_INIT_POINTER(queue_imq_handler, NULL); -+ synchronize_rcu(); -+} -+EXPORT_SYMBOL_GPL(nf_unregister_queue_imq_handler); -+#endif -+ - /* return EBUSY when somebody else is registered, return EEXIST if the - * same handler is registered, return 0 in case of success. */ - void nf_register_queue_handler(const struct nf_queue_handler *qh) -@@ -105,7 +122,8 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum) -+ unsigned int queuenum, -+ unsigned int queuetype) - { - int status = -ENOENT; - struct nf_queue_entry *entry = NULL; -@@ -115,7 +133,17 @@ - /* QUEUE == DROP if no one is waiting, to be safe. */ - rcu_read_lock(); - -- qh = rcu_dereference(queue_handler); -+ if (queuetype == NF_IMQ_QUEUE) { -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ qh = rcu_dereference(queue_imq_handler); -+#else -+ BUG(); -+ goto err_unlock; -+#endif -+ } else { -+ qh = rcu_dereference(queue_handler); -+ } -+ - if (!qh) { - status = -ESRCH; - goto err_unlock; -@@ -205,9 +233,11 @@ - local_bh_enable(); - break; - case NF_QUEUE: -+ case NF_IMQ_QUEUE: - err = nf_queue(skb, elem, entry->pf, entry->hook, - entry->indev, entry->outdev, entry->okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (err < 0) { - if (err == -ECANCELED) - goto next_hook; -diff -Naur linux-3.10.30.org/net/netfilter/xt_IMQ.c linux-3.10.30/net/netfilter/xt_IMQ.c ---- linux-3.10.30.org/net/netfilter/xt_IMQ.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.30/net/netfilter/xt_IMQ.c 2014-02-14 20:29:05.396071847 +0100 -@@ -0,0 +1,72 @@ -+/* -+ * This target marks packets to be enqueued to an imq device -+ */ -+#include <linux/module.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_IMQ.h> -+#include <linux/imq.h> -+ -+static unsigned int imq_target(struct sk_buff *pskb, -+ const struct xt_action_param *par) -+{ -+ const struct xt_imq_info *mr = par->targinfo; -+ -+ pskb->imq_flags = (mr->todev & IMQ_F_IFMASK) | IMQ_F_ENQUEUE; -+ -+ return XT_CONTINUE; -+} -+ -+static int imq_checkentry(const struct xt_tgchk_param *par) -+{ -+ struct xt_imq_info *mr = par->targinfo; -+ -+ if (mr->todev > IMQ_MAX_DEVS - 1) { -+ pr_warn("IMQ: invalid device specified, highest is %u\n", -+ IMQ_MAX_DEVS - 1); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static struct xt_target xt_imq_reg[] __read_mostly = { -+ { -+ .name = "IMQ", -+ .family = AF_INET, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+ { -+ .name = "IMQ", -+ .family = AF_INET6, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+}; -+ -+static int __init imq_init(void) -+{ -+ return xt_register_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+static void __exit imq_fini(void) -+{ -+ xt_unregister_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+module_init(imq_init); -+module_exit(imq_fini); -+ -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ipt_IMQ"); -+MODULE_ALIAS("ip6t_IMQ"); -+ diff --git a/src/patches/linux-3.10.34-iwlwifi-noibss_only_on_radar_chan.patch b/src/patches/linux-3.10.34-iwlwifi-noibss_only_on_radar_chan.patch deleted file mode 100644 index cc76fe6..0000000 --- a/src/patches/linux-3.10.34-iwlwifi-noibss_only_on_radar_chan.patch +++ /dev/null @@ -1,23 +0,0 @@ -diff -Naur linux-3.10.34.org/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c linux-3.10.34/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c ---- linux-3.10.34.org/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c 2014-03-24 05:42:03.000000000 +0100 -+++ linux-3.10.34/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c 2014-03-25 09:08:28.548634788 +0100 -@@ -613,14 +613,16 @@ - /* set no-HT40, will enable as appropriate later */ - channel->flags = IEEE80211_CHAN_NO_HT40; - -+ -+ if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR) { -+ channel->flags |= IEEE80211_CHAN_RADAR; -+ - if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS)) - channel->flags |= IEEE80211_CHAN_NO_IBSS; - - if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE)) - channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN; -- -- if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR) -- channel->flags |= IEEE80211_CHAN_RADAR; -+} - - /* Initialize regulatory-based run-time data */ - channel->max_power = diff --git a/src/patches/linux-3.10.39-pie_packet_sch.patch b/src/patches/linux-3.10.39-pie_packet_sch.patch deleted file mode 100644 index 6bec374..0000000 --- a/src/patches/linux-3.10.39-pie_packet_sch.patch +++ /dev/null @@ -1,674 +0,0 @@ -From d4b36210c2e6ecef0ce52fb6c18c51144f5c2d88 Mon Sep 17 00:00:00 2001 -From: Vijay Subramanian vijaynsu@cisco.com -Date: Sat, 4 Jan 2014 17:33:55 -0800 -Subject: net: pkt_sched: PIE AQM scheme - -Proportional Integral controller Enhanced (PIE) is a scheduler to address the -bufferbloat problem. - ->From the IETF draft below: -" Bufferbloat is a phenomenon where excess buffers in the network cause high -latency and jitter. As more and more interactive applications (e.g. voice over -IP, real time video streaming and financial transactions) run in the Internet, -high latency and jitter degrade application performance. There is a pressing -need to design intelligent queue management schemes that can control latency and -jitter; and hence provide desirable quality of service to users. - -We present here a lightweight design, PIE(Proportional Integral controller -Enhanced) that can effectively control the average queueing latency to a target -value. Simulation results, theoretical analysis and Linux testbed results have -shown that PIE can ensure low latency and achieve high link utilization under -various congestion situations. The design does not require per-packet -timestamp, so it incurs very small overhead and is simple enough to implement -in both hardware and software. " - -Many thanks to Dave Taht for extensive feedback, reviews, testing and -suggestions. Thanks also to Stephen Hemminger and Eric Dumazet for reviews and -suggestions. Naeem Khademi and Dave Taht independently contributed to ECN -support. - -For more information, please see technical paper about PIE in the IEEE -Conference on High Performance Switching and Routing 2013. A copy of the paper -can be found at ftp://ftpeng.cisco.com/pie/. - -Please also refer to the IETF draft submission at -http://tools.ietf.org/html/draft-pan-tsvwg-pie-00 - -All relevant code, documents and test scripts and results can be found at -ftp://ftpeng.cisco.com/pie/. - -For problems with the iproute2/tc or Linux kernel code, please contact Vijay -Subramanian (vijaynsu@cisco.com or subramanian.vijay@gmail.com) Mythili Prabhu -(mysuryan@cisco.com) - -Signed-off-by: Vijay Subramanian subramanian.vijay@gmail.com -Signed-off-by: Mythili Prabhu mysuryan@cisco.com -CC: Dave Taht dave.taht@bufferbloat.net -Signed-off-by: David S. Miller davem@davemloft.net - -diff -Naur linux-3.10.39.org/include/uapi/linux/pkt_sched.h linux-3.10.39/include/uapi/linux/pkt_sched.h ---- linux-3.10.39.org/include/uapi/linux/pkt_sched.h 2014-05-06 16:56:24.000000000 +0200 -+++ linux-3.10.39/include/uapi/linux/pkt_sched.h 2014-05-15 10:33:08.296828477 +0200 -@@ -744,4 +744,29 @@ - }; - }; - -+/* PIE */ -+enum { -+ TCA_PIE_UNSPEC, -+ TCA_PIE_TARGET, -+ TCA_PIE_LIMIT, -+ TCA_PIE_TUPDATE, -+ TCA_PIE_ALPHA, -+ TCA_PIE_BETA, -+ TCA_PIE_ECN, -+ TCA_PIE_BYTEMODE, -+ __TCA_PIE_MAX -+}; -+#define TCA_PIE_MAX (__TCA_PIE_MAX - 1) -+ -+struct tc_pie_xstats { -+ __u32 prob; /* current probability */ -+ __u32 delay; /* current delay in ms */ -+ __u32 avg_dq_rate; /* current average dq_rate in bits/pie_time */ -+ __u32 packets_in; /* total number of packets enqueued */ -+ __u32 dropped; /* packets dropped due to pie_action */ -+ __u32 overlimit; /* dropped due to lack of space in queue */ -+ __u32 maxq; /* maximum queue size */ -+ __u32 ecn_mark; /* packets marked with ecn*/ -+}; -+ - #endif -diff -Naur linux-3.10.39.org/net/sched/Kconfig linux-3.10.39/net/sched/Kconfig ---- linux-3.10.39.org/net/sched/Kconfig 2014-05-06 16:56:24.000000000 +0200 -+++ linux-3.10.39/net/sched/Kconfig 2014-05-15 09:30:29.866632326 +0200 -@@ -272,6 +272,19 @@ - - If unsure, say N. - -+config NET_SCH_PIE -+ tristate "Proportional Integral controller Enhanced (PIE) scheduler" -+ help -+ Say Y here if you want to use the Proportional Integral controller -+ Enhanced scheduler packet scheduling algorithm. -+ For more information, please see -+ http://tools.ietf.org/html/draft-pan-tsvwg-pie-00 -+ -+ To compile this driver as a module, choose M here: the module -+ will be called sch_pie. -+ -+ If unsure, say N. -+ - config NET_SCH_INGRESS - tristate "Ingress Qdisc" - depends on NET_CLS_ACT -diff -Naur linux-3.10.39.org/net/sched/Makefile linux-3.10.39/net/sched/Makefile ---- linux-3.10.39.org/net/sched/Makefile 2014-05-06 16:56:24.000000000 +0200 -+++ linux-3.10.39/net/sched/Makefile 2014-05-15 10:34:55.533502406 +0200 -@@ -39,6 +39,7 @@ - obj-$(CONFIG_NET_SCH_QFQ) += sch_qfq.o - obj-$(CONFIG_NET_SCH_CODEL) += sch_codel.o - obj-$(CONFIG_NET_SCH_FQ_CODEL) += sch_fq_codel.o -+obj-$(CONFIG_NET_SCH_PIE) += sch_pie.o - - obj-$(CONFIG_NET_CLS_U32) += cls_u32.o - obj-$(CONFIG_NET_CLS_ROUTE4) += cls_route.o -diff -Naur linux-3.10.39.org/net/sched/sch_pie.c linux-3.10.39/net/sched/sch_pie.c ---- linux-3.10.39.org/net/sched/sch_pie.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.39/net/sched/sch_pie.c 2014-05-15 09:30:29.869966724 +0200 -@@ -0,0 +1,555 @@ -+/* Copyright (C) 2013 Cisco Systems, Inc, 2013. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Author: Vijay Subramanian vijaynsu@cisco.com -+ * Author: Mythili Prabhu mysuryan@cisco.com -+ * -+ * ECN support is added by Naeem Khademi naeemk@ifi.uio.no -+ * University of Oslo, Norway. -+ */ -+ -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/types.h> -+#include <linux/kernel.h> -+#include <linux/errno.h> -+#include <linux/skbuff.h> -+#include <net/pkt_sched.h> -+#include <net/inet_ecn.h> -+ -+#define QUEUE_THRESHOLD 10000 -+#define DQCOUNT_INVALID -1 -+#define MAX_PROB 0xffffffff -+#define PIE_SCALE 8 -+ -+/* parameters used */ -+struct pie_params { -+ psched_time_t target; /* user specified target delay in pschedtime */ -+ u32 tupdate; /* timer frequency (in jiffies) */ -+ u32 limit; /* number of packets that can be enqueued */ -+ u32 alpha; /* alpha and beta are between -4 and 4 */ -+ u32 beta; /* and are used for shift relative to 1 */ -+ bool ecn; /* true if ecn is enabled */ -+ bool bytemode; /* to scale drop early prob based on pkt size */ -+}; -+ -+/* variables used */ -+struct pie_vars { -+ u32 prob; /* probability but scaled by u32 limit. */ -+ psched_time_t burst_time; -+ psched_time_t qdelay; -+ psched_time_t qdelay_old; -+ u64 dq_count; /* measured in bytes */ -+ psched_time_t dq_tstamp; /* drain rate */ -+ u32 avg_dq_rate; /* bytes per pschedtime tick,scaled */ -+ u32 qlen_old; /* in bytes */ -+}; -+ -+/* statistics gathering */ -+struct pie_stats { -+ u32 packets_in; /* total number of packets enqueued */ -+ u32 dropped; /* packets dropped due to pie_action */ -+ u32 overlimit; /* dropped due to lack of space in queue */ -+ u32 maxq; /* maximum queue size */ -+ u32 ecn_mark; /* packets marked with ECN */ -+}; -+ -+/* private data for the Qdisc */ -+struct pie_sched_data { -+ struct pie_params params; -+ struct pie_vars vars; -+ struct pie_stats stats; -+ struct timer_list adapt_timer; -+}; -+ -+static void pie_params_init(struct pie_params *params) -+{ -+ params->alpha = 2; -+ params->beta = 20; -+ params->tupdate = usecs_to_jiffies(30 * USEC_PER_MSEC); /* 30 ms */ -+ params->limit = 1000; /* default of 1000 packets */ -+ params->target = PSCHED_NS2TICKS(20 * NSEC_PER_MSEC); /* 20 ms */ -+ params->ecn = false; -+ params->bytemode = false; -+} -+ -+static void pie_vars_init(struct pie_vars *vars) -+{ -+ vars->dq_count = DQCOUNT_INVALID; -+ vars->avg_dq_rate = 0; -+ /* default of 100 ms in pschedtime */ -+ vars->burst_time = PSCHED_NS2TICKS(100 * NSEC_PER_MSEC); -+} -+ -+static bool drop_early(struct Qdisc *sch, u32 packet_size) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ u32 rnd; -+ u32 local_prob = q->vars.prob; -+ u32 mtu = psched_mtu(qdisc_dev(sch)); -+ -+ /* If there is still burst allowance left skip random early drop */ -+ if (q->vars.burst_time > 0) -+ return false; -+ -+ /* If current delay is less than half of target, and -+ * if drop prob is low already, disable early_drop -+ */ -+ if ((q->vars.qdelay < q->params.target / 2) -+ && (q->vars.prob < MAX_PROB / 5)) -+ return false; -+ -+ /* If we have fewer than 2 mtu-sized packets, disable drop_early, -+ * similar to min_th in RED -+ */ -+ if (sch->qstats.backlog < 2 * mtu) -+ return false; -+ -+ /* If bytemode is turned on, use packet size to compute new -+ * probablity. Smaller packets will have lower drop prob in this case -+ */ -+ if (q->params.bytemode && packet_size <= mtu) -+ local_prob = (local_prob / mtu) * packet_size; -+ else -+ local_prob = q->vars.prob; -+ -+ rnd = net_random(); -+ if (rnd < local_prob) -+ return true; -+ -+ return false; -+} -+ -+static int pie_qdisc_enqueue(struct sk_buff *skb, struct Qdisc *sch) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ bool enqueue = false; -+ -+ if (unlikely(qdisc_qlen(sch) >= sch->limit)) { -+ q->stats.overlimit++; -+ goto out; -+ } -+ -+ if (!drop_early(sch, skb->len)) { -+ enqueue = true; -+ } else if (q->params.ecn && (q->vars.prob <= MAX_PROB / 10) && -+ INET_ECN_set_ce(skb)) { -+ /* If packet is ecn capable, mark it if drop probability -+ * is lower than 10%, else drop it. -+ */ -+ q->stats.ecn_mark++; -+ enqueue = true; -+ } -+ -+ /* we can enqueue the packet */ -+ if (enqueue) { -+ q->stats.packets_in++; -+ if (qdisc_qlen(sch) > q->stats.maxq) -+ q->stats.maxq = qdisc_qlen(sch); -+ -+ return qdisc_enqueue_tail(skb, sch); -+ } -+ -+out: -+ q->stats.dropped++; -+ return qdisc_drop(skb, sch); -+} -+ -+static const struct nla_policy pie_policy[TCA_PIE_MAX + 1] = { -+ [TCA_PIE_TARGET] = {.type = NLA_U32}, -+ [TCA_PIE_LIMIT] = {.type = NLA_U32}, -+ [TCA_PIE_TUPDATE] = {.type = NLA_U32}, -+ [TCA_PIE_ALPHA] = {.type = NLA_U32}, -+ [TCA_PIE_BETA] = {.type = NLA_U32}, -+ [TCA_PIE_ECN] = {.type = NLA_U32}, -+ [TCA_PIE_BYTEMODE] = {.type = NLA_U32}, -+}; -+ -+static int pie_change(struct Qdisc *sch, struct nlattr *opt) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ struct nlattr *tb[TCA_PIE_MAX + 1]; -+ unsigned int qlen; -+ int err; -+ -+ if (!opt) -+ return -EINVAL; -+ -+ err = nla_parse_nested(tb, TCA_PIE_MAX, opt, pie_policy); -+ if (err < 0) -+ return err; -+ -+ sch_tree_lock(sch); -+ -+ /* convert from microseconds to pschedtime */ -+ if (tb[TCA_PIE_TARGET]) { -+ /* target is in us */ -+ u32 target = nla_get_u32(tb[TCA_PIE_TARGET]); -+ -+ /* convert to pschedtime */ -+ q->params.target = PSCHED_NS2TICKS((u64)target * NSEC_PER_USEC); -+ } -+ -+ /* tupdate is in jiffies */ -+ if (tb[TCA_PIE_TUPDATE]) -+ q->params.tupdate = usecs_to_jiffies(nla_get_u32(tb[TCA_PIE_TUPDATE])); -+ -+ if (tb[TCA_PIE_LIMIT]) { -+ u32 limit = nla_get_u32(tb[TCA_PIE_LIMIT]); -+ -+ q->params.limit = limit; -+ sch->limit = limit; -+ } -+ -+ if (tb[TCA_PIE_ALPHA]) -+ q->params.alpha = nla_get_u32(tb[TCA_PIE_ALPHA]); -+ -+ if (tb[TCA_PIE_BETA]) -+ q->params.beta = nla_get_u32(tb[TCA_PIE_BETA]); -+ -+ if (tb[TCA_PIE_ECN]) -+ q->params.ecn = nla_get_u32(tb[TCA_PIE_ECN]); -+ -+ if (tb[TCA_PIE_BYTEMODE]) -+ q->params.bytemode = nla_get_u32(tb[TCA_PIE_BYTEMODE]); -+ -+ /* Drop excess packets if new limit is lower */ -+ qlen = sch->q.qlen; -+ while (sch->q.qlen > sch->limit) { -+ struct sk_buff *skb = __skb_dequeue(&sch->q); -+ -+ sch->qstats.backlog -= qdisc_pkt_len(skb); -+ qdisc_drop(skb, sch); -+ } -+ qdisc_tree_decrease_qlen(sch, qlen - sch->q.qlen); -+ -+ sch_tree_unlock(sch); -+ return 0; -+} -+ -+static void pie_process_dequeue(struct Qdisc *sch, struct sk_buff *skb) -+{ -+ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ int qlen = sch->qstats.backlog; /* current queue size in bytes */ -+ -+ /* If current queue is about 10 packets or more and dq_count is unset -+ * we have enough packets to calculate the drain rate. Save -+ * current time as dq_tstamp and start measurement cycle. -+ */ -+ if (qlen >= QUEUE_THRESHOLD && q->vars.dq_count == DQCOUNT_INVALID) { -+ q->vars.dq_tstamp = psched_get_time(); -+ q->vars.dq_count = 0; -+ } -+ -+ /* Calculate the average drain rate from this value. If queue length -+ * has receded to a small value viz., <= QUEUE_THRESHOLD bytes,reset -+ * the dq_count to -1 as we don't have enough packets to calculate the -+ * drain rate anymore The following if block is entered only when we -+ * have a substantial queue built up (QUEUE_THRESHOLD bytes or more) -+ * and we calculate the drain rate for the threshold here. dq_count is -+ * in bytes, time difference in psched_time, hence rate is in -+ * bytes/psched_time. -+ */ -+ if (q->vars.dq_count != DQCOUNT_INVALID) { -+ q->vars.dq_count += skb->len; -+ -+ if (q->vars.dq_count >= QUEUE_THRESHOLD) { -+ psched_time_t now = psched_get_time(); -+ u32 dtime = now - q->vars.dq_tstamp; -+ u32 count = q->vars.dq_count << PIE_SCALE; -+ -+ if (dtime == 0) -+ return; -+ -+ count = count / dtime; -+ -+ if (q->vars.avg_dq_rate == 0) -+ q->vars.avg_dq_rate = count; -+ else -+ q->vars.avg_dq_rate = -+ (q->vars.avg_dq_rate - -+ (q->vars.avg_dq_rate >> 3)) + (count >> 3); -+ -+ /* If the queue has receded below the threshold, we hold -+ * on to the last drain rate calculated, else we reset -+ * dq_count to 0 to re-enter the if block when the next -+ * packet is dequeued -+ */ -+ if (qlen < QUEUE_THRESHOLD) -+ q->vars.dq_count = DQCOUNT_INVALID; -+ else { -+ q->vars.dq_count = 0; -+ q->vars.dq_tstamp = psched_get_time(); -+ } -+ -+ if (q->vars.burst_time > 0) { -+ if (q->vars.burst_time > dtime) -+ q->vars.burst_time -= dtime; -+ else -+ q->vars.burst_time = 0; -+ } -+ } -+ } -+} -+ -+static void calculate_probability(struct Qdisc *sch) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ u32 qlen = sch->qstats.backlog; /* queue size in bytes */ -+ psched_time_t qdelay = 0; /* in pschedtime */ -+ psched_time_t qdelay_old = q->vars.qdelay; /* in pschedtime */ -+ s32 delta = 0; /* determines the change in probability */ -+ u32 oldprob; -+ u32 alpha, beta; -+ bool update_prob = true; -+ -+ q->vars.qdelay_old = q->vars.qdelay; -+ -+ if (q->vars.avg_dq_rate > 0) -+ qdelay = (qlen << PIE_SCALE) / q->vars.avg_dq_rate; -+ else -+ qdelay = 0; -+ -+ /* If qdelay is zero and qlen is not, it means qlen is very small, less -+ * than dequeue_rate, so we do not update probabilty in this round -+ */ -+ if (qdelay == 0 && qlen != 0) -+ update_prob = false; -+ -+ /* Add ranges for alpha and beta, more aggressive for high dropping -+ * mode and gentle steps for light dropping mode -+ * In light dropping mode, take gentle steps; in medium dropping mode, -+ * take medium steps; in high dropping mode, take big steps. -+ */ -+ if (q->vars.prob < MAX_PROB / 100) { -+ alpha = -+ (q->params.alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 7; -+ beta = -+ (q->params.beta * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 7; -+ } else if (q->vars.prob < MAX_PROB / 10) { -+ alpha = -+ (q->params.alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 5; -+ beta = -+ (q->params.beta * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 5; -+ } else { -+ alpha = -+ (q->params.alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 4; -+ beta = -+ (q->params.beta * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 4; -+ } -+ -+ /* alpha and beta should be between 0 and 32, in multiples of 1/16 */ -+ delta += alpha * ((qdelay - q->params.target)); -+ delta += beta * ((qdelay - qdelay_old)); -+ -+ oldprob = q->vars.prob; -+ -+ /* to ensure we increase probability in steps of no more than 2% */ -+ if (delta > (s32) (MAX_PROB / (100 / 2)) && -+ q->vars.prob >= MAX_PROB / 10) -+ delta = (MAX_PROB / 100) * 2; -+ -+ /* Non-linear drop: -+ * Tune drop probability to increase quickly for high delays(>= 250ms) -+ * 250ms is derived through experiments and provides error protection -+ */ -+ -+ if (qdelay > (PSCHED_NS2TICKS(250 * NSEC_PER_MSEC))) -+ delta += MAX_PROB / (100 / 2); -+ -+ q->vars.prob += delta; -+ -+ if (delta > 0) { -+ /* prevent overflow */ -+ if (q->vars.prob < oldprob) { -+ q->vars.prob = MAX_PROB; -+ /* Prevent normalization error. If probability is at -+ * maximum value already, we normalize it here, and -+ * skip the check to do a non-linear drop in the next -+ * section. -+ */ -+ update_prob = false; -+ } -+ } else { -+ /* prevent underflow */ -+ if (q->vars.prob > oldprob) -+ q->vars.prob = 0; -+ } -+ -+ /* Non-linear drop in probability: Reduce drop probability quickly if -+ * delay is 0 for 2 consecutive Tupdate periods. -+ */ -+ -+ if ((qdelay == 0) && (qdelay_old == 0) && update_prob) -+ q->vars.prob = (q->vars.prob * 98) / 100; -+ -+ q->vars.qdelay = qdelay; -+ q->vars.qlen_old = qlen; -+ -+ /* We restart the measurement cycle if the following conditions are met -+ * 1. If the delay has been low for 2 consecutive Tupdate periods -+ * 2. Calculated drop probability is zero -+ * 3. We have atleast one estimate for the avg_dq_rate ie., -+ * is a non-zero value -+ */ -+ if ((q->vars.qdelay < q->params.target / 2) && -+ (q->vars.qdelay_old < q->params.target / 2) && -+ (q->vars.prob == 0) && -+ (q->vars.avg_dq_rate > 0)) -+ pie_vars_init(&q->vars); -+} -+ -+static void pie_timer(unsigned long arg) -+{ -+ struct Qdisc *sch = (struct Qdisc *)arg; -+ struct pie_sched_data *q = qdisc_priv(sch); -+ spinlock_t *root_lock = qdisc_lock(qdisc_root_sleeping(sch)); -+ -+ spin_lock(root_lock); -+ calculate_probability(sch); -+ -+ /* reset the timer to fire after 'tupdate'. tupdate is in jiffies. */ -+ if (q->params.tupdate) -+ mod_timer(&q->adapt_timer, jiffies + q->params.tupdate); -+ spin_unlock(root_lock); -+ -+} -+ -+static int pie_init(struct Qdisc *sch, struct nlattr *opt) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ -+ pie_params_init(&q->params); -+ pie_vars_init(&q->vars); -+ sch->limit = q->params.limit; -+ -+ setup_timer(&q->adapt_timer, pie_timer, (unsigned long)sch); -+ mod_timer(&q->adapt_timer, jiffies + HZ / 2); -+ -+ if (opt) { -+ int err = pie_change(sch, opt); -+ -+ if (err) -+ return err; -+ } -+ -+ return 0; -+} -+ -+static int pie_dump(struct Qdisc *sch, struct sk_buff *skb) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ struct nlattr *opts; -+ -+ opts = nla_nest_start(skb, TCA_OPTIONS); -+ if (opts == NULL) -+ goto nla_put_failure; -+ -+ /* convert target from pschedtime to us */ -+ if (nla_put_u32(skb, TCA_PIE_TARGET, -+ ((u32) PSCHED_TICKS2NS(q->params.target)) / -+ NSEC_PER_USEC) || -+ nla_put_u32(skb, TCA_PIE_LIMIT, sch->limit) || -+ nla_put_u32(skb, TCA_PIE_TUPDATE, jiffies_to_usecs(q->params.tupdate)) || -+ nla_put_u32(skb, TCA_PIE_ALPHA, q->params.alpha) || -+ nla_put_u32(skb, TCA_PIE_BETA, q->params.beta) || -+ nla_put_u32(skb, TCA_PIE_ECN, q->params.ecn) || -+ nla_put_u32(skb, TCA_PIE_BYTEMODE, q->params.bytemode)) -+ goto nla_put_failure; -+ -+ return nla_nest_end(skb, opts); -+ -+nla_put_failure: -+ nla_nest_cancel(skb, opts); -+ return -1; -+ -+} -+ -+static int pie_dump_stats(struct Qdisc *sch, struct gnet_dump *d) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ struct tc_pie_xstats st = { -+ .prob = q->vars.prob, -+ .delay = ((u32) PSCHED_TICKS2NS(q->vars.qdelay)) / -+ NSEC_PER_USEC, -+ /* unscale and return dq_rate in bytes per sec */ -+ .avg_dq_rate = q->vars.avg_dq_rate * -+ (PSCHED_TICKS_PER_SEC) >> PIE_SCALE, -+ .packets_in = q->stats.packets_in, -+ .overlimit = q->stats.overlimit, -+ .maxq = q->stats.maxq, -+ .dropped = q->stats.dropped, -+ .ecn_mark = q->stats.ecn_mark, -+ }; -+ -+ return gnet_stats_copy_app(d, &st, sizeof(st)); -+} -+ -+static struct sk_buff *pie_qdisc_dequeue(struct Qdisc *sch) -+{ -+ struct sk_buff *skb; -+ skb = __qdisc_dequeue_head(sch, &sch->q); -+ -+ if (!skb) -+ return NULL; -+ -+ pie_process_dequeue(sch, skb); -+ return skb; -+} -+ -+static void pie_reset(struct Qdisc *sch) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ qdisc_reset_queue(sch); -+ pie_vars_init(&q->vars); -+} -+ -+static void pie_destroy(struct Qdisc *sch) -+{ -+ struct pie_sched_data *q = qdisc_priv(sch); -+ q->params.tupdate = 0; -+ del_timer_sync(&q->adapt_timer); -+} -+ -+static struct Qdisc_ops pie_qdisc_ops __read_mostly = { -+ .id = "pie", -+ .priv_size = sizeof(struct pie_sched_data), -+ .enqueue = pie_qdisc_enqueue, -+ .dequeue = pie_qdisc_dequeue, -+ .peek = qdisc_peek_dequeued, -+ .init = pie_init, -+ .destroy = pie_destroy, -+ .reset = pie_reset, -+ .change = pie_change, -+ .dump = pie_dump, -+ .dump_stats = pie_dump_stats, -+ .owner = THIS_MODULE, -+}; -+ -+static int __init pie_module_init(void) -+{ -+ return register_qdisc(&pie_qdisc_ops); -+} -+ -+static void __exit pie_module_exit(void) -+{ -+ unregister_qdisc(&pie_qdisc_ops); -+} -+ -+module_init(pie_module_init); -+module_exit(pie_module_exit); -+ -+MODULE_DESCRIPTION("Proportional Integral controller Enhanced (PIE) scheduler"); -+MODULE_AUTHOR("Vijay Subramanian"); -+MODULE_AUTHOR("Mythili Prabhu"); -+MODULE_LICENSE("GPL"); diff --git a/src/patches/linux-3.10.57-mmc_add_eMMC_5.x.patch b/src/patches/linux-3.10.57-mmc_add_eMMC_5.x.patch deleted file mode 100644 index 7fa4330..0000000 --- a/src/patches/linux-3.10.57-mmc_add_eMMC_5.x.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff -Naur linux-3.10.57.org/drivers/mmc/core/mmc.c linux-3.10.57/drivers/mmc/core/mmc.c ---- linux-3.10.57.org/drivers/mmc/core/mmc.c 2014-10-09 21:18:54.000000000 +0200 -+++ linux-3.10.57/drivers/mmc/core/mmc.c 2014-10-11 09:20:02.225472403 +0200 -@@ -293,7 +293,7 @@ - } - - card->ext_csd.rev = ext_csd[EXT_CSD_REV]; -- if (card->ext_csd.rev > 6) { -+ if (card->ext_csd.rev > 7) { - pr_err("%s: unrecognised EXT_CSD revision %d\n", - mmc_hostname(card->host), card->ext_csd.rev); - err = -EINVAL; diff --git a/src/patches/linux-3.10.9-ledtrig-netdev-1.patch b/src/patches/linux-3.10.9-ledtrig-netdev-1.patch deleted file mode 100644 index 8ad1ebd..0000000 --- a/src/patches/linux-3.10.9-ledtrig-netdev-1.patch +++ /dev/null @@ -1,478 +0,0 @@ -diff -Naur linux-3.10.9.org/drivers/leds/trigger/Kconfig linux-3.10.9/drivers/leds/trigger/Kconfig ---- linux-3.10.9.org/drivers/leds/trigger/Kconfig 2013-08-21 00:40:47.000000000 +0200 -+++ linux-3.10.9/drivers/leds/trigger/Kconfig 2013-08-30 20:43:19.064025933 +0200 -@@ -108,4 +108,11 @@ - This enables direct flash/torch on/off by the driver, kernel space. - If unsure, say Y. - -+config LEDS_TRIGGER_NETDEV -+ tristate "LED Netdev Trigger" -+ depends on LEDS_TRIGGERS -+ help -+ This allows LEDs to be controlled by network device activity. -+ If unsure, say Y. -+ - endif # LEDS_TRIGGERS -diff -Naur linux-3.10.9.org/drivers/leds/trigger/ledtrig-netdev.c linux-3.10.9/drivers/leds/trigger/ledtrig-netdev.c ---- linux-3.10.9.org/drivers/leds/trigger/ledtrig-netdev.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.10.9/drivers/leds/trigger/ledtrig-netdev.c 2013-08-30 20:44:17.857339974 +0200 -@@ -0,0 +1,451 @@ -+/* -+ * LED Kernel Netdev Trigger -+ * -+ * Toggles the LED to reflect the link and traffic state of a named net device -+ * -+ * Copyright 2007 Oliver Jowett oliver@opencloud.com -+ * -+ * Derived from ledtrig-timer.c which is: -+ * Copyright 2005-2006 Openedhand Ltd. -+ * Author: Richard Purdie rpurdie@openedhand.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/module.h> -+#include <linux/jiffies.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/device.h> -+#include <linux/netdevice.h> -+#include <linux/timer.h> -+#include <linux/ctype.h> -+#include <linux/leds.h> -+#include <linux/version.h> -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+#include <net/net_namespace.h> -+#endif -+ -+#include "../leds.h" -+ -+/* -+ * Configurable sysfs attributes: -+ * -+ * device_name - network device name to monitor -+ * -+ * interval - duration of LED blink, in milliseconds -+ * -+ * mode - either "none" (LED is off) or a space separated list of one or more of: -+ * link: LED's normal state reflects whether the link is up (has carrier) or not -+ * tx: LED blinks on transmitted data -+ * rx: LED blinks on receive data -+ * -+ * Some suggestions: -+ * -+ * Simple link status LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo link >someled/mode -+ * -+ * Ethernet-style link/activity LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo "link tx rx" >someled/mode -+ * -+ * Modem-style tx/rx LEDs: -+ * $ echo netdev >led1/trigger -+ * $ echo ppp0 >led1/device_name -+ * $ echo tx >led1/mode -+ * $ echo netdev >led2/trigger -+ * $ echo ppp0 >led2/device_name -+ * $ echo rx >led2/mode -+ * -+ */ -+ -+#define MODE_LINK 1 -+#define MODE_TX 2 -+#define MODE_RX 4 -+ -+struct led_netdev_data { -+ rwlock_t lock; -+ -+ struct timer_list timer; -+ struct notifier_block notifier; -+ -+ struct led_classdev *led_cdev; -+ struct net_device *net_dev; -+ -+ char device_name[IFNAMSIZ]; -+ unsigned interval; -+ unsigned mode; -+ unsigned link_up; -+ unsigned last_activity; -+}; -+ -+static void set_baseline_state(struct led_netdev_data *trigger_data) -+{ -+ if ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ else -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ -+ if ((trigger_data->mode & (MODE_TX | MODE_RX)) != 0 && trigger_data->link_up) -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ else -+ del_timer(&trigger_data->timer); -+} -+ -+static ssize_t led_device_name_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%s\n", trigger_data->device_name); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+extern struct net init_net; -+#endif -+ -+static ssize_t led_device_name_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (size < 0 || size >= IFNAMSIZ) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ -+ strcpy(trigger_data->device_name, buf); -+ if (size > 0 && trigger_data->device_name[size-1] == '\n') -+ trigger_data->device_name[size-1] = 0; -+ -+ if (trigger_data->device_name[0] != 0) { -+ /* check for existing device to update from */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+ trigger_data->net_dev = dev_get_by_name(&init_net, trigger_data->device_name); -+#else -+ trigger_data->net_dev = dev_get_by_name(trigger_data->device_name); -+#endif -+ if (trigger_data->net_dev != NULL) -+ trigger_data->link_up = (dev_get_flags(trigger_data->net_dev) & IFF_LOWER_UP) != 0; -+ set_baseline_state(trigger_data); /* updates LEDs, may start timers */ -+ } -+ -+ write_unlock(&trigger_data->lock); -+ return size; -+} -+ -+static DEVICE_ATTR(device_name, 0644, led_device_name_show, led_device_name_store); -+ -+static ssize_t led_mode_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ -+ if (trigger_data->mode == 0) { -+ strcpy(buf, "none\n"); -+ } else { -+ if (trigger_data->mode & MODE_LINK) -+ strcat(buf, "link "); -+ if (trigger_data->mode & MODE_TX) -+ strcat(buf, "tx "); -+ if (trigger_data->mode & MODE_RX) -+ strcat(buf, "rx "); -+ strcat(buf, "\n"); -+ } -+ -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf)+1; -+} -+ -+static ssize_t led_mode_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ char copybuf[1024]; -+ int new_mode = -1; -+ char *p, *token; -+ -+ /* take a copy since we don't want to trash the inbound buffer when using strsep */ -+ strncpy(copybuf, buf, sizeof(copybuf)); -+ copybuf[1023] = 0; -+ p = copybuf; -+ -+ while ((token = strsep(&p, " \t\n")) != NULL) { -+ if (!*token) -+ continue; -+ -+ if (new_mode == -1) -+ new_mode = 0; -+ -+ if (!strcmp(token, "none")) -+ new_mode = 0; -+ else if (!strcmp(token, "tx")) -+ new_mode |= MODE_TX; -+ else if (!strcmp(token, "rx")) -+ new_mode |= MODE_RX; -+ else if (!strcmp(token, "link")) -+ new_mode |= MODE_LINK; -+ else -+ return -EINVAL; -+ } -+ -+ if (new_mode == -1) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ trigger_data->mode = new_mode; -+ set_baseline_state(trigger_data); -+ write_unlock(&trigger_data->lock); -+ -+ return size; -+} -+ -+static DEVICE_ATTR(mode, 0644, led_mode_show, led_mode_store); -+ -+static ssize_t led_interval_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%u\n", jiffies_to_msecs(trigger_data->interval)); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+static ssize_t led_interval_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ int ret = -EINVAL; -+ char *after; -+ unsigned long value = simple_strtoul(buf, &after, 10); -+ size_t count = after - buf; -+ -+ if (*after && isspace(*after)) -+ count++; -+ -+ /* impose some basic bounds on the timer interval */ -+ if (count == size && value >= 5 && value <= 10000) { -+ write_lock(&trigger_data->lock); -+ trigger_data->interval = msecs_to_jiffies(value); -+ set_baseline_state(trigger_data); // resets timer -+ write_unlock(&trigger_data->lock); -+ ret = count; -+ } -+ -+ return ret; -+} -+ -+static DEVICE_ATTR(interval, 0644, led_interval_show, led_interval_store); -+ -+static int netdev_trig_notify(struct notifier_block *nb, -+ unsigned long evt, -+ void *dv) -+{ -+ struct net_device *dev = dv; -+ struct led_netdev_data *trigger_data = container_of(nb, struct led_netdev_data, notifier); -+ -+ if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER) -+ return NOTIFY_DONE; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (strcmp(dev->name, trigger_data->device_name)) -+ goto done; -+ -+ if (evt == NETDEV_REGISTER) { -+ if (trigger_data->net_dev != NULL) -+ dev_put(trigger_data->net_dev); -+ dev_hold(dev); -+ trigger_data->net_dev = dev; -+ trigger_data->link_up = 0; -+ goto done; -+ } -+ -+ if (evt == NETDEV_UNREGISTER && trigger_data->net_dev != NULL) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ goto done; -+ } -+ -+ /* UP / DOWN / CHANGE */ -+ -+ trigger_data->link_up = (evt != NETDEV_DOWN && netif_carrier_ok(dev)); -+ set_baseline_state(trigger_data); -+ -+done: -+ write_unlock(&trigger_data->lock); -+ return NOTIFY_DONE; -+} -+ -+/* here's the real work! */ -+static void netdev_trig_timer(unsigned long arg) -+{ -+ struct led_netdev_data *trigger_data = (struct led_netdev_data *)arg; -+ struct rtnl_link_stats64 *dev_stats; -+ unsigned new_activity; -+ struct rtnl_link_stats64 temp; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (!trigger_data->link_up || !trigger_data->net_dev || (trigger_data->mode & (MODE_TX | MODE_RX)) == 0) { -+ /* we don't need to do timer work, just reflect link state. */ -+ led_set_brightness(trigger_data->led_cdev, ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) ? LED_FULL : LED_OFF); -+ goto no_restart; -+ } -+ -+ dev_stats = dev_get_stats(trigger_data->net_dev, &temp); -+ new_activity = -+ ((trigger_data->mode & MODE_TX) ? dev_stats->tx_packets : 0) + -+ ((trigger_data->mode & MODE_RX) ? dev_stats->rx_packets : 0); -+ -+ if (trigger_data->mode & MODE_LINK) { -+ /* base state is ON (link present) */ -+ /* if there's no link, we don't get this far and the LED is off */ -+ -+ /* OFF -> ON always */ -+ /* ON -> OFF on activity */ -+ if (trigger_data->led_cdev->brightness == LED_OFF) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } -+ } else { -+ /* base state is OFF */ -+ /* ON -> OFF always */ -+ /* OFF -> ON on activity */ -+ if (trigger_data->led_cdev->brightness == LED_FULL) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } -+ } -+ -+ trigger_data->last_activity = new_activity; -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ -+no_restart: -+ write_unlock(&trigger_data->lock); -+} -+ -+static void netdev_trig_activate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data; -+ int rc; -+ -+ trigger_data = kzalloc(sizeof(struct led_netdev_data), GFP_KERNEL); -+ if (!trigger_data) -+ return; -+ -+ rwlock_init(&trigger_data->lock); -+ -+ trigger_data->notifier.notifier_call = netdev_trig_notify; -+ trigger_data->notifier.priority = 10; -+ -+ setup_timer(&trigger_data->timer, netdev_trig_timer, (unsigned long) trigger_data); -+ -+ trigger_data->led_cdev = led_cdev; -+ trigger_data->net_dev = NULL; -+ trigger_data->device_name[0] = 0; -+ -+ trigger_data->mode = 0; -+ trigger_data->interval = msecs_to_jiffies(50); -+ trigger_data->link_up = 0; -+ trigger_data->last_activity = 0; -+ -+ led_cdev->trigger_data = trigger_data; -+ -+ rc = device_create_file(led_cdev->dev, &dev_attr_device_name); -+ if (rc) -+ goto err_out; -+ rc = device_create_file(led_cdev->dev, &dev_attr_mode); -+ if (rc) -+ goto err_out_device_name; -+ rc = device_create_file(led_cdev->dev, &dev_attr_interval); -+ if (rc) -+ goto err_out_mode; -+ -+ register_netdevice_notifier(&trigger_data->notifier); -+ return; -+ -+err_out_mode: -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+err_out_device_name: -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+err_out: -+ led_cdev->trigger_data = NULL; -+ kfree(trigger_data); -+} -+ -+static void netdev_trig_deactivate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (trigger_data) { -+ unregister_netdevice_notifier(&trigger_data->notifier); -+ -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+ device_remove_file(led_cdev->dev, &dev_attr_interval); -+ -+ write_lock(&trigger_data->lock); -+ -+ if (trigger_data->net_dev) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ } -+ -+ write_unlock(&trigger_data->lock); -+ -+ del_timer_sync(&trigger_data->timer); -+ -+ kfree(trigger_data); -+ } -+} -+ -+static struct led_trigger netdev_led_trigger = { -+ .name = "netdev", -+ .activate = netdev_trig_activate, -+ .deactivate = netdev_trig_deactivate, -+}; -+ -+static int __init netdev_trig_init(void) -+{ -+ return led_trigger_register(&netdev_led_trigger); -+} -+ -+static void __exit netdev_trig_exit(void) -+{ -+ led_trigger_unregister(&netdev_led_trigger); -+} -+ -+module_init(netdev_trig_init); -+module_exit(netdev_trig_exit); -+ -+MODULE_AUTHOR("Oliver Jowett oliver@opencloud.com"); -+MODULE_DESCRIPTION("Netdev LED trigger"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.10.9.org/drivers/leds/trigger/Makefile linux-3.10.9/drivers/leds/trigger/Makefile ---- linux-3.10.9.org/drivers/leds/trigger/Makefile 2013-08-21 00:40:47.000000000 +0200 -+++ linux-3.10.9/drivers/leds/trigger/Makefile 2013-08-30 20:43:56.414009853 +0200 -@@ -8,3 +8,4 @@ - obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o - obj-$(CONFIG_LEDS_TRIGGER_TRANSIENT) += ledtrig-transient.o - obj-$(CONFIG_LEDS_TRIGGER_CAMERA) += ledtrig-camera.o -+obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o diff --git a/src/patches/linux-3.10.y-usbnet_mcs7830_rework_link_detect.patch b/src/patches/linux-3.10.y-usbnet_mcs7830_rework_link_detect.patch deleted file mode 100644 index 2114ae8..0000000 --- a/src/patches/linux-3.10.y-usbnet_mcs7830_rework_link_detect.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 4e9792dc8ab29175295c79c35f9f6fbd2d453b35 Mon Sep 17 00:00:00 2001 -From: Octavian Purdila octavian.purdila@intel.com -Date: Mon, 23 Dec 2013 19:06:31 +0200 -Subject: [PATCH] usbnet: mcs7830: rework link state detection - -Even with the quirks in commit dabdaf0c (mcs7830: Fix link state -detection) there are still spurious link-down events for some chips -where the false link-down events count go over a few hundreds. - -This patch takes a more conservative approach and only looks at -link-down events where the link-down state is not combined with other -states (e.g. half/full speed, pending frames in SRAM or TX status -information valid). In all other cases we assume the link is up. - -Tested on MCS7830CV-DA (USB ID 9710:7830). - -Cc: Ondrej Zary linux@rainbow-software.org -Cc: Michael Leun lkml20120218@newton.leun.net -Cc: Ming Lei ming.lei@canonical.com -Signed-off-by: Octavian Purdila octavian.purdila@intel.com -Signed-off-by: David S. Miller davem@davemloft.net ---- - drivers/net/usb/mcs7830.c | 19 ++++--------------- - 1 file changed, 4 insertions(+), 15 deletions(-) - -diff --git a/drivers/net/usb/mcs7830.c b/drivers/net/usb/mcs7830.c -index 9237c45..8dd48b5 100644 ---- a/drivers/net/usb/mcs7830.c -+++ b/drivers/net/usb/mcs7830.c -@@ -117,7 +117,6 @@ enum { - struct mcs7830_data { - u8 multi_filter[8]; - u8 config; -- u8 link_counter; - }; - - static const char driver_name[] = "MOSCHIP usb-ethernet driver"; -@@ -562,26 +561,16 @@ static void mcs7830_status(struct usbnet *dev, struct urb *urb) - { - u8 *buf = urb->transfer_buffer; - bool link, link_changed; -- struct mcs7830_data *data = mcs7830_get_data(dev); - - if (urb->actual_length < 16) - return; - -- link = !(buf[1] & 0x20); -+ link = !(buf[1] == 0x20); - link_changed = netif_carrier_ok(dev->net) != link; - if (link_changed) { -- data->link_counter++; -- /* -- track link state 20 times to guard against erroneous -- link state changes reported sometimes by the chip -- */ -- if (data->link_counter > 20) { -- data->link_counter = 0; -- usbnet_link_change(dev, link, 0); -- netdev_dbg(dev->net, "Link Status is: %d\n", link); -- } -- } else -- data->link_counter = 0; -+ usbnet_link_change(dev, link, 0); -+ netdev_dbg(dev->net, "Link Status is: %d\n", link); -+ } - } - - static const struct driver_info moschip_info = { --- -2.0.0 - diff --git a/src/patches/linux-3.2-0001-panda-wlan-fix.patch b/src/patches/linux-3.2-0001-panda-wlan-fix.patch deleted file mode 100644 index a2aaf20..0000000 --- a/src/patches/linux-3.2-0001-panda-wlan-fix.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c -index daa056e..fe03b09 100644 ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -261,6 +261,7 @@ static struct regulator_init_data omap4_vusb_idata = { - static struct regulator_init_data omap4_clk32kg_idata = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, - }, - }; - diff --git a/src/patches/linux-3.2-0002-panda-i2c.patch b/src/patches/linux-3.2-0002-panda-i2c.patch deleted file mode 100644 index fa3f6cc..0000000 --- a/src/patches/linux-3.2-0002-panda-i2c.patch +++ /dev/null @@ -1,51 +0,0 @@ -diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c -index 7f47092..2a05d3d 100644 ---- a/arch/arm/mach-omap2/id.c -+++ b/arch/arm/mach-omap2/id.c -@@ -389,8 +389,10 @@ static void __init omap4_check_revision(void) - omap_revision = OMAP4430_REV_ES2_1; - break; - case 4: -- default: - omap_revision = OMAP4430_REV_ES2_2; -+ case 6: -+ default: -+ omap_revision = OMAP4430_REV_ES2_3; - } - break; - case 0xb94e: -@@ -403,7 +405,7 @@ static void __init omap4_check_revision(void) - break; - default: - /* Unknown default to latest silicon rev as default */ -- omap_revision = OMAP4430_REV_ES2_2; -+ omap_revision = OMAP4430_REV_ES2_3; - } - - pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, -diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -index 7695e5d..71d3e36 100644 ---- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c -@@ -2257,7 +2257,8 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { - }; - - static struct omap_i2c_dev_attr i2c_dev_attr = { -- .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, -+ .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE | -+ OMAP_I2C_FLAG_RESET_REGS_POSTIDLE, - }; - - /* i2c1 */ -diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h -index 408a12f..e279395 100644 ---- a/arch/arm/plat-omap/include/plat/cpu.h -+++ b/arch/arm/plat-omap/include/plat/cpu.h -@@ -391,6 +391,7 @@ IS_OMAP_TYPE(3517, 0x3517) - #define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) - #define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) - #define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) -+#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8)) - - #define OMAP446X_CLASS 0x44600044 - #define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) diff --git a/src/patches/linux-3.2-imq.patch b/src/patches/linux-3.2-imq.patch deleted file mode 100644 index 8e8685d..0000000 --- a/src/patches/linux-3.2-imq.patch +++ /dev/null @@ -1,1603 +0,0 @@ -diff -uNr linux-3.2/drivers/net/imq.c linux-3.2-imq/drivers/net/imq.c ---- linux-3.2/drivers/net/imq.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/drivers/net/imq.c 2011-11-04 12:16:10.454992642 +0200 -@@ -0,0 +1,850 @@ -+/* -+ * Pseudo-driver for the intermediate queue device. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Authors: Patrick McHardy, kaber@trash.net -+ * -+ * The first version was written by Martin Devera, devik@cdi.cz -+ * -+ * Credits: Jan Rafaj imq2t@cedric.vabo.cz -+ * - Update patch to 2.4.21 -+ * Sebastian Strollo sstrollo@nortelnetworks.com -+ * - Fix "Dead-loop on netdevice imq"-issue -+ * Marcel Sebek sebek64@post.cz -+ * - Update to 2.6.2-rc1 -+ * -+ * After some time of inactivity there is a group taking care -+ * of IMQ again: http://www.linuximq.net -+ * -+ * -+ * 2004/06/30 - New version of IMQ patch to kernels <=2.6.7 -+ * including the following changes: -+ * -+ * - Correction of ipv6 support "+"s issue (Hasso Tepper) -+ * - Correction of imq_init_devs() issue that resulted in -+ * kernel OOPS unloading IMQ as module (Norbert Buchmuller) -+ * - Addition of functionality to choose number of IMQ devices -+ * during kernel config (Andre Correa) -+ * - Addition of functionality to choose how IMQ hooks on -+ * PRE and POSTROUTING (after or before NAT) (Andre Correa) -+ * - Cosmetic corrections (Norbert Buchmuller) (Andre Correa) -+ * -+ * -+ * 2005/12/16 - IMQ versions between 2.6.7 and 2.6.13 were -+ * released with almost no problems. 2.6.14-x was released -+ * with some important changes: nfcache was removed; After -+ * some weeks of trouble we figured out that some IMQ fields -+ * in skb were missing in skbuff.c - skb_clone and copy_skb_header. -+ * These functions are correctly patched by this new patch version. -+ * -+ * Thanks for all who helped to figure out all the problems with -+ * 2.6.14.x: Patrick McHardy, Rune Kock, VeNoMouS, Max CtRiX, -+ * Kevin Shanahan, Richard Lucassen, Valery Dachev (hopefully -+ * I didn't forget anybody). I apologize again for my lack of time. -+ * -+ * -+ * 2008/06/17 - 2.6.25 - Changed imq.c to use qdisc_run() instead -+ * of qdisc_restart() and moved qdisc_run() to tasklet to avoid -+ * recursive locking. New initialization routines to fix 'rmmod' not -+ * working anymore. Used code from ifb.c. (Jussi Kivilinna) -+ * -+ * 2008/08/06 - 2.6.26 - (JK) -+ * - Replaced tasklet with 'netif_schedule()'. -+ * - Cleaned up and added comments for imq_nf_queue(). -+ * -+ * 2009/04/12 -+ * - Add skb_save_cb/skb_restore_cb helper functions for backuping -+ * control buffer. This is needed because qdisc-layer on kernels -+ * 2.6.27 and newer overwrite control buffer. (Jussi Kivilinna) -+ * - Add better locking for IMQ device. Hopefully this will solve -+ * SMP issues. (Jussi Kivilinna) -+ * - Port to 2.6.27 -+ * - Port to 2.6.28 -+ * - Port to 2.6.29 + fix rmmod not working -+ * -+ * 2009/04/20 - (Jussi Kivilinna) -+ * - Use netdevice feature flags to avoid extra packet handling -+ * by core networking layer and possibly increase performance. -+ * -+ * 2009/09/26 - (Jussi Kivilinna) -+ * - Add imq_nf_reinject_lockless to fix deadlock with -+ * imq_nf_queue/imq_nf_reinject. -+ * -+ * 2009/12/08 - (Jussi Kivilinna) -+ * - Port to 2.6.32 -+ * - Add check for skb->nf_queue_entry==NULL in imq_dev_xmit() -+ * - Also add better error checking for skb->nf_queue_entry usage -+ * -+ * 2010/02/25 - (Jussi Kivilinna) -+ * - Port to 2.6.33 -+ * -+ * 2010/08/15 - (Jussi Kivilinna) -+ * - Port to 2.6.35 -+ * - Simplify hook registration by using nf_register_hooks. -+ * - nf_reinject doesn't need spinlock around it, therefore remove -+ * imq_nf_reinject function. Other nf_reinject users protect -+ * their own data with spinlock. With IMQ however all data is -+ * needed is stored per skbuff, so no locking is needed. -+ * - Changed IMQ to use 'separate' NF_IMQ_QUEUE instead of -+ * NF_QUEUE, this allows working coexistance of IMQ and other -+ * NF_QUEUE users. -+ * - Make IMQ multi-queue. Number of IMQ device queues can be -+ * increased with 'numqueues' module parameters. Default number -+ * of queues is 1, in other words by default IMQ works as -+ * single-queue device. Multi-queue selection is based on -+ * IFB multi-queue patch by Changli Gao xiaosuo@gmail.com. -+ * -+ * 2011/03/18 - (Jussi Kivilinna) -+ * - Port to 2.6.38 -+ * -+ * 2011/07/12 - (syoder89@gmail.com) -+ * - Crash fix that happens when the receiving interface has more -+ * than one queue (add missing skb_set_queue_mapping in -+ * imq_select_queue). -+ * -+ * 2011/07/26 - (Jussi Kivilinna) -+ * - Add queue mapping checks for packets exiting IMQ. -+ * - Port to 3.0 -+ * -+ * 2011/08/16 - (Jussi Kivilinna) -+ * - Clear IFF_TX_SKB_SHARING flag that was added for linux 3.0.2 -+ * -+ * 2011/11/03 - Germano Michel germanomichel@gmail.com -+ * - Fix IMQ for net namespaces -+ * -+ * 2011/11/04 - Jussi Kivilinna jussi.kivilinna@mbnet.fi -+ * - Port to 3.1 -+ * - Clean-up, move 'get imq device pointer by imqX name' to -+ * separate function from imq_nf_queue(). -+ * -+ * Also, many thanks to pablo Sebastian Greco for making the initial -+ * patch and to those who helped the testing. -+ * -+ * More info at: http://www.linuximq.net/ (Andre Correa) -+ */ -+ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/moduleparam.h> -+#include <linux/list.h> -+#include <linux/skbuff.h> -+#include <linux/netdevice.h> -+#include <linux/etherdevice.h> -+#include <linux/rtnetlink.h> -+#include <linux/if_arp.h> -+#include <linux/netfilter.h> -+#include <linux/netfilter_ipv4.h> -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ #include <linux/netfilter_ipv6.h> -+#endif -+#include <linux/imq.h> -+#include <net/pkt_sched.h> -+#include <net/netfilter/nf_queue.h> -+#include <net/sock.h> -+#include <linux/ip.h> -+#include <linux/ipv6.h> -+#include <linux/if_vlan.h> -+#include <linux/if_pppox.h> -+#include <net/ip.h> -+#include <net/ipv6.h> -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num); -+ -+static nf_hookfn imq_nf_hook; -+ -+static struct nf_hook_ops imq_ops[] = { -+ { -+ /* imq_ingress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv4 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP_PRI_LAST, -+#else -+ .priority = NF_IP_PRI_NAT_SRC - 1, -+#endif -+ }, -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ { -+ /* imq_ingress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_PRE_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ .priority = NF_IP6_PRI_MANGLE + 1, -+#else -+ .priority = NF_IP6_PRI_NAT_DST + 1, -+#endif -+ }, -+ { -+ /* imq_egress_ipv6 */ -+ .hook = imq_nf_hook, -+ .owner = THIS_MODULE, -+ .pf = PF_INET6, -+ .hooknum = NF_INET_POST_ROUTING, -+#if defined(CONFIG_IMQ_BEHAVIOR_AA) || defined(CONFIG_IMQ_BEHAVIOR_BA) -+ .priority = NF_IP6_PRI_LAST, -+#else -+ .priority = NF_IP6_PRI_NAT_SRC - 1, -+#endif -+ }, -+#endif -+}; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+static int numdevs = CONFIG_IMQ_NUM_DEVS; -+#else -+static int numdevs = IMQ_MAX_DEVS; -+#endif -+ -+static struct net_device *imq_devs_cache[IMQ_MAX_DEVS]; -+ -+#define IMQ_MAX_QUEUES 32 -+static int numqueues = 1; -+static u32 imq_hashrnd; -+ -+static inline __be16 pppoe_proto(const struct sk_buff *skb) -+{ -+ return *((__be16 *)(skb_mac_header(skb) + ETH_HLEN + -+ sizeof(struct pppoe_hdr))); -+} -+ -+static u16 imq_hash(struct net_device *dev, struct sk_buff *skb) -+{ -+ unsigned int pull_len; -+ u16 protocol = skb->protocol; -+ u32 addr1, addr2; -+ u32 hash, ihl = 0; -+ union { -+ u16 in16[2]; -+ u32 in32; -+ } ports; -+ u8 ip_proto; -+ -+ pull_len = 0; -+ -+recheck: -+ switch (protocol) { -+ case htons(ETH_P_8021Q): { -+ if (unlikely(skb_pull(skb, VLAN_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += VLAN_HLEN; -+ skb->network_header += VLAN_HLEN; -+ -+ protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; -+ goto recheck; -+ } -+ -+ case htons(ETH_P_PPP_SES): { -+ if (unlikely(skb_pull(skb, PPPOE_SES_HLEN) == NULL)) -+ goto other; -+ -+ pull_len += PPPOE_SES_HLEN; -+ skb->network_header += PPPOE_SES_HLEN; -+ -+ protocol = pppoe_proto(skb); -+ goto recheck; -+ } -+ -+ case htons(ETH_P_IP): { -+ const struct iphdr *iph = ip_hdr(skb); -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct iphdr)))) -+ goto other; -+ -+ addr1 = iph->daddr; -+ addr2 = iph->saddr; -+ -+ ip_proto = !(ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) ? -+ iph->protocol : 0; -+ ihl = ip_hdrlen(skb); -+ -+ break; -+ } -+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) -+ case htons(ETH_P_IPV6): { -+ const struct ipv6hdr *iph = ipv6_hdr(skb); -+ -+ if (unlikely(!pskb_may_pull(skb, sizeof(struct ipv6hdr)))) -+ goto other; -+ -+ addr1 = iph->daddr.s6_addr32[3]; -+ addr2 = iph->saddr.s6_addr32[3]; -+ ihl = ipv6_skip_exthdr(skb, sizeof(struct ipv6hdr), &ip_proto); -+ if (unlikely(ihl < 0)) -+ goto other; -+ -+ break; -+ } -+#endif -+ default: -+other: -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ return (u16)(ntohs(protocol) % dev->real_num_tx_queues); -+ } -+ -+ if (addr1 > addr2) -+ swap(addr1, addr2); -+ -+ switch (ip_proto) { -+ case IPPROTO_TCP: -+ case IPPROTO_UDP: -+ case IPPROTO_DCCP: -+ case IPPROTO_ESP: -+ case IPPROTO_AH: -+ case IPPROTO_SCTP: -+ case IPPROTO_UDPLITE: { -+ if (likely(skb_copy_bits(skb, ihl, &ports.in32, 4) >= 0)) { -+ if (ports.in16[0] > ports.in16[1]) -+ swap(ports.in16[0], ports.in16[1]); -+ break; -+ } -+ /* fall-through */ -+ } -+ default: -+ ports.in32 = 0; -+ break; -+ } -+ -+ if (pull_len != 0) { -+ skb_push(skb, pull_len); -+ skb->network_header -= pull_len; -+ } -+ -+ hash = jhash_3words(addr1, addr2, ports.in32, imq_hashrnd ^ ip_proto); -+ -+ return (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+} -+ -+static inline bool sk_tx_queue_recorded(struct sock *sk) -+{ -+ return (sk_tx_queue_get(sk) >= 0); -+} -+ -+static struct netdev_queue *imq_select_queue(struct net_device *dev, -+ struct sk_buff *skb) -+{ -+ u16 queue_index = 0; -+ u32 hash; -+ -+ if (likely(dev->real_num_tx_queues == 1)) -+ goto out; -+ -+ /* IMQ can be receiving ingress or engress packets. */ -+ -+ /* Check first for if rx_queue is set */ -+ if (skb_rx_queue_recorded(skb)) { -+ queue_index = skb_get_rx_queue(skb); -+ goto out; -+ } -+ -+ /* Check if socket has tx_queue set */ -+ if (sk_tx_queue_recorded(skb->sk)) { -+ queue_index = sk_tx_queue_get(skb->sk); -+ goto out; -+ } -+ -+ /* Try use socket hash */ -+ if (skb->sk && skb->sk->sk_hash) { -+ hash = skb->sk->sk_hash; -+ queue_index = -+ (u16)(((u64)hash * dev->real_num_tx_queues) >> 32); -+ goto out; -+ } -+ -+ /* Generate hash from packet data */ -+ queue_index = imq_hash(dev, skb); -+ -+out: -+ if (unlikely(queue_index >= dev->real_num_tx_queues)) -+ queue_index = (u16)((u32)queue_index % dev->real_num_tx_queues); -+ -+ skb_set_queue_mapping(skb, queue_index); -+ return netdev_get_tx_queue(dev, queue_index); -+} -+ -+static struct net_device_stats *imq_get_stats(struct net_device *dev) -+{ -+ return &dev->stats; -+} -+ -+/* called for packets kfree'd in qdiscs at places other than enqueue */ -+static void imq_skb_destructor(struct sk_buff *skb) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ -+ if (entry) { -+ nf_queue_entry_release_refs(entry); -+ kfree(entry); -+ } -+ -+ skb_restore_cb(skb); /* kfree backup */ -+} -+ -+static void imq_done_check_queue_mapping(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ unsigned int queue_index; -+ -+ /* Don't let queue_mapping be left too large after exiting IMQ */ -+ if (likely(skb->dev != dev && skb->dev != NULL)) { -+ queue_index = skb_get_queue_mapping(skb); -+ if (unlikely(queue_index >= skb->dev->real_num_tx_queues)) { -+ queue_index = (u16)((u32)queue_index % -+ skb->dev->real_num_tx_queues); -+ skb_set_queue_mapping(skb, queue_index); -+ } -+ } else { -+ /* skb->dev was IMQ device itself or NULL, be on safe side and -+ * just clear queue mapping. -+ */ -+ skb_set_queue_mapping(skb, 0); -+ } -+} -+ -+static netdev_tx_t imq_dev_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct nf_queue_entry *entry = skb->nf_queue_entry; -+ -+ skb->nf_queue_entry = NULL; -+ dev->trans_start = jiffies; -+ -+ dev->stats.tx_bytes += skb->len; -+ dev->stats.tx_packets++; -+ -+ if (unlikely(entry == NULL)) { -+ /* We don't know what is going on here.. packet is queued for -+ * imq device, but (probably) not by us. -+ * -+ * If this packet was not send here by imq_nf_queue(), then -+ * skb_save_cb() was not used and skb_free() should not show: -+ * WARNING: IMQ: kfree_skb: skb->cb_next:.. -+ * and/or -+ * WARNING: IMQ: kfree_skb: skb->nf_queue_entry... -+ * -+ * However if this message is shown, then IMQ is somehow broken -+ * and you should report this to linuximq.net. -+ */ -+ -+ /* imq_dev_xmit is black hole that eats all packets, report that -+ * we eat this packet happily and increase dropped counters. -+ */ -+ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ return NETDEV_TX_OK; -+ } -+ -+ skb_restore_cb(skb); /* restore skb->cb */ -+ -+ skb->imq_flags = 0; -+ skb->destructor = NULL; -+ -+ imq_done_check_queue_mapping(skb, dev); -+ -+ nf_reinject(entry, NF_ACCEPT); -+ -+ return NETDEV_TX_OK; -+} -+ -+static struct net_device *get_imq_device_by_index(int index) -+{ -+ struct net_device *dev = NULL; -+ struct net *net; -+ char buf[8]; -+ -+ /* get device by name and cache result */ -+ snprintf(buf, sizeof(buf), "imq%d", index); -+ -+ /* Search device from all namespaces. */ -+ for_each_net(net) { -+ dev = dev_get_by_name(net, buf); -+ if (dev) -+ break; -+ } -+ -+ if (WARN_ON_ONCE(dev == NULL)) { -+ /* IMQ device not found. Exotic config? */ -+ return ERR_PTR(-ENODEV); -+ } -+ -+ imq_devs_cache[index] = dev; -+ dev_put(dev); -+ -+ return dev; -+} -+ -+static int imq_nf_queue(struct nf_queue_entry *entry, unsigned queue_num) -+{ -+ struct net_device *dev; -+ struct sk_buff *skb_orig, *skb, *skb_shared; -+ struct Qdisc *q; -+ struct netdev_queue *txq; -+ spinlock_t *root_lock; -+ int users, index; -+ int retval = -EINVAL; -+ unsigned int orig_queue_index; -+ -+ index = entry->skb->imq_flags & IMQ_F_IFMASK; -+ if (unlikely(index > numdevs - 1)) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ numdevs - 1); -+ retval = -EINVAL; -+ goto out; -+ } -+ -+ /* check for imq device by index from cache */ -+ dev = imq_devs_cache[index]; -+ if (unlikely(!dev)) { -+ dev = get_imq_device_by_index(index); -+ if (IS_ERR(dev)) { -+ retval = PTR_ERR(dev); -+ goto out; -+ } -+ } -+ -+ if (unlikely(!(dev->flags & IFF_UP))) { -+ entry->skb->imq_flags = 0; -+ nf_reinject(entry, NF_ACCEPT); -+ retval = 0; -+ goto out; -+ } -+ dev->last_rx = jiffies; -+ -+ skb = entry->skb; -+ skb_orig = NULL; -+ -+ /* skb has owner? => make clone */ -+ if (unlikely(skb->destructor)) { -+ skb_orig = skb; -+ skb = skb_clone(skb, GFP_ATOMIC); -+ if (unlikely(!skb)) { -+ retval = -ENOMEM; -+ goto out; -+ } -+ entry->skb = skb; -+ } -+ -+ skb->nf_queue_entry = entry; -+ -+ dev->stats.rx_bytes += skb->len; -+ dev->stats.rx_packets++; -+ -+ if (!skb->dev) { -+ /* skb->dev == NULL causes problems, try the find cause. */ -+ if (net_ratelimit()) { -+ dev_warn(&dev->dev, -+ "received packet with skb->dev == NULL\n"); -+ dump_stack(); -+ } -+ -+ skb->dev = dev; -+ } -+ -+ /* Disables softirqs for lock below */ -+ rcu_read_lock_bh(); -+ -+ /* Multi-queue selection */ -+ orig_queue_index = skb_get_queue_mapping(skb); -+ txq = imq_select_queue(dev, skb); -+ -+ q = rcu_dereference(txq->qdisc); -+ if (unlikely(!q->enqueue)) -+ goto packet_not_eaten_by_imq_dev; -+ -+ root_lock = qdisc_lock(q); -+ spin_lock(root_lock); -+ -+ users = atomic_read(&skb->users); -+ -+ skb_shared = skb_get(skb); /* increase reference count by one */ -+ skb_save_cb(skb_shared); /* backup skb->cb, as qdisc layer will -+ overwrite it */ -+ qdisc_enqueue_root(skb_shared, q); /* might kfree_skb */ -+ -+ if (likely(atomic_read(&skb_shared->users) == users + 1)) { -+ kfree_skb(skb_shared); /* decrease reference count by one */ -+ -+ skb->destructor = &imq_skb_destructor; -+ -+ /* cloned? */ -+ if (unlikely(skb_orig)) -+ kfree_skb(skb_orig); /* free original */ -+ -+ spin_unlock(root_lock); -+ rcu_read_unlock_bh(); -+ -+ /* schedule qdisc dequeue */ -+ __netif_schedule(q); -+ -+ retval = 0; -+ goto out; -+ } else { -+ skb_restore_cb(skb_shared); /* restore skb->cb */ -+ skb->nf_queue_entry = NULL; -+ /* qdisc dropped packet and decreased skb reference count of -+ * skb, so we don't really want to and try refree as that would -+ * actually destroy the skb. */ -+ spin_unlock(root_lock); -+ goto packet_not_eaten_by_imq_dev; -+ } -+ -+packet_not_eaten_by_imq_dev: -+ skb_set_queue_mapping(skb, orig_queue_index); -+ rcu_read_unlock_bh(); -+ -+ /* cloned? restore original */ -+ if (unlikely(skb_orig)) { -+ kfree_skb(skb); -+ entry->skb = skb_orig; -+ } -+ retval = -1; -+out: -+ return retval; -+} -+ -+static unsigned int imq_nf_hook(unsigned int hook, struct sk_buff *pskb, -+ const struct net_device *indev, -+ const struct net_device *outdev, -+ int (*okfn)(struct sk_buff *)) -+{ -+ return (pskb->imq_flags & IMQ_F_ENQUEUE) ? NF_IMQ_QUEUE : NF_ACCEPT; -+} -+ -+static int imq_close(struct net_device *dev) -+{ -+ netif_stop_queue(dev); -+ return 0; -+} -+ -+static int imq_open(struct net_device *dev) -+{ -+ netif_start_queue(dev); -+ return 0; -+} -+ -+static const struct net_device_ops imq_netdev_ops = { -+ .ndo_open = imq_open, -+ .ndo_stop = imq_close, -+ .ndo_start_xmit = imq_dev_xmit, -+ .ndo_get_stats = imq_get_stats, -+}; -+ -+static void imq_setup(struct net_device *dev) -+{ -+ dev->netdev_ops = &imq_netdev_ops; -+ dev->type = ARPHRD_VOID; -+ dev->mtu = 16000; /* too small? */ -+ dev->tx_queue_len = 11000; /* too big? */ -+ dev->flags = IFF_NOARP; -+ dev->features = NETIF_F_SG | NETIF_F_FRAGLIST | -+ NETIF_F_GSO | NETIF_F_HW_CSUM | -+ NETIF_F_HIGHDMA; -+ dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | -+ IFF_TX_SKB_SHARING); -+} -+ -+static int imq_validate(struct nlattr *tb[], struct nlattr *data[]) -+{ -+ int ret = 0; -+ -+ if (tb[IFLA_ADDRESS]) { -+ if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN) { -+ ret = -EINVAL; -+ goto end; -+ } -+ if (!is_valid_ether_addr(nla_data(tb[IFLA_ADDRESS]))) { -+ ret = -EADDRNOTAVAIL; -+ goto end; -+ } -+ } -+ return 0; -+end: -+ printk(KERN_WARNING "IMQ: imq_validate failed (%d)\n", ret); -+ return ret; -+} -+ -+static struct rtnl_link_ops imq_link_ops __read_mostly = { -+ .kind = "imq", -+ .priv_size = 0, -+ .setup = imq_setup, -+ .validate = imq_validate, -+}; -+ -+static const struct nf_queue_handler imq_nfqh = { -+ .name = "imq", -+ .outfn = imq_nf_queue, -+}; -+ -+static int __init imq_init_hooks(void) -+{ -+ int ret; -+ -+ nf_register_queue_imq_handler(&imq_nfqh); -+ -+ ret = nf_register_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ if (ret < 0) -+ nf_unregister_queue_imq_handler(); -+ -+ return ret; -+} -+ -+static int __init imq_init_one(int index) -+{ -+ struct net_device *dev; -+ int ret; -+ -+ dev = alloc_netdev_mq(0, "imq%d", imq_setup, numqueues); -+ if (!dev) -+ return -ENOMEM; -+ -+ ret = dev_alloc_name(dev, dev->name); -+ if (ret < 0) -+ goto fail; -+ -+ dev->rtnl_link_ops = &imq_link_ops; -+ ret = register_netdevice(dev); -+ if (ret < 0) -+ goto fail; -+ -+ return 0; -+fail: -+ free_netdev(dev); -+ return ret; -+} -+ -+static int __init imq_init_devs(void) -+{ -+ int err, i; -+ -+ if (numdevs < 1 || numdevs > IMQ_MAX_DEVS) { -+ printk(KERN_ERR "IMQ: numdevs has to be betweed 1 and %u\n", -+ IMQ_MAX_DEVS); -+ return -EINVAL; -+ } -+ -+ if (numqueues < 1 || numqueues > IMQ_MAX_QUEUES) { -+ printk(KERN_ERR "IMQ: numqueues has to be betweed 1 and %u\n", -+ IMQ_MAX_QUEUES); -+ return -EINVAL; -+ } -+ -+ get_random_bytes(&imq_hashrnd, sizeof(imq_hashrnd)); -+ -+ rtnl_lock(); -+ err = __rtnl_link_register(&imq_link_ops); -+ -+ for (i = 0; i < numdevs && !err; i++) -+ err = imq_init_one(i); -+ -+ if (err) { -+ __rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ } -+ rtnl_unlock(); -+ -+ return err; -+} -+ -+static int __init imq_init_module(void) -+{ -+ int err; -+ -+#if defined(CONFIG_IMQ_NUM_DEVS) -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS > 16); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS < 2); -+ BUILD_BUG_ON(CONFIG_IMQ_NUM_DEVS - 1 > IMQ_F_IFMASK); -+#endif -+ -+ err = imq_init_devs(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_devs(net)\n"); -+ return err; -+ } -+ -+ err = imq_init_hooks(); -+ if (err) { -+ printk(KERN_ERR "IMQ: Error trying imq_init_hooks()\n"); -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+ return err; -+ } -+ -+ printk(KERN_INFO "IMQ driver loaded successfully. " -+ "(numdevs = %d, numqueues = %d)\n", numdevs, numqueues); -+ -+#if defined(CONFIG_IMQ_BEHAVIOR_BA) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on PREROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on PREROUTING.\n"); -+#endif -+#if defined(CONFIG_IMQ_BEHAVIOR_AB) || defined(CONFIG_IMQ_BEHAVIOR_BB) -+ printk(KERN_INFO "\tHooking IMQ before NAT on POSTROUTING.\n"); -+#else -+ printk(KERN_INFO "\tHooking IMQ after NAT on POSTROUTING.\n"); -+#endif -+ -+ return 0; -+} -+ -+static void __exit imq_unhook(void) -+{ -+ nf_unregister_hooks(imq_ops, ARRAY_SIZE(imq_ops)); -+ nf_unregister_queue_imq_handler(); -+} -+ -+static void __exit imq_cleanup_devs(void) -+{ -+ rtnl_link_unregister(&imq_link_ops); -+ memset(imq_devs_cache, 0, sizeof(imq_devs_cache)); -+} -+ -+static void __exit imq_exit_module(void) -+{ -+ imq_unhook(); -+ imq_cleanup_devs(); -+ printk(KERN_INFO "IMQ driver unloaded successfully.\n"); -+} -+ -+module_init(imq_init_module); -+module_exit(imq_exit_module); -+ -+module_param(numdevs, int, 0); -+module_param(numqueues, int, 0); -+MODULE_PARM_DESC(numdevs, "number of IMQ devices (how many imq* devices will " -+ "be created)"); -+MODULE_PARM_DESC(numqueues, "number of queues per IMQ device"); -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. See " -+ "http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_RTNL_LINK("imq"); -+ -diff -uNr linux-3.2/drivers/net/Kconfig linux-3.2-imq/drivers/net/Kconfig ---- linux-3.2/drivers/net/Kconfig 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/drivers/net/Kconfig 2011-11-04 11:12:52.106390309 +0200 -@@ -90,6 +90,125 @@ - To compile this driver as a module, choose M here: the module - will be called eql. If unsure, say N. - -+config IMQ -+ tristate "IMQ (intermediate queueing device) support" -+ depends on NETDEVICES && NETFILTER -+ ---help--- -+ The IMQ device(s) is used as placeholder for QoS queueing -+ disciplines. Every packet entering/leaving the IP stack can be -+ directed through the IMQ device where it's enqueued/dequeued to the -+ attached qdisc. This allows you to treat network devices as classes -+ and distribute bandwidth among them. Iptables is used to specify -+ through which IMQ device, if any, packets travel. -+ -+ More information at: http://www.linuximq.net/ -+ -+ To compile this driver as a module, choose M here: the module -+ will be called imq. If unsure, say N. -+ -+choice -+ prompt "IMQ behavior (PRE/POSTROUTING)" -+ depends on IMQ -+ default IMQ_BEHAVIOR_AB -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ IMQ can work in any of the following ways: -+ -+ PREROUTING | POSTROUTING -+ -----------------|------------------- -+ #1 After NAT | After NAT -+ #2 After NAT | Before NAT -+ #3 Before NAT | After NAT -+ #4 Before NAT | Before NAT -+ -+ The default behavior is to hook before NAT on PREROUTING -+ and after NAT on POSTROUTING (#3). -+ -+ This settings are specially usefull when trying to use IMQ -+ to shape NATed clients. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AA -+ bool "IMQ AA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_AB -+ bool "IMQ AB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: After NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BA -+ bool "IMQ BA" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: After NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+config IMQ_BEHAVIOR_BB -+ bool "IMQ BB" -+ help -+ This setting defines how IMQ behaves in respect to its -+ hooking in PREROUTING and POSTROUTING. -+ -+ Choosing this option will make IMQ hook like this: -+ -+ PREROUTING: Before NAT -+ POSTROUTING: Before NAT -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ -+endchoice -+ -+config IMQ_NUM_DEVS -+ int "Number of IMQ devices" -+ range 2 16 -+ depends on IMQ -+ default "16" -+ help -+ This setting defines how many IMQ devices will be created. -+ -+ The default value is 16. -+ -+ More information can be found at: www.linuximq.net -+ -+ If not sure leave the default settings alone. -+ - config NET_FC - bool "Fibre Channel driver support" - depends on SCSI && PCI -diff -uNr linux-3.2/drivers/net/Makefile linux-3.2-imq/drivers/net/Makefile ---- linux-3.2/drivers/net/Makefile 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/drivers/net/Makefile 2011-11-04 11:12:52.106390309 +0200 -@@ -8,6 +8,7 @@ - obj-$(CONFIG_BONDING) += bonding/ - obj-$(CONFIG_DUMMY) += dummy.o - obj-$(CONFIG_EQUALIZER) += eql.o -+obj-$(CONFIG_IMQ) += imq.o - obj-$(CONFIG_IFB) += ifb.o - obj-$(CONFIG_MACVLAN) += macvlan.o - obj-$(CONFIG_MACVTAP) += macvtap.o -diff -uNr linux-3.2/include/linux/imq.h linux-3.2-imq/include/linux/imq.h ---- linux-3.2/include/linux/imq.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/include/linux/imq.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,13 @@ -+#ifndef _IMQ_H -+#define _IMQ_H -+ -+/* IFMASK (16 device indexes, 0 to 15) and flag(s) fit in 5 bits */ -+#define IMQ_F_BITS 5 -+ -+#define IMQ_F_IFMASK 0x0f -+#define IMQ_F_ENQUEUE 0x10 -+ -+#define IMQ_MAX_DEVS (IMQ_F_IFMASK + 1) -+ -+#endif /* _IMQ_H */ -+ -diff -uNr linux-3.2/include/linux/netfilter/xt_IMQ.h linux-3.2-imq/include/linux/netfilter/xt_IMQ.h ---- linux-3.2/include/linux/netfilter/xt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/include/linux/netfilter/xt_IMQ.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,9 @@ -+#ifndef _XT_IMQ_H -+#define _XT_IMQ_H -+ -+struct xt_imq_info { -+ unsigned int todev; /* target imq device */ -+}; -+ -+#endif /* _XT_IMQ_H */ -+ -diff -uNr linux-3.2/include/linux/netfilter.h linux-3.2-imq/include/linux/netfilter.h ---- linux-3.2/include/linux/netfilter.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/include/linux/netfilter.h 2011-11-04 11:12:52.109723710 +0200 -@@ -22,7 +22,8 @@ - #define NF_QUEUE 3 - #define NF_REPEAT 4 - #define NF_STOP 5 --#define NF_MAX_VERDICT NF_STOP -+#define NF_IMQ_QUEUE 6 -+#define NF_MAX_VERDICT NF_IMQ_QUEUE - - /* we overload the higher bits for encoding auxiliary data such as the queue - * number or errno values. Not nice, but better than additional function -diff -uNr linux-3.2/include/linux/netfilter_ipv4/ipt_IMQ.h linux-3.2-imq/include/linux/netfilter_ipv4/ipt_IMQ.h ---- linux-3.2/include/linux/netfilter_ipv4/ipt_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/include/linux/netfilter_ipv4/ipt_IMQ.h 2011-11-04 11:12:52.109723710 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IPT_IMQ_H -+#define _IPT_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ipt_imq_info xt_imq_info -+ -+#endif /* _IPT_IMQ_H */ -+ -diff -uNr linux-3.2/include/linux/netfilter_ipv6/ip6t_IMQ.h linux-3.2-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h ---- linux-3.2/include/linux/netfilter_ipv6/ip6t_IMQ.h 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/include/linux/netfilter_ipv6/ip6t_IMQ.h 2011-11-04 11:12:52.113057113 +0200 -@@ -0,0 +1,10 @@ -+#ifndef _IP6T_IMQ_H -+#define _IP6T_IMQ_H -+ -+/* Backwards compatibility for old userspace */ -+#include <linux/netfilter/xt_IMQ.h> -+ -+#define ip6t_imq_info xt_imq_info -+ -+#endif /* _IP6T_IMQ_H */ -+ -diff -uNr linux-3.2/include/linux/skbuff.h linux-3.2-imq/include/linux/skbuff.h ---- linux-3.2/include/linux/skbuff.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/include/linux/skbuff.h 2011-11-04 11:12:52.116390515 +0200 -@@ -30,6 +30,9 @@ - #include <linux/dmaengine.h> - #include <linux/hrtimer.h> - #include <linux/dma-mapping.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - - /* Don't change this without changing skb_csum_unnecessary! */ - #define CHECKSUM_NONE 0 -@@ -386,6 +389,9 @@ - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48] __aligned(8); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ void *cb_next; -+#endif - - unsigned long _skb_refdst; - #ifdef CONFIG_XFRM -@@ -424,6 +430,9 @@ - #ifdef NET_SKBUFF_NF_DEFRAG_NEEDED - struct sk_buff *nfct_reasm; - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ struct nf_queue_entry *nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; - #endif -@@ -449,6 +458,10 @@ - - /* 0/13 bit hole */ - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ __u8 imq_flags:IMQ_F_BITS; -+#endif -+ - #ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; - #endif -@@ -535,6 +548,12 @@ - return (struct rtable *)skb_dst(skb); - } - -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern int skb_save_cb(struct sk_buff *skb); -+extern int skb_restore_cb(struct sk_buff *skb); -+#endif -+ - extern void kfree_skb(struct sk_buff *skb); - extern void consume_skb(struct sk_buff *skb); - extern void __kfree_skb(struct sk_buff *skb); -@@ -2368,6 +2387,10 @@ - dst->nfct_reasm = src->nfct_reasm; - nf_conntrack_get_reasm(src->nfct_reasm); - #endif -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ dst->imq_flags = src->imq_flags; -+ dst->nf_queue_entry = src->nf_queue_entry; -+#endif - #ifdef CONFIG_BRIDGE_NETFILTER - dst->nf_bridge = src->nf_bridge; - nf_bridge_get(src->nf_bridge); -diff -uNr linux-3.2/include/net/netfilter/nf_queue.h linux-3.2-imq/include/net/netfilter/nf_queue.h ---- linux-3.2/include/net/netfilter/nf_queue.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/include/net/netfilter/nf_queue.h 2011-11-04 11:12:52.116390515 +0200 -@@ -30,5 +30,11 @@ - const struct nf_queue_handler *qh); - extern void nf_unregister_queue_handlers(const struct nf_queue_handler *qh); - extern void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict); -+extern void nf_queue_entry_release_refs(struct nf_queue_entry *entry); -+ -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+extern void nf_register_queue_imq_handler(const struct nf_queue_handler *qh); -+extern void nf_unregister_queue_imq_handler(void); -+#endif - - #endif /* _NF_QUEUE_H */ -diff -uNr linux-3.2/net/core/dev.c linux-3.2-imq/net/core/dev.c ---- linux-3.2/net/core/dev.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/core/dev.c 2011-11-04 11:12:52.119723915 +0200 -@@ -98,6 +98,9 @@ - #include <net/net_namespace.h> - #include <net/sock.h> - #include <linux/rtnetlink.h> -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+#include <linux/imq.h> -+#endif - #include <linux/proc_fs.h> - #include <linux/seq_file.h> - #include <linux/stat.h> -@@ -2185,7 +2188,12 @@ - if (dev->priv_flags & IFF_XMIT_DST_RELEASE) - skb_dst_drop(skb); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ if (!list_empty(&ptype_all) && -+ !(skb->imq_flags & IMQ_F_ENQUEUE)) -+#else - if (!list_empty(&ptype_all)) -+#endif - dev_queue_xmit_nit(skb, dev); - - skb_orphan_try(skb); -diff -uNr linux-3.2/net/core/skbuff.c linux-3.2-imq/net/core/skbuff.c ---- linux-3.2/net/core/skbuff.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/core/skbuff.c 2011-11-04 11:12:52.123057315 +0200 -@@ -73,6 +73,9 @@ - - static struct kmem_cache *skbuff_head_cache __read_mostly; - static struct kmem_cache *skbuff_fclone_cache __read_mostly; -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static struct kmem_cache *skbuff_cb_store_cache __read_mostly; -+#endif - - static void sock_pipe_buf_release(struct pipe_inode_info *pipe, - struct pipe_buffer *buf) -@@ -92,6 +95,82 @@ - return 1; - } - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+/* Control buffer save/restore for IMQ devices */ -+struct skb_cb_table { -+ char cb[48] __aligned(8); -+ void *cb_next; -+ atomic_t refcnt; -+}; -+ -+static DEFINE_SPINLOCK(skb_cb_store_lock); -+ -+int skb_save_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ next = kmem_cache_alloc(skbuff_cb_store_cache, GFP_ATOMIC); -+ if (!next) -+ return -ENOMEM; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(next->cb, skb->cb, sizeof(skb->cb)); -+ next->cb_next = skb->cb_next; -+ -+ atomic_set(&next->refcnt, 1); -+ -+ skb->cb_next = next; -+ return 0; -+} -+EXPORT_SYMBOL(skb_save_cb); -+ -+int skb_restore_cb(struct sk_buff *skb) -+{ -+ struct skb_cb_table *next; -+ -+ if (!skb->cb_next) -+ return 0; -+ -+ next = skb->cb_next; -+ -+ BUILD_BUG_ON(sizeof(skb->cb) != sizeof(next->cb)); -+ -+ memcpy(skb->cb, next->cb, sizeof(skb->cb)); -+ skb->cb_next = next->cb_next; -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ if (atomic_dec_and_test(&next->refcnt)) -+ kmem_cache_free(skbuff_cb_store_cache, next); -+ -+ spin_unlock(&skb_cb_store_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(skb_restore_cb); -+ -+static void skb_copy_stored_cb(struct sk_buff *new, const struct sk_buff *__old) -+{ -+ struct skb_cb_table *next; -+ struct sk_buff *old; -+ -+ if (!__old->cb_next) { -+ new->cb_next = NULL; -+ return; -+ } -+ -+ spin_lock(&skb_cb_store_lock); -+ -+ old = (struct sk_buff *)__old; -+ -+ next = old->cb_next; -+ atomic_inc(&next->refcnt); -+ new->cb_next = next; -+ -+ spin_unlock(&skb_cb_store_lock); -+} -+#endif - - /* Pipe buffer operations for a socket. */ - static const struct pipe_buf_operations sock_pipe_buf_ops = { -@@ -403,6 +482,26 @@ - WARN_ON(in_irq()); - skb->destructor(skb); - } -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ /* This should not happen. When it does, avoid memleak by restoring -+ the chain of cb-backups. */ -+ while (skb->cb_next != NULL) { -+ if (net_ratelimit()) -+ printk(KERN_WARNING "IMQ: kfree_skb: skb->cb_next: " -+ "%08x\n", (unsigned int)skb->cb_next); -+ -+ skb_restore_cb(skb); -+ } -+ /* This should not happen either, nf_queue_entry is nullified in -+ * imq_dev_xmit(). If we have non-NULL nf_queue_entry then we are -+ * leaking entry pointers, maybe memory. We don't know if this is -+ * pointer to already freed memory, or should this be freed. -+ * If this happens we need to add refcounting, etc for nf_queue_entry. -+ */ -+ if (skb->nf_queue_entry && net_ratelimit()) -+ printk(KERN_WARNING -+ "IMQ: kfree_skb: skb->nf_queue_entry != NULL"); -+#endif - #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - nf_conntrack_put(skb->nfct); - #endif -@@ -547,6 +646,9 @@ - new->sp = secpath_get(old->sp); - #endif - memcpy(new->cb, old->cb, sizeof(old->cb)); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skb_copy_stored_cb(new, old); -+#endif - new->csum = old->csum; - new->local_df = old->local_df; - new->pkt_type = old->pkt_type; -@@ -2907,6 +3009,13 @@ - 0, - SLAB_HWCACHE_ALIGN|SLAB_PANIC, - NULL); -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ skbuff_cb_store_cache = kmem_cache_create("skbuff_cb_store_cache", -+ sizeof(struct skb_cb_table), -+ 0, -+ SLAB_HWCACHE_ALIGN|SLAB_PANIC, -+ NULL); -+#endif - } - - /** -diff -uNr linux-3.2/net/ipv6/ip6_output.c linux-3.2-imq/net/ipv6/ip6_output.c ---- linux-3.2/net/ipv6/ip6_output.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/ipv6/ip6_output.c 2011-11-04 11:12:52.123057315 +0200 -@@ -102,9 +102,6 @@ - struct net_device *dev = dst->dev; - struct neighbour *neigh; - -- skb->protocol = htons(ETH_P_IPV6); -- skb->dev = dev; -- - if (ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr)) { - struct inet6_dev *idev = ip6_dst_idev(skb_dst(skb)); - -@@ -170,6 +167,11 @@ - return 0; - } - -+ /* IMQ-patch: moved setting skb->dev and skb->protocol from -+ * ip6_finish_output2 to fix crashing at netif_skb_features(). */ -+ skb->protocol = htons(ETH_P_IPV6); -+ skb->dev = dev; -+ - return NF_HOOK_COND(NFPROTO_IPV6, NF_INET_POST_ROUTING, skb, NULL, dev, - ip6_finish_output, - !(IP6CB(skb)->flags & IP6SKB_REROUTED)); -diff -uNr linux-3.2/net/netfilter/core.c linux-3.2-imq/net/netfilter/core.c ---- linux-3.2/net/netfilter/core.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/netfilter/core.c 2011-11-04 11:12:52.123057315 +0200 -@@ -179,9 +179,11 @@ - ret = NF_DROP_GETERR(verdict); - if (ret == 0) - ret = -EPERM; -- } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE) { -+ } else if ((verdict & NF_VERDICT_MASK) == NF_QUEUE || -+ (verdict & NF_VERDICT_MASK) == NF_IMQ_QUEUE) { - int err = nf_queue(skb, elem, pf, hook, indev, outdev, okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (err < 0) { - if (err == -ECANCELED) - goto next_hook; -diff -uNr linux-3.2/net/netfilter/Kconfig linux-3.2-imq/net/netfilter/Kconfig ---- linux-3.2/net/netfilter/Kconfig 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/netfilter/Kconfig 2011-11-04 11:12:52.123057315 +0200 -@@ -506,6 +506,18 @@ - For more information on the LEDs available on your system, see - Documentation/leds/leds-class.txt - -+config NETFILTER_XT_TARGET_IMQ -+ tristate '"IMQ" target support' -+ depends on NETFILTER_XTABLES -+ depends on IP_NF_MANGLE || IP6_NF_MANGLE -+ select IMQ -+ default m if NETFILTER_ADVANCED=n -+ help -+ This option adds a `IMQ' target which is used to specify if and -+ to which imq device packets should get enqueued/dequeued. -+ -+ To compile it as a module, choose M here. If unsure, say N. -+ - config NETFILTER_XT_TARGET_MARK - tristate '"MARK" target support' - depends on NETFILTER_ADVANCED -diff -uNr linux-3.2/net/netfilter/Makefile linux-3.2-imq/net/netfilter/Makefile ---- linux-3.2/net/netfilter/Makefile 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/netfilter/Makefile 2011-11-04 11:12:52.123057315 +0200 -@@ -56,6 +56,7 @@ - obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o - obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o - obj-$(CONFIG_NETFILTER_XT_TARGET_HL) += xt_HL.o -+obj-$(CONFIG_NETFILTER_XT_TARGET_IMQ) += xt_IMQ.o - obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFLOG) += xt_NFLOG.o - obj-$(CONFIG_NETFILTER_XT_TARGET_NFQUEUE) += xt_NFQUEUE.o -diff -uNr linux-3.2/net/netfilter/nf_internals.h linux-3.2-imq/net/netfilter/nf_internals.h ---- linux-3.2/net/netfilter/nf_internals.h 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/netfilter/nf_internals.h 2011-11-04 11:12:52.123057315 +0200 -@@ -29,7 +29,7 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum); -+ unsigned int queuenum, unsigned int queuetype); - extern int __init netfilter_queue_init(void); - - /* nf_log.c */ -diff -uNr linux-3.2/net/netfilter/nf_queue.c linux-3.2-imq/net/netfilter/nf_queue.c ---- linux-3.2/net/netfilter/nf_queue.c 2011-10-24 10:10:05.000000000 +0300 -+++ linux-3.2-imq/net/netfilter/nf_queue.c 2011-11-04 11:12:52.123057315 +0200 -@@ -22,6 +22,26 @@ - - static DEFINE_MUTEX(queue_handler_mutex); - -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+static const struct nf_queue_handler *queue_imq_handler; -+ -+void nf_register_queue_imq_handler(const struct nf_queue_handler *qh) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, qh); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL_GPL(nf_register_queue_imq_handler); -+ -+void nf_unregister_queue_imq_handler(void) -+{ -+ mutex_lock(&queue_handler_mutex); -+ rcu_assign_pointer(queue_imq_handler, NULL); -+ mutex_unlock(&queue_handler_mutex); -+} -+EXPORT_SYMBOL_GPL(nf_unregister_queue_imq_handler); -+#endif -+ - /* return EBUSY when somebody else is registered, return EEXIST if the - * same handler is registered, return 0 in case of success. */ - int nf_register_queue_handler(u_int8_t pf, const struct nf_queue_handler *qh) -@@ -92,7 +112,7 @@ - } - EXPORT_SYMBOL_GPL(nf_unregister_queue_handlers); - --static void nf_queue_entry_release_refs(struct nf_queue_entry *entry) -+void nf_queue_entry_release_refs(struct nf_queue_entry *entry) - { - /* Release those devices we held, or Alexey will kill me. */ - if (entry->indev) -@@ -112,6 +132,7 @@ - /* Drop reference to owner of hook which queued us. */ - module_put(entry->elem->owner); - } -+EXPORT_SYMBOL_GPL(nf_queue_entry_release_refs); - - /* - * Any packet that leaves via this function must come back -@@ -123,7 +144,8 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum) -+ unsigned int queuenum, -+ unsigned int queuetype) - { - int status = -ENOENT; - struct nf_queue_entry *entry = NULL; -@@ -137,7 +159,17 @@ - /* QUEUE == DROP if no one is waiting, to be safe. */ - rcu_read_lock(); - -- qh = rcu_dereference(queue_handler[pf]); -+ if (queuetype == NF_IMQ_QUEUE) { -+#if defined(CONFIG_IMQ) || defined(CONFIG_IMQ_MODULE) -+ qh = rcu_dereference(queue_imq_handler); -+#else -+ BUG(); -+ goto err_unlock; -+#endif -+ } else { -+ qh = rcu_dereference(queue_handler[pf]); -+ } -+ - if (!qh) { - status = -ESRCH; - goto err_unlock; -@@ -209,7 +241,8 @@ - struct net_device *indev, - struct net_device *outdev, - int (*okfn)(struct sk_buff *), -- unsigned int queuenum) -+ unsigned int queuenum, -+ unsigned int queuetype) - { - struct sk_buff *segs; - int err; -@@ -217,7 +250,7 @@ - - if (!skb_is_gso(skb)) - return __nf_queue(skb, elem, pf, hook, indev, outdev, okfn, -- queuenum); -+ queuenum, queuetype); - - switch (pf) { - case NFPROTO_IPV4: -@@ -244,7 +277,7 @@ - segs->next = NULL; - if (err == 0) - err = __nf_queue(segs, elem, pf, hook, indev, -- outdev, okfn, queuenum); -+ outdev, okfn, queuenum, queuetype); - if (err == 0) - queued++; - else -@@ -299,9 +332,11 @@ - local_bh_enable(); - break; - case NF_QUEUE: -+ case NF_IMQ_QUEUE: - err = __nf_queue(skb, elem, entry->pf, entry->hook, - entry->indev, entry->outdev, entry->okfn, -- verdict >> NF_VERDICT_QBITS); -+ verdict >> NF_VERDICT_QBITS, -+ verdict & NF_VERDICT_MASK); - if (err < 0) { - if (err == -ECANCELED) - goto next_hook; -diff -uNr linux-3.2/net/netfilter/xt_IMQ.c linux-3.2-imq/net/netfilter/xt_IMQ.c ---- linux-3.2/net/netfilter/xt_IMQ.c 1970-01-01 02:00:00.000000000 +0200 -+++ linux-3.2-imq/net/netfilter/xt_IMQ.c 2011-11-04 11:12:52.123057315 +0200 -@@ -0,0 +1,74 @@ -+/* -+ * This target marks packets to be enqueued to an imq device -+ */ -+#include <linux/module.h> -+#include <linux/skbuff.h> -+#include <linux/netfilter/x_tables.h> -+#include <linux/netfilter/xt_IMQ.h> -+#include <linux/imq.h> -+ -+static unsigned int imq_target(struct sk_buff *pskb, -+ const struct xt_action_param *par) -+{ -+ const struct xt_imq_info *mr = par->targinfo; -+ -+ pskb->imq_flags = (mr->todev & IMQ_F_IFMASK) | IMQ_F_ENQUEUE; -+ -+ return XT_CONTINUE; -+} -+ -+static int imq_checkentry(const struct xt_tgchk_param *par) -+{ -+ struct xt_imq_info *mr = par->targinfo; -+ -+ if (mr->todev > IMQ_MAX_DEVS - 1) { -+ printk(KERN_WARNING -+ "IMQ: invalid device specified, highest is %u\n", -+ IMQ_MAX_DEVS - 1); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static struct xt_target xt_imq_reg[] __read_mostly = { -+ { -+ .name = "IMQ", -+ .family = AF_INET, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+ { -+ .name = "IMQ", -+ .family = AF_INET6, -+ .checkentry = imq_checkentry, -+ .target = imq_target, -+ .targetsize = sizeof(struct xt_imq_info), -+ .table = "mangle", -+ .me = THIS_MODULE -+ }, -+}; -+ -+static int __init imq_init(void) -+{ -+ return xt_register_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+static void __exit imq_fini(void) -+{ -+ xt_unregister_targets(xt_imq_reg, ARRAY_SIZE(xt_imq_reg)); -+} -+ -+module_init(imq_init); -+module_exit(imq_fini); -+ -+MODULE_AUTHOR("http://www.linuximq.net"); -+MODULE_DESCRIPTION("Pseudo-driver for the intermediate queue device. " -+ "See http://www.linuximq.net/ for more information."); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("ipt_IMQ"); -+MODULE_ALIAS("ip6t_IMQ"); -+ diff --git a/src/patches/linux-3.2-panda-reboot.patch b/src/patches/linux-3.2-panda-reboot.patch deleted file mode 100644 index 8e37837..0000000 --- a/src/patches/linux-3.2-panda-reboot.patch +++ /dev/null @@ -1,29 +0,0 @@ -With commit 3d3f78d752bf, reboot seems to broken on ARM -machines. CPU dies while doing flush_pmd_entry() as part of -setup_mm_for_reboot() - -I know this is not the fix but intention is to report the -issue and also provide temporary fix till it get fixed correctly - -Signed-off-by: Santosh Shilimkar santosh.shilimkar@xxxxxx -Reported-by: Anand Gadiyar gadiyar@xxxxxx ---- -Tested with OMAP4 device. - - arch/arm/kernel/process.c | 1 - - 1 files changed, 0 insertions(+), 1 deletions(-) - -diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c -index e76fcaa..ac370b2 100644 ---- a/arch/arm/kernel/process.c -+++ b/arch/arm/kernel/process.c -@@ -247,7 +247,6 @@ void machine_power_off(void) - - void machine_restart(char *cmd) - { -- machine_shutdown(); - arm_pm_restart(reboot_mode, cmd); - } - --- -1.6.0.4 diff --git a/src/patches/linux-3.2.25-arm_kirkwood_setups.patch b/src/patches/linux-3.2.25-arm_kirkwood_setups.patch deleted file mode 100644 index 94bbb4b..0000000 --- a/src/patches/linux-3.2.25-arm_kirkwood_setups.patch +++ /dev/null @@ -1,692 +0,0 @@ -diff -Naur linux-3.2.25.org/arch/arm/Kconfig linux-3.2.25/arch/arm/Kconfig ---- linux-3.2.25.org/arch/arm/Kconfig 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/Kconfig 2012-08-11 04:42:20.985949735 -0400 -@@ -197,7 +197,7 @@ - - config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" if EMBEDDED -- default y -+ default n - depends on !XIP_KERNEL && MMU - depends on !ARCH_REALVIEW || !SPARSEMEM - help -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/dreamplug-setup.c linux-3.2.25/arch/arm/mach-kirkwood/dreamplug-setup.c ---- linux-3.2.25.org/arch/arm/mach-kirkwood/dreamplug-setup.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-3.2.25/arch/arm/mach-kirkwood/dreamplug-setup.c 2012-08-11 10:22:53.242276474 -0400 -@@ -0,0 +1,148 @@ -+/* -+ * arch/arm/mach-kirkwood/dreamplug-setup.c -+ * -+ * Marvell DreamPlug Reference Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/leds.h> -+#include <linux/spi/flash.h> -+#include <linux/spi/spi.h> -+#include <linux/spi/orion_spi.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include <plat/mvsdio.h> -+#include "common.h" -+#include "mpp.h" -+ -+static const struct flash_platform_data dreamplug_spi_slave_data = { -+ .type = "mx25l1606e", -+}; -+ -+static struct spi_board_info __initdata dreamplug_spi_slave_info[] = { -+ { -+ .modalias = "m25p80", -+ .platform_data = &dreamplug_spi_slave_data, -+ .irq = -1, -+ .max_speed_hz = 50000000, -+ .bus_num = 0, -+ .chip_select = 0, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data dreamplug_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(0), -+}; -+ -+static struct mv643xx_eth_platform_data dreamplug_ge01_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(1), -+}; -+ -+static struct mv_sata_platform_data dreamplug_sata_data = { -+ .n_ports = 1, -+}; -+ -+static struct mvsdio_platform_data dreamplug_mvsdio_data = { -+ /* unfortunately the CD signal has not been connected */ -+}; -+ -+static struct gpio_led dreamplug_led_pins[] = { -+ { -+ .name = "dreamplug:blue:bluetooth", -+ .gpio = 47, -+ .active_low = 1, -+ }, -+ { -+ .name = "dreamplug:green:wlan", -+ .gpio = 48, -+ .active_low = 1, -+ }, -+ { -+ .name = "dreamplug:blue:wlanap", -+ .gpio = 49, -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_led_platform_data dreamplug_led_data = { -+ .leds = dreamplug_led_pins, -+ .num_leds = ARRAY_SIZE(dreamplug_led_pins), -+}; -+ -+static struct platform_device dreamplug_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &dreamplug_led_data, -+ } -+}; -+ -+static unsigned int dreamplug_mpp_config[] __initdata = { -+ MPP0_SPI_SCn, -+ MPP1_SPI_MOSI, -+ MPP2_SPI_SCK, -+ MPP3_SPI_MISO, -+ MPP4_GPIO, -+ MPP5_GPO, -+ MPP7_GPO, -+ MPP18_GPO, -+ MPP19_GPO, -+ MPP47_GPIO, /* B_BLED */ -+ MPP48_GPIO, /* W_GLED */ -+ MPP49_GPIO, /* W_BLED */ -+ 0 -+}; -+ -+static void __init dreamplug_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(dreamplug_mpp_config); -+ -+ kirkwood_uart0_init(); -+ -+ spi_register_board_info(dreamplug_spi_slave_info, -+ ARRAY_SIZE(dreamplug_spi_slave_info)); -+ -+ kirkwood_spi_init(); -+ kirkwood_ehci_init(); -+ -+ kirkwood_ge00_init(&dreamplug_ge00_data); -+ kirkwood_ge01_init(&dreamplug_ge01_data); -+ kirkwood_sata_init(&dreamplug_sata_data); -+ kirkwood_sdio_init(&dreamplug_mvsdio_data); -+ -+ platform_device_register(&dreamplug_leds); -+} -+ -+MACHINE_START(DREAMPLUG, "Marvell DreamPlug Reference Board") -+ /* Maintainer: Siddarth Gore <gores <at> marvell.com> */ -+ .atag_offset = 0x100, -+ .init_machine = dreamplug_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .timer = &kirkwood_timer, -+MACHINE_END -+ -+MACHINE_START(DREAMPLUG1, "Marvell DreamPlug Reference Board") -+ .atag_offset = 0x100, -+ .init_machine = dreamplug_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .timer = &kirkwood_timer, -+MACHINE_END -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/guruplug-setup.c linux-3.2.25/arch/arm/mach-kirkwood/guruplug-setup.c ---- linux-3.2.25.org/arch/arm/mach-kirkwood/guruplug-setup.c 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/mach-kirkwood/guruplug-setup.c 2012-08-05 13:05:22.000000000 -0400 -@@ -11,6 +11,7 @@ - #include <linux/kernel.h> - #include <linux/init.h> - #include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> - #include <linux/mtd/partitions.h> - #include <linux/ata_platform.h> - #include <linux/mv643xx_eth.h> -@@ -27,15 +28,16 @@ - { - .name = "u-boot", - .offset = 0, -- .size = SZ_1M -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, -- .size = SZ_4M -+ .size = SZ_4M, - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, -- .size = MTDPART_SIZ_FULL -+ .size = MTDPART_SIZ_FULL, - }, - }; - -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/iconnect-setup.c linux-3.2.25/arch/arm/mach-kirkwood/iconnect-setup.c ---- linux-3.2.25.org/arch/arm/mach-kirkwood/iconnect-setup.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-3.2.25/arch/arm/mach-kirkwood/iconnect-setup.c 2012-08-11 04:58:00.565660184 -0400 -@@ -0,0 +1,212 @@ -+/* -+ * arch/arm/mach-kirkwood/iconnect-setup.c -+ * -+ * Iomega iConnect Wireless Data Station Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/gpio_keys.h> -+#include <linux/i2c.h> -+#include <linux/input.h> -+#include <linux/leds.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include "common.h" -+#include "mpp.h" -+ -+static struct mtd_partition iconnect_nand_parts[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ -+ }, { -+ .name = "uImage", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = 0x440000, -+ }, { -+ .name = "uInit", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = 0x440000, -+ }, { -+ .name = "root", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data iconnect_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(0xB), -+}; -+ -+static struct gpio_led iconnect_led_pins[] = { -+ { -+ .name = "iconnect:led_level", -+ .default_trigger = "default-on", -+ .gpio = 41, -+ .active_low = 0, -+ }, -+ -+ { -+ .name = "iconnect:blue:power", -+ .default_trigger = "default-on", -+ .gpio = 42, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:red:power", -+ .default_trigger = "none", -+ .gpio = 43, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_1", -+ .default_trigger = "none", -+ .gpio = 44, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_2", -+ .default_trigger = "none", -+ .gpio = 45, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_3", -+ .default_trigger = "none", -+ .gpio = 46, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:usb_4", -+ .default_trigger = "none", -+ .gpio = 47, -+ .active_low = 0, -+ }, -+ { -+ .name = "iconnect:blue:otb", -+ .default_trigger = "none", -+ .gpio = 48, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_led_platform_data iconnect_led_data = { -+ .leds = iconnect_led_pins, -+ .num_leds = ARRAY_SIZE(iconnect_led_pins), -+}; -+ -+static struct platform_device iconnect_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &iconnect_led_data, -+ } -+}; -+ -+static struct gpio_keys_button iconnect_buttons[] = { -+ { -+ .code = KEY_COPY, -+ .gpio = 35, -+ .desc = "OTB Button", -+ .active_low = 1, -+ }, -+ { -+ .code = KEY_RESTART, -+ .gpio = 12, -+ .desc = "Reset", -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_platform_data iconnect_button_data = { -+ .buttons = iconnect_buttons, -+ .nbuttons = ARRAY_SIZE(iconnect_buttons), -+}; -+ -+static struct platform_device iconnect_button_device = { -+ .name = "gpio-keys", -+ .id = -1, -+ .num_resources = 0, -+ .dev = { -+ .platform_data = &iconnect_button_data, -+ } -+}; -+ -+static unsigned int iconnect_mpp_config[] __initdata = { -+ MPP0_NF_IO2, -+ MPP1_NF_IO3, -+ MPP2_NF_IO4, -+ MPP3_NF_IO5, -+ MPP4_NF_IO6, -+ MPP5_NF_IO7, -+ MPP18_NF_IO0, -+ MPP19_NF_IO1, -+ MPP12_GPIO, /* Reset Button */ -+ MPP35_GPIO, /* OTB Button */ -+ -+ MPP41_GPIO, /* LED Level */ -+ MPP42_GPIO, /* Power LED blue */ -+ MPP43_GPIO, /* Power LED red */ -+ MPP44_GPIO, /* USB LED 1 */ -+ MPP45_GPIO, /* USB LED 2 */ -+ MPP46_GPIO, /* USB LED 3 */ -+ MPP47_GPIO, /* USB LED 4 */ -+ MPP48_GPIO, /* OTB LED */ -+ 0 -+}; -+ -+static struct i2c_board_info __initdata iconnect_i2c = { -+ I2C_BOARD_INFO("lm63", 0x4c), -+}; -+ -+static void __init iconnect_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(iconnect_mpp_config); -+ -+ kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25); -+ kirkwood_ehci_init(); -+ kirkwood_ge00_init(&iconnect_ge00_data); -+ -+ kirkwood_uart0_init(); -+ platform_device_register(&iconnect_leds); -+ platform_device_register(&iconnect_button_device); -+ -+ kirkwood_i2c_init(); -+ i2c_register_board_info(0, &iconnect_i2c,1); -+} -+ -+static int __init iconnect_pci_init(void) -+{ -+ if (machine_is_iconnect()) { -+ kirkwood_pcie_init(KW_PCIE0); -+ } -+ return 0; -+} -+subsys_initcall(iconnect_pci_init); -+ -+MACHINE_START(ICONNECT, "Iomega iConnect Wireless Data Station") -+ /* Maintainer: Arne Fitzenreiter arne_f@ipfire.org */ -+ .atag_offset = 0x100, -+ .init_machine = iconnect_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .timer = &kirkwood_timer, -+MACHINE_END -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/Kconfig linux-3.2.25/arch/arm/mach-kirkwood/Kconfig ---- linux-3.2.25.org/arch/arm/mach-kirkwood/Kconfig 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/mach-kirkwood/Kconfig 2012-08-05 12:45:22.015253501 -0400 -@@ -44,6 +44,12 @@ - Say 'Y' here if you want your kernel to support the - Marvell GuruPlug Reference Board. - -+config MACH_DREAMPLUG -+ bool "Marvell DreamPlug Reference Board" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Marvell DreamPlug Reference Board. -+ - config MACH_TS219 - bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" - help -@@ -130,6 +136,18 @@ - Say 'Y' here if you want your kernel to support the - HP t5325 Thin Client. - -+config MACH_ICONNECT -+ bool "Iomega iConnect Wireless Data Station" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Iomega iConnect Wireless Data Station. -+ -+config MACH_NAS6210 -+ bool "Raidsonic ICY BOX IB-62x0" -+ help -+ Say 'Y' here if you want your kernel to support the -+ Raidsonic ICY BOX IB-62x0. -+ - endmenu - - endif -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/Makefile linux-3.2.25/arch/arm/mach-kirkwood/Makefile ---- linux-3.2.25.org/arch/arm/mach-kirkwood/Makefile 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/mach-kirkwood/Makefile 2012-08-05 12:46:49.015253501 -0400 -@@ -7,6 +7,7 @@ - obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o - obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o - obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o -+obj-$(CONFIG_MACH_DREAMPLUG) += dreamplug-setup.o - obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o - obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o - obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o -@@ -18,5 +19,7 @@ - obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o - obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o - obj-$(CONFIG_MACH_T5325) += t5325-setup.o -+obj-$(CONFIG_MACH_ICONNECT) += iconnect-setup.o -+obj-$(CONFIG_MACH_NAS6210) += nas6210-setup.o - - obj-$(CONFIG_CPU_IDLE) += cpuidle.o -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/mpp.h linux-3.2.25/arch/arm/mach-kirkwood/mpp.h ---- linux-3.2.25.org/arch/arm/mach-kirkwood/mpp.h 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/mach-kirkwood/mpp.h 2012-08-05 13:08:23.835566001 -0400 -@@ -102,6 +102,7 @@ - #define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 0, 0, 1, 1, 1, 1 ) - - #define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1, 1 ) -+#define MPP12_GPIO MPP( 12, 0x0, 1, 1, 1, 1, 1, 1, 1 ) - #define MPP12_SD_CLK MPP( 12, 0x1, 0, 0, 1, 1, 1, 1, 1 ) - #define MPP12_AU_SPDIF0 MPP( 12, 0xa, 0, 0, 0, 0, 0, 0, 1 ) - #define MPP12_SPI_MOSI MPP( 12, 0xb, 0, 0, 0, 0, 0, 0, 1 ) -diff -Naur linux-3.2.25.org/arch/arm/mach-kirkwood/nas6210-setup.c linux-3.2.25/arch/arm/mach-kirkwood/nas6210-setup.c ---- linux-3.2.25.org/arch/arm/mach-kirkwood/nas6210-setup.c 1969-12-31 19:00:00.000000000 -0500 -+++ linux-3.2.25/arch/arm/mach-kirkwood/nas6210-setup.c 2012-08-11 04:58:35.223186956 -0400 -@@ -0,0 +1,184 @@ -+/* -+ * arch/arm/mach-kirkwood/nas6210-setup.c -+ * -+ * Raidsonic ICYBOX NAS6210 and 6220 Board Setup -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/mtd/mtd.h> -+#include <linux/mtd/partitions.h> -+#include <linux/ata_platform.h> -+#include <linux/mv643xx_eth.h> -+#include <linux/gpio.h> -+#include <linux/gpio_keys.h> -+#include <linux/i2c.h> -+#include <linux/input.h> -+#include <linux/leds.h> -+#include <asm/mach-types.h> -+#include <asm/mach/arch.h> -+#include <mach/kirkwood.h> -+#include "common.h" -+#include "mpp.h" -+ -+#define NAS6210_GPIO_POWER_OFF 24 -+ -+static struct mtd_partition nas6210_nand_parts[] = { -+ { -+ .name = "u-boot", -+ .offset = 0, -+ .size = SZ_1M, -+ .mask_flags = MTD_WRITEABLE, /* read only */ -+ }, { -+ .name = "uImage", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = (SZ_1M*6), -+ }, { -+ .name = "root", -+ .offset = MTDPART_OFS_NXTBLK, -+ .size = MTDPART_SIZ_FULL, -+ }, -+}; -+ -+static struct mv643xx_eth_platform_data nas6210_ge00_data = { -+ .phy_addr = MV643XX_ETH_PHY_ADDR(8), -+}; -+ -+static struct mv_sata_platform_data nas6210_sata_data = { -+ .n_ports = 2, -+}; -+ -+static struct gpio_led nas6210_led_pins[] = { -+ { -+ .name = "nas6210:green:power", -+ .default_trigger = "default-on", -+ .gpio = 25, -+ .active_low = 0, -+ }, -+ { -+ .name = "nas6210:red:power", -+ .default_trigger = "none", -+ .gpio = 22, -+ .active_low = 0, -+ }, -+ { -+ .name = "nas6210:red:usb_copy", -+ .default_trigger = "none", -+ .gpio = 27, -+ .active_low = 0, -+ }, -+}; -+ -+static struct gpio_led_platform_data nas6210_led_data = { -+ .leds = nas6210_led_pins, -+ .num_leds = ARRAY_SIZE(nas6210_led_pins), -+}; -+ -+static struct platform_device nas6210_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = &nas6210_led_data, -+ } -+}; -+ -+static struct gpio_keys_button nas6210_buttons[] = { -+ { -+ .code = KEY_COPY, -+ .gpio = 29, -+ .desc = "USB Copy", -+ .active_low = 1, -+ }, -+ { -+ .code = KEY_RESTART, -+ .gpio = 28, -+ .desc = "Reset", -+ .active_low = 1, -+ }, -+}; -+ -+static struct gpio_keys_platform_data nas6210_button_data = { -+ .buttons = nas6210_buttons, -+ .nbuttons = ARRAY_SIZE(nas6210_buttons), -+}; -+ -+static struct platform_device nas6210_button_device = { -+ .name = "gpio-keys", -+ .id = -1, -+ .num_resources = 0, -+ .dev = { -+ .platform_data = &nas6210_button_data, -+ } -+}; -+ -+static unsigned int nas6210_mpp_config[] __initdata = { -+ MPP0_NF_IO2, -+ MPP1_NF_IO3, -+ MPP2_NF_IO4, -+ MPP3_NF_IO5, -+ MPP4_NF_IO6, -+ MPP5_NF_IO7, -+ MPP18_NF_IO0, -+ MPP19_NF_IO1, -+ MPP22_GPIO, /* Power LED red */ -+ MPP24_GPIO, /* Power off */ -+ MPP25_GPIO, /* Power LED green */ -+ MPP27_GPIO, /* USB transfer LED */ -+ MPP28_GPIO, /* Reset button */ -+ MPP29_GPIO, /* USB Copy button */ -+ 0 -+}; -+ -+void nas6210_power_off(void) -+{ -+ gpio_set_value(NAS6210_GPIO_POWER_OFF, 1); -+ while(1); -+} -+ -+static void __init nas6210_init(void) -+{ -+ /* -+ * Basic setup. Needs to be called early. -+ */ -+ kirkwood_init(); -+ kirkwood_mpp_conf(nas6210_mpp_config); -+ -+ kirkwood_nand_init(ARRAY_AND_SIZE(nas6210_nand_parts), 25); -+ kirkwood_ehci_init(); -+ kirkwood_ge00_init(&nas6210_ge00_data); -+ kirkwood_sata_init(&nas6210_sata_data); -+ kirkwood_uart0_init(); -+ platform_device_register(&nas6210_leds); -+ platform_device_register(&nas6210_button_device); -+ -+ if (gpio_request(NAS6210_GPIO_POWER_OFF, "power-off") == 0 && -+ gpio_direction_output(NAS6210_GPIO_POWER_OFF, 0) == 0) -+ pm_power_off = nas6210_power_off; -+ -+ else -+ pr_err("nas6210: failed to configure power-off gpio pin"); -+} -+ -+static int __init nas6210_pci_init(void) -+{ -+ if (machine_is_nas6210()) { -+ kirkwood_pcie_init(KW_PCIE0); -+ } -+ return 0; -+} -+subsys_initcall(nas6210_pci_init); -+ -+MACHINE_START(NAS6210, "RaidSonic ICY BOX IB-NAS62x0") -+ /* Maintainer: Arne Fitzenreiter arne_f@ipfire.org */ -+ .atag_offset = 0x00000100, -+ .init_machine = nas6210_init, -+ .map_io = kirkwood_map_io, -+ .init_early = kirkwood_init_early, -+ .init_irq = kirkwood_init_irq, -+ .timer = &kirkwood_timer, -+MACHINE_END -diff -Naur linux-3.2.25.org/arch/arm/tools/mach-types linux-3.2.25/arch/arm/tools/mach-types ---- linux-3.2.25.org/arch/arm/tools/mach-types 2012-08-02 09:38:04.000000000 -0400 -+++ linux-3.2.25/arch/arm/tools/mach-types 2012-08-11 10:18:52.849620229 -0400 -@@ -448,6 +448,7 @@ - riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576 - riot_x37 MACH_RIOT_X37 RIOT_X37 2578 - pca101 MACH_PCA101 PCA101 2595 -+guruplug MACH_GURUPLUG GURUPLUG 2601 - capc7117 MACH_CAPC7117 CAPC7117 2612 - icontrol MACH_ICONTROL ICONTROL 2624 - gplugd MACH_GPLUGD GPLUGD 2625 -@@ -455,7 +456,7 @@ - mx23evk MACH_MX23EVK MX23EVK 2629 - ap4evb MACH_AP4EVB AP4EVB 2630 - mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 --guruplug MACH_GURUPLUG GURUPLUG 2659 -+dreamplug1 MACH_DREAMPLUG1 DREAMPLUG1 2659 - spear310 MACH_SPEAR310 SPEAR310 2660 - spear320 MACH_SPEAR320 SPEAR320 2661 - aquila MACH_AQUILA AQUILA 2676 -@@ -1123,6 +1124,7 @@ - thales_adc MACH_THALES_ADC THALES_ADC 3492 - ubisys_p9d_evp MACH_UBISYS_P9D_EVP UBISYS_P9D_EVP 3493 - atdgp318 MACH_ATDGP318 ATDGP318 3494 -+dreamplug MACH_DREAMPLUG DREAMPLUG 3550 - m28evk MACH_M28EVK M28EVK 3613 - smdk4212 MACH_SMDK4212 SMDK4212 3638 - smdk4412 MACH_SMDK4412 SMDK4412 3765 diff --git a/src/patches/linux-3.2.27-rpi_fix_dwc_common_build.patch b/src/patches/linux-3.2.27-rpi_fix_dwc_common_build.patch deleted file mode 100644 index f46c57c..0000000 --- a/src/patches/linux-3.2.27-rpi_fix_dwc_common_build.patch +++ /dev/null @@ -1,38 +0,0 @@ -diff -Naur linux-3.2.27.org/drivers/usb/host/dwc_common_port/Makefile linux-3.2.27/drivers/usb/host/dwc_common_port/Makefile ---- linux-3.2.27.org/drivers/usb/host/dwc_common_port/Makefile 2012-08-21 05:05:46.000000000 -0400 -+++ linux-3.2.27/drivers/usb/host/dwc_common_port/Makefile 2012-08-21 06:32:23.501695852 -0400 -@@ -30,15 +30,6 @@ - - else - --ifeq ($(KDIR),) --$(error Must give "KDIR=/path/to/kernel/source" on command line or in environment) --endif -- --ifeq ($(ARCH),) --$(error Must give "ARCH=<arch>" on command line or in environment. Also, if \ -- cross-compiling, must give "CROSS_COMPILE=/path/to/compiler/plus/tool-prefix-") --endif -- - ifeq ($(DOXYGEN),) - DOXYGEN := doxygen - endif -diff -Naur linux-3.2.27.org/drivers/usb/host/dwc_common_port/Makefile.linux linux-3.2.27/drivers/usb/host/dwc_common_port/Makefile.linux ---- linux-3.2.27.org/drivers/usb/host/dwc_common_port/Makefile.linux 2012-08-21 05:05:46.000000000 -0400 -+++ linux-3.2.27/drivers/usb/host/dwc_common_port/Makefile.linux 2012-08-21 05:22:35.964969680 -0400 -@@ -21,15 +21,6 @@ - - else - --ifeq ($(KDIR),) --$(error Must give "KDIR=/path/to/kernel/source" on command line or in environment) --endif -- --ifeq ($(ARCH),) --$(error Must give "ARCH=<arch>" on command line or in environment. Also, if \ -- cross-compiling, must give "CROSS_COMPILE=/path/to/compiler/plus/tool-prefix-") --endif -- - ifeq ($(DOXYGEN),) - DOXYGEN := doxygen - endif diff --git a/src/patches/linux-3.2.33-ledtrig-netdev-1.patch b/src/patches/linux-3.2.33-ledtrig-netdev-1.patch deleted file mode 100644 index f42ca73..0000000 --- a/src/patches/linux-3.2.33-ledtrig-netdev-1.patch +++ /dev/null @@ -1,479 +0,0 @@ -diff -Naur linux-3.2.33.org/drivers/leds/Kconfig linux-3.2.33/drivers/leds/Kconfig ---- linux-3.2.33.org/drivers/leds/Kconfig 2012-10-31 00:27:11.000000000 +0100 -+++ linux-3.2.33/drivers/leds/Kconfig 2012-11-04 12:47:10.661589825 +0100 -@@ -457,4 +457,11 @@ - comment "iptables trigger is under Netfilter config (LED target)" - depends on LEDS_TRIGGERS - -+config LEDS_TRIGGER_NETDEV -+ tristate "LED Netdev Trigger" -+ depends on LEDS_TRIGGERS -+ help -+ This allows LEDs to be controlled by network device activity. -+ If unsure, say Y. -+ - endif # NEW_LEDS -diff -Naur linux-3.2.33.org/drivers/leds/ledtrig-netdev.c linux-3.2.33/drivers/leds/ledtrig-netdev.c ---- linux-3.2.33.org/drivers/leds/ledtrig-netdev.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-3.2.33/drivers/leds/ledtrig-netdev.c 2012-11-04 13:43:51.414865799 +0100 -@@ -0,0 +1,452 @@ -+/* -+ * LED Kernel Netdev Trigger -+ * -+ * Toggles the LED to reflect the link and traffic state of a named net device -+ * -+ * Copyright 2007 Oliver Jowett oliver@opencloud.com -+ * -+ * Derived from ledtrig-timer.c which is: -+ * Copyright 2005-2006 Openedhand Ltd. -+ * Author: Richard Purdie rpurdie@openedhand.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include <linux/module.h> -+#include <linux/jiffies.h> -+#include <linux/kernel.h> -+#include <linux/init.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/device.h> -+#include <linux/sysdev.h> -+#include <linux/netdevice.h> -+#include <linux/timer.h> -+#include <linux/ctype.h> -+#include <linux/leds.h> -+#include <linux/version.h> -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+#include <net/net_namespace.h> -+#endif -+ -+#include "leds.h" -+ -+/* -+ * Configurable sysfs attributes: -+ * -+ * device_name - network device name to monitor -+ * -+ * interval - duration of LED blink, in milliseconds -+ * -+ * mode - either "none" (LED is off) or a space separated list of one or more of: -+ * link: LED's normal state reflects whether the link is up (has carrier) or not -+ * tx: LED blinks on transmitted data -+ * rx: LED blinks on receive data -+ * -+ * Some suggestions: -+ * -+ * Simple link status LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo link >someled/mode -+ * -+ * Ethernet-style link/activity LED: -+ * $ echo netdev >someled/trigger -+ * $ echo eth0 >someled/device_name -+ * $ echo "link tx rx" >someled/mode -+ * -+ * Modem-style tx/rx LEDs: -+ * $ echo netdev >led1/trigger -+ * $ echo ppp0 >led1/device_name -+ * $ echo tx >led1/mode -+ * $ echo netdev >led2/trigger -+ * $ echo ppp0 >led2/device_name -+ * $ echo rx >led2/mode -+ * -+ */ -+ -+#define MODE_LINK 1 -+#define MODE_TX 2 -+#define MODE_RX 4 -+ -+struct led_netdev_data { -+ rwlock_t lock; -+ -+ struct timer_list timer; -+ struct notifier_block notifier; -+ -+ struct led_classdev *led_cdev; -+ struct net_device *net_dev; -+ -+ char device_name[IFNAMSIZ]; -+ unsigned interval; -+ unsigned mode; -+ unsigned link_up; -+ unsigned last_activity; -+}; -+ -+static void set_baseline_state(struct led_netdev_data *trigger_data) -+{ -+ if ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ else -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ -+ if ((trigger_data->mode & (MODE_TX | MODE_RX)) != 0 && trigger_data->link_up) -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ else -+ del_timer(&trigger_data->timer); -+} -+ -+static ssize_t led_device_name_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%s\n", trigger_data->device_name); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) -+extern struct net init_net; -+#endif -+ -+static ssize_t led_device_name_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (size < 0 || size >= IFNAMSIZ) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ -+ strcpy(trigger_data->device_name, buf); -+ if (size > 0 && trigger_data->device_name[size-1] == '\n') -+ trigger_data->device_name[size-1] = 0; -+ -+ if (trigger_data->device_name[0] != 0) { -+ /* check for existing device to update from */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) -+ trigger_data->net_dev = dev_get_by_name(&init_net, trigger_data->device_name); -+#else -+ trigger_data->net_dev = dev_get_by_name(trigger_data->device_name); -+#endif -+ if (trigger_data->net_dev != NULL) -+ trigger_data->link_up = (dev_get_flags(trigger_data->net_dev) & IFF_LOWER_UP) != 0; -+ set_baseline_state(trigger_data); /* updates LEDs, may start timers */ -+ } -+ -+ write_unlock(&trigger_data->lock); -+ return size; -+} -+ -+static DEVICE_ATTR(device_name, 0644, led_device_name_show, led_device_name_store); -+ -+static ssize_t led_mode_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ -+ if (trigger_data->mode == 0) { -+ strcpy(buf, "none\n"); -+ } else { -+ if (trigger_data->mode & MODE_LINK) -+ strcat(buf, "link "); -+ if (trigger_data->mode & MODE_TX) -+ strcat(buf, "tx "); -+ if (trigger_data->mode & MODE_RX) -+ strcat(buf, "rx "); -+ strcat(buf, "\n"); -+ } -+ -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf)+1; -+} -+ -+static ssize_t led_mode_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ char copybuf[1024]; -+ int new_mode = -1; -+ char *p, *token; -+ -+ /* take a copy since we don't want to trash the inbound buffer when using strsep */ -+ strncpy(copybuf, buf, sizeof(copybuf)); -+ copybuf[1023] = 0; -+ p = copybuf; -+ -+ while ((token = strsep(&p, " \t\n")) != NULL) { -+ if (!*token) -+ continue; -+ -+ if (new_mode == -1) -+ new_mode = 0; -+ -+ if (!strcmp(token, "none")) -+ new_mode = 0; -+ else if (!strcmp(token, "tx")) -+ new_mode |= MODE_TX; -+ else if (!strcmp(token, "rx")) -+ new_mode |= MODE_RX; -+ else if (!strcmp(token, "link")) -+ new_mode |= MODE_LINK; -+ else -+ return -EINVAL; -+ } -+ -+ if (new_mode == -1) -+ return -EINVAL; -+ -+ write_lock(&trigger_data->lock); -+ trigger_data->mode = new_mode; -+ set_baseline_state(trigger_data); -+ write_unlock(&trigger_data->lock); -+ -+ return size; -+} -+ -+static DEVICE_ATTR(mode, 0644, led_mode_show, led_mode_store); -+ -+static ssize_t led_interval_show(struct device *dev, -+ struct device_attribute *attr, char *buf) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ read_lock(&trigger_data->lock); -+ sprintf(buf, "%u\n", jiffies_to_msecs(trigger_data->interval)); -+ read_unlock(&trigger_data->lock); -+ -+ return strlen(buf) + 1; -+} -+ -+static ssize_t led_interval_store(struct device *dev, -+ struct device_attribute *attr, const char *buf, size_t size) -+{ -+ struct led_classdev *led_cdev = dev_get_drvdata(dev); -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ int ret = -EINVAL; -+ char *after; -+ unsigned long value = simple_strtoul(buf, &after, 10); -+ size_t count = after - buf; -+ -+ if (*after && isspace(*after)) -+ count++; -+ -+ /* impose some basic bounds on the timer interval */ -+ if (count == size && value >= 5 && value <= 10000) { -+ write_lock(&trigger_data->lock); -+ trigger_data->interval = msecs_to_jiffies(value); -+ set_baseline_state(trigger_data); // resets timer -+ write_unlock(&trigger_data->lock); -+ ret = count; -+ } -+ -+ return ret; -+} -+ -+static DEVICE_ATTR(interval, 0644, led_interval_show, led_interval_store); -+ -+static int netdev_trig_notify(struct notifier_block *nb, -+ unsigned long evt, -+ void *dv) -+{ -+ struct net_device *dev = dv; -+ struct led_netdev_data *trigger_data = container_of(nb, struct led_netdev_data, notifier); -+ -+ if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER) -+ return NOTIFY_DONE; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (strcmp(dev->name, trigger_data->device_name)) -+ goto done; -+ -+ if (evt == NETDEV_REGISTER) { -+ if (trigger_data->net_dev != NULL) -+ dev_put(trigger_data->net_dev); -+ dev_hold(dev); -+ trigger_data->net_dev = dev; -+ trigger_data->link_up = 0; -+ goto done; -+ } -+ -+ if (evt == NETDEV_UNREGISTER && trigger_data->net_dev != NULL) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ goto done; -+ } -+ -+ /* UP / DOWN / CHANGE */ -+ -+ trigger_data->link_up = (evt != NETDEV_DOWN && netif_carrier_ok(dev)); -+ set_baseline_state(trigger_data); -+ -+done: -+ write_unlock(&trigger_data->lock); -+ return NOTIFY_DONE; -+} -+ -+/* here's the real work! */ -+static void netdev_trig_timer(unsigned long arg) -+{ -+ struct led_netdev_data *trigger_data = (struct led_netdev_data *)arg; -+ struct rtnl_link_stats64 *dev_stats; -+ unsigned new_activity; -+ struct rtnl_link_stats64 temp; -+ -+ write_lock(&trigger_data->lock); -+ -+ if (!trigger_data->link_up || !trigger_data->net_dev || (trigger_data->mode & (MODE_TX | MODE_RX)) == 0) { -+ /* we don't need to do timer work, just reflect link state. */ -+ led_set_brightness(trigger_data->led_cdev, ((trigger_data->mode & MODE_LINK) != 0 && trigger_data->link_up) ? LED_FULL : LED_OFF); -+ goto no_restart; -+ } -+ -+ dev_stats = dev_get_stats(trigger_data->net_dev, &temp); -+ new_activity = -+ ((trigger_data->mode & MODE_TX) ? dev_stats->tx_packets : 0) + -+ ((trigger_data->mode & MODE_RX) ? dev_stats->rx_packets : 0); -+ -+ if (trigger_data->mode & MODE_LINK) { -+ /* base state is ON (link present) */ -+ /* if there's no link, we don't get this far and the LED is off */ -+ -+ /* OFF -> ON always */ -+ /* ON -> OFF on activity */ -+ if (trigger_data->led_cdev->brightness == LED_OFF) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } -+ } else { -+ /* base state is OFF */ -+ /* ON -> OFF always */ -+ /* OFF -> ON on activity */ -+ if (trigger_data->led_cdev->brightness == LED_FULL) { -+ led_set_brightness(trigger_data->led_cdev, LED_OFF); -+ } else if (trigger_data->last_activity != new_activity) { -+ led_set_brightness(trigger_data->led_cdev, LED_FULL); -+ } -+ } -+ -+ trigger_data->last_activity = new_activity; -+ mod_timer(&trigger_data->timer, jiffies + trigger_data->interval); -+ -+no_restart: -+ write_unlock(&trigger_data->lock); -+} -+ -+static void netdev_trig_activate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data; -+ int rc; -+ -+ trigger_data = kzalloc(sizeof(struct led_netdev_data), GFP_KERNEL); -+ if (!trigger_data) -+ return; -+ -+ rwlock_init(&trigger_data->lock); -+ -+ trigger_data->notifier.notifier_call = netdev_trig_notify; -+ trigger_data->notifier.priority = 10; -+ -+ setup_timer(&trigger_data->timer, netdev_trig_timer, (unsigned long) trigger_data); -+ -+ trigger_data->led_cdev = led_cdev; -+ trigger_data->net_dev = NULL; -+ trigger_data->device_name[0] = 0; -+ -+ trigger_data->mode = 0; -+ trigger_data->interval = msecs_to_jiffies(50); -+ trigger_data->link_up = 0; -+ trigger_data->last_activity = 0; -+ -+ led_cdev->trigger_data = trigger_data; -+ -+ rc = device_create_file(led_cdev->dev, &dev_attr_device_name); -+ if (rc) -+ goto err_out; -+ rc = device_create_file(led_cdev->dev, &dev_attr_mode); -+ if (rc) -+ goto err_out_device_name; -+ rc = device_create_file(led_cdev->dev, &dev_attr_interval); -+ if (rc) -+ goto err_out_mode; -+ -+ register_netdevice_notifier(&trigger_data->notifier); -+ return; -+ -+err_out_mode: -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+err_out_device_name: -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+err_out: -+ led_cdev->trigger_data = NULL; -+ kfree(trigger_data); -+} -+ -+static void netdev_trig_deactivate(struct led_classdev *led_cdev) -+{ -+ struct led_netdev_data *trigger_data = led_cdev->trigger_data; -+ -+ if (trigger_data) { -+ unregister_netdevice_notifier(&trigger_data->notifier); -+ -+ device_remove_file(led_cdev->dev, &dev_attr_device_name); -+ device_remove_file(led_cdev->dev, &dev_attr_mode); -+ device_remove_file(led_cdev->dev, &dev_attr_interval); -+ -+ write_lock(&trigger_data->lock); -+ -+ if (trigger_data->net_dev) { -+ dev_put(trigger_data->net_dev); -+ trigger_data->net_dev = NULL; -+ } -+ -+ write_unlock(&trigger_data->lock); -+ -+ del_timer_sync(&trigger_data->timer); -+ -+ kfree(trigger_data); -+ } -+} -+ -+static struct led_trigger netdev_led_trigger = { -+ .name = "netdev", -+ .activate = netdev_trig_activate, -+ .deactivate = netdev_trig_deactivate, -+}; -+ -+static int __init netdev_trig_init(void) -+{ -+ return led_trigger_register(&netdev_led_trigger); -+} -+ -+static void __exit netdev_trig_exit(void) -+{ -+ led_trigger_unregister(&netdev_led_trigger); -+} -+ -+module_init(netdev_trig_init); -+module_exit(netdev_trig_exit); -+ -+MODULE_AUTHOR("Oliver Jowett oliver@opencloud.com"); -+MODULE_DESCRIPTION("Netdev LED trigger"); -+MODULE_LICENSE("GPL"); -diff -Naur linux-3.2.33.org/drivers/leds/Makefile linux-3.2.33/drivers/leds/Makefile ---- linux-3.2.33.org/drivers/leds/Makefile 2012-10-31 00:27:11.000000000 +0100 -+++ linux-3.2.33/drivers/leds/Makefile 2012-11-04 12:47:10.661589825 +0100 -@@ -54,3 +54,4 @@ - obj-$(CONFIG_LEDS_TRIGGER_BACKLIGHT) += ledtrig-backlight.o - obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledtrig-gpio.o - obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o -+obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o diff --git a/src/patches/linux-3.9-dvbsky-wot2.patch b/src/patches/linux-3.9-dvbsky-wot2.patch deleted file mode 100644 index e084c8c..0000000 --- a/src/patches/linux-3.9-dvbsky-wot2.patch +++ /dev/null @@ -1,6161 +0,0 @@ -diff -urN a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig ---- a/drivers/media/dvb-frontends/Kconfig 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/dvb-frontends/Kconfig 2013-05-03 17:03:57.000000000 +0800 -@@ -200,6 +200,20 @@ - help - A DVB-S/S2 tuner module. Say Y when you want to support this frontend. - -+config DVB_M88DS3103 -+ tristate "Montage M88DS3103 based" -+ depends on DVB_CORE && I2C -+ default m if !MEDIA_SUBDRV_AUTOSELECT -+ help -+ A DVB-S/S2 tuner module. Say Y when you want to support this frontend. -+ -+config DVB_M88DC2800 -+ tristate "Montage M88DC2800 based" -+ depends on DVB_CORE && I2C -+ default m if !MEDIA_SUBDRV_AUTOSELECT -+ help -+ A DVB-C tuner module. Say Y when you want to support this frontend. -+ - config DVB_SI21XX - tristate "Silicon Labs SI21XX based" - depends on DVB_CORE && I2C -diff -urN a/drivers/media/dvb-frontends/m88dc2800.c b/drivers/media/dvb-frontends/m88dc2800.c ---- a/drivers/media/dvb-frontends/m88dc2800.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88dc2800.c 2013-01-26 16:03:21.000000000 +0800 -@@ -0,0 +1,2124 @@ -+/* -+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage -+ -+ Copyright (C) 2012 Max nibblenibble.max@gmail.com -+ Copyright (C) 2011 Montage Technology / www.montage-tech.com -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+*/ -+ -+#include <linux/delay.h> -+#include <linux/errno.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/string.h> -+#include <linux/slab.h> -+#include <asm/div64.h> -+#include "dvb_frontend.h" -+#include "m88dc2800.h" -+ -+struct m88dc2800_state { -+ struct i2c_adapter *i2c; -+ const struct m88dc2800_config *config; -+ struct dvb_frontend frontend; -+ u32 freq; -+ u32 ber; -+ u32 sym; -+ u16 qam; -+ u8 inverted; -+ u32 xtal; -+ /* tuner state */ -+ u8 tuner_init_OK; /* Tuner initialize status */ -+ u8 tuner_dev_addr; /* Tuner device address */ -+ u32 tuner_freq; /* RF frequency to be set, unit: KHz */ -+ u16 tuner_qam; /* Reserved */ -+ u16 tuner_mode; -+ u8 tuner_bandwidth; /* Bandwidth of the channel, unit: MHz, 6/7/8 */ -+ u8 tuner_loopthrough; /* Tuner loop through switch, 0/1 */ -+ u32 tuner_crystal; /* Tuner crystal frequency, unit: KHz */ -+ u32 tuner_dac; /* Tuner DAC frequency, unit: KHz */ -+ u16 tuner_mtt; /* Tuner chip version, D1: 0x0d, E0: 0x0e, E1: 0x8e */ -+ u16 tuner_custom_cfg; -+ u32 tuner_version; /* Tuner driver version number */ -+ u32 tuner_time; -+}; -+ -+static int debug; -+module_param(debug, int, 0644); -+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); -+ -+#define dprintk(args...) \ -+ do { \ -+ if (debug) \ -+ printk(KERN_INFO "m88dc2800: " args); \ -+ } while (0) -+ -+ -+static int m88dc2800_i2c_write(struct m88dc2800_state *state, u8 addr, -+ u8 * p_data, u8 len) -+{ -+ struct i2c_msg msg = { .flags = 0 }; -+ -+ msg.addr = addr; -+ msg.buf = p_data; -+ msg.len = len; -+ -+ return i2c_transfer(state->i2c, &msg, 1); -+} -+ -+static int m88dc2800_i2c_read(struct m88dc2800_state *state, u8 addr, -+ u8 * p_data, u8 len) -+{ -+ struct i2c_msg msg = { .flags = I2C_M_RD }; -+ -+ msg.addr = addr; -+ msg.buf = p_data; -+ msg.len = len; -+ -+ return i2c_transfer(state->i2c, &msg, 1); -+} -+ -+/*demod register operations.*/ -+static int WriteReg(struct m88dc2800_state *state, u8 reg, u8 data) -+{ -+ u8 buf[] = { reg, data }; -+ u8 addr = state->config->demod_address; -+ int err; -+ -+ dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data); -+ -+ err = m88dc2800_i2c_write(state, addr, buf, 2); -+ -+ if (err != 1) { -+ printk(KERN_ERR -+ "%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EIO; -+ } -+ return 0; -+} -+ -+static int ReadReg(struct m88dc2800_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ u8 addr = state->config->demod_address; -+ -+ ret = m88dc2800_i2c_write(state, addr, b0, 1); -+ -+ if (ret != 1) { -+ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", -+ __func__, reg, ret); -+ return -EIO; -+ } -+ -+ ret = m88dc2800_i2c_read(state, addr, b1, 1); -+ -+ dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]); -+ return b1[0]; -+} -+ -+static int _mt_fe_tn_set_reg(struct m88dc2800_state *state, u8 reg, -+ u8 data) -+{ -+ int ret; -+ u8 buf[2]; -+ u8 addr = state->tuner_dev_addr; -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ buf[0] = reg; -+ buf[1] = data; -+ -+ ret = m88dc2800_i2c_write(state, addr, buf, 2); -+ if (ret != 1) -+ return -EIO; -+ return 0; -+} -+ -+static int _mt_fe_tn_get_reg(struct m88dc2800_state *state, u8 reg, -+ u8 * p_data) -+{ -+ int ret; -+ u8 buf[2]; -+ u8 addr = state->tuner_dev_addr; -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ buf[0] = reg; -+ ret = m88dc2800_i2c_write(state, addr, buf, 1); -+ -+ msleep(1); -+ -+ buf[1] = ReadReg(state, 0x86); -+ buf[1] |= 0x80; -+ ret = WriteReg(state, 0x86, buf[1]); -+ -+ return m88dc2800_i2c_read(state, addr, p_data, 1); -+} -+ -+/* Tuner operation functions.*/ -+static int _mt_fe_tn_set_RF_front_tc2800(struct m88dc2800_state *state) -+{ -+ u32 freq_KHz = state->tuner_freq; -+ u8 a, b, c; -+ if (state->tuner_mtt == 0xD1) { /* D1 */ -+ if (freq_KHz <= 123000) { -+ if (freq_KHz <= 56000) { -+ a = 0x00; b = 0x00; c = 0x00; -+ } else if (freq_KHz <= 64000) { -+ a = 0x10; b = 0x01; c = 0x08; -+ } else if (freq_KHz <= 72000) { -+ a = 0x20; b = 0x02; c = 0x10; -+ } else if (freq_KHz <= 80000) { -+ a = 0x30; b = 0x03; c = 0x18; -+ } else if (freq_KHz <= 88000) { -+ a = 0x40; b = 0x04; c = 0x20; -+ } else if (freq_KHz <= 96000) { -+ a = 0x50; b = 0x05; c = 0x28; -+ } else if (freq_KHz <= 104000) { -+ a = 0x60; b = 0x06; c = 0x30; -+ } else { -+ a = 0x70; b = 0x07; c = 0x38; -+ } -+ _mt_fe_tn_set_reg(state, 0x58, 0x9b); -+ _mt_fe_tn_set_reg(state, 0x59, a); -+ _mt_fe_tn_set_reg(state, 0x5d, b); -+ _mt_fe_tn_set_reg(state, 0x5e, c); -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ } else { /* if (freq_KHz > 112000) */ -+ _mt_fe_tn_set_reg(state, 0x58, 0x7b); -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x40); -+ } else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x48); -+ } else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x50); -+ } else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x58); -+ } else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x60); -+ } else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x68); -+ } else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5e, 0x70); -+ } else { /* if (freq_KHz <= 304000) */ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x78); -+ } -+ if (freq_KHz <= 171000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x08); -+ } else if (freq_KHz <= 211000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0a); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ } else { /* if (freq_KHz > 304000) */ -+ _mt_fe_tn_set_reg(state, 0x5e, 0x88); -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0c); -+ } else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x09); -+ } else if (freq_KHz <= 550000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x73, 0x0d); -+ } else { /*if (freq_KHz > 650000) */ -+ _mt_fe_tn_set_reg(state, 0x73, 0x0e); -+ } -+ } -+ } -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x24); -+ else if (freq_KHz > 700000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x44); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x53); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x57); -+ else -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ if (freq_KHz < 200000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5d); -+ } else if (freq_KHz < 500000) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x7d); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfd); -+ } /* end of 0xD1 */ -+ } else if (state->tuner_mtt == 0xE1) { /* E1 */ -+ if (freq_KHz <= 112000) { /* 123MHz */ -+ if (freq_KHz <= 56000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x01); -+ } else if (freq_KHz <= 64000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x09); -+ } else if (freq_KHz <= 72000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x11); -+ } else if (freq_KHz <= 80000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x19); -+ } else if (freq_KHz <= 88000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x21); -+ } else if (freq_KHz <= 96000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x29); -+ } else if (freq_KHz <= 104000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x31); -+ } else { /* if (freq_KHz <= 112000) */ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x39); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x30); -+ } else { /* if (freq_KHz > 112000) */ -+ if (freq_KHz <= 304000) { -+ if (freq_KHz <= 136000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x41); -+ } else if (freq_KHz <= 160000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x49); -+ } else if (freq_KHz <= 184000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x51); -+ } else if (freq_KHz <= 208000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x59); -+ } else if (freq_KHz <= 232000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x61); -+ } else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x69); -+ } else if (freq_KHz <= 280000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x71); -+ } else { /* if (freq_KHz <= 304000) */ -+ _mt_fe_tn_set_reg(state, 0x5c, 0x79); -+ } -+ if (freq_KHz <= 150000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x28); -+ } else if (freq_KHz <= 256000) { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x29); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x5b, 0x2a); -+ } -+ } else { /* if (freq_KHz > 304000) */ -+ if (freq_KHz <= 400000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x89); -+ } else if (freq_KHz <= 450000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x91); -+ } else if (freq_KHz <= 650000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0x98); -+ } else if (freq_KHz <= 850000) { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa0); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x5c, 0xa8); -+ } -+ _mt_fe_tn_set_reg(state, 0x5b, 0x08); -+ } -+ } -+ } /* end of 0xE1 */ -+ return 0; -+} -+ -+static int _mt_fe_tn_cali_PLL_tc2800(struct m88dc2800_state *state, -+ u32 freq_KHz, -+ u32 cali_freq_thres_div2, -+ u32 cali_freq_thres_div3r, -+ u32 cali_freq_thres_div3) -+{ -+ s32 N, F, MUL; -+ u8 buf, tmp, tmp2; -+ s32 M; -+ const s32 crystal_KHz = state->tuner_crystal; -+ if (state->tuner_mtt == 0xD1) { -+ M = state->tuner_crystal / 4000; -+ if (freq_KHz > cali_freq_thres_div2) { -+ MUL = 4; -+ tmp = 2; -+ } else if (freq_KHz > 300000) { -+ MUL = 8; -+ tmp = 3; -+ } else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ MUL = 8; -+ tmp = 4; -+ } else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ MUL = 16; -+ tmp = 5; -+ } else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ MUL = 32; -+ tmp = 6; -+ } else if (freq_KHz > (cali_freq_thres_div2 / 16)) { -+ MUL = 64; -+ tmp = 7; -+ } else { /* invalid */ -+ MUL = 0; -+ tmp = 0; -+ return 1; -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ M = state->tuner_crystal / 1000; -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x32, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x33, 0x86); -+ _mt_fe_tn_set_reg(state, 0x37, 0x70); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x89, 0x83); -+ if (freq_KHz > cali_freq_thres_div2) { -+ M = M / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > cali_freq_thres_div3r) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M + 32; /* 32 */ -+ } else if (freq_KHz > cali_freq_thres_div3) { -+ M = M / 3; -+ MUL = 6; -+ tmp = 2; -+ tmp2 = M; /* 16 */ -+ } else if (freq_KHz > 304000) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 3; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > (cali_freq_thres_div2 / 2)) { -+ M = M / 4; -+ MUL = 8; -+ tmp = 4; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > (cali_freq_thres_div3r / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /* 32 */ -+ } else if (freq_KHz > (cali_freq_thres_div3 / 2)) { -+ M = M / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M; /* 16 */ -+ } else if (freq_KHz > (cali_freq_thres_div2 / 4)) { -+ M = M / 4; -+ MUL = 16; -+ tmp = 5; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > (cali_freq_thres_div3r / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M + 32; /* 32 */ -+ } else if (freq_KHz > (cali_freq_thres_div3 / 4)) { -+ M = M / 3; -+ MUL = 24; -+ tmp = 5; -+ tmp2 = M; /* 16 */ -+ } else if (freq_KHz > (cali_freq_thres_div2 / 8)) { -+ M = M / 4; -+ MUL = 32; -+ tmp = 6; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > (cali_freq_thres_div3r / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M + 32; /* 32 */ -+ } else if (freq_KHz > (cali_freq_thres_div3 / 8)) { -+ M = M / 3; -+ MUL = 48; -+ tmp = 6; -+ tmp2 = M; /* 16 */ -+ } else if (freq_KHz > (cali_freq_thres_div2 / 16)) { -+ M = M / 4; -+ MUL = 64; -+ tmp = 7; -+ tmp2 = M + 16; /* 48 */ -+ } else if (freq_KHz > (cali_freq_thres_div3r / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M + 32; /* 32 */ -+ } else if (freq_KHz > (cali_freq_thres_div3 / 16)) { -+ M = M / 3; -+ MUL = 96; -+ tmp = 7; -+ tmp2 = M; /* 16 */ -+ } else { /* invalid */ -+ M = M / 4; -+ MUL = 0; -+ tmp = 0; -+ tmp2 = 48; -+ return 1; -+ } -+ if (freq_KHz == 291000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 12; -+ tmp = 4; -+ tmp2 = M + 32; /* 32 */ -+ } -+ /* -+ if (freq_KHz == 578000) { -+ M = state->tuner_crystal / 1000 / 4; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; // 48 -+ } -+ */ -+ if (freq_KHz == 690000) { -+ M = state->tuner_crystal / 1000 / 3; -+ MUL = 4; -+ tmp = 2; -+ tmp2 = M + 16; /* 48 */ -+ } -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ buf &= 0xc0; -+ buf += tmp2; -+ _mt_fe_tn_set_reg(state, 0x33, buf); -+ } else { -+ return 1; -+ } -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf &= 0xf8; -+ buf += tmp; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ N = (freq_KHz * MUL * M / crystal_KHz) / 2 * 2 - 256; -+ buf = (N >> 8) & 0xcf; -+ if (state->tuner_mtt == 0xE1) { -+ buf |= 0x30; -+ } -+ _mt_fe_tn_set_reg(state, 0x34, buf); -+ buf = N & 0xff; -+ _mt_fe_tn_set_reg(state, 0x35, buf); -+ F = ((freq_KHz * MUL * M / (crystal_KHz / 1000) / 2) - -+ (freq_KHz * MUL * M / crystal_KHz / 2 * 1000)) * 64 / 1000; -+ buf = F & 0xff; -+ _mt_fe_tn_set_reg(state, 0x36, buf); -+ if (F == 0) { -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xca); -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3d, 0xfe); -+ } else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x3e, 0x9c); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x34); -+ } -+ if (F > 0) { -+ if (state->tuner_mtt == 0xD1) { -+ if ((F == 32) || (F == 16) || (F == 48)) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x3e, 0xa4); -+ _mt_fe_tn_set_reg(state, 0x3d, 0x7e); -+ _mt_fe_tn_set_reg(state, 0x3f, 0x36); -+ _mt_fe_tn_set_reg(state, 0x89, 0x84); -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ } else { -+ return 1; -+ } -+ } -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ if (state->tuner_mtt == 0xD1) { -+ msleep(5); -+ } else if (state->tuner_mtt == 0xE1) { -+ msleep(2); -+ } else { -+ return 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_set_PLL_freq_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, buf1; -+ u32 freq_thres_div2_KHz, freq_thres_div3r_KHz, -+ freq_thres_div3_KHz; -+ const u32 freq_KHz = state->tuner_freq; -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x32, 0xe1); -+ _mt_fe_tn_set_reg(state, 0x33, 0xa6); -+ _mt_fe_tn_set_reg(state, 0x37, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x38, 0x20); -+ _mt_fe_tn_set_reg(state, 0x39, 0x18); -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, -+ freq_thres_div2_KHz, 0, 0); -+ msleep(5); -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf1 = buf; -+ buf = buf & 0x03; -+ buf1 = buf1 & 0x01; -+ if ((buf1 == 0) || (buf == 3)) { -+ freq_thres_div2_KHz = 420000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, -+ freq_thres_div2_KHz, 0, -+ 0); -+ msleep(5); -+ _mt_fe_tn_get_reg(state, 0x3a, &buf); -+ buf = buf & 0x07; -+ if (buf == 5) { -+ freq_thres_div2_KHz = 520000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, -+ freq_thres_div2_KHz, -+ 0, 0); -+ msleep(5); -+ } -+ } -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x40, 0x0); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(5); -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf >> 5; -+ if (buf < 5) { -+ _mt_fe_tn_get_reg(state, 0x39, &buf); -+ buf = buf | 0xa0; -+ buf = buf & 0xbf; -+ _mt_fe_tn_set_reg(state, 0x39, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x02; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ } -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ if (buf > 0x70) { -+ buf = 0x7f; -+ _mt_fe_tn_set_reg(state, 0x40, 0x40); -+ } -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ if (buf < 0x0f) { -+ buf = (buf & 0x0f) << 2; -+ buf = buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ } else if (buf < 0x1f) { -+ buf = buf + 0x0f; -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ } -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf | 0x20) & 0xef; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ } else if (state->tuner_mtt == 0xE1) { -+ freq_thres_div2_KHz = 580000; -+ freq_thres_div3r_KHz = 500000; -+ freq_thres_div3_KHz = 440000; -+ _mt_fe_tn_cali_PLL_tc2800(state, freq_KHz, -+ freq_thres_div2_KHz, -+ freq_thres_div3r_KHz, -+ freq_thres_div3_KHz); -+ msleep(3); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x30, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = buf & 0xdf; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x31, 0x80); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ msleep(3); -+ _mt_fe_tn_get_reg(state, 0x37, &buf); -+ _mt_fe_tn_set_reg(state, 0x37, buf); -+ /* -+ if ((freq_KHz == 802000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_set_reg(state, 0x37, 0x5e); -+ } -+ */ -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x30; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(2); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ } else { -+ return 1; -+ } -+ return 0; -+} -+ -+static int _mt_fe_tn_set_BB_tc2800(struct m88dc2800_state *state) -+{ -+ return 0; -+} -+ -+ static int _mt_fe_tn_set_appendix_tc2800(struct m88dc2800_state *state) -+ -+{ -+ u8 buf; -+ const u32 freq_KHz = state->tuner_freq; -+ if (state->tuner_mtt == 0xD1) { -+ if ((freq_KHz == 123000) || (freq_KHz == 147000) || -+ (freq_KHz == 171000) || (freq_KHz == 195000)) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x1b); -+ } -+ if ((freq_KHz == 371000) || (freq_KHz == 419000) || -+ (freq_KHz == 610000) || (freq_KHz == 730000) || -+ (freq_KHz == 754000) || (freq_KHz == 826000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8) (buf + 1)); -+ } -+ if ((freq_KHz == 522000) || (freq_KHz == 578000) || -+ (freq_KHz == 634000) || (freq_KHz == 690000) || -+ (freq_KHz == 834000)) { -+ _mt_fe_tn_get_reg(state, 0x0d, &buf); -+ _mt_fe_tn_set_reg(state, 0x0d, (u8) (buf - 1)); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x20, 0xfc); -+ if (freq_KHz == 123000 || freq_KHz == 147000 || -+ freq_KHz == 171000 || freq_KHz == 195000 || -+ freq_KHz == 219000 || freq_KHz == 267000 || -+ freq_KHz == 291000 || freq_KHz == 339000 || -+ freq_KHz == 387000 || freq_KHz == 435000 || -+ freq_KHz == 482000 || freq_KHz == 530000 || -+ freq_KHz == 722000 || -+ (state->tuner_custom_cfg == 1 && freq_KHz == 315000)) { -+ _mt_fe_tn_set_reg(state, 0x20, 0x5c); -+ } -+ } -+ return 0; -+} -+ -+ static int _mt_fe_tn_set_DAC_tc2800(struct m88dc2800_state *state) -+{ -+ u8 buf, tempnumber; -+ s32 N; -+ s32 f1f2number, f1, f2, delta1, Totalnum1; -+ s32 cntT, cntin, NCOI, z0, z1, z2, tmp; -+ u32 fc, fadc, fsd, f2d; -+ u32 FreqTrue108_Hz; -+ s32 M = state->tuner_crystal / 4000; -+ /* const u8 bandwidth = state->tuner_bandwidth; */ -+ const u16 DAC_fre = 108; -+ const u32 crystal_KHz = state->tuner_crystal; -+ const u32 DACFreq_KHz = state->tuner_dac; -+ const u32 freq_KHz = state->tuner_freq; -+ -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x33, &buf); -+ M = buf & 0x0f; -+ if (M == 0) -+ M = 6; -+ } -+ _mt_fe_tn_get_reg(state, 0x34, &buf); -+ N = buf & 0x07; -+ _mt_fe_tn_get_reg(state, 0x35, &buf); -+ N = (N << 8) + buf; -+ buf = ((N + 256) * crystal_KHz / M / DAC_fre + 500) / 1000; -+ if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_appendix_tc2800(state); -+ if (freq_KHz == 187000 || freq_KHz == 195000 || -+ freq_KHz == 131000 || freq_KHz == 211000 || -+ freq_KHz == 219000 || freq_KHz == 227000 || -+ freq_KHz == 267000 || freq_KHz == 299000 || -+ freq_KHz == 347000 || freq_KHz == 363000 || -+ freq_KHz == 395000 || freq_KHz == 403000 || -+ freq_KHz == 435000 || freq_KHz == 482000 || -+ freq_KHz == 474000 || freq_KHz == 490000 || -+ freq_KHz == 610000 || freq_KHz == 642000 || -+ freq_KHz == 666000 || freq_KHz == 722000 || -+ freq_KHz == 754000 || -+ ((freq_KHz == 379000 || freq_KHz == 467000 || -+ freq_KHz == 762000) && state->tuner_custom_cfg != 1)) { -+ buf = buf + 1; -+ } -+ if (freq_KHz == 123000 || freq_KHz == 139000 || -+ freq_KHz == 147000 || freq_KHz == 171000 || -+ freq_KHz == 179000 || freq_KHz == 203000 || -+ freq_KHz == 235000 || freq_KHz == 251000 || -+ freq_KHz == 259000 || freq_KHz == 283000 || -+ freq_KHz == 331000 || freq_KHz == 363000 || -+ freq_KHz == 371000 || freq_KHz == 387000 || -+ freq_KHz == 411000 || freq_KHz == 427000 || -+ freq_KHz == 443000 || freq_KHz == 451000 || -+ freq_KHz == 459000 || freq_KHz == 506000 || -+ freq_KHz == 514000 || freq_KHz == 538000 || -+ freq_KHz == 546000 || freq_KHz == 554000 || -+ freq_KHz == 562000 || freq_KHz == 570000 || -+ freq_KHz == 578000 || freq_KHz == 602000 || -+ freq_KHz == 626000 || freq_KHz == 658000 || -+ freq_KHz == 690000 || freq_KHz == 714000 || -+ freq_KHz == 746000 || freq_KHz == 522000 || -+ freq_KHz == 826000 || freq_KHz == 155000 || -+ freq_KHz == 530000 || -+ ((freq_KHz == 275000 || freq_KHz == 355000) && -+ state->tuner_custom_cfg != 1) || -+ ((freq_KHz == 467000 || freq_KHz == 762000 || -+ freq_KHz == 778000 || freq_KHz == 818000) && -+ state->tuner_custom_cfg == 1)) { -+ buf = buf - 1; -+ } -+ } -+ _mt_fe_tn_set_reg(state, 0x0e, buf); -+ _mt_fe_tn_set_reg(state, 0x0d, buf); -+ f1f2number = -+ (((DACFreq_KHz * M * buf) / crystal_KHz) << 16) / (N + 256) + -+ (((DACFreq_KHz * M * buf) % crystal_KHz) << 16) / ((N + 256) * -+ crystal_KHz); -+ _mt_fe_tn_set_reg(state, 0xf1, (f1f2number & 0xff00) >> 8); -+ _mt_fe_tn_set_reg(state, 0xf2, f1f2number & 0x00ff); -+ FreqTrue108_Hz = -+ (N + 256) * crystal_KHz / (M * buf) * 1000 + -+ (((N + 256) * crystal_KHz) % (M * buf)) * 1000 / (M * buf); -+ f1 = 4096; -+ fc = FreqTrue108_Hz; -+ fadc = fc / 4; -+ fsd = 27000000; -+ f2d = state->tuner_bandwidth * 1000 / 2 - 150; -+ f2 = (fsd / 250) * f2d / ((fc + 500) / 1000); -+ delta1 = ((f1 - f2) << 15) / f2; -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ cntT = f2; -+ cntin = Totalnum1; -+ NCOI = delta1; -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xc9, (u8) (tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xca, tempnumber); -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xcc, tempnumber); -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xcd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xce, tempnumber); -+ tmp = f1; -+ f1 = f2; -+ f2 = tmp / 2; -+ delta1 = ((f1 - f2) << 15) / f2; -+ Totalnum1 = ((f1 - f2) << 15) - delta1 * f2; -+ NCOI = (f1 << 15) / f2 - (1 << 15); -+ cntT = f2; -+ cntin = Totalnum1; -+ z0 = cntin; -+ z1 = cntT; -+ z2 = NCOI; -+ tempnumber = (z0 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xd9, (u8) (tempnumber & 0x0f)); -+ tempnumber = (z0 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xda, tempnumber); -+ tempnumber = (z1 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdb, tempnumber); -+ tempnumber = (z1 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xdc, tempnumber); -+ tempnumber = (z2 & 0xff00) >> 8; -+ _mt_fe_tn_set_reg(state, 0xdd, tempnumber); -+ tempnumber = (z2 & 0xff); -+ _mt_fe_tn_set_reg(state, 0xde, tempnumber); -+ -+ return 0; -+} -+ -+static int _mt_fe_tn_preset_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x19, 0x4a); -+ _mt_fe_tn_set_reg(state, 0x1b, 0x4b); -+ _mt_fe_tn_set_reg(state, 0x04, 0x04); -+ _mt_fe_tn_set_reg(state, 0x17, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x62, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x63, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x1f, 0x0e); -+ _mt_fe_tn_set_reg(state, 0x6b, 0xf4); -+ _mt_fe_tn_set_reg(state, 0x14, 0x01); -+ _mt_fe_tn_set_reg(state, 0x5a, 0x75); -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x72, 0xe0); -+ _mt_fe_tn_set_reg(state, 0x70, 0x07); -+ _mt_fe_tn_set_reg(state, 0x15, 0x7b); -+ _mt_fe_tn_set_reg(state, 0x55, 0x71); -+ _mt_fe_tn_set_reg(state, 0x75, 0x55); -+ _mt_fe_tn_set_reg(state, 0x76, 0xac); -+ _mt_fe_tn_set_reg(state, 0x77, 0x6c); -+ _mt_fe_tn_set_reg(state, 0x78, 0x8b); -+ _mt_fe_tn_set_reg(state, 0x79, 0x42); -+ _mt_fe_tn_set_reg(state, 0x7a, 0xd2); -+ _mt_fe_tn_set_reg(state, 0x81, 0x01); -+ _mt_fe_tn_set_reg(state, 0x82, 0x00); -+ _mt_fe_tn_set_reg(state, 0x82, 0x02); -+ _mt_fe_tn_set_reg(state, 0x82, 0x04); -+ _mt_fe_tn_set_reg(state, 0x82, 0x06); -+ _mt_fe_tn_set_reg(state, 0x82, 0x08); -+ _mt_fe_tn_set_reg(state, 0x82, 0x09); -+ _mt_fe_tn_set_reg(state, 0x82, 0x29); -+ _mt_fe_tn_set_reg(state, 0x82, 0x49); -+ _mt_fe_tn_set_reg(state, 0x82, 0x58); -+ _mt_fe_tn_set_reg(state, 0x82, 0x59); -+ _mt_fe_tn_set_reg(state, 0x82, 0x98); -+ _mt_fe_tn_set_reg(state, 0x82, 0x99); -+ _mt_fe_tn_set_reg(state, 0x10, 0x05); -+ _mt_fe_tn_set_reg(state, 0x10, 0x0d); -+ _mt_fe_tn_set_reg(state, 0x11, 0x95); -+ _mt_fe_tn_set_reg(state, 0x11, 0x9d); -+ if (state->tuner_loopthrough != 0) { -+ _mt_fe_tn_set_reg(state, 0x67, 0x25); -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x05); -+ } -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_set_reg(state, 0x1b, 0x47); -+ if (state->tuner_mode == 0) { /* DVB-C */ -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x2c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x00); -+ } else { /* CTTB */ -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ _mt_fe_tn_set_reg(state, 0x62, 0x0c); -+ _mt_fe_tn_set_reg(state, 0x63, 0x54); -+ _mt_fe_tn_set_reg(state, 0x68, 0x0b); -+ _mt_fe_tn_set_reg(state, 0x14, 0x05); -+ } -+ _mt_fe_tn_set_reg(state, 0x6f, 0x00); -+ _mt_fe_tn_set_reg(state, 0x84, 0x04); -+ _mt_fe_tn_set_reg(state, 0x5e, 0xbe); -+ _mt_fe_tn_set_reg(state, 0x87, 0x07); -+ _mt_fe_tn_set_reg(state, 0x8a, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x8b, 0x1f); -+ _mt_fe_tn_set_reg(state, 0x88, 0x30); -+ _mt_fe_tn_set_reg(state, 0x58, 0x34); -+ _mt_fe_tn_set_reg(state, 0x61, 0x8c); -+ _mt_fe_tn_set_reg(state, 0x6a, 0x42); -+ } -+ return 0; -+} -+ -+static int mt_fe_tn_wakeup_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb1); -+ _mt_fe_tn_set_reg(state, 0x09, 0x7d); -+ return 0; -+} -+ -+ static int mt_fe_tn_sleep_tc2800(struct m88dc2800_state *state) -+{ -+ _mt_fe_tn_set_reg(state, 0x16, 0xb0); -+ _mt_fe_tn_set_reg(state, 0x09, 0x6d); -+ return 0; -+} -+ -+ static int mt_fe_tn_init_tc2800(struct m88dc2800_state *state) -+{ -+ if (state->tuner_init_OK != 1) { -+ state->tuner_dev_addr = 0x61; /* TUNER_I2C_ADDR_TC2800 */ -+ state->tuner_freq = 650000; -+ state->tuner_qam = 0; -+ state->tuner_mode = 0; // 0: DVB-C, 1: CTTB -+ state->tuner_bandwidth = 8; -+ state->tuner_loopthrough = 0; -+ state->tuner_crystal = 24000; -+ state->tuner_dac = 7200; -+ state->tuner_mtt = 0x00; -+ state->tuner_custom_cfg = 0; -+ state->tuner_version = 30022; /* Driver version number */ -+ state->tuner_time = 12092611; -+ state->tuner_init_OK = 1; -+ } -+ _mt_fe_tn_set_reg(state, 0x2b, 0x46); -+ _mt_fe_tn_set_reg(state, 0x2c, 0x75); -+ if (state->tuner_mtt == 0x00) { -+ u8 tmp = 0; -+ _mt_fe_tn_get_reg(state, 0x01, &tmp); -+ printk(KERN_INFO "m88dc2800: tuner id = 0x%02x ", tmp); -+ switch (tmp) { -+ case 0x0d: -+ state->tuner_mtt = 0xD1; -+ break; -+ case 0x8e: -+ default: -+ state->tuner_mtt = 0xE1; -+ break; -+ } -+ } -+ return 0; -+} -+ -+ static int mt_fe_tn_set_freq_tc2800(struct m88dc2800_state *state, -+ u32 freq_KHz) -+{ -+ u8 buf; -+ u8 buf1; -+ -+ mt_fe_tn_init_tc2800(state); -+ state->tuner_freq = freq_KHz; -+ _mt_fe_tn_set_reg(state, 0x21, freq_KHz > 500000 ? 0xb9 : 0x99); -+ mt_fe_tn_wakeup_tc2800(state); -+ _mt_fe_tn_set_reg(state, 0x05, 0x7f); -+ _mt_fe_tn_set_reg(state, 0x06, 0xf8); -+ _mt_fe_tn_set_RF_front_tc2800(state); -+ _mt_fe_tn_set_PLL_freq_tc2800(state); -+ _mt_fe_tn_set_DAC_tc2800(state); -+ _mt_fe_tn_set_BB_tc2800(state); -+ _mt_fe_tn_preset_tc2800(state); -+ _mt_fe_tn_set_reg(state, 0x05, 0x00); -+ _mt_fe_tn_set_reg(state, 0x06, 0x00); -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x00); -+ msleep(5); -+ _mt_fe_tn_set_reg(state, 0x41, 0x02); -+ -+ _mt_fe_tn_get_reg(state, 0x69, &buf1); -+ buf1 = buf1 & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if (buf == 0x0c) -+ _mt_fe_tn_set_reg(state, 0x6a, 0x59); -+ if (buf1 > 0x02) { -+ if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x66, 0x64); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } -+ if (buf1 < 0x03) { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x64); -+ else if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ msleep(5); -+ } else if (buf < 0x0c) { -+ if (freq_KHz > 800000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz > 600000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else if (freq_KHz > 500000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x34); -+ else if (freq_KHz > 300000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x43); -+ else if (freq_KHz > 220000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ else if (freq_KHz > 110000) -+ _mt_fe_tn_set_reg(state, 0x87, 0x14); -+ else -+ _mt_fe_tn_set_reg(state, 0x87, 0x54); -+ msleep(5); -+ } -+ } else if ((state->tuner_mtt == 0xE1)) { -+ _mt_fe_tn_set_reg(state, 0x00, 0x01); -+ _mt_fe_tn_set_reg(state, 0x00, 0x00); -+ msleep(20); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xef) | 0x28; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ msleep(50); -+ _mt_fe_tn_get_reg(state, 0x38, &buf); -+ _mt_fe_tn_set_reg(state, 0x38, buf); -+ _mt_fe_tn_get_reg(state, 0x32, &buf); -+ buf = (buf & 0xf7) | 0x10; -+ _mt_fe_tn_set_reg(state, 0x32, buf); -+ msleep(10); -+ _mt_fe_tn_get_reg(state, 0x69, &buf); -+ buf = buf & 0x03; -+ _mt_fe_tn_set_reg(state, 0x2a, buf); -+ if (buf > 0) { -+ msleep(20); -+ _mt_fe_tn_get_reg(state, 0x84, &buf); -+ buf = buf & 0x1f; -+ _mt_fe_tn_set_reg(state, 0x68, 0x0a); -+ _mt_fe_tn_get_reg(state, 0x88, &buf1); -+ buf1 = buf1 & 0x1f; -+ if (buf <= buf1) -+ _mt_fe_tn_set_reg(state, 0x66, 0x44); -+ else -+ _mt_fe_tn_set_reg(state, 0x66, 0x74); -+ } else { -+ if (freq_KHz <= 600000) -+ _mt_fe_tn_set_reg(state, 0x68, 0x0c); -+ else -+ _mt_fe_tn_set_reg(state, 0x68, 0x0e); -+ _mt_fe_tn_set_reg(state, 0x30, 0xfb); -+ _mt_fe_tn_set_reg(state, 0x30, 0xff); -+ _mt_fe_tn_set_reg(state, 0x31, 0x04); -+ _mt_fe_tn_set_reg(state, 0x31, 0x00); -+ } -+ if (state->tuner_loopthrough != 0) { -+ _mt_fe_tn_get_reg(state, 0x28, &buf); -+ if (buf == 0) { -+ _mt_fe_tn_set_reg(state, 0x28, 0xff); -+ _mt_fe_tn_get_reg(state, 0x61, &buf); -+ buf = buf & 0x0f; -+ if (buf > 9) -+ _mt_fe_tn_set_reg(state, 0x67, 0x74); -+ else if (buf > 6) -+ _mt_fe_tn_set_reg(state, 0x67, 0x64); -+ else if (buf > 3) -+ _mt_fe_tn_set_reg(state, 0x67, 0x54); -+ else -+ _mt_fe_tn_set_reg(state, 0x67, 0x44); -+ } -+ } else { -+ _mt_fe_tn_set_reg(state, 0x67, 0x34); -+ } -+ } else { -+ return 1; -+ } -+ return 0; -+} -+ -+ -+/* -+static int mt_fe_tn_set_BB_filter_band_tc2800(struct m88dc2800_state *state, -+ u8 bandwidth) -+{ -+ u8 buf, tmp; -+ -+ _mt_fe_tn_get_reg(state, 0x53, &tmp); -+ -+ if (bandwidth == 6) -+ buf = 0x01 << 1; -+ else if (bandwidth == 7) -+ buf = 0x02 << 1; -+ else if (bandwidth == 8) -+ buf = 0x04 << 1; -+ else -+ buf = 0x04 << 1; -+ -+ tmp &= 0xf1; -+ tmp |= buf; -+ _mt_fe_tn_set_reg(state, 0x53, tmp); -+ state->tuner_bandwidth = bandwidth; -+ return 0; -+} -+*/ -+ -+static s32 mt_fe_tn_get_signal_strength_tc2800(struct m88dc2800_state -+ *state) -+{ -+ s32 level = -107; -+ s32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; -+ s32 val1, val2, val; -+ s32 result2, result3, result4, result5, result6; -+ s32 append; -+ u8 tmp; -+ s32 freq_KHz = (s32) state->tuner_freq; -+ if (state->tuner_mtt == 0xD1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp2 = tmp & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp3 = tmp & 0x07; -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp4 = (tmp >> 4) & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp5 = tmp & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x7f, &tmp); -+ tmp6 = (tmp >> 5) & 0x01; -+ if (tmp1 > 6) { -+ val1 = 0; -+ if (freq_KHz <= 200000) { -+ val2 = (tmp1 - 6) * 267; -+ } else if (freq_KHz <= 600000) { -+ val2 = (tmp1 - 6) * 280; -+ } else { -+ val2 = (tmp1 - 6) * 290; -+ } -+ val = val1 + val2; -+ } else { -+ if (tmp1 == 0) { -+ val1 = -550; -+ } else { -+ val1 = 0; -+ } -+ if ((tmp1 < 4) && (freq_KHz >= 506000)) { -+ val1 = -850; -+ } -+ val2 = 0; -+ val = val1 + val2; -+ } -+ if (freq_KHz <= 95000) { -+ result2 = tmp2 * 289; -+ } else if (freq_KHz <= 155000) { -+ result2 = tmp2 * 278; -+ } else if (freq_KHz <= 245000) { -+ result2 = tmp2 * 267; -+ } else if (freq_KHz <= 305000) { -+ result2 = tmp2 * 256; -+ } else if (freq_KHz <= 335000) { -+ result2 = tmp2 * 244; -+ } else if (freq_KHz <= 425000) { -+ result2 = tmp2 * 233; -+ } else if (freq_KHz <= 575000) { -+ result2 = tmp2 * 222; -+ } else if (freq_KHz <= 665000) { -+ result2 = tmp2 * 211; -+ } else { -+ result2 = tmp2 * 200; -+ } -+ result3 = (6 - tmp3) * 100; -+ result4 = 300 * tmp4; -+ result5 = 50 * tmp5; -+ result6 = 300 * tmp6; -+ if (freq_KHz < 105000) { -+ append = -450; -+ } else if (freq_KHz <= 227000) { -+ append = -4 * (freq_KHz / 1000 - 100) + 150; -+ } else if (freq_KHz <= 305000) { -+ append = -4 * (freq_KHz / 1000 - 100); -+ } else if (freq_KHz <= 419000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17 + 130; -+ } else if (freq_KHz <= 640000) { -+ append = 500 - 40 * (freq_KHz / 1000 - 300) / 17; -+ } else { -+ append = -500; -+ } -+ level = append - (val + result2 + result3 + result4 + -+ result5 + result6); -+ level /= 100; -+ } else if (state->tuner_mtt == 0xE1) { -+ _mt_fe_tn_get_reg(state, 0x61, &tmp); -+ tmp1 = tmp & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x84, &tmp); -+ tmp2 = tmp & 0x1f; -+ _mt_fe_tn_get_reg(state, 0x69, &tmp); -+ tmp3 = tmp & 0x03; -+ _mt_fe_tn_get_reg(state, 0x73, &tmp); -+ tmp4 = tmp & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x7c, &tmp); -+ tmp5 = (tmp >> 4) & 0x0f; -+ _mt_fe_tn_get_reg(state, 0x7b, &tmp); -+ tmp6 = tmp & 0x0f; -+ if (freq_KHz < 151000) { -+ result2 = (1150 - freq_KHz / 100) * 163 / 33 + 4230; -+ result3 = (1150 - freq_KHz / 100) * 115 / 33 + 1850; -+ result4 = -3676 * (freq_KHz / 1000) / 100 + 6115; -+ } else if (freq_KHz < 257000) { -+ result2 = (1540 - freq_KHz / 100) * 11 / 4 + 3870; -+ result3 = (1540 - freq_KHz / 100) * 205 / 96 + 2100; -+ result4 = -21 * freq_KHz / 1000 + 5084; -+ } else if (freq_KHz < 305000) { -+ result2 = (2620 - freq_KHz / 100) * 5 / 3 + 2770; -+ result3 = (2620 - freq_KHz / 100) * 10 / 7 + 1700; -+ result4 = 650; -+ } else if (freq_KHz < 449000) { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = (3100 - freq_KHz / 100) * 5 / 3 + 10000; -+ result4 = 134 * freq_KHz / 10000 + 11875; -+ } else { -+ result2 = (307 - freq_KHz / 1000) * 82 / 27 + 11270; -+ result3 = 8400; -+ result4 = 5300; -+ } -+ if (tmp1 > 6) { -+ val1 = result2; -+ val2 = 2900; -+ val = 500; -+ } else if (tmp1 > 0) { -+ val1 = result3; -+ val2 = 2700; -+ val = 500; -+ } else { -+ val1 = result4; -+ val2 = 2700; -+ val = 400; -+ } -+ level = val1 - (val2 * tmp1 + 500 * tmp2 + 3000 * tmp3 - -+ 500 * tmp4 + 3000 * tmp5 + val * tmp6) - 1000; -+ level /= 1000; -+ } -+ return level; -+} -+ -+ -+/* m88dc2800 operation functions */ -+u8 M88DC2000GetLock(struct m88dc2800_state * state) -+{ -+ u8 u8ret = 0; -+ if (ReadReg(state, 0x80) < 0x06) { -+ if ((ReadReg(state, 0xdf) & 0x80) == 0x80 -+ &&(ReadReg(state, 0x91) & 0x23) == 0x03 -+ &&(ReadReg(state, 0x43) & 0x08) == 0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } else { -+ if ((ReadReg(state, 0x85) & 0x08) == 0x08) -+ u8ret = 1; -+ else -+ u8ret = 0; -+ } -+ dprintk("%s, lock=%d\n", __func__, u8ret); -+ return u8ret; -+} -+ -+static int M88DC2000SetTsType(struct m88dc2800_state *state, u8 type) -+{ -+ u8 regC2H; -+ -+ if (type == 3) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x43); -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC0; -+ regC2H |= 0x1B; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x60); /* common interface */ -+ } else if (type == 1) { -+ WriteReg(state, 0x84, 0x6A); -+ WriteReg(state, 0xC0, 0x47); /* serial format */ -+ WriteReg(state, 0xE2, 0x02); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); -+ } else { -+ WriteReg(state, 0x84, 0x6C); -+ WriteReg(state, 0xC0, 0x43); /* parallel format */ -+ WriteReg(state, 0xE2, 0x06); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xC7; -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0xC1, 0x00); -+ } -+ return 0; -+} -+ -+static int M88DC2000RegInitial_TC2800(struct m88dc2800_state *state) -+{ -+ u8 RegE3H, RegE4H; -+ -+ WriteReg(state, 0x00, 0x48); -+ WriteReg(state, 0x01, 0x09); -+ WriteReg(state, 0xFB, 0x0A); -+ WriteReg(state, 0xFC, 0x0B); -+ WriteReg(state, 0x02, 0x0B); -+ WriteReg(state, 0x03, 0x18); -+ WriteReg(state, 0x05, 0x0D); -+ WriteReg(state, 0x36, 0x80); -+ WriteReg(state, 0x43, 0x40); -+ WriteReg(state, 0x55, 0x7A); -+ WriteReg(state, 0x56, 0xD9); -+ WriteReg(state, 0x57, 0xDF); -+ WriteReg(state, 0x58, 0x39); -+ WriteReg(state, 0x5A, 0x00); -+ WriteReg(state, 0x5C, 0x71); -+ WriteReg(state, 0x5D, 0x23); -+ WriteReg(state, 0x86, 0x40); -+ WriteReg(state, 0xF9, 0x08); -+ WriteReg(state, 0x61, 0x40); -+ WriteReg(state, 0x62, 0x0A); -+ WriteReg(state, 0x90, 0x06); -+ WriteReg(state, 0xDE, 0x00); -+ WriteReg(state, 0xA0, 0x03); -+ WriteReg(state, 0xDF, 0x81); -+ WriteReg(state, 0xFA, 0x40); -+ WriteReg(state, 0x37, 0x10); -+ WriteReg(state, 0xF0, 0x40); -+ WriteReg(state, 0xF2, 0x9C); -+ WriteReg(state, 0xF3, 0x40); -+ RegE3H = ReadReg(state, 0xE3); -+ RegE4H = ReadReg(state, 0xE4); -+ if (((RegE3H & 0xC0) == 0x00) && ((RegE4H & 0xC0) == 0x00)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x02); -+ WriteReg(state, 0xF4, 0x04); -+ WriteReg(state, 0xF5, 0x00); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if (((RegE3H & 0xC0) == 0x80) && ((RegE4H & 0xC0) == 0x40)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0x40, 0x00); -+ WriteReg(state, 0x41, 0x10); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x14); -+ WriteReg(state, 0xE1, 0x25); -+ } else if ((RegE3H == 0x80 || RegE3H == 0x81) -+ && (RegE4H == 0x80 || RegE4H == 0x81)) { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x25); -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x0D); -+ } else { -+ WriteReg(state, 0x30, 0xFF); -+ WriteReg(state, 0x31, 0x00); -+ WriteReg(state, 0x32, 0x00); -+ WriteReg(state, 0x33, 0x00); -+ WriteReg(state, 0x35, 0x32); -+ WriteReg(state, 0x39, 0x00); -+ WriteReg(state, 0x3A, 0x00); -+ WriteReg(state, 0xF1, 0x00); -+ WriteReg(state, 0xF4, 0x00); -+ WriteReg(state, 0xF5, 0x40); -+ WriteReg(state, 0x42, 0x24); -+ WriteReg(state, 0xE1, 0x27); -+ WriteReg(state, 0x92, 0x7F); -+ WriteReg(state, 0x93, 0x91); -+ WriteReg(state, 0x95, 0x00); -+ WriteReg(state, 0x2B, 0x33); -+ WriteReg(state, 0x2A, 0x2A); -+ WriteReg(state, 0x2E, 0x80); -+ WriteReg(state, 0x25, 0x25); -+ WriteReg(state, 0x2D, 0xFF); -+ WriteReg(state, 0x26, 0xFF); -+ WriteReg(state, 0x27, 0x00); -+ WriteReg(state, 0x24, 0x25); -+ WriteReg(state, 0xA4, 0xFF); -+ WriteReg(state, 0xA3, 0x10); -+ } -+ WriteReg(state, 0xF6, 0x4E); -+ WriteReg(state, 0xF7, 0x20); -+ WriteReg(state, 0x89, 0x02); -+ WriteReg(state, 0x14, 0x08); -+ WriteReg(state, 0x6F, 0x0D); -+ WriteReg(state, 0x10, 0xFF); -+ WriteReg(state, 0x11, 0x00); -+ WriteReg(state, 0x12, 0x30); -+ WriteReg(state, 0x13, 0x23); -+ WriteReg(state, 0x60, 0x00); -+ WriteReg(state, 0x69, 0x00); -+ WriteReg(state, 0x6A, 0x03); -+ WriteReg(state, 0xE0, 0x75); -+ WriteReg(state, 0x8D, 0x29); -+ WriteReg(state, 0x4E, 0xD8); -+ WriteReg(state, 0x88, 0x80); -+ WriteReg(state, 0x52, 0x79); -+ WriteReg(state, 0x53, 0x03); -+ WriteReg(state, 0x59, 0x30); -+ WriteReg(state, 0x5E, 0x02); -+ WriteReg(state, 0x5F, 0x0F); -+ WriteReg(state, 0x71, 0x03); -+ WriteReg(state, 0x72, 0x12); -+ WriteReg(state, 0x73, 0x12); -+ -+ return 0; -+} -+ -+static int M88DC2000AutoTSClock_P(struct m88dc2800_state *state, u32 sym, -+ u16 qam) -+{ -+ u32 dataRate; -+ u8 clk_div, value; -+ printk(KERN_INFO -+ "m88dc2800: M88DC2000AutoTSClock_P, symrate=%d qam=%d\n", -+ sym, qam); -+ switch (qam) { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ if (dataRate <= 4115) -+ clk_div = 0x05; -+ else if (dataRate <= 4800) -+ clk_div = 0x04; -+ else if (dataRate <= 5760) -+ clk_div = 0x03; -+ else if (dataRate <= 7200) -+ clk_div = 0x02; -+ else if (dataRate <= 9600) -+ clk_div = 0x01; -+ else -+ clk_div = 0x00; -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000AutoTSClock_C(struct m88dc2800_state *state, u32 sym, -+ u16 qam) -+{ -+ u32 dataRate; -+ u8 clk_div, value; -+ printk(KERN_INFO -+ "m88dc2800: M88DC2000AutoTSClock_C, symrate=%d qam=%d\n", -+ sym, qam); -+ switch (qam) { -+ case 16: -+ dataRate = 4; -+ break; -+ case 32: -+ dataRate = 5; -+ break; -+ case 128: -+ dataRate = 7; -+ break; -+ case 256: -+ dataRate = 8; -+ break; -+ case 64: -+ default: -+ dataRate = 6; -+ break; -+ } -+ dataRate *= sym * 105; -+ dataRate /= 800; -+ if (dataRate <= 4115) -+ clk_div = 0x3F; -+ else if (dataRate <= 4800) -+ clk_div = 0x36; -+ else if (dataRate <= 5760) -+ clk_div = 0x2D; -+ else if (dataRate <= 7200) -+ clk_div = 0x24; -+ else if (dataRate <= 9600) -+ clk_div = 0x1B; -+ else -+ clk_div = 0x12; -+ value = ReadReg(state, 0xC2); -+ value &= 0xc0; -+ value |= clk_div; -+ WriteReg(state, 0xC2, value); -+ return 0; -+} -+ -+static int M88DC2000SetTxMode(struct m88dc2800_state *state, u8 inverted, -+ u8 j83) -+{ -+ u8 value = 0; -+ if (inverted) -+ value |= 0x08; /* spectrum inverted */ -+ if (j83) -+ value |= 0x01; /* J83C */ -+ WriteReg(state, 0x83, value); -+ return 0; -+} -+ -+static int M88DC2000SoftReset(struct m88dc2800_state *state) -+{ -+ WriteReg(state, 0x80, 0x01); -+ WriteReg(state, 0x82, 0x00); -+ msleep(1); -+ WriteReg(state, 0x80, 0x00); -+ return 0; -+} -+ -+static int M88DC2000SetSym(struct m88dc2800_state *state, u32 sym, u32 xtal) -+{ -+ u8 value; -+ u8 reg6FH, reg12H; -+ u64 fValue; -+ u32 dwValue; -+ -+ printk(KERN_INFO "%s, sym=%d, xtal=%d\n", __func__, sym, xtal); -+ fValue = 4294967296 * (sym + 10); -+ do_div(fValue, xtal); -+ -+ /* fValue = 4294967296 * (sym + 10) / xtal; */ -+ dwValue = (u32) fValue; -+ printk(KERN_INFO "%s, fvalue1=%x\n", __func__, dwValue); -+ WriteReg(state, 0x58, (u8) ((dwValue >> 24) & 0xff)); -+ WriteReg(state, 0x57, (u8) ((dwValue >> 16) & 0xff)); -+ WriteReg(state, 0x56, (u8) ((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x55, (u8) ((dwValue >> 0) & 0xff)); -+ -+ /* fValue = 2048 * xtal / sym; */ -+ fValue = 2048 * xtal; -+ do_div(fValue, sym); -+ dwValue = (u32) fValue; -+ printk(KERN_INFO "%s, fvalue2=%x\n", __func__, dwValue); -+ WriteReg(state, 0x5D, (u8) ((dwValue >> 8) & 0xff)); -+ WriteReg(state, 0x5C, (u8) ((dwValue >> 0) & 0xff)); -+ value = ReadReg(state, 0x5A); -+ if (((dwValue >> 16) & 0x0001) == 0) -+ value &= 0x7F; -+ else -+ value |= 0x80; -+ WriteReg(state, 0x5A, value); -+ value = ReadReg(state, 0x89); -+ if (sym <= 1800) -+ value |= 0x01; -+ else -+ value &= 0xFE; -+ WriteReg(state, 0x89, value); -+ if (sym >= 6700) { -+ reg6FH = 0x0D; -+ reg12H = 0x30; -+ } else if (sym >= 4000) { -+ fValue = 22 * 4096 / sym; -+ reg6FH = (u8) fValue; -+ reg12H = 0x30; -+ } else if (sym >= 2000) { -+ fValue = 14 * 4096 / sym; -+ reg6FH = (u8) fValue; -+ reg12H = 0x20; -+ } else { -+ fValue = 7 * 4096 / sym; -+ reg6FH = (u8) fValue; -+ reg12H = 0x10; -+ } -+ WriteReg(state, 0x6F, reg6FH); -+ WriteReg(state, 0x12, reg12H); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ if (sym < 3000) { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); -+ } else { -+ WriteReg(state, 0x6C, 0x14); -+ WriteReg(state, 0x6D, 0x0E); -+ WriteReg(state, 0x6E, 0x36); -+ } -+ } else { -+ WriteReg(state, 0x6C, 0x16); -+ WriteReg(state, 0x6D, 0x10); -+ WriteReg(state, 0x6E, 0x18); -+ } -+ return 0; -+} -+ -+static int M88DC2000SetQAM(struct m88dc2800_state *state, u16 qam) -+{ -+ u8 reg00H, reg4AH, regC2H, reg44H, reg4CH, reg4DH, reg74H, value; -+ u8 reg8BH, reg8EH; -+ printk(KERN_INFO "%s, qam=%d\n", __func__, qam); -+ regC2H = ReadReg(state, 0xC2); -+ regC2H &= 0xF8; -+ switch (qam) { -+ case 16: /* 16 QAM */ -+ reg00H = 0x08; -+ reg4AH = 0x0F; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 32: /* 32 QAM */ -+ reg00H = 0x18; -+ reg4AH = 0xFB; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ WriteReg(state, 0x6E, 0x18); -+ break; -+ case 64: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ case 128: /* 128 QAM */ -+ reg00H = 0x28; -+ reg4AH = 0xFF; -+ regC2H |= 0x02; -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ case 256: /* 256 QAM */ -+ reg00H = 0x38; -+ reg4AH = 0xCD; -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ regC2H |= 0x02; -+ } else { -+ regC2H |= 0x01; -+ } -+ reg44H = 0xA9; -+ reg4CH = 0x08; -+ reg4DH = 0xF5; -+ reg74H = 0x0E; -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ break; -+ default: /* 64 QAM */ -+ reg00H = 0x48; -+ reg4AH = 0xCD; -+ regC2H |= 0x02; -+ reg44H = 0xAA; -+ reg4CH = 0x0C; -+ reg4DH = 0xF7; -+ reg74H = 0x0E; -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) { -+ reg8BH = 0x5A; -+ reg8EH = 0xBD; -+ } else { -+ reg8BH = 0x5B; -+ reg8EH = 0x9D; -+ } -+ break; -+ } -+ WriteReg(state, 0x00, reg00H); -+ value = ReadReg(state, 0x88); -+ value |= 0x08; -+ WriteReg(state, 0x88, value); -+ WriteReg(state, 0x4B, 0xFF); -+ WriteReg(state, 0x4A, reg4AH); -+ value &= 0xF7; -+ WriteReg(state, 0x88, value); -+ WriteReg(state, 0xC2, regC2H); -+ WriteReg(state, 0x44, reg44H); -+ WriteReg(state, 0x4C, reg4CH); -+ WriteReg(state, 0x4D, reg4DH); -+ WriteReg(state, 0x74, reg74H); -+ WriteReg(state, 0x8B, reg8BH); -+ WriteReg(state, 0x8E, reg8EH); -+ return 0; -+} -+ -+static int M88DC2000WriteTuner_TC2800(struct m88dc2800_state *state, -+ u32 freq_KHz) -+{ -+ printk(KERN_INFO "%s, freq=%d KHz\n", __func__, freq_KHz); -+ return mt_fe_tn_set_freq_tc2800(state, freq_KHz); -+} -+ -+static int m88dc2800_init(struct dvb_frontend *fe) -+{ -+ dprintk("%s()\n", __func__); -+ return 0; -+} -+ -+static int m88dc2800_set_parameters(struct dvb_frontend *fe) -+{ -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u8 is_annex_c, is_update; -+ u16 temp_qam; -+ s32 waiting_time; -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ -+ is_annex_c = c->delivery_system == SYS_DVBC_ANNEX_C ? 1 : 0; -+ -+ switch (c->modulation) { -+ case QAM_16: -+ temp_qam = 16; -+ break; -+ case QAM_32: -+ temp_qam = 32; -+ break; -+ case QAM_128: -+ temp_qam = 128; -+ break; -+ case QAM_256: -+ temp_qam = 256; -+ break; -+ default: /* QAM_64 */ -+ temp_qam = 64; -+ break; -+ } -+ -+ state->inverted = c->inversion == INVERSION_ON ? 1 : 0; -+ -+ printk(KERN_INFO -+ "m88dc2800: state, freq=%d qam=%d sym=%d inverted=%d xtal=%d\n", -+ state->freq, state->qam, state->sym, state->inverted, -+ state->xtal); -+ printk(KERN_INFO -+ "m88dc2800: set frequency to %d qam=%d symrate=%d annex-c=%d\n", -+ c->frequency, temp_qam, c->symbol_rate, is_annex_c); -+ -+ is_update = 0; -+ WriteReg(state, 0x80, 0x01); -+ if (c->frequency != state->freq) { -+ M88DC2000WriteTuner_TC2800(state, c->frequency / 1000); -+ state->freq = c->frequency; -+ } -+ if (c->symbol_rate != state->sym) { -+ M88DC2000SetSym(state, c->symbol_rate / 1000, state->xtal); -+ state->sym = c->symbol_rate; -+ is_update = 1; -+ } -+ if (temp_qam != state->qam) { -+ M88DC2000SetQAM(state, temp_qam); -+ state->qam = temp_qam; -+ is_update = 1; -+ } -+ -+ if (is_update != 0) { -+ if (state->config->ts_mode == 3) -+ M88DC2000AutoTSClock_C(state, state->sym / 1000, -+ temp_qam); -+ else -+ M88DC2000AutoTSClock_P(state, state->sym / 1000, -+ temp_qam); -+ } -+ -+ M88DC2000SetTxMode(state, state->inverted, is_annex_c); -+ M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) -+ && ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; -+ } -+ -+ state->inverted = (state->inverted != 0) ? 0 : 1; -+ M88DC2000SetTxMode(state, state->inverted, is_annex_c); -+ M88DC2000SoftReset(state); -+ if (((ReadReg(state, 0xE3) & 0x80) == 0x80) && -+ ((ReadReg(state, 0xE4) & 0x80) == 0x80)) -+ waiting_time = 800; -+ else -+ waiting_time = 500; -+ while (waiting_time > 0) { -+ msleep(50); -+ waiting_time -= 50; -+ if (M88DC2000GetLock(state)) -+ return 0; -+ } -+ return 0; -+} -+ -+static int m88dc2800_read_status(struct dvb_frontend *fe, -+ fe_status_t * status) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ *status = 0; -+ -+ if (M88DC2000GetLock(state)) { -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ |FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_LOCK; -+ } -+ return 0; -+} -+ -+static int m88dc2800_read_ber(struct dvb_frontend *fe, u32 * ber) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ u16 tmp; -+ -+ if (M88DC2000GetLock(state) == 0) { -+ state->ber = 0; -+ } else if ((ReadReg(state, 0xA0) & 0x80) != 0x80) { -+ tmp = ReadReg(state, 0xA2) << 8; -+ tmp += ReadReg(state, 0xA1); -+ state->ber = tmp; -+ WriteReg(state, 0xA0, 0x05); -+ WriteReg(state, 0xA0, 0x85); -+ } -+ *ber = state->ber; -+ return 0; -+} -+ -+static int m88dc2800_read_signal_strength(struct dvb_frontend *fe, -+ u16 * strength) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ s16 tuner_strength; -+ -+ tuner_strength = mt_fe_tn_get_signal_strength_tc2800(state); -+ *strength = tuner_strength < -107 ? 0 : tuner_strength + 107; -+ -+ return 0; -+} -+ -+static int m88dc2800_read_snr(struct dvb_frontend *fe, u16 * snr) -+{ -+ static const u32 mes_log[] = { -+ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, -+ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, -+ 13010, 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, -+ 14624, 14771, 14914, 15052, 15185, 15315, 15441, 15563, 15682, -+ 15798, 15911, 16021, 16128, 16232, 16335, 16435, 16532, 16628, -+ 16721, 16812, 16902, 16990, 17076, 17160, 17243, 17324, 17404, -+ 17482, 17559, 17634, 17709, 17782, 17853, 17924, 17993, 18062, -+ 18129, 18195, 18261, 18325, 18388, 18451, 18513, 18573, 18633, -+ 18692, 18751, 18808, 18865, 18921, 18976, 19031 -+ }; -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ u8 i; -+ u32 _snr, mse; -+ -+ if ((ReadReg(state, 0x91) & 0x23) != 0x03) { -+ *snr = 0; -+ return 0; -+ } -+ mse = 0; -+ for (i = 0; i < 30; i++) { -+ mse += (ReadReg(state, 0x08) << 8) + ReadReg(state, 0x07); -+ } -+ mse /= 30; -+ if (mse > 80) -+ mse = 80; -+ switch (state->qam) { -+ case 16: -+ _snr = 34080; -+ break; /* 16QAM */ -+ case 32: -+ _snr = 37600; -+ break; /* 32QAM */ -+ case 64: -+ _snr = 40310; -+ break; /* 64QAM */ -+ case 128: -+ _snr = 43720; -+ break; /* 128QAM */ -+ case 256: -+ _snr = 46390; -+ break; /* 256QAM */ -+ default: -+ _snr = 40310; -+ break; -+ } -+ _snr -= mes_log[mse - 1]; /* C - 10*log10(MSE) */ -+ _snr /= 1000; -+ if (_snr > 0xff) -+ _snr = 0xff; -+ *snr = _snr; -+ return 0; -+} -+ -+static int m88dc2800_read_ucblocks(struct dvb_frontend *fe, u32 * ucblocks) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ u8 u8Value; -+ -+ u8Value = ReadReg(state, 0xdf); -+ u8Value |= 0x02; /* Hold */ -+ WriteReg(state, 0xdf, u8Value); -+ -+ *ucblocks = ReadReg(state, 0xd5); -+ *ucblocks = (*ucblocks << 8) | ReadReg(state, 0xd4); -+ -+ u8Value &= 0xfe; /* Clear */ -+ WriteReg(state, 0xdf, u8Value); -+ u8Value &= 0xfc; /* Update */ -+ u8Value |= 0x01; -+ WriteReg(state, 0xdf, u8Value); -+ -+ return 0; -+} -+ -+static int m88dc2800_sleep(struct dvb_frontend *fe) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ -+ mt_fe_tn_sleep_tc2800(state); -+ state->freq = 0; -+ -+ return 0; -+} -+ -+static void m88dc2800_release(struct dvb_frontend *fe) -+{ -+ struct m88dc2800_state *state = fe->demodulator_priv; -+ kfree(state); -+} -+ -+static struct dvb_frontend_ops m88dc2800_ops; -+ -+struct dvb_frontend *m88dc2800_attach(const struct m88dc2800_config -+ *config, struct i2c_adapter *i2c) -+{ -+ struct m88dc2800_state *state = NULL; -+ -+ /* allocate memory for the internal state */ -+ state = kzalloc(sizeof(struct m88dc2800_state), GFP_KERNEL); -+ if (state == NULL) -+ goto error; -+ -+ /* setup the state */ -+ state->config = config; -+ state->i2c = i2c; -+ state->xtal = 28800; -+ -+ WriteReg(state, 0x80, 0x01); -+ M88DC2000RegInitial_TC2800(state); -+ M88DC2000SetTsType(state, state->config->ts_mode); -+ mt_fe_tn_init_tc2800(state); -+ -+ /* create dvb_frontend */ -+ memcpy(&state->frontend.ops, &m88dc2800_ops, -+ sizeof(struct dvb_frontend_ops)); -+ state->frontend.demodulator_priv = state; -+ return &state->frontend; -+ -+ error: -+ kfree(state); -+ return NULL; -+} -+ -+EXPORT_SYMBOL(m88dc2800_attach); -+ -+static struct dvb_frontend_ops m88dc2800_ops = { -+ .delsys = {SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C}, -+ .info = { -+ .name = "Montage M88DC2800 DVB-C", -+ .frequency_stepsize = 62500, -+ .frequency_min = 48000000, -+ .frequency_max = 870000000, -+ .symbol_rate_min = 870000, -+ .symbol_rate_max = 9000000, -+ .caps = FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | -+ FE_CAN_QAM_128 | FE_CAN_QAM_256 | FE_CAN_FEC_AUTO -+ }, -+ .release = m88dc2800_release, -+ .init = m88dc2800_init, -+ .sleep = m88dc2800_sleep, -+ .set_frontend = m88dc2800_set_parameters, -+ .read_status = m88dc2800_read_status, -+ .read_ber = m88dc2800_read_ber, -+ .read_signal_strength = m88dc2800_read_signal_strength, -+ .read_snr = m88dc2800_read_snr, -+ .read_ucblocks = m88dc2800_read_ucblocks, -+}; -+ -+MODULE_DESCRIPTION("Montage DVB-C demodulator driver"); -+MODULE_AUTHOR("Max Nibble nibble.max@gmail.com"); -+MODULE_LICENSE("GPL"); -+MODULE_VERSION("1.00"); -diff -urN a/drivers/media/dvb-frontends/m88dc2800.h b/drivers/media/dvb-frontends/m88dc2800.h ---- a/drivers/media/dvb-frontends/m88dc2800.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88dc2800.h 2013-01-26 14:57:32.000000000 +0800 -@@ -0,0 +1,43 @@ -+/* -+ M88DC2800/M88TC2800 - DVB-C demodulator and tuner from Montage -+ -+ Copyright (C) 2012 Max Nibble nibble.max@gmail.com -+ Copyright (C) 2011 Montage Technology - www.montage-tech.com -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+*/ -+ -+#ifndef M88DC2800_H -+#define M88DC2800_H -+ -+#include <linux/dvb/frontend.h> -+ -+struct m88dc2800_config { -+ u8 demod_address; -+ u8 ts_mode; -+}; -+ -+#if defined(CONFIG_DVB_M88DC2800) || (defined(CONFIG_DVB_M88DC2800_MODULE) && defined(MODULE)) -+extern struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c); -+#else -+static inline struct dvb_frontend* m88dc2800_attach(const struct m88dc2800_config* config, -+ struct i2c_adapter* i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif /* CONFIG_DVB_M88DC2800 */ -+#endif /* M88DC2800_H */ -diff -urN a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c ---- a/drivers/media/dvb-frontends/m88ds3103.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103.c 2013-01-30 12:33:47.000000000 +0800 -@@ -0,0 +1,1710 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ Copyright (C) 2011 Max nibblenibble.max@gmail.com -+ Copyright (C) 2010 Montage Technology<www.montage-tech.com> -+ Copyright (C) 2009 Konstantin Dimitrov. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include <linux/slab.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/moduleparam.h> -+#include <linux/init.h> -+#include <linux/firmware.h> -+ -+#include "dvb_frontend.h" -+#include "m88ds3103.h" -+#include "m88ds3103_priv.h" -+ -+static int debug; -+module_param(debug, int, 0644); -+MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); -+ -+#define dprintk(args...) \ -+ do { \ -+ if (debug) \ -+ printk(KERN_INFO "m88ds3103: " args); \ -+ } while (0) -+ -+/*demod register operations.*/ -+static int m88ds3103_writereg(struct m88ds3103_state *state, int reg, int data) -+{ -+ u8 buf[] = { reg, data }; -+ struct i2c_msg msg = { .addr = state->config->demod_address, -+ .flags = 0, .buf = buf, .len = 2 }; -+ int err; -+ -+ if (debug > 1) -+ printk("m88ds3103: %s: write reg 0x%02x, value 0x%02x\n", -+ __func__, reg, data); -+ -+ err = i2c_transfer(state->i2c, &msg, 1); -+ if (err != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EREMOTEIO; -+ } -+ return 0; -+} -+ -+static int m88ds3103_readreg(struct m88ds3103_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ struct i2c_msg msg[] = { -+ { .addr = state->config->demod_address, .flags = 0, -+ .buf = b0, .len = 1 }, -+ { .addr = state->config->demod_address, .flags = I2C_M_RD, -+ .buf = b1, .len = 1 } -+ }; -+ ret = i2c_transfer(state->i2c, msg, 2); -+ -+ if (ret != 2) { -+ printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", -+ __func__, reg, ret); -+ return ret; -+ } -+ -+ if (debug > 1) -+ printk(KERN_INFO "m88ds3103: read reg 0x%02x, value 0x%02x\n", -+ reg, b1[0]); -+ -+ return b1[0]; -+} -+ -+/*tuner register operations.*/ -+static int m88ds3103_tuner_writereg(struct m88ds3103_state *state, int reg, int data) -+{ -+ u8 buf[] = { reg, data }; -+ struct i2c_msg msg = { .addr = 0x60, -+ .flags = 0, .buf = buf, .len = 2 }; -+ int err; -+ -+ m88ds3103_writereg(state, 0x03, 0x11); -+ err = i2c_transfer(state->i2c, &msg, 1); -+ -+ if (err != 1) { -+ printk("%s: writereg error(err == %i, reg == 0x%02x," -+ " value == 0x%02x)\n", __func__, err, reg, data); -+ return -EREMOTEIO; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_tuner_readreg(struct m88ds3103_state *state, u8 reg) -+{ -+ int ret; -+ u8 b0[] = { reg }; -+ u8 b1[] = { 0 }; -+ struct i2c_msg msg[] = { -+ { .addr = 0x60, .flags = 0, -+ .buf = b0, .len = 1 }, -+ { .addr = 0x60, .flags = I2C_M_RD, -+ .buf = b1, .len = 1 } -+ }; -+ -+ m88ds3103_writereg(state, 0x03, 0x11); -+ ret = i2c_transfer(state->i2c, msg, 2); -+ -+ if (ret != 2) { -+ printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret); -+ return ret; -+ } -+ -+ return b1[0]; -+} -+ -+/* Bulk demod I2C write, for firmware download. */ -+static int m88ds3103_writeregN(struct m88ds3103_state *state, int reg, -+ const u8 *data, u16 len) -+{ -+ int ret = -EREMOTEIO; -+ struct i2c_msg msg; -+ u8 *buf; -+ -+ buf = kmalloc(len + 1, GFP_KERNEL); -+ if (buf == NULL) { -+ printk("Unable to kmalloc\n"); -+ ret = -ENOMEM; -+ goto error; -+ } -+ -+ *(buf) = reg; -+ memcpy(buf + 1, data, len); -+ -+ msg.addr = state->config->demod_address; -+ msg.flags = 0; -+ msg.buf = buf; -+ msg.len = len + 1; -+ -+ if (debug > 1) -+ printk(KERN_INFO "m88ds3103: %s: write regN 0x%02x, len = %d\n", -+ __func__, reg, len); -+ -+ ret = i2c_transfer(state->i2c, &msg, 1); -+ if (ret != 1) { -+ printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", -+ __func__, ret, reg); -+ ret = -EREMOTEIO; -+ } -+ -+error: -+ kfree(buf); -+ -+ return ret; -+} -+ -+static int m88ds3103_load_firmware(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ const struct firmware *fw; -+ int i, ret = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ if (state->skip_fw_load) -+ return 0; -+ /* Load firmware */ -+ /* request the firmware, this will block until someone uploads it */ -+ if(state->demod_id == DS3000_ID){ -+ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, -+ DS3000_DEFAULT_FIRMWARE); -+ ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE, -+ state->i2c->dev.parent); -+ }else if(state->demod_id == DS3103_ID){ -+ printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__, -+ DS3103_DEFAULT_FIRMWARE); -+ ret = request_firmware(&fw, DS3103_DEFAULT_FIRMWARE, -+ state->i2c->dev.parent); -+ } -+ -+ printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__); -+ if (ret) { -+ printk(KERN_ERR "%s: No firmware uploaded (timeout or file not " -+ "found?)\n", __func__); -+ return ret; -+ } -+ -+ /* Make sure we don't recurse back through here during loading */ -+ state->skip_fw_load = 1; -+ -+ dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", -+ fw->size, -+ fw->data[0], -+ fw->data[1], -+ fw->data[fw->size - 2], -+ fw->data[fw->size - 1]); -+ -+ /* stop internal mcu. */ -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ /* split firmware to download.*/ -+ for(i = 0; i < FW_DOWN_LOOP; i++){ -+ ret = m88ds3103_writeregN(state, 0xb0, &(fw->data[FW_DOWN_SIZE*i]), FW_DOWN_SIZE); -+ if(ret != 1) break; -+ } -+ /* start internal mcu. */ -+ if(ret == 1) -+ m88ds3103_writereg(state, 0xb2, 0x00); -+ -+ release_firmware(fw); -+ -+ dprintk("%s: Firmware upload %s\n", __func__, -+ ret == 1 ? "complete" : "failed"); -+ -+ if(ret == 1) ret = 0; -+ -+ /* Ensure firmware is always loaded if required */ -+ state->skip_fw_load = 0; -+ -+ return ret; -+} -+ -+ -+static int m88ds3103_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 data; -+ -+ dprintk("%s(%d)\n", __func__, voltage); -+ -+ dprintk("m88ds3103:pin_ctrl = (%02x)\n", state->config->pin_ctrl); -+ -+ if(state->config->set_voltage) -+ state->config->set_voltage(fe, voltage); -+ -+ data = m88ds3103_readreg(state, 0xa2); -+ -+ if(state->config->pin_ctrl & 0x80){ /*If control pin is assigned.*/ -+ data &= ~0x03; /* bit0 V/H, bit1 off/on */ -+ if(state->config->pin_ctrl & 0x02) -+ data |= 0x02; -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_18: -+ if((state->config->pin_ctrl & 0x01) == 0) -+ data |= 0x01; -+ break; -+ case SEC_VOLTAGE_13: -+ if(state->config->pin_ctrl & 0x01) -+ data |= 0x01; -+ break; -+ case SEC_VOLTAGE_OFF: -+ if(state->config->pin_ctrl & 0x02) -+ data &= ~0x02; -+ else -+ data |= 0x02; -+ break; -+ } -+ } -+ -+ m88ds3103_writereg(state, 0xa2, data); -+ -+ return 0; -+} -+ -+static int m88ds3103_read_status(struct dvb_frontend *fe, fe_status_t* status) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int lock = 0; -+ -+ *status = 0; -+ -+ switch (state->delivery_system){ -+ case SYS_DVBS: -+ lock = m88ds3103_readreg(state, 0xd1); -+ dprintk("%s: SYS_DVBS status=%x.\n", __func__, lock); -+ -+ if ((lock & 0x07) == 0x07){ -+ /*if((m88ds3103_readreg(state, 0x0d) & 0x07) == 0x07)*/ -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; -+ -+ } -+ break; -+ case SYS_DVBS2: -+ lock = m88ds3103_readreg(state, 0x0d); -+ dprintk("%s: SYS_DVBS2 status=%x.\n", __func__, lock); -+ -+ if ((lock & 0x8f) == 0x8f) -+ *status = FE_HAS_SIGNAL | FE_HAS_CARRIER -+ | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK; -+ -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_read_ber(struct dvb_frontend *fe, u32* ber) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp1, tmp2, tmp3; -+ u32 ldpc_frame_cnt, pre_err_packags, code_rate_fac = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ m88ds3103_writereg(state, 0xf9, 0x04); -+ tmp3 = m88ds3103_readreg(state, 0xf8); -+ if ((tmp3&0x10) == 0){ -+ tmp1 = m88ds3103_readreg(state, 0xf7); -+ tmp2 = m88ds3103_readreg(state, 0xf6); -+ tmp3 |= 0x10; -+ m88ds3103_writereg(state, 0xf8, tmp3); -+ state->preBer = (tmp1<<8) | tmp2; -+ } -+ break; -+ case SYS_DVBS2: -+ tmp1 = m88ds3103_readreg(state, 0x7e) & 0x0f; -+ switch(tmp1){ -+ case 0: code_rate_fac = 16008 - 80; break; -+ case 1: code_rate_fac = 21408 - 80; break; -+ case 2: code_rate_fac = 25728 - 80; break; -+ case 3: code_rate_fac = 32208 - 80; break; -+ case 4: code_rate_fac = 38688 - 80; break; -+ case 5: code_rate_fac = 43040 - 80; break; -+ case 6: code_rate_fac = 48408 - 80; break; -+ case 7: code_rate_fac = 51648 - 80; break; -+ case 8: code_rate_fac = 53840 - 80; break; -+ case 9: code_rate_fac = 57472 - 80; break; -+ case 10: code_rate_fac = 58192 - 80; break; -+ } -+ -+ tmp1 = m88ds3103_readreg(state, 0xd7) & 0xff; -+ tmp2 = m88ds3103_readreg(state, 0xd6) & 0xff; -+ tmp3 = m88ds3103_readreg(state, 0xd5) & 0xff; -+ ldpc_frame_cnt = (tmp1 << 16) | (tmp2 << 8) | tmp3; -+ -+ tmp1 = m88ds3103_readreg(state, 0xf8) & 0xff; -+ tmp2 = m88ds3103_readreg(state, 0xf7) & 0xff; -+ pre_err_packags = tmp1<<8 | tmp2; -+ -+ if (ldpc_frame_cnt > 1000){ -+ m88ds3103_writereg(state, 0xd1, 0x01); -+ m88ds3103_writereg(state, 0xf9, 0x01); -+ m88ds3103_writereg(state, 0xf9, 0x00); -+ m88ds3103_writereg(state, 0xd1, 0x00); -+ state->preBer = pre_err_packags; -+ } -+ break; -+ default: -+ break; -+ } -+ *ber = state->preBer; -+ -+ return 0; -+} -+ -+static int m88ds3103_read_signal_strength(struct dvb_frontend *fe, -+ u16 *signal_strength) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u16 gain; -+ u8 gain1, gain2, gain3 = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ gain1 = m88ds3103_tuner_readreg(state, 0x3d) & 0x1f; -+ dprintk("%s: gain1 = 0x%02x \n", __func__, gain1); -+ -+ if (gain1 > 15) gain1 = 15; -+ gain2 = m88ds3103_tuner_readreg(state, 0x21) & 0x1f; -+ dprintk("%s: gain2 = 0x%02x \n", __func__, gain2); -+ -+ if(state->tuner_id == TS2022_ID){ -+ gain3 = (m88ds3103_tuner_readreg(state, 0x66)>>3) & 0x07; -+ dprintk("%s: gain3 = 0x%02x \n", __func__, gain3); -+ -+ if (gain2 > 16) gain2 = 16; -+ if (gain2 < 2) gain2 = 2; -+ if (gain3 > 6) gain3 = 6; -+ }else{ -+ if (gain2 > 13) gain2 = 13; -+ gain3 = 0; -+ } -+ -+ gain = gain1*23 + gain2*35 + gain3*29; -+ *signal_strength = 60000 - gain*55; -+ -+ return 0; -+} -+ -+ -+static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *p_snr) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val, npow1, npow2, spow1, cnt; -+ u16 tmp, snr; -+ u32 npow, spow, snr_total; -+ static const u16 mes_log10[] ={ -+ 0, 3010, 4771, 6021, 6990, 7781, 8451, 9031, 9542, 10000, -+ 10414, 10792, 11139, 11461, 11761, 12041, 12304, 12553, 12788, 13010, -+ 13222, 13424, 13617, 13802, 13979, 14150, 14314, 14472, 14624, 14771, -+ 14914, 15052, 15185, 15315, 15441, 15563, 15682, 15798, 15911, 16021, -+ 16128, 16232, 16335, 16435, 16532, 16628, 16721, 16812, 16902, 16990, -+ 17076, 17160, 17243, 17324, 17404, 17482, 17559, 17634, 17709, 17782, -+ 17853, 17924, 17993, 18062, 18129, 18195, 18261, 18325, 18388, 18451, -+ 18513, 18573, 18633, 18692, 18751, 18808, 18865, 18921, 18976, 19031 -+ }; -+ static const u16 mes_loge[] ={ -+ 0, 6931, 10986, 13863, 16094, 17918, 19459, 20794, 21972, 23026, -+ 23979, 24849, 25649, 26391, 27081, 27726, 28332, 28904, 29444, 29957, -+ 30445, 30910, 31355, 31781, 32189, 32581, 32958, 33322, 33673, 34012, -+ 34340, 34657, -+ }; -+ -+ dprintk("%s()\n", __func__); -+ -+ snr = 0; -+ -+ switch (state->delivery_system){ -+ case SYS_DVBS: -+ cnt = 10; snr_total = 0; -+ while(cnt > 0){ -+ val = m88ds3103_readreg(state, 0xff); -+ snr_total += val; -+ cnt--; -+ } -+ tmp = (u16)(snr_total/80); -+ if(tmp > 0){ -+ if (tmp > 32) tmp = 32; -+ snr = (mes_loge[tmp - 1] * 100) / 45; -+ }else{ -+ snr = 0; -+ } -+ break; -+ case SYS_DVBS2: -+ cnt = 10; npow = 0; spow = 0; -+ while(cnt >0){ -+ npow1 = m88ds3103_readreg(state, 0x8c) & 0xff; -+ npow2 = m88ds3103_readreg(state, 0x8d) & 0xff; -+ npow += (((npow1 & 0x3f) + (u16)(npow2 << 6)) >> 2); -+ -+ spow1 = m88ds3103_readreg(state, 0x8e) & 0xff; -+ spow += ((spow1 * spow1) >> 1); -+ cnt--; -+ } -+ npow /= 10; spow /= 10; -+ if(spow == 0){ -+ snr = 0; -+ }else if(npow == 0){ -+ snr = 19; -+ }else{ -+ if(spow > npow){ -+ tmp = (u16)(spow / npow); -+ if (tmp > 80) tmp = 80; -+ snr = mes_log10[tmp - 1]*3; -+ }else{ -+ tmp = (u16)(npow / spow); -+ if (tmp > 80) tmp = 80; -+ snr = -(mes_log10[tmp - 1] / 1000); -+ } -+ } -+ break; -+ default: -+ break; -+ } -+ *p_snr = snr; -+ -+ return 0; -+} -+ -+ -+static int m88ds3103_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp1, tmp2, tmp3, data; -+ -+ dprintk("%s()\n", __func__); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ data = m88ds3103_readreg(state, 0xf8); -+ data |= 0x40; -+ m88ds3103_writereg(state, 0xf8, data); -+ tmp1 = m88ds3103_readreg(state, 0xf5); -+ tmp2 = m88ds3103_readreg(state, 0xf4); -+ *ucblocks = (tmp1 <<8) | tmp2; -+ data &= ~0x20; -+ m88ds3103_writereg(state, 0xf8, data); -+ data |= 0x20; -+ m88ds3103_writereg(state, 0xf8, data); -+ data &= ~0x40; -+ m88ds3103_writereg(state, 0xf8, data); -+ break; -+ case SYS_DVBS2: -+ tmp1 = m88ds3103_readreg(state, 0xda); -+ tmp2 = m88ds3103_readreg(state, 0xd9); -+ tmp3 = m88ds3103_readreg(state, 0xd8); -+ *ucblocks = (tmp1 <<16)|(tmp2 <<8)|tmp3; -+ data = m88ds3103_readreg(state, 0xd1); -+ data |= 0x01; -+ m88ds3103_writereg(state, 0xd1, data); -+ data &= ~0x01; -+ m88ds3103_writereg(state, 0xd1, data); -+ break; -+ default: -+ break; -+ } -+ return 0; -+} -+ -+static int m88ds3103_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 data_a1, data_a2; -+ -+ dprintk("%s(%d)\n", __func__, tone); -+ if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { -+ printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); -+ return -EINVAL; -+ } -+ -+ data_a1 = m88ds3103_readreg(state, 0xa1); -+ data_a2 = m88ds3103_readreg(state, 0xa2); -+ if(state->demod_id == DS3103_ID) -+ data_a2 &= 0xdf; /* Normal mode */ -+ switch (tone) { -+ case SEC_TONE_ON: -+ dprintk("%s: SEC_TONE_ON\n", __func__); -+ data_a1 |= 0x04; -+ data_a1 &= ~0x03; -+ data_a1 &= ~0x40; -+ data_a2 &= ~0xc0; -+ break; -+ case SEC_TONE_OFF: -+ dprintk("%s: SEC_TONE_OFF\n", __func__); -+ data_a2 &= ~0xc0; -+ data_a2 |= 0x80; -+ break; -+ } -+ m88ds3103_writereg(state, 0xa2, data_a2); -+ m88ds3103_writereg(state, 0xa1, data_a1); -+ return 0; -+} -+ -+static int m88ds3103_send_diseqc_msg(struct dvb_frontend *fe, -+ struct dvb_diseqc_master_cmd *d) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int i, ret = 0; -+ u8 tmp, time_out; -+ -+ /* Dump DiSEqC message */ -+ if (debug) { -+ printk(KERN_INFO "m88ds3103: %s(", __func__); -+ for (i = 0 ; i < d->msg_len ;) { -+ printk(KERN_INFO "0x%02x", d->msg[i]); -+ if (++i < d->msg_len) -+ printk(KERN_INFO ", "); -+ } -+ } -+ -+ tmp = m88ds3103_readreg(state, 0xa2); -+ tmp &= ~0xc0; -+ if(state->demod_id == DS3103_ID) -+ tmp &= ~0x20; -+ m88ds3103_writereg(state, 0xa2, tmp); -+ -+ for (i = 0; i < d->msg_len; i ++) -+ m88ds3103_writereg(state, (0xa3+i), d->msg[i]); -+ -+ tmp = m88ds3103_readreg(state, 0xa1); -+ tmp &= ~0x38; -+ tmp &= ~0x40; -+ tmp |= ((d->msg_len-1) << 3) | 0x07; -+ tmp &= ~0x80; -+ m88ds3103_writereg(state, 0xa1, tmp); -+ /* 1.5 * 9 * 8 = 108ms */ -+ time_out = 150; -+ while (time_out > 0){ -+ msleep(10); -+ time_out -= 10; -+ tmp = m88ds3103_readreg(state, 0xa1); -+ if ((tmp & 0x40) == 0) -+ break; -+ } -+ if (time_out == 0){ -+ tmp = m88ds3103_readreg(state, 0xa1); -+ tmp &= ~0x80; -+ tmp |= 0x40; -+ m88ds3103_writereg(state, 0xa1, tmp); -+ ret = 1; -+ } -+ tmp = m88ds3103_readreg(state, 0xa2); -+ tmp &= ~0xc0; -+ tmp |= 0x80; -+ m88ds3103_writereg(state, 0xa2, tmp); -+ return ret; -+} -+ -+ -+static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe, -+ fe_sec_mini_cmd_t burst) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val, time_out; -+ -+ dprintk("%s()\n", __func__); -+ -+ val = m88ds3103_readreg(state, 0xa2); -+ val &= ~0xc0; -+ if(state->demod_id == DS3103_ID) -+ val &= 0xdf; /* Normal mode */ -+ m88ds3103_writereg(state, 0xa2, val); -+ /* DiSEqC burst */ -+ if (burst == SEC_MINI_B) -+ m88ds3103_writereg(state, 0xa1, 0x01); -+ else -+ m88ds3103_writereg(state, 0xa1, 0x02); -+ -+ msleep(13); -+ -+ time_out = 5; -+ do{ -+ val = m88ds3103_readreg(state, 0xa1); -+ if ((val & 0x40) == 0) -+ break; -+ msleep(1); -+ time_out --; -+ } while (time_out > 0); -+ -+ val = m88ds3103_readreg(state, 0xa2); -+ val &= ~0xc0; -+ val |= 0x80; -+ m88ds3103_writereg(state, 0xa2, val); -+ -+ return 0; -+} -+ -+static void m88ds3103_release(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ -+ dprintk("%s\n", __func__); -+ kfree(state); -+} -+ -+static int m88ds3103_check_id(struct m88ds3103_state *state) -+{ -+ int val_00, val_01; -+ -+ /*check demod id*/ -+ val_01 = m88ds3103_readreg(state, 0x01); -+ printk(KERN_INFO "DS3000 chip version: %x attached.\n", val_01); -+ -+ if(val_01 == 0xD0) -+ state->demod_id = DS3103_ID; -+ else if(val_01 == 0xC0) -+ state->demod_id = DS3000_ID; -+ else -+ state->demod_id = UNKNOW_ID; -+ -+ /*check tuner id*/ -+ val_00 = m88ds3103_tuner_readreg(state, 0x00); -+ printk(KERN_INFO "TS202x chip version[1]: %x attached.\n", val_00); -+ val_00 &= 0x03; -+ if(val_00 == 0) -+ { -+ m88ds3103_tuner_writereg(state, 0x00, 0x01); -+ msleep(3); -+ } -+ m88ds3103_tuner_writereg(state, 0x00, 0x03); -+ msleep(5); -+ -+ val_00 = m88ds3103_tuner_readreg(state, 0x00); -+ printk(KERN_INFO "TS202x chip version[2]: %x attached.\n", val_00); -+ val_00 &= 0xff; -+ if((val_00 == 0x01) || (val_00 == 0x41) || (val_00 == 0x81)) -+ state->tuner_id = TS2020_ID; -+ else if(((val_00 & 0xc0)== 0xc0) || (val_00 == 0x83)) -+ state->tuner_id = TS2022_ID; -+ else -+ state->tuner_id = UNKNOW_ID; -+ -+ return state->demod_id; -+} -+ -+static struct dvb_frontend_ops m88ds3103_ops; -+static int m88ds3103_initilaze(struct dvb_frontend *fe); -+ -+struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c) -+{ -+ struct m88ds3103_state *state = NULL; -+ -+ dprintk("%s\n", __func__); -+ -+ /* allocate memory for the internal state */ -+ state = kzalloc(sizeof(struct m88ds3103_state), GFP_KERNEL); -+ if (state == NULL) { -+ printk(KERN_ERR "Unable to kmalloc\n"); -+ goto error2; -+ } -+ -+ state->config = config; -+ state->i2c = i2c; -+ state->preBer = 0xffff; -+ state->delivery_system = SYS_DVBS; /*Default to DVB-S.*/ -+ -+ /* check demod id */ -+ if(m88ds3103_check_id(state) == UNKNOW_ID){ -+ printk(KERN_ERR "Unable to find Montage chip\n"); -+ goto error3; -+ } -+ -+ memcpy(&state->frontend.ops, &m88ds3103_ops, -+ sizeof(struct dvb_frontend_ops)); -+ state->frontend.demodulator_priv = state; -+ -+ m88ds3103_initilaze(&state->frontend); -+ -+ return &state->frontend; -+ -+error3: -+ kfree(state); -+error2: -+ return NULL; -+} -+EXPORT_SYMBOL(m88ds3103_attach); -+ -+static int m88ds3103_set_carrier_offset(struct dvb_frontend *fe, -+ s32 carrier_offset_khz) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ s32 tmp; -+ -+ tmp = carrier_offset_khz; -+ tmp *= 65536; -+ -+ tmp = (2*tmp + MT_FE_MCLK_KHZ) / (2*MT_FE_MCLK_KHZ); -+ -+ if (tmp < 0) -+ tmp += 65536; -+ -+ m88ds3103_writereg(state, 0x5f, tmp >> 8); -+ m88ds3103_writereg(state, 0x5e, tmp & 0xff); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_symrate(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u16 value; -+ -+ value = (((c->symbol_rate / 1000) << 15) + (MT_FE_MCLK_KHZ / 4)) / (MT_FE_MCLK_KHZ / 2); -+ m88ds3103_writereg(state, 0x61, value & 0x00ff); -+ m88ds3103_writereg(state, 0x62, (value & 0xff00) >> 8); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_CCI(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 tmp; -+ -+ tmp = m88ds3103_readreg(state, 0x56); -+ tmp &= ~0x01; -+ m88ds3103_writereg(state, 0x56, tmp); -+ -+ tmp = m88ds3103_readreg(state, 0x76); -+ tmp &= ~0x80; -+ m88ds3103_writereg(state, 0x76, tmp); -+ -+ return 0; -+} -+ -+static int m88ds3103_init_reg(struct m88ds3103_state *state, const u8 *p_reg_tab, u32 size) -+{ -+ u32 i; -+ -+ for(i = 0; i < size; i+=2) -+ m88ds3103_writereg(state, p_reg_tab[i], p_reg_tab[i+1]); -+ -+ return 0; -+} -+ -+static int m88ds3103_get_locked_sym_rate(struct m88ds3103_state *state, u32 *sym_rate_KSs) -+{ -+ u16 tmp; -+ u32 sym_rate_tmp; -+ u8 val_0x6d, val_0x6e; -+ -+ val_0x6d = m88ds3103_readreg(state, 0x6d); -+ val_0x6e = m88ds3103_readreg(state, 0x6e); -+ -+ tmp = (u16)((val_0x6e<<8) | val_0x6d); -+ -+ sym_rate_tmp = (u32)(tmp * MT_FE_MCLK_KHZ); -+ sym_rate_tmp = (u32)(sym_rate_tmp / (1<<16)); -+ *sym_rate_KSs = sym_rate_tmp; -+ -+ return 0; -+} -+ -+static int m88ds3103_get_channel_info(struct m88ds3103_state *state, u8 *p_mode, u8 *p_coderate) -+{ -+ u8 tmp, val_0x7E; -+ -+ if(state->delivery_system == SYS_DVBS2){ -+ val_0x7E = m88ds3103_readreg(state, 0x7e); -+ tmp = (u8)((val_0x7E&0xC0) >> 6); -+ *p_mode = tmp; -+ tmp = (u8)(val_0x7E & 0x0f); -+ *p_coderate = tmp; -+ } else { -+ *p_mode = 0; -+ tmp = m88ds3103_readreg(state, 0xe6); -+ tmp = (u8)(tmp >> 5); -+ *p_coderate = tmp; -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_set_clock_ratio(struct m88ds3103_state *state) -+{ -+ u8 val, mod_fac, tmp1, tmp2; -+ u32 input_datarate, locked_sym_rate_KSs; -+ u32 MClk_KHz = 96000; -+ u8 mod_mode, code_rate, divid_ratio = 0; -+ -+ locked_sym_rate_KSs = 0; -+ m88ds3103_get_locked_sym_rate(state, &locked_sym_rate_KSs); -+ if(locked_sym_rate_KSs == 0) -+ return 0; -+ -+ m88ds3103_get_channel_info(state, &mod_mode, &code_rate); -+ -+ if (state->delivery_system == SYS_DVBS2) -+ { -+ switch(mod_mode) { -+ case 1: mod_fac = 3; break; -+ case 2: mod_fac = 4; break; -+ case 3: mod_fac = 5; break; -+ default: mod_fac = 2; break; -+ } -+ -+ switch(code_rate) { -+ case 0: input_datarate = locked_sym_rate_KSs*mod_fac/8/4; break; -+ case 1: input_datarate = locked_sym_rate_KSs*mod_fac/8/3; break; -+ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/5; break; -+ case 3: input_datarate = locked_sym_rate_KSs*mod_fac/8/2; break; -+ case 4: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/5; break; -+ case 5: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; -+ case 6: input_datarate = locked_sym_rate_KSs*mod_fac*3/8/4; break; -+ case 7: input_datarate = locked_sym_rate_KSs*mod_fac*4/8/5; break; -+ case 8: input_datarate = locked_sym_rate_KSs*mod_fac*5/8/6; break; -+ case 9: input_datarate = locked_sym_rate_KSs*mod_fac*8/8/9; break; -+ case 10: input_datarate = locked_sym_rate_KSs*mod_fac*9/8/10; break; -+ default: input_datarate = locked_sym_rate_KSs*mod_fac*2/8/3; break; -+ } -+ -+ if(state->demod_id == DS3000_ID) -+ input_datarate = input_datarate * 115 / 100; -+ -+ if(input_datarate < 4800) {tmp1 = 15;tmp2 = 15;} //4.8MHz TS clock -+ else if(input_datarate < 4966) {tmp1 = 14;tmp2 = 15;} //4.966MHz TS clock -+ else if(input_datarate < 5143) {tmp1 = 14;tmp2 = 14;} //5.143MHz TS clock -+ else if(input_datarate < 5333) {tmp1 = 13;tmp2 = 14;} //5.333MHz TS clock -+ else if(input_datarate < 5538) {tmp1 = 13;tmp2 = 13;} //5.538MHz TS clock -+ else if(input_datarate < 5760) {tmp1 = 12;tmp2 = 13;} //5.76MHz TS clock allan 0809 -+ else if(input_datarate < 6000) {tmp1 = 12;tmp2 = 12;} //6MHz TS clock -+ else if(input_datarate < 6260) {tmp1 = 11;tmp2 = 12;} //6.26MHz TS clock -+ else if(input_datarate < 6545) {tmp1 = 11;tmp2 = 11;} //6.545MHz TS clock -+ else if(input_datarate < 6857) {tmp1 = 10;tmp2 = 11;} //6.857MHz TS clock -+ else if(input_datarate < 7200) {tmp1 = 10;tmp2 = 10;} //7.2MHz TS clock -+ else if(input_datarate < 7578) {tmp1 = 9;tmp2 = 10;} //7.578MHz TS clock -+ else if(input_datarate < 8000) {tmp1 = 9;tmp2 = 9;} //8MHz TS clock -+ else if(input_datarate < 8470) {tmp1 = 8;tmp2 = 9;} //8.47MHz TS clock -+ else if(input_datarate < 9000) {tmp1 = 8;tmp2 = 8;} //9MHz TS clock -+ else if(input_datarate < 9600) {tmp1 = 7;tmp2 = 8;} //9.6MHz TS clock -+ else if(input_datarate < 10285) {tmp1 = 7;tmp2 = 7;} //10.285MHz TS clock -+ else if(input_datarate < 12000) {tmp1 = 6;tmp2 = 6;} //12MHz TS clock -+ else if(input_datarate < 14400) {tmp1 = 5;tmp2 = 5;} //14.4MHz TS clock -+ else if(input_datarate < 18000) {tmp1 = 4;tmp2 = 4;} //18MHz TS clock -+ else {tmp1 = 3;tmp2 = 3;} //24MHz TS clock -+ -+ if(state->demod_id == DS3000_ID) { -+ val = (u8)((tmp1<<4) + tmp2); -+ m88ds3103_writereg(state, 0xfe, val); -+ } else { -+ tmp1 = m88ds3103_readreg(state, 0x22); -+ tmp2 = m88ds3103_readreg(state, 0x24); -+ -+ tmp1 >>= 6; -+ tmp1 &= 0x03; -+ tmp2 >>= 6; -+ tmp2 &= 0x03; -+ -+ if((tmp1 == 0x00) && (tmp2 == 0x01)) -+ MClk_KHz = 144000; -+ else if((tmp1 == 0x00) && (tmp2 == 0x03)) -+ MClk_KHz = 72000; -+ else if((tmp1 == 0x01) && (tmp2 == 0x01)) -+ MClk_KHz = 115200; -+ else if((tmp1 == 0x02) && (tmp2 == 0x01)) -+ MClk_KHz = 96000; -+ else if((tmp1 == 0x03) && (tmp2 == 0x00)) -+ MClk_KHz = 192000; -+ else -+ return 0; -+ -+ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ -+ input_datarate = 5200; -+ -+ if(input_datarate != 0) -+ divid_ratio = (u8)(MClk_KHz / input_datarate); -+ else -+ divid_ratio = 0xFF; -+ -+ if(divid_ratio > 128) -+ divid_ratio = 128; -+ -+ if(divid_ratio < 2) -+ divid_ratio = 2; -+ -+ tmp1 = (u8)(divid_ratio / 2); -+ tmp2 = (u8)(divid_ratio / 2); -+ -+ if((divid_ratio % 2) != 0) -+ tmp2 += 1; -+ -+ tmp1 -= 1; -+ tmp2 -= 1; -+ -+ tmp1 &= 0x3f; -+ tmp2 &= 0x3f; -+ -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xF0; -+ val |= (tmp2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, val); -+ -+ val = (u8)((tmp2 & 0x03) << 6); -+ val |= tmp1; -+ m88ds3103_writereg(state, 0xea, val); -+ } -+ } else { -+ mod_fac = 2; -+ -+ switch(code_rate) { -+ case 4: input_datarate = locked_sym_rate_KSs*mod_fac/2/8; break; -+ case 3: input_datarate = locked_sym_rate_KSs*mod_fac*2/3/8; break; -+ case 2: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; -+ case 1: input_datarate = locked_sym_rate_KSs*mod_fac*5/6/8; break; -+ case 0: input_datarate = locked_sym_rate_KSs*mod_fac*7/8/8; break; -+ default: input_datarate = locked_sym_rate_KSs*mod_fac*3/4/8; break; -+ } -+ -+ if(state->demod_id == DS3000_ID) -+ input_datarate = input_datarate * 115 / 100; -+ -+ if(input_datarate < 6857) {tmp1 = 7;tmp2 = 7;} //6.857MHz TS clock -+ else if(input_datarate < 7384) {tmp1 = 6;tmp2 = 7;} //7.384MHz TS clock -+ else if(input_datarate < 8000) {tmp1 = 6;tmp2 = 6;} //8MHz TS clock -+ else if(input_datarate < 8727) {tmp1 = 5;tmp2 = 6;} //8.727MHz TS clock -+ else if(input_datarate < 9600) {tmp1 = 5;tmp2 = 5;} //9.6MHz TS clock -+ else if(input_datarate < 10666) {tmp1 = 4;tmp2 = 5;} //10.666MHz TS clock -+ else if(input_datarate < 12000) {tmp1 = 4;tmp2 = 4;} //12MHz TS clock -+ else if(input_datarate < 13714) {tmp1 = 3;tmp2 = 4;} //13.714MHz TS clock -+ else if(input_datarate < 16000) {tmp1 = 3;tmp2 = 3;} //16MHz TS clock -+ else if(input_datarate < 19200) {tmp1 = 2;tmp2 = 3;} //19.2MHz TS clock -+ else {tmp1 = 2;tmp2 = 2;} //24MHz TS clock -+ -+ if(state->demod_id == DS3000_ID) { -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xc0; -+ val |= ((u8)((tmp1<<3) + tmp2)); -+ m88ds3103_writereg(state, 0xfe, val); -+ } else { -+ if(input_datarate < 5200) /*Max. 2011-12-23 11:55*/ -+ input_datarate = 5200; -+ -+ if(input_datarate != 0) -+ divid_ratio = (u8)(MClk_KHz / input_datarate); -+ else -+ divid_ratio = 0xFF; -+ -+ if(divid_ratio > 128) -+ divid_ratio = 128; -+ -+ if(divid_ratio < 2) -+ divid_ratio = 2; -+ -+ tmp1 = (u8)(divid_ratio / 2); -+ tmp2 = (u8)(divid_ratio / 2); -+ -+ if((divid_ratio % 2) != 0) -+ tmp2 += 1; -+ -+ tmp1 -= 1; -+ tmp2 -= 1; -+ -+ tmp1 &= 0x3f; -+ tmp2 &= 0x3f; -+ -+ val = m88ds3103_readreg(state, 0xfe); -+ val &= 0xF0; -+ val |= (tmp2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, val); -+ -+ val = (u8)((tmp2 & 0x03) << 6); -+ val |= tmp1; -+ m88ds3103_writereg(state, 0xea, val); -+ } -+ } -+ return 0; -+} -+ -+static int m88ds3103_demod_connect(struct dvb_frontend *fe, s32 carrier_offset_khz) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ u16 value; -+ u8 val1,val2,data; -+ -+ dprintk("connect delivery system = %d\n", state->delivery_system); -+ -+ /* ds3000 global reset */ -+ m88ds3103_writereg(state, 0x07, 0x80); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ /* ds3000 build-in uC reset */ -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ /* ds3000 software reset */ -+ m88ds3103_writereg(state, 0x00, 0x01); -+ -+ switch (state->delivery_system) { -+ case SYS_DVBS: -+ /* initialise the demod in DVB-S mode */ -+ if(state->demod_id == DS3000_ID){ -+ m88ds3103_init_reg(state, ds3000_dvbs_init_tab, sizeof(ds3000_dvbs_init_tab)); -+ -+ value = m88ds3103_readreg(state, 0xfe); -+ value &= 0xc0; -+ value |= 0x1b; -+ m88ds3103_writereg(state, 0xfe, value); -+ -+ if(state->config->ci_mode) -+ val1 = 0x80; -+ else if(state->config->ts_mode) -+ val1 = 0x60; -+ else -+ val1 = 0x20; -+ m88ds3103_writereg(state, 0xfd, val1); -+ -+ }else if(state->demod_id == DS3103_ID){ -+ m88ds3103_init_reg(state, ds3103_dvbs_init_tab, sizeof(ds3103_dvbs_init_tab)); -+ -+ /* set ts clock */ -+ if(state->config->ci_mode == 2){ -+ val1 = 6; val2 = 6; -+ }else if(state->config->ts_mode == 0) { -+ val1 = 3; val2 = 3; -+ }else{ -+ val1 = 0; val2 = 0; -+ } -+ val1 -= 1; val2 -= 1; -+ val1 &= 0x3f; val2 &= 0x3f; -+ data = m88ds3103_readreg(state, 0xfe); -+ data &= 0xf0; -+ data |= (val2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, data); -+ data = (val2 & 0x03) << 6; -+ data |= val1; -+ m88ds3103_writereg(state, 0xea, data); -+ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ -+ /* set master clock */ -+ val1 = m88ds3103_readreg(state, 0x22); -+ val2 = m88ds3103_readreg(state, 0x24); -+ -+ val1 &= 0x3f; -+ val2 &= 0x3f; -+ val1 |= 0x80; -+ val2 |= 0x40; -+ -+ m88ds3103_writereg(state, 0x22, val1); -+ m88ds3103_writereg(state, 0x24, val2); -+ -+ if(state->config->ci_mode) -+ val1 = 0x03; -+ else if(state->config->ts_mode) -+ val1 = 0x06; -+ else -+ val1 = 0x42; -+ m88ds3103_writereg(state, 0xfd, val1); -+ } -+ break; -+ case SYS_DVBS2: -+ /* initialise the demod in DVB-S2 mode */ -+ if(state->demod_id == DS3000_ID){ -+ m88ds3103_init_reg(state, ds3000_dvbs2_init_tab, sizeof(ds3000_dvbs2_init_tab)); -+ -+ if (c->symbol_rate >= 30000000) -+ m88ds3103_writereg(state, 0xfe, 0x54); -+ else -+ m88ds3103_writereg(state, 0xfe, 0x98); -+ -+ }else if(state->demod_id == DS3103_ID){ -+ m88ds3103_init_reg(state, ds3103_dvbs2_init_tab, sizeof(ds3103_dvbs2_init_tab)); -+ -+ /* set ts clock */ -+ if(state->config->ci_mode == 2){ -+ val1 = 6; val2 = 6; -+ }else if(state->config->ts_mode == 0){ -+ val1 = 5; val2 = 4; -+ }else{ -+ val1 = 0; val2 = 0; -+ } -+ val1 -= 1; val2 -= 1; -+ val1 &= 0x3f; val2 &= 0x3f; -+ data = m88ds3103_readreg(state, 0xfe); -+ data &= 0xf0; -+ data |= (val2 >> 2) & 0x0f; -+ m88ds3103_writereg(state, 0xfe, data); -+ data = (val2 & 0x03) << 6; -+ data |= val1; -+ m88ds3103_writereg(state, 0xea, data); -+ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ -+ /* set master clock */ -+ val1 = m88ds3103_readreg(state, 0x22); -+ val2 = m88ds3103_readreg(state, 0x24); -+ -+ val1 &= 0x3f; -+ val2 &= 0x3f; -+ if((state->config->ci_mode == 2) || (state->config->ts_mode == 1)){ -+ val1 |= 0x80; -+ val2 |= 0x40; -+ }else{ -+ if (c->symbol_rate >= 28000000){ -+ val1 |= 0xc0; -+ }else if (c->symbol_rate >= 18000000){ -+ val2 |= 0x40; -+ }else{ -+ val1 |= 0x80; -+ val2 |= 0x40; -+ } -+ } -+ m88ds3103_writereg(state, 0x22, val1); -+ m88ds3103_writereg(state, 0x24, val2); -+ } -+ -+ if(state->config->ci_mode) -+ val1 = 0x03; -+ else if(state->config->ts_mode) -+ val1 = 0x06; -+ else -+ val1 = 0x42; -+ m88ds3103_writereg(state, 0xfd, val1); -+ -+ break; -+ default: -+ return 1; -+ } -+ /* disable 27MHz clock output */ -+ m88ds3103_writereg(state, 0x29, 0x80); -+ /* enable ac coupling */ -+ m88ds3103_writereg(state, 0x25, 0x8a); -+ -+ if ((c->symbol_rate / 1000) <= 3000){ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 32 * 100 / 64 = 400*/ -+ m88ds3103_writereg(state, 0xc8, 0x20); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ }else if((c->symbol_rate / 1000) <= 10000){ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 16 * 100 / 64 = 200*/ -+ m88ds3103_writereg(state, 0xc8, 0x10); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ }else{ -+ m88ds3103_writereg(state, 0xc3, 0x08); /* 8 * 6 * 100 / 64 = 75*/ -+ m88ds3103_writereg(state, 0xc8, 0x06); -+ m88ds3103_writereg(state, 0xc4, 0x08); /* 8 * 0 * 100 / 128 = 0*/ -+ m88ds3103_writereg(state, 0xc7, 0x00); -+ } -+ -+ m88ds3103_set_symrate(fe); -+ -+ m88ds3103_set_CCI(fe); -+ -+ m88ds3103_set_carrier_offset(fe, carrier_offset_khz); -+ -+ /* ds3000 out of software reset */ -+ m88ds3103_writereg(state, 0x00, 0x00); -+ /* start ds3000 build-in uC */ -+ m88ds3103_writereg(state, 0xb2, 0x00); -+ -+ return 0; -+} -+ -+static int m88ds3103_set_frontend(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ struct dtv_frontend_properties *c = &fe->dtv_property_cache; -+ -+ int i; -+ fe_status_t status; -+ u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf, div4, capCode, changePLL; -+ s32 offset_khz, lpf_offset_KHz; -+ u16 value, ndiv, lpf_coeff; -+ u32 f3db, gdiv28, realFreq; -+ u8 RFgain; -+ -+ dprintk("%s() ", __func__); -+ dprintk("c frequency = %d\n", c->frequency); -+ dprintk("symbol rate = %d\n", c->symbol_rate); -+ dprintk("delivery system = %d\n", c->delivery_system); -+ -+ realFreq = c->frequency; -+ lpf_offset_KHz = 0; -+ if(c->symbol_rate < 5000000){ -+ lpf_offset_KHz = FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; -+ realFreq += FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz; -+ } -+ -+ if (state->config->set_ts_params) -+ state->config->set_ts_params(fe, 0); -+ -+ div4 = 0; -+ RFgain = 0; -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x0a); -+ m88ds3103_tuner_writereg(state, 0x11, 0x40); -+ if (realFreq < 1103000) { -+ m88ds3103_tuner_writereg(state, 0x10, 0x1b); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; -+ }else { -+ ndiv = (realFreq * (6 + 8) * 2)/MT_FE_CRYSTAL_KHZ; -+ } -+ ndiv = ndiv + ndiv%2; -+ if(ndiv < 4095) -+ ndiv = ndiv - 1024; -+ else if (ndiv < 6143) -+ ndiv = ndiv + 1024; -+ else -+ ndiv = ndiv + 3072; -+ -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv & 0x3f00) >> 8); -+ }else{ -+ m88ds3103_tuner_writereg(state, 0x10, 0x00); -+ if (realFreq < 1146000){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x11); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4) / MT_FE_CRYSTAL_KHZ; -+ }else{ -+ m88ds3103_tuner_writereg(state, 0x10, 0x01); -+ ndiv = (realFreq * (6 + 8) * 2) / MT_FE_CRYSTAL_KHZ; -+ } -+ ndiv = ndiv + ndiv%2; -+ ndiv = ndiv - 1024; -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8)&0x0f); -+ } -+ /* set pll */ -+ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0x00ff); -+ m88ds3103_tuner_writereg(state, 0x03, 0x06); -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ if(state->tuner_id == TS2022_ID){ -+ if(( realFreq >= 1650000 ) && (realFreq <= 1850000)){ -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x14); -+ value &= 0x7f; -+ if(value < 64){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x82); -+ m88ds3103_tuner_writereg(state, 0x11, 0x6f); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x14); -+ value &= 0x1f; -+ -+ if(value > 19){ -+ value = m88ds3103_tuner_readreg(state, 0x10); -+ value &= 0x1d; -+ m88ds3103_tuner_writereg(state, 0x10, value); -+ } -+ }else{ -+ msleep(5); -+ value = m88ds3103_tuner_readreg(state, 0x66); -+ changePLL = (((value & 0x80) >> 7) != div4); -+ -+ if(changePLL){ -+ m88ds3103_tuner_writereg(state, 0x10, 0x11); -+ div4 = 1; -+ ndiv = (realFreq * (6 + 8) * 4)/MT_FE_CRYSTAL_KHZ; -+ ndiv = ndiv + ndiv%2; -+ ndiv = ndiv - 1024; -+ -+ m88ds3103_tuner_writereg(state, 0x01, (ndiv>>8) & 0x0f); -+ m88ds3103_tuner_writereg(state, 0x02, ndiv & 0xff); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x0f); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x10); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ /*set the RF gain*/ -+ if(state->tuner_id == TS2020_ID) -+ m88ds3103_tuner_writereg(state, 0x60, 0x79); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ if(state->tuner_id == TS2020_ID){ -+ RFgain = m88ds3103_tuner_readreg(state, 0x3d); -+ RFgain &= 0x0f; -+ if(RFgain < 15){ -+ if(RFgain < 4) -+ RFgain = 0; -+ else -+ RFgain = RFgain -3; -+ value = ((RFgain << 3) | 0x01) & 0x79; -+ m88ds3103_tuner_writereg(state, 0x60, value); -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ -+ /* set the LPF */ -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x25, 0x00); -+ m88ds3103_tuner_writereg(state, 0x27, 0x70); -+ m88ds3103_tuner_writereg(state, 0x41, 0x09); -+ m88ds3103_tuner_writereg(state, 0x08, 0x0b); -+ } -+ -+ f3db = ((c->symbol_rate / 1000) *135) / 200 + 2000; -+ f3db += lpf_offset_KHz; -+ if (f3db < 7000) -+ f3db = 7000; -+ if (f3db > 40000) -+ f3db = 40000; -+ -+ gdiv28 = (MT_FE_CRYSTAL_KHZ / 1000 * 1694 + 500) / 1000; -+ m88ds3103_tuner_writereg(state, 0x04, gdiv28 & 0xff); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ capCode = value & 0x3f; -+ if(state->tuner_id == TS2022_ID){ -+ m88ds3103_tuner_writereg(state, 0x41, 0x0d); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ msleep(2); -+ -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ value &= 0x3f; -+ value = (capCode + value) / 2; -+ } -+ else -+ value = capCode; -+ -+ gdiv28 = gdiv28 * 207 / (value * 2 + 151); -+ mlpf_max = gdiv28 * 135 / 100; -+ mlpf_min = gdiv28 * 78 / 100; -+ if (mlpf_max > 63) -+ mlpf_max = 63; -+ -+ if(state->tuner_id == TS2022_ID) -+ lpf_coeff = 3200; -+ else -+ lpf_coeff = 2766; -+ -+ nlpf = (f3db * gdiv28 * 2 / lpf_coeff / (MT_FE_CRYSTAL_KHZ / 1000) + 1) / 2 ; -+ if (nlpf > 23) nlpf = 23; -+ if (nlpf < 1) nlpf = 1; -+ -+ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; -+ -+ if (lpf_mxdiv < mlpf_min){ -+ nlpf++; -+ lpf_mxdiv = (nlpf * (MT_FE_CRYSTAL_KHZ / 1000) * lpf_coeff * 2 / f3db + 1) / 2; -+ } -+ -+ if (lpf_mxdiv > mlpf_max) -+ lpf_mxdiv = mlpf_max; -+ -+ m88ds3103_tuner_writereg(state, 0x04, lpf_mxdiv); -+ m88ds3103_tuner_writereg(state, 0x06, nlpf); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ msleep(5); -+ -+ if(state->tuner_id == TS2022_ID){ -+ msleep(2); -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ capCode = value & 0x3f; -+ -+ m88ds3103_tuner_writereg(state, 0x41, 0x09); -+ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1b); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x04); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ -+ msleep(2); -+ value = m88ds3103_tuner_readreg(state, 0x26); -+ value &= 0x3f; -+ value = (capCode + value) / 2; -+ -+ value = value | 0x80; -+ m88ds3103_tuner_writereg(state, 0x25, value); -+ m88ds3103_tuner_writereg(state, 0x27, 0x30); -+ -+ m88ds3103_tuner_writereg(state, 0x08, 0x09); -+ } -+ -+ /* Set the BB gain */ -+ m88ds3103_tuner_writereg(state, 0x51, 0x1e); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x01); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ if(state->tuner_id == TS2020_ID){ -+ if(RFgain == 15){ -+ msleep(40); -+ value = m88ds3103_tuner_readreg(state, 0x21); -+ value &= 0x0f; -+ if(value < 3){ -+ m88ds3103_tuner_writereg(state, 0x60, 0x61); -+ m88ds3103_tuner_writereg(state, 0x51, 0x17); -+ m88ds3103_tuner_writereg(state, 0x51, 0x1f); -+ m88ds3103_tuner_writereg(state, 0x50, 0x08); -+ m88ds3103_tuner_writereg(state, 0x50, 0x00); -+ } -+ } -+ } -+ msleep(60); -+ -+ offset_khz = (ndiv - ndiv % 2 + 1024) * MT_FE_CRYSTAL_KHZ -+ / (6 + 8) / (div4 + 1) / 2 - realFreq; -+ -+ m88ds3103_demod_connect(fe, offset_khz+lpf_offset_KHz); -+ -+ for (i = 0; i < 30 ; i++) { -+ m88ds3103_read_status(fe, &status); -+ if (status & FE_HAS_LOCK){ -+ break; -+ } -+ msleep(20); -+ } -+ -+ if((status & FE_HAS_LOCK) == 0){ -+ state->delivery_system = (state->delivery_system == SYS_DVBS) ? SYS_DVBS2 : SYS_DVBS; -+ m88ds3103_demod_connect(fe, offset_khz); -+ -+ for (i = 0; i < 30 ; i++) { -+ m88ds3103_read_status(fe, &status); -+ if (status & FE_HAS_LOCK){ -+ break; -+ } -+ msleep(20); -+ } -+ } -+ -+ if (status & FE_HAS_LOCK){ -+ if(state->config->ci_mode == 2) -+ m88ds3103_set_clock_ratio(state); -+ if(state->config->start_ctrl){ -+ if(state->first_lock == 0){ -+ state->config->start_ctrl(fe); -+ state->first_lock = 1; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+static int m88ds3103_tune(struct dvb_frontend *fe, -+ bool re_tune, -+ unsigned int mode_flags, -+ unsigned int *delay, -+ fe_status_t *status) -+{ -+ *delay = HZ / 5; -+ -+ dprintk("%s() ", __func__); -+ dprintk("re_tune = %d\n", re_tune); -+ -+ if (re_tune) { -+ int ret = m88ds3103_set_frontend(fe); -+ if (ret) -+ return ret; -+ } -+ -+ return m88ds3103_read_status(fe, status); -+} -+ -+static enum dvbfe_algo m88ds3103_get_algo(struct dvb_frontend *fe) -+{ -+ return DVBFE_ALGO_HW; -+} -+ -+ /* -+ * Power config will reset and load initial firmware if required -+ */ -+static int m88ds3103_initilaze(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ int ret; -+ -+ dprintk("%s()\n", __func__); -+ /* hard reset */ -+ m88ds3103_writereg(state, 0x07, 0x80); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ msleep(1); -+ -+ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); -+ msleep(1); -+ -+ if(state->tuner_id == TS2020_ID){ -+ /* TS2020 init */ -+ m88ds3103_tuner_writereg(state, 0x42, 0x73); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x05, 0x01); -+ m88ds3103_tuner_writereg(state, 0x62, 0xb5); -+ m88ds3103_tuner_writereg(state, 0x07, 0x02); -+ m88ds3103_tuner_writereg(state, 0x08, 0x01); -+ } -+ else if(state->tuner_id == TS2022_ID){ -+ /* TS2022 init */ -+ m88ds3103_tuner_writereg(state, 0x62, 0x6c); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x42, 0x6c); -+ msleep(2); -+ m88ds3103_tuner_writereg(state, 0x7d, 0x9d); -+ m88ds3103_tuner_writereg(state, 0x7c, 0x9a); -+ m88ds3103_tuner_writereg(state, 0x7a, 0x76); -+ -+ m88ds3103_tuner_writereg(state, 0x3b, 0x01); -+ m88ds3103_tuner_writereg(state, 0x63, 0x88); -+ -+ m88ds3103_tuner_writereg(state, 0x61, 0x85); -+ m88ds3103_tuner_writereg(state, 0x22, 0x30); -+ m88ds3103_tuner_writereg(state, 0x30, 0x40); -+ m88ds3103_tuner_writereg(state, 0x20, 0x23); -+ m88ds3103_tuner_writereg(state, 0x24, 0x02); -+ m88ds3103_tuner_writereg(state, 0x12, 0xa0); -+ } -+ -+ if(state->demod_id == DS3103_ID){ -+ m88ds3103_writereg(state, 0x07, 0xe0); -+ m88ds3103_writereg(state, 0x07, 0x00); -+ msleep(1); -+ } -+ m88ds3103_writereg(state, 0xb2, 0x01); -+ -+ /* Load the firmware if required */ -+ ret = m88ds3103_load_firmware(fe); -+ if (ret != 0){ -+ printk(KERN_ERR "%s: Unable initialize firmware\n", __func__); -+ return ret; -+ } -+ if(state->demod_id == DS3103_ID){ -+ m88ds3103_writereg(state, 0x4d, 0xfd & m88ds3103_readreg(state, 0x4d)); -+ m88ds3103_writereg(state, 0x30, 0xef & m88ds3103_readreg(state, 0x30)); -+ } -+ -+ return 0; -+} -+ -+/* -+ * Initialise or wake up device -+ */ -+static int m88ds3103_initfe(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ u8 val; -+ -+ dprintk("%s()\n", __func__); -+ -+ /* 1st step to wake up demod */ -+ m88ds3103_writereg(state, 0x08, 0x01 | m88ds3103_readreg(state, 0x08)); -+ m88ds3103_writereg(state, 0x04, 0xfe & m88ds3103_readreg(state, 0x04)); -+ m88ds3103_writereg(state, 0x23, 0xef & m88ds3103_readreg(state, 0x23)); -+ -+ /* 2nd step to wake up tuner */ -+ val = m88ds3103_tuner_readreg(state, 0x00) & 0xff; -+ if((val & 0x01) == 0){ -+ m88ds3103_tuner_writereg(state, 0x00, 0x01); -+ msleep(50); -+ } -+ m88ds3103_tuner_writereg(state, 0x00, 0x03); -+ msleep(50); -+ -+ return 0; -+} -+ -+/* Put device to sleep */ -+static int m88ds3103_sleep(struct dvb_frontend *fe) -+{ -+ struct m88ds3103_state *state = fe->demodulator_priv; -+ -+ dprintk("%s()\n", __func__); -+ -+ /* 1st step to sleep tuner */ -+ m88ds3103_tuner_writereg(state, 0x00, 0x00); -+ -+ /* 2nd step to sleep demod */ -+ m88ds3103_writereg(state, 0x08, 0xfe & m88ds3103_readreg(state, 0x08)); -+ m88ds3103_writereg(state, 0x04, 0x01 | m88ds3103_readreg(state, 0x04)); -+ m88ds3103_writereg(state, 0x23, 0x10 | m88ds3103_readreg(state, 0x23)); -+ -+ -+ return 0; -+} -+ -+static struct dvb_frontend_ops m88ds3103_ops = { -+ .delsys = { SYS_DVBS, SYS_DVBS2}, -+ .info = { -+ .name = "Montage DS3103/TS2022", -+ .type = FE_QPSK, -+ .frequency_min = 950000, -+ .frequency_max = 2150000, -+ .frequency_stepsize = 1011, /* kHz for QPSK frontends */ -+ .frequency_tolerance = 5000, -+ .symbol_rate_min = 1000000, -+ .symbol_rate_max = 45000000, -+ .caps = FE_CAN_INVERSION_AUTO | -+ FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | -+ FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | -+ FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | -+ FE_CAN_2G_MODULATION | -+ FE_CAN_QPSK | FE_CAN_RECOVER -+ }, -+ -+ .release = m88ds3103_release, -+ -+ .init = m88ds3103_initfe, -+ .sleep = m88ds3103_sleep, -+ .read_status = m88ds3103_read_status, -+ .read_ber = m88ds3103_read_ber, -+ .read_signal_strength = m88ds3103_read_signal_strength, -+ .read_snr = m88ds3103_read_snr, -+ .read_ucblocks = m88ds3103_read_ucblocks, -+ .set_tone = m88ds3103_set_tone, -+ .set_voltage = m88ds3103_set_voltage, -+ .diseqc_send_master_cmd = m88ds3103_send_diseqc_msg, -+ .diseqc_send_burst = m88ds3103_diseqc_send_burst, -+ .get_frontend_algo = m88ds3103_get_algo, -+ .tune = m88ds3103_tune, -+ .set_frontend = m88ds3103_set_frontend, -+}; -+ -+MODULE_DESCRIPTION("DVB Frontend module for Montage DS3103/TS2022 hardware"); -+MODULE_AUTHOR("Max nibble"); -+MODULE_LICENSE("GPL"); -diff -urN a/drivers/media/dvb-frontends/m88ds3103.h b/drivers/media/dvb-frontends/m88ds3103.h ---- a/drivers/media/dvb-frontends/m88ds3103.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103.h 2013-01-30 12:33:51.000000000 +0800 -@@ -0,0 +1,53 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef M88DS3103_H -+#define M88DS3103_H -+ -+#include <linux/dvb/frontend.h> -+ -+struct m88ds3103_config { -+ /* the demodulator's i2c address */ -+ u8 demod_address; -+ u8 ci_mode; -+ u8 pin_ctrl; -+ u8 ts_mode; /* 0: Parallel, 1: Serial */ -+ -+ /* Set device param to start dma */ -+ int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured); -+ /* Start to transfer data */ -+ int (*start_ctrl)(struct dvb_frontend *fe); -+ /* Set LNB voltage */ -+ int (*set_voltage)(struct dvb_frontend* fe, fe_sec_voltage_t voltage); -+}; -+ -+#if defined(CONFIG_DVB_M88DS3103) || \ -+ (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE)) -+extern struct dvb_frontend *m88ds3103_attach( -+ const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c); -+#else -+static inline struct dvb_frontend *m88ds3103_attach( -+ const struct m88ds3103_config *config, -+ struct i2c_adapter *i2c) -+{ -+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); -+ return NULL; -+} -+#endif /* CONFIG_DVB_M88DS3103 */ -+#endif /* M88DS3103_H */ -diff -urN a/drivers/media/dvb-frontends/m88ds3103_priv.h b/drivers/media/dvb-frontends/m88ds3103_priv.h ---- a/drivers/media/dvb-frontends/m88ds3103_priv.h 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/dvb-frontends/m88ds3103_priv.h 2013-01-30 12:33:56.000000000 +0800 -@@ -0,0 +1,403 @@ -+/* -+ Montage Technology M88DS3103/M88TS2022 - DVBS/S2 Satellite demod/tuner driver -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 2 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program; if not, write to the Free Software -+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#ifndef M88DS3103_PRIV_H -+#define M88DS3103_PRIV_H -+ -+#define FW_DOWN_SIZE 32 -+#define FW_DOWN_LOOP (8192/FW_DOWN_SIZE) -+#define DS3103_DEFAULT_FIRMWARE "dvb-fe-ds3103.fw" -+#define DS3000_DEFAULT_FIRMWARE "dvb-fe-ds300x.fw" -+#define MT_FE_MCLK_KHZ 96000 /* in kHz */ -+#define MT_FE_CRYSTAL_KHZ 27000 /* in kHz */ -+#define FREQ_OFFSET_AT_SMALL_SYM_RATE_KHz 3000 -+#define DS3000_ID 0x3000 -+#define DS3103_ID 0x3103 -+#define TS2020_ID 0x2020 -+#define TS2022_ID 0x2022 -+#define UNKNOW_ID 0x0000 -+ -+struct m88ds3103_state { -+ struct i2c_adapter *i2c; -+ const struct m88ds3103_config *config; -+ -+ struct dvb_frontend frontend; -+ -+ u32 preBer; -+ u8 skip_fw_load; -+ u8 first_lock; /* The first time of signal lock */ -+ u16 demod_id; /* demod chip type */ -+ u16 tuner_id; /* tuner chip type */ -+ fe_delivery_system_t delivery_system; -+}; -+ -+/* For M88DS3103 demod dvbs mode.*/ -+static u8 ds3103_dvbs_init_tab[] = { -+ 0x23, 0x07, -+ 0x08, 0x03, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x40, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x0f, -+ 0x64, 0x30, -+ 0x65, 0x40, -+ 0x68, 0x26, -+ 0x69, 0x4c, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x38, -+ 0x77, 0xa6, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x14, -+ 0x7c, 0x00, -+ 0xae, 0x82, -+ 0x80, 0x64, -+ 0x81, 0x66, -+ 0x82, 0x44, -+ 0x85, 0x04, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xff, -+ 0xc7, 0x00, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xe0, 0xf8, -+ 0xe6, 0x8b, -+ 0xd0, 0x40, -+ 0xf8, 0x20, -+ 0xfa, 0x0f, -+ 0x00, 0x00, -+ 0xbd, 0x01, -+ 0xb8, 0x00, -+}; -+/* For M88DS3103 demod dvbs2 mode.*/ -+static u8 ds3103_dvbs2_init_tab[] = { -+ 0x23, 0x07, -+ 0x08, 0x07, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x0f, -+ 0x64, 0x10, -+ 0x65, 0x20, -+ 0x68, 0x46, -+ 0x69, 0xcd, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x38, -+ 0x77, 0xa6, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x14, -+ 0x85, 0x08, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0x86, 0x00, -+ 0x87, 0x0f, -+ 0x89, 0x00, -+ 0x8b, 0x44, -+ 0x8c, 0x66, -+ 0x9d, 0xc1, -+ 0x8a, 0x10, -+ 0xad, 0x40, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc1, 0x10, -+ 0xc2, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xff, -+ 0xc7, 0x00, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xca, 0x23, -+ 0xcb, 0x24, -+ 0xcc, 0xf4, -+ 0xce, 0x74, -+ 0x00, 0x00, -+ 0xbd, 0x01, -+ 0xb8, 0x00, -+}; -+ -+/* For M88DS3000 demod dvbs mode.*/ -+static u8 ds3000_dvbs_init_tab[] = { -+ 0x23, 0x05, -+ 0x08, 0x03, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x40, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x40, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0xc8, -+ 0x50, 0x77, -+ 0x51, 0x77, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x56, 0x01, -+ 0x63, 0x47, -+ 0x64, 0x30, -+ 0x65, 0x40, -+ 0x68, 0x26, -+ 0x69, 0x4c, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0x76, 0x00, -+ 0x77, 0xd1, -+ 0x78, 0x0c, -+ 0x79, 0x80, -+ 0x7f, 0x04, -+ 0x7c, 0x00, -+ 0x80, 0x86, -+ 0x81, 0xa6, -+ 0x85, 0x04, -+ 0xcd, 0xf4, -+ 0x90, 0x33, -+ 0xa0, 0x44, -+ 0xc0, 0x18, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0x80, -+ 0xc6, 0x80, -+ 0xc7, 0x0a, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xfe, 0xb6, -+ 0xe0, 0xf8, -+ 0xe6, 0x8b, -+ 0xd0, 0x40, -+ 0xf8, 0x20, -+ 0xfa, 0x0f, -+ 0xad, 0x20, -+ 0xae, 0x07, -+ 0xb8, 0x00, -+}; -+ -+/* For M88DS3000 demod dvbs2 mode.*/ -+static u8 ds3000_dvbs2_init_tab[] = { -+ 0x23, 0x0f, -+ 0x08, 0x07, -+ 0x0c, 0x02, -+ 0x21, 0x54, -+ 0x25, 0x82, -+ 0x27, 0x31, -+ 0x30, 0x08, -+ 0x31, 0x32, -+ 0x32, 0x32, -+ 0x33, 0x35, -+ 0x35, 0xff, -+ 0x3a, 0x00, -+ 0x37, 0x10, -+ 0x38, 0x10, -+ 0x39, 0x02, -+ 0x42, 0x60, -+ 0x4a, 0x80, -+ 0x4b, 0x04, -+ 0x4d, 0x91, -+ 0x5d, 0x88, -+ 0x50, 0x36, -+ 0x51, 0x36, -+ 0x52, 0x36, -+ 0x53, 0x36, -+ 0x63, 0x60, -+ 0x64, 0x10, -+ 0x65, 0x10, -+ 0x68, 0x04, -+ 0x69, 0x29, -+ 0x70, 0x20, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x40, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x60, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x80, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0xa0, -+ 0x71, 0x70, -+ 0x72, 0x04, -+ 0x73, 0x00, -+ 0x70, 0x1f, -+ 0xa0, 0x44, -+ 0xc0, 0x08, -+ 0xc1, 0x10, -+ 0xc2, 0x08, -+ 0xc3, 0x10, -+ 0xc4, 0x08, -+ 0xc5, 0xf0, -+ 0xc6, 0xf0, -+ 0xc7, 0x0a, -+ 0xc8, 0x1a, -+ 0xc9, 0x80, -+ 0xca, 0x23, -+ 0xcb, 0x24, -+ 0xce, 0x74, -+ 0x56, 0x01, -+ 0x90, 0x03, -+ 0x76, 0x80, -+ 0x77, 0x42, -+ 0x78, 0x0a, -+ 0x79, 0x80, -+ 0xad, 0x40, -+ 0xae, 0x07, -+ 0x7f, 0xd4, -+ 0x7c, 0x00, -+ 0x80, 0xa8, -+ 0x81, 0xda, -+ 0x7c, 0x01, -+ 0x80, 0xda, -+ 0x81, 0xec, -+ 0x7c, 0x02, -+ 0x80, 0xca, -+ 0x81, 0xeb, -+ 0x7c, 0x03, -+ 0x80, 0xba, -+ 0x81, 0xdb, -+ 0x85, 0x08, -+ 0x86, 0x00, -+ 0x87, 0x02, -+ 0x89, 0x80, -+ 0x8b, 0x44, -+ 0x8c, 0xaa, -+ 0x8a, 0x10, -+ 0xba, 0x00, -+ 0xf5, 0x04, -+ 0xd2, 0x32, -+ 0xb8, 0x00, -+}; -+ -+#endif /* M88DS3103_PRIV_H */ -diff -urN a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile ---- a/drivers/media/dvb-frontends/Makefile 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/dvb-frontends/Makefile 2013-05-03 17:04:31.000000000 +0800 -@@ -103,4 +103,5 @@ - obj-$(CONFIG_DVB_RTL2832) += rtl2832.o - obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o - obj-$(CONFIG_DVB_AF9033) += af9033.o -- -+obj-$(CONFIG_DVB_M88DS3103) += m88ds3103.o -+obj-$(CONFIG_DVB_M88DC2800) += m88dc2800.o -diff -urN a/drivers/media/pci/cx23885/cimax2.c b/drivers/media/pci/cx23885/cimax2.c ---- a/drivers/media/pci/cx23885/cimax2.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cimax2.c 2013-03-31 22:03:29.000000000 +0800 -@@ -415,7 +415,7 @@ - return state->status; - } - --int netup_ci_init(struct cx23885_tsport *port) -+int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky) - { - struct netup_ci_state *state; - u8 cimax_init[34] = { -@@ -464,6 +464,11 @@ - goto err; - } - -+ if(isDVBSky) { -+ cimax_init[32] = 0x22; -+ cimax_init[33] = 0x00; -+ } -+ - port->port_priv = state; - - switch (port->nr) { -@@ -537,3 +542,19 @@ - dvb_ca_en50221_release(&state->ca); - kfree(state); - } -+ -+/* CI irq handler for DVBSky board*/ -+int dvbsky_ci_slot_status(struct cx23885_dev *dev) -+{ -+ struct cx23885_tsport *port = NULL; -+ struct netup_ci_state *state = NULL; -+ -+ ci_dbg_print("%s:\n", __func__); -+ -+ port = &dev->ts1; -+ state = port->port_priv; -+ schedule_work(&state->work); -+ ci_dbg_print("%s: Wakeup CI0\n", __func__); -+ -+ return 1; -+} -diff -urN a/drivers/media/pci/cx23885/cimax2.h b/drivers/media/pci/cx23885/cimax2.h ---- a/drivers/media/pci/cx23885/cimax2.h 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cimax2.h 2013-01-30 12:34:37.000000000 +0800 -@@ -41,7 +41,9 @@ - extern int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status); - extern int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, - int slot, int open); --extern int netup_ci_init(struct cx23885_tsport *port); -+extern int netup_ci_init(struct cx23885_tsport *port, bool isDVBSky); - extern void netup_ci_exit(struct cx23885_tsport *port); - -+extern int dvbsky_ci_slot_status(struct cx23885_dev *dev); -+ - #endif -diff -urN a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c ---- a/drivers/media/pci/cx23885/cx23885-cards.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-cards.c 2013-05-03 17:34:46.000000000 +0800 -@@ -569,6 +569,34 @@ - .name = "TeVii S471", - .portb = CX23885_MPEG_DVB, - }, -+ [CX23885_BOARD_BST_PS8512] = { -+ .name = "Bestunar PS8512", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S950] = { -+ .name = "DVBSKY S950", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S952] = { -+ .name = "DVBSKY S952", -+ .portb = CX23885_MPEG_DVB, -+ .portc = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_S950_CI] = { -+ .ci_type = 3, -+ .name = "DVBSKY S950CI DVB-S2 CI", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_C2800E_CI] = { -+ .ci_type = 3, -+ .name = "DVBSKY C2800E DVB-C CI", -+ .portb = CX23885_MPEG_DVB, -+ }, -+ [CX23885_BOARD_DVBSKY_T9580] = { -+ .name = "DVBSKY T9580", -+ .portb = CX23885_MPEG_DVB, -+ .portc = CX23885_MPEG_DVB, -+ }, - [CX23885_BOARD_PROF_8000] = { - .name = "Prof Revolution DVB-S2 8000", - .portb = CX23885_MPEG_DVB, -@@ -605,7 +633,7 @@ - CX25840_NONE1_CH3, - .amux = CX25840_AUDIO6, - } }, -- } -+ } - }; - const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards); - -@@ -818,6 +846,30 @@ - .subdevice = 0x9022, - .card = CX23885_BOARD_TEVII_S471, - }, { -+ .subvendor = 0x14f1, -+ .subdevice = 0x8512, -+ .card = CX23885_BOARD_BST_PS8512, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x0950, -+ .card = CX23885_BOARD_DVBSKY_S950, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x0952, -+ .card = CX23885_BOARD_DVBSKY_S952, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x950C, -+ .card = CX23885_BOARD_DVBSKY_S950_CI, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x2800, -+ .card = CX23885_BOARD_DVBSKY_C2800E_CI, -+ }, { -+ .subvendor = 0x4254, -+ .subdevice = 0x9580, -+ .card = CX23885_BOARD_DVBSKY_T9580, -+ }, { - .subvendor = 0x8000, - .subdevice = 0x3034, - .card = CX23885_BOARD_PROF_8000, -@@ -1224,7 +1276,7 @@ - cx_set(GP0_IO, 0x00040004); - break; - case CX23885_BOARD_TBS_6920: -- case CX23885_BOARD_PROF_8000: -+ case CX23885_BOARD_PROF_8000: - cx_write(MC417_CTL, 0x00000036); - cx_write(MC417_OEN, 0x00001000); - cx_set(MC417_RWD, 0x00000002); -@@ -1394,9 +1446,84 @@ - cx_set(GP0_IO, 0x00040004); - mdelay(60); - break; -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_BST_PS8512: -+ cx23885_gpio_enable(dev, GPIO_2, 1); -+ cx23885_gpio_clear(dev, GPIO_2); -+ msleep(100); -+ cx23885_gpio_set(dev, GPIO_2); -+ break; -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_T9580: -+ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ -+ -+ cx23885_gpio_enable(dev, GPIO_2, 1); -+ cx23885_gpio_enable(dev, GPIO_11, 1); -+ -+ cx23885_gpio_clear(dev, GPIO_2); -+ cx23885_gpio_clear(dev, GPIO_11); -+ msleep(100); -+ cx23885_gpio_set(dev, GPIO_2); -+ cx23885_gpio_set(dev, GPIO_11); -+ break; -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ /* GPIO-0 INTA from CiMax, input -+ GPIO-1 reset CiMax, output, high active -+ GPIO-2 reset demod, output, low active -+ GPIO-3 to GPIO-10 data/addr for CAM -+ GPIO-11 ~CS0 to CiMax1 -+ GPIO-12 ~CS1 to CiMax2 -+ GPIO-13 ADL0 load LSB addr -+ GPIO-14 ADL1 load MSB addr -+ GPIO-15 ~RDY from CiMax -+ GPIO-17 ~RD to CiMax -+ GPIO-18 ~WR to CiMax -+ */ -+ cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */ -+ cx_clear(GP0_IO, 0x00010004); /*GPIO 0 as input*/ -+ mdelay(100);/* reset delay */ -+ cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */ -+ cx_clear(GP0_IO, 0x00010002); -+ cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */ -+ /* GPIO-15 IN as ~ACK, rest as OUT */ -+ cx_write(MC417_OEN, 0x00001000); -+ /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */ -+ cx_write(MC417_RWD, 0x0000c300); -+ /* enable irq */ -+ cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ -+ break; - } - } - -+static int cx23885_ir_patch(struct i2c_adapter *i2c, u8 reg, u8 mask) -+{ -+ struct i2c_msg msgs[2]; -+ u8 tx_buf[2], rx_buf[1]; -+ /* Write register address */ -+ tx_buf[0] = reg; -+ msgs[0].addr = 0x4c; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = (char *) tx_buf; -+ /* Read data from register */ -+ msgs[1].addr = 0x4c; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = 1; -+ msgs[1].buf = (char *) rx_buf; -+ -+ i2c_transfer(i2c, msgs, 2); -+ -+ tx_buf[0] = reg; -+ tx_buf[1] = rx_buf[0] | mask; -+ msgs[0].addr = 0x4c; -+ msgs[0].flags = 0; -+ msgs[0].len = 2; -+ msgs[0].buf = (char *) tx_buf; -+ -+ return i2c_transfer(i2c, msgs, 1); -+} -+ - int cx23885_ir_init(struct cx23885_dev *dev) - { - static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = { -@@ -1482,6 +1609,23 @@ - v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, - ir_rx_pin_cfg_count, ir_rx_pin_cfg); - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: -+ dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE); -+ if (dev->sd_ir == NULL) { -+ ret = -ENODEV; -+ break; -+ } -+ v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config, -+ ir_rx_pin_cfg_count, ir_rx_pin_cfg); -+ -+ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x1f,0x80); -+ cx23885_ir_patch(&(dev->i2c_bus[2].i2c_adap),0x23,0x80); -+ break; - case CX23885_BOARD_HAUPPAUGE_HVR1250: - if (!enable_885_ir) - break; -@@ -1511,9 +1655,15 @@ - cx23888_ir_remove(dev); - dev->sd_ir = NULL; - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: -- case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_HAUPPAUGE_HVR1250: - case CX23885_BOARD_MYGICA_X8507: - cx23885_irq_remove(dev, PCI_MSK_AV_CORE); - /* sd_ir is a duplicate pointer to the AV Core, just clear it */ -@@ -1556,6 +1706,12 @@ - if (dev->sd_ir) - cx23885_irq_add_enable(dev, PCI_MSK_IR); - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -@@ -1657,6 +1813,10 @@ - ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ - ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_TEVII_S471: - case CX23885_BOARD_DVBWORLD_2005: -@@ -1694,6 +1854,22 @@ - ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ - ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; - break; -+ case CX23885_BOARD_DVBSKY_S952: -+ ts1->gen_ctrl_val = 0x5; /* Parallel */ -+ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ ts2->gen_ctrl_val = 0xe; /* Serial bus + punctured clock */ -+ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ break; -+ case CX23885_BOARD_DVBSKY_T9580: -+ ts1->gen_ctrl_val = 0x5; /* Parallel */ -+ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ ts2->gen_ctrl_val = 0x8; /* Serial bus */ -+ ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ -+ ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; -+ break; - case CX23885_BOARD_HAUPPAUGE_HVR1250: - case CX23885_BOARD_HAUPPAUGE_HVR1500: - case CX23885_BOARD_HAUPPAUGE_HVR1500Q: -@@ -1749,6 +1925,12 @@ - case CX23885_BOARD_MPX885: - case CX23885_BOARD_MYGICA_X8507: - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: - case CX23885_BOARD_AVERMEDIA_HC81R: - dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, - &dev->i2c_bus[2].i2c_adap, -diff -urN a/drivers/media/pci/cx23885/cx23885-core.c b/drivers/media/pci/cx23885/cx23885-core.c ---- a/drivers/media/pci/cx23885/cx23885-core.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-core.c 2013-05-03 17:36:31.000000000 +0800 -@@ -1909,6 +1909,10 @@ - (pci_status & PCI_MSK_GPIO0)) - handled += altera_ci_irq(dev); - -+ if (cx23885_boards[dev->board].ci_type == 3 && -+ (pci_status & PCI_MSK_GPIO0)) -+ handled += dvbsky_ci_slot_status(dev); -+ - if (ts1_status) { - if (cx23885_boards[dev->board].portb == CX23885_MPEG_DVB) - handled += cx23885_irq_ts(ts1, ts1_status); -@@ -2144,6 +2148,8 @@ - cx23885_irq_add_enable(dev, PCI_MSK_GPIO1 | PCI_MSK_GPIO0); - break; - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - cx23885_irq_add_enable(dev, PCI_MSK_GPIO0); - break; - } -diff -urN a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c ---- a/drivers/media/pci/cx23885/cx23885-dvb.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-dvb.c 2013-05-03 17:38:34.000000000 +0800 -@@ -51,6 +51,8 @@ - #include "stv6110.h" - #include "lnbh24.h" - #include "cx24116.h" -+#include "m88ds3103.h" -+#include "m88dc2800.h" - #include "cimax2.h" - #include "lgs8gxx.h" - #include "netup-eeprom.h" -@@ -64,8 +66,8 @@ - #include "stv0367.h" - #include "drxk.h" - #include "mt2063.h" --#include "stv090x.h" --#include "stb6100.h" -+#include "stv090x.h" -+#include "stb6100.h" - #include "stb6100_cfg.h" - #include "tda10071.h" - #include "a8293.h" -@@ -500,42 +502,130 @@ - .if_khz = 5380, - }; - --static struct stv090x_config prof_8000_stv090x_config = { -- .device = STV0903, -- .demod_mode = STV090x_SINGLE, -- .clk_mode = STV090x_CLK_EXT, -- .xtal = 27000000, -- .address = 0x6A, -- .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, -- .repeater_level = STV090x_RPTLEVEL_64, -- .adc1_range = STV090x_ADC_2Vpp, -- .diseqc_envelope_mode = false, -- -- .tuner_get_frequency = stb6100_get_frequency, -- .tuner_set_frequency = stb6100_set_frequency, -- .tuner_set_bandwidth = stb6100_set_bandwidth, -- .tuner_get_bandwidth = stb6100_get_bandwidth, --}; - --static struct stb6100_config prof_8000_stb6100_config = { -- .tuner_address = 0x60, -- .refclock = 27000000, --}; -- --static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+/* bst control */ -+int bst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) - { - struct cx23885_tsport *port = fe->dvb->priv; - struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_1, 1); -+ cx23885_gpio_enable(dev, GPIO_0, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_1); -+ cx23885_gpio_set(dev, GPIO_0); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_1); -+ cx23885_gpio_clear(dev, GPIO_0); -+ break; -+ } -+ return 0; -+} - -- if (voltage == SEC_VOLTAGE_18) -- cx_write(MC417_RWD, 0x00001e00); -- else if (voltage == SEC_VOLTAGE_13) -- cx_write(MC417_RWD, 0x00001a00); -- else -- cx_write(MC417_RWD, 0x00001800); -+int dvbsky_set_voltage_sec(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ cx23885_gpio_enable(dev, GPIO_12, 1); -+ cx23885_gpio_enable(dev, GPIO_13, 1); -+ -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_18: -+ cx23885_gpio_set(dev, GPIO_13); -+ cx23885_gpio_set(dev, GPIO_12); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx23885_gpio_clear(dev, GPIO_13); -+ cx23885_gpio_clear(dev, GPIO_12); -+ break; -+ } - return 0; - } - -+/* bestunar single dvb-s2 */ -+static struct m88ds3103_config bst_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+ .set_voltage = bst_set_voltage, -+}; -+/* DVBSKY dual dvb-s2 */ -+static struct m88ds3103_config dvbsky_ds3103_config_pri = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+ .set_voltage = bst_set_voltage, -+}; -+static struct m88ds3103_config dvbsky_ds3103_config_sec = { -+ .demod_address = 0x68, -+ .ci_mode = 0, -+ .pin_ctrl = 0x82, -+ .ts_mode = 1, -+ .set_voltage = dvbsky_set_voltage_sec, -+}; -+ -+static struct m88ds3103_config dvbsky_ds3103_ci_config = { -+ .demod_address = 0x68, -+ .ci_mode = 2, -+ .pin_ctrl = 0x82, -+ .ts_mode = 0, -+}; -+ -+static struct m88dc2800_config dvbsky_dc2800_config = { -+ .demod_address = 0x1c, -+ .ts_mode = 3, -+}; -+ -+static struct stv090x_config prof_8000_stv090x_config = { -+ .device = STV0903, -+ .demod_mode = STV090x_SINGLE, -+ .clk_mode = STV090x_CLK_EXT, -+ .xtal = 27000000, -+ .address = 0x6A, -+ .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, -+ .repeater_level = STV090x_RPTLEVEL_64, -+ .adc1_range = STV090x_ADC_2Vpp, -+ .diseqc_envelope_mode = false, -+ -+ .tuner_get_frequency = stb6100_get_frequency, -+ .tuner_set_frequency = stb6100_set_frequency, -+ .tuner_set_bandwidth = stb6100_set_bandwidth, -+ .tuner_get_bandwidth = stb6100_get_bandwidth, -+}; -+ -+static struct stb6100_config prof_8000_stb6100_config = { -+ .tuner_address = 0x60, -+ .refclock = 27000000, -+}; -+ -+static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct cx23885_tsport *port = fe->dvb->priv; -+ struct cx23885_dev *dev = port->dev; -+ -+ if (voltage == SEC_VOLTAGE_18) -+ cx_write(MC417_RWD, 0x00001e00); -+ else if (voltage == SEC_VOLTAGE_13) -+ cx_write(MC417_RWD, 0x00001a00); -+ else -+ cx_write(MC417_RWD, 0x00001800); -+ return 0; -+} -+ - static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) - { - struct dtv_frontend_properties *p = &fe->dtv_property_cache; -@@ -1250,23 +1340,79 @@ - &tevii_ds3000_config, - &i2c_bus->i2c_adap); - break; -- case CX23885_BOARD_PROF_8000: -- i2c_bus = &dev->i2c_bus[0]; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &bst_ds3103_config, -+ &i2c_bus->i2c_adap); -+ break; -+ -+ case CX23885_BOARD_DVBSKY_S952: -+ switch (port->nr) { -+ /* port B */ -+ case 1: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config_pri, -+ &i2c_bus->i2c_adap); -+ break; -+ /* port C */ -+ case 2: -+ i2c_bus = &dev->i2c_bus[0]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config_sec, -+ &i2c_bus->i2c_adap); -+ break; -+ } -+ break; - -- fe0->dvb.frontend = dvb_attach(stv090x_attach, -- &prof_8000_stv090x_config, -- &i2c_bus->i2c_adap, -- STV090x_DEMODULATOR_0); -- if (fe0->dvb.frontend != NULL) { -- if (!dvb_attach(stb6100_attach, -- fe0->dvb.frontend, -- &prof_8000_stb6100_config, -- &i2c_bus->i2c_adap)) -- goto frontend_detach; -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_ci_config, -+ &i2c_bus->i2c_adap); -+ break; -+ -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88dc2800_attach, -+ &dvbsky_dc2800_config, -+ &i2c_bus->i2c_adap); -+ break; - -- fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; -+ case CX23885_BOARD_DVBSKY_T9580: -+ switch (port->nr) { -+ /* port B */ -+ case 1: -+ i2c_bus = &dev->i2c_bus[1]; -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config_pri, -+ &i2c_bus->i2c_adap); -+ break; -+ /* port C */ -+ case 2: -+ break; - } - break; -+ -+ case CX23885_BOARD_PROF_8000: -+ i2c_bus = &dev->i2c_bus[0]; -+ -+ fe0->dvb.frontend = dvb_attach(stv090x_attach, -+ &prof_8000_stv090x_config, -+ &i2c_bus->i2c_adap, -+ STV090x_DEMODULATOR_0); -+ if (fe0->dvb.frontend != NULL) { -+ if (!dvb_attach(stb6100_attach, -+ fe0->dvb.frontend, -+ &prof_8000_stb6100_config, -+ &i2c_bus->i2c_adap)) -+ goto frontend_detach; -+ -+ fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; -+ } -+ break; - case CX23885_BOARD_HAUPPAUGE_HVR4400: - i2c_bus = &dev->i2c_bus[0]; - fe0->dvb.frontend = dvb_attach(tda10071_attach, -@@ -1325,7 +1471,7 @@ - printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", - port->nr, port->frontends.adapter.proposed_mac); - -- netup_ci_init(port); -+ netup_ci_init(port, false); - break; - } - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { -@@ -1352,6 +1498,41 @@ - memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); - break; - } -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_T9580:{ -+ u8 eeprom[256]; /* 24C02 i2c eeprom */ -+ -+ if(port->nr > 2) -+ break; -+ -+ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; -+ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); -+ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); -+ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + -+ (port->nr-1)*8, 6); -+ break; -+ } -+ case CX23885_BOARD_DVBSKY_S950_CI: { -+ u8 eeprom[256]; /* 24C02 i2c eeprom */ -+ -+ if(port->nr > 2) -+ break; -+ -+ dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; -+ tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); -+ printk(KERN_INFO "DVBSKY PCIe MAC= %pM\n", eeprom + 0xc0+(port->nr-1)*8); -+ memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + -+ (port->nr-1)*8, 6); -+ -+ netup_ci_init(port, true); -+ break; -+ } -+ case CX23885_BOARD_DVBSKY_C2800E_CI: { -+ netup_ci_init(port, true); -+ break; -+ } - } - - return ret; -@@ -1434,6 +1615,8 @@ - - switch (port->dev->board) { - case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: - netup_ci_exit(port); - break; - case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: -diff -urN a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h ---- a/drivers/media/pci/cx23885/cx23885.h 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885.h 2013-05-03 17:14:20.000000000 +0800 -@@ -94,6 +94,14 @@ - #define CX23885_BOARD_HAUPPAUGE_HVR4400 38 - #define CX23885_BOARD_AVERMEDIA_HC81R 39 - -+#define CX23885_BOARD_BASE_INDEX 40 -+#define CX23885_BOARD_BST_PS8512 (CX23885_BOARD_BASE_INDEX) -+#define CX23885_BOARD_DVBSKY_S952 (CX23885_BOARD_BASE_INDEX+1) -+#define CX23885_BOARD_DVBSKY_S950 (CX23885_BOARD_BASE_INDEX+2) -+#define CX23885_BOARD_DVBSKY_S950_CI (CX23885_BOARD_BASE_INDEX+3) -+#define CX23885_BOARD_DVBSKY_C2800E_CI (CX23885_BOARD_BASE_INDEX+4) -+#define CX23885_BOARD_DVBSKY_T9580 (CX23885_BOARD_BASE_INDEX+5) -+ - #define GPIO_0 0x00000001 - #define GPIO_1 0x00000002 - #define GPIO_2 0x00000004 -@@ -231,7 +239,7 @@ - */ - u32 clk_freq; - struct cx23885_input input[MAX_CX23885_INPUT]; -- int ci_type; /* for NetUP */ -+ int ci_type; /* 1 and 2 for NetUP, 3 for DVBSky. */ - /* Force bottom field first during DMA (888 workaround) */ - u32 force_bff; - }; -diff -urN a/drivers/media/pci/cx23885/cx23885-input.c b/drivers/media/pci/cx23885/cx23885-input.c ---- a/drivers/media/pci/cx23885/cx23885-input.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/cx23885-input.c 2013-05-03 17:42:09.000000000 +0800 -@@ -89,6 +89,12 @@ - case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: - case CX23885_BOARD_TEVII_S470: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: - case CX23885_BOARD_MYGICA_X8507: - /* - * The only boards we handle right now. However other boards -@@ -141,6 +147,12 @@ - case CX23885_BOARD_HAUPPAUGE_HVR1850: - case CX23885_BOARD_HAUPPAUGE_HVR1290: - case CX23885_BOARD_HAUPPAUGE_HVR1250: -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: - case CX23885_BOARD_MYGICA_X8507: - /* - * The IR controller on this board only returns pulse widths. -@@ -291,6 +303,18 @@ - /* A guess at the remote */ - rc_map = RC_MAP_TEVII_NEC; - break; -+ case CX23885_BOARD_BST_PS8512: -+ case CX23885_BOARD_DVBSKY_S950: -+ case CX23885_BOARD_DVBSKY_S952: -+ case CX23885_BOARD_DVBSKY_S950_CI: -+ case CX23885_BOARD_DVBSKY_C2800E_CI: -+ case CX23885_BOARD_DVBSKY_T9580: -+ /* Integrated CX2388[58] IR controller */ -+ driver_type = RC_DRIVER_IR_RAW; -+ allowed_protos = RC_BIT_ALL; -+ /* A guess at the remote */ -+ rc_map = RC_MAP_DVBSKY; -+ break; - case CX23885_BOARD_MYGICA_X8507: - /* Integrated CX23885 IR controller */ - driver_type = RC_DRIVER_IR_RAW; -diff -urN a/drivers/media/pci/cx23885/Kconfig b/drivers/media/pci/cx23885/Kconfig ---- a/drivers/media/pci/cx23885/Kconfig 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx23885/Kconfig 2013-05-03 17:43:05.000000000 +0800 -@@ -23,6 +23,8 @@ - select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DC2800 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT - select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT - select DVB_TS2020 if MEDIA_SUBDRV_AUTOSELECT -diff -urN a/drivers/media/pci/cx88/cx88-cards.c b/drivers/media/pci/cx88/cx88-cards.c ---- a/drivers/media/pci/cx88/cx88-cards.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-cards.c 2013-05-03 17:06:55.000000000 +0800 -@@ -2309,6 +2309,18 @@ - } }, - .mpeg = CX88_MPEG_DVB, - }, -+ [CX88_BOARD_BST_PS8312] = { -+ .name = "Bestunar PS8312 DVB-S/S2", -+ .tuner_type = UNSET, -+ .radio_type = UNSET, -+ .tuner_addr = ADDR_UNSET, -+ .radio_addr = ADDR_UNSET, -+ .input = { { -+ .type = CX88_VMUX_DVB, -+ .vmux = 0, -+ } }, -+ .mpeg = CX88_MPEG_DVB, -+ }, - }; - - /* ------------------------------------------------------------------ */ -@@ -2813,6 +2825,10 @@ - .subvendor = 0x1822, - .subdevice = 0x0023, - .card = CX88_BOARD_TWINHAN_VP1027_DVBS, -+ }, { -+ .subvendor = 0x14f1, -+ .subdevice = 0x8312, -+ .card = CX88_BOARD_BST_PS8312, - }, - }; - -@@ -3547,6 +3563,12 @@ - cx_write(MO_SRST_IO, 1); - msleep(100); - break; -+ case CX88_BOARD_BST_PS8312: -+ cx_write(MO_GP1_IO, 0x808000); -+ msleep(100); -+ cx_write(MO_GP1_IO, 0x808080); -+ msleep(100); -+ break; - } /*end switch() */ - - -diff -urN a/drivers/media/pci/cx88/cx88-dvb.c b/drivers/media/pci/cx88/cx88-dvb.c ---- a/drivers/media/pci/cx88/cx88-dvb.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-dvb.c 2013-05-03 17:09:09.000000000 +0800 -@@ -54,6 +54,7 @@ - #include "stv0288.h" - #include "stb6000.h" - #include "cx24116.h" -+#include "m88ds3103.h" - #include "stv0900.h" - #include "stb6100.h" - #include "stb6100_proc.h" -@@ -459,6 +460,56 @@ - return core->prev_set_voltage(fe, voltage); - return 0; - } -+/*CX88_BOARD_BST_PS8312*/ -+static int bst_dvbs_set_voltage(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage) -+{ -+ struct cx8802_dev *dev= fe->dvb->priv; -+ struct cx88_core *core = dev->core; -+ -+ cx_write(MO_GP1_IO, 0x111111); -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx_write(MO_GP1_IO, 0x020200); -+ break; -+ case SEC_VOLTAGE_18: -+ cx_write(MO_GP1_IO, 0x020202); -+ break; -+ case SEC_VOLTAGE_OFF: -+ cx_write(MO_GP1_IO, 0x111100); -+ break; -+ } -+ -+ if (core->prev_set_voltage) -+ return core->prev_set_voltage(fe, voltage); -+ return 0; -+} -+ -+static int bst_dvbs_set_voltage_v2(struct dvb_frontend *fe, -+ fe_sec_voltage_t voltage) -+{ -+ struct cx8802_dev *dev= fe->dvb->priv; -+ struct cx88_core *core = dev->core; -+ -+ cx_write(MO_GP1_IO, 0x111101); -+ switch (voltage) { -+ case SEC_VOLTAGE_13: -+ cx_write(MO_GP1_IO, 0x020200); -+ break; -+ case SEC_VOLTAGE_18: -+ -+ cx_write(MO_GP1_IO, 0x020202); -+ break; -+ case SEC_VOLTAGE_OFF: -+ -+ cx_write(MO_GP1_IO, 0x111110); -+ break; -+ } -+ -+ if (core->prev_set_voltage) -+ return core->prev_set_voltage(fe, voltage); -+ return 0; -+} - - static int vp1027_set_voltage(struct dvb_frontend *fe, - fe_sec_voltage_t voltage) -@@ -706,6 +757,11 @@ - .clk_out_div = 1, - }; - -+static struct m88ds3103_config dvbsky_ds3103_config = { -+ .demod_address = 0x68, -+ .set_ts_params = ds3000_set_ts_param, -+}; -+ - static const struct stv0900_config prof_7301_stv0900_config = { - .demod_address = 0x6a, - /* demod_mode = 0,*/ -@@ -1477,6 +1533,35 @@ - &tevii_ts2020_config, &core->i2c_adap); - fe0->dvb.frontend->ops.set_voltage = - tevii_dvbs_set_voltage; -+ } -+ break; -+ case CX88_BOARD_BST_PS8312: -+ fe0->dvb.frontend = dvb_attach(m88ds3103_attach, -+ &dvbsky_ds3103_config, -+ &core->i2c_adap); -+ if (fe0->dvb.frontend != NULL){ -+ int ret; -+ u8 b0[] = { 0x60 }; -+ u8 b1[2] = { 0 }; -+ struct i2c_msg msg[] = { -+ { -+ .addr = 0x50, -+ .flags = 0, -+ .buf = b0, -+ .len = 1 -+ }, { -+ .addr = 0x50, -+ .flags = I2C_M_RD, -+ .buf = b1, -+ .len = 2 -+ } -+ }; -+ ret = i2c_transfer(&core->i2c_adap, msg, 2); -+ printk("PS8312: config = %02x, %02x", b1[0],b1[1]); -+ if(b1[0] == 0xaa) -+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage_v2; -+ else -+ fe0->dvb.frontend->ops.set_voltage = bst_dvbs_set_voltage; - } - break; - case CX88_BOARD_OMICOM_SS4_PCI: -diff -urN a/drivers/media/pci/cx88/cx88.h b/drivers/media/pci/cx88/cx88.h ---- a/drivers/media/pci/cx88/cx88.h 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88.h 2013-05-03 17:05:57.000000000 +0800 -@@ -238,6 +238,7 @@ - #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88 - #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89 - #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90 -+#define CX88_BOARD_BST_PS8312 91 - - enum cx88_itype { - CX88_VMUX_COMPOSITE1 = 1, -diff -urN a/drivers/media/pci/cx88/cx88-input.c b/drivers/media/pci/cx88/cx88-input.c ---- a/drivers/media/pci/cx88/cx88-input.c 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx88/cx88-input.c 2013-01-26 14:52:03.000000000 +0800 -@@ -419,6 +419,10 @@ - rc_type = RC_BIT_NEC; - ir->sampling = 0xff00; /* address */ - break; -+ case CX88_BOARD_BST_PS8312: -+ ir_codes = RC_MAP_DVBSKY; -+ ir->sampling = 0xff00; /* address */ -+ break; - } - - if (!ir_codes) { -diff -urN a/drivers/media/pci/cx88/Kconfig b/drivers/media/pci/cx88/Kconfig ---- a/drivers/media/pci/cx88/Kconfig 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/pci/cx88/Kconfig 2013-05-03 17:10:41.000000000 +0800 -@@ -57,6 +57,7 @@ - select DVB_ISL6421 if MEDIA_SUBDRV_AUTOSELECT - select DVB_S5H1411 if MEDIA_SUBDRV_AUTOSELECT - select DVB_CX24116 if MEDIA_SUBDRV_AUTOSELECT -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0299 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0288 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6000 if MEDIA_SUBDRV_AUTOSELECT -diff -urN a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile ---- a/drivers/media/rc/keymaps/Makefile 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/rc/keymaps/Makefile 2013-05-03 17:43:41.000000000 +0800 -@@ -27,6 +27,7 @@ - rc-dm1105-nec.o \ - rc-dntv-live-dvb-t.o \ - rc-dntv-live-dvbt-pro.o \ -+ rc-dvbsky.o \ - rc-em-terratec.o \ - rc-encore-enltv2.o \ - rc-encore-enltv.o \ -diff -urN a/drivers/media/rc/keymaps/rc-dvbsky.c b/drivers/media/rc/keymaps/rc-dvbsky.c ---- a/drivers/media/rc/keymaps/rc-dvbsky.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/rc/keymaps/rc-dvbsky.c 2013-01-26 14:52:49.000000000 +0800 -@@ -0,0 +1,78 @@ -+/* rc-dvbsky.c - Keytable for Dvbsky Remote Controllers -+ * -+ * keymap imported from ir-keymaps.c -+ * -+ * -+ * Copyright (c) 2010-2012 by Nibble Max nibble.max@gmail.com -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include <media/rc-map.h> -+#include <linux/module.h> -+/* -+ * This table contains the complete RC5 code, instead of just the data part -+ */ -+ -+static struct rc_map_table rc5_dvbsky[] = { -+ { 0x0000, KEY_0 }, -+ { 0x0001, KEY_1 }, -+ { 0x0002, KEY_2 }, -+ { 0x0003, KEY_3 }, -+ { 0x0004, KEY_4 }, -+ { 0x0005, KEY_5 }, -+ { 0x0006, KEY_6 }, -+ { 0x0007, KEY_7 }, -+ { 0x0008, KEY_8 }, -+ { 0x0009, KEY_9 }, -+ { 0x000a, KEY_MUTE }, -+ { 0x000d, KEY_OK }, -+ { 0x000b, KEY_STOP }, -+ { 0x000c, KEY_EXIT }, -+ { 0x000e, KEY_CAMERA }, /*Snap shot*/ -+ { 0x000f, KEY_SUBTITLE }, /*PIP*/ -+ { 0x0010, KEY_VOLUMEUP }, -+ { 0x0011, KEY_VOLUMEDOWN }, -+ { 0x0012, KEY_FAVORITES }, -+ { 0x0013, KEY_LIST }, /*Info*/ -+ { 0x0016, KEY_PAUSE }, -+ { 0x0017, KEY_PLAY }, -+ { 0x001f, KEY_RECORD }, -+ { 0x0020, KEY_CHANNELDOWN }, -+ { 0x0021, KEY_CHANNELUP }, -+ { 0x0025, KEY_POWER2 }, -+ { 0x0026, KEY_REWIND }, -+ { 0x0027, KEY_FASTFORWARD }, -+ { 0x0029, KEY_LAST }, -+ { 0x002b, KEY_MENU }, -+ { 0x002c, KEY_EPG }, -+ { 0x002d, KEY_ZOOM }, -+}; -+ -+static struct rc_map_list rc5_dvbsky_map = { -+ .map = { -+ .scan = rc5_dvbsky, -+ .size = ARRAY_SIZE(rc5_dvbsky), -+ .rc_type = RC_TYPE_RC5, -+ .name = RC_MAP_DVBSKY, -+ } -+}; -+ -+static int __init init_rc_map_rc5_dvbsky(void) -+{ -+ return rc_map_register(&rc5_dvbsky_map); -+} -+ -+static void __exit exit_rc_map_rc5_dvbsky(void) -+{ -+ rc_map_unregister(&rc5_dvbsky_map); -+} -+ -+module_init(init_rc_map_rc5_dvbsky) -+module_exit(exit_rc_map_rc5_dvbsky) -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Nibble Max nibble.max@gmail.com"); -diff -urN a/drivers/media/usb/dvb-usb-v2/dvbsky.c b/drivers/media/usb/dvb-usb-v2/dvbsky.c ---- a/drivers/media/usb/dvb-usb-v2/dvbsky.c 1970-01-01 08:00:00.000000000 +0800 -+++ b/drivers/media/usb/dvb-usb-v2/dvbsky.c 2013-05-03 17:47:38.000000000 +0800 -@@ -0,0 +1,665 @@ -+/* -+ * Driver for DVBSky USB2.0 receiver -+ * -+ * Copyright (C) 2013 Max nibble nibble.max@gmail.com -+ * -+ * CIMax code is copied and modified from: -+ * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card -+ * Copyright (C) 2009 NetUP Inc. -+ * Copyright (C) 2009 Igor M. Liplianin liplianin@netup.ru -+ * Copyright (C) 2009 Abylay Ospan aospan@netup.ru -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include "dvb_ca_en50221.h" -+#include "dvb_usb.h" -+#include "m88ds3103.h" -+ -+static int dvbsky_debug; -+module_param(dvbsky_debug, int, 0644); -+MODULE_PARM_DESC(dvbsky_debug, "Activates dvbsky usb debugging (default:0)"); -+ -+#define DVBSKY_CI_CTL 0x04 -+#define DVBSKY_CI_RD 1 -+ -+#define dprintk(args...) \ -+ do { \ -+ if (dvbsky_debug) \ -+ printk(KERN_INFO "dvbsky_usb: " args); \ -+ } while (0) -+ -+DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); -+ -+struct dvbsky_state { -+ struct mutex stream_mutex; -+ u8 has_ci; -+ u8 ci_attached; -+ struct dvb_ca_en50221 ci; -+ unsigned long next_status_checked_time; -+ u8 ci_i2c_addr; -+ u8 current_ci_flag; -+ int ci_status; -+}; -+ -+static int dvbsky_stream_ctrl(struct dvb_usb_device *d, u8 onoff) -+{ -+ struct dvbsky_state *state = d_to_priv(d); -+ int ret; -+ u8 obuf_pre[3] = { 0x37, 0, 0 }; -+ u8 obuf_post[3] = { 0x36, 3, 0 }; -+ dprintk("%s() -off \n", __func__); -+ mutex_lock(&state->stream_mutex); -+ ret = dvb_usbv2_generic_write(d, obuf_pre, 3); -+ if (!ret && onoff) { -+ msleep(10); -+ ret = dvb_usbv2_generic_write(d, obuf_post, 3); -+ dprintk("%s() -on \n", __func__); -+ } -+ mutex_unlock(&state->stream_mutex); -+ return ret; -+} -+ -+/* CI opertaions */ -+static int dvbsky_ci_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg, -+ u8 *buf, int len) -+{ -+ int ret; -+ struct i2c_msg msg[] = { -+ { -+ .addr = addr, -+ .flags = 0, -+ .buf = ®, -+ .len = 1 -+ }, { -+ .addr = addr, -+ .flags = I2C_M_RD, -+ .buf = buf, -+ .len = len -+ } -+ }; -+ -+ ret = i2c_transfer(i2c_adap, msg, 2); -+ -+ if (ret != 2) { -+ dprintk("%s: error, Reg = 0x%02x, Status = %d\n", __func__, reg, ret); -+ return -1; -+ } -+ return 0; -+} -+ -+static int dvbsky_ci_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg, -+ u8 *buf, int len) -+{ -+ int ret; -+ u8 buffer[len + 1]; -+ -+ struct i2c_msg msg = { -+ .addr = addr, -+ .flags = 0, -+ .buf = &buffer[0], -+ .len = len + 1 -+ }; -+ -+ buffer[0] = reg; -+ memcpy(&buffer[1], buf, len); -+ -+ ret = i2c_transfer(i2c_adap, &msg, 1); -+ -+ if (ret != 1) { -+ dprintk("%s: error, Reg=[0x%02x], Status=%d\n", __func__, reg, ret); -+ return -1; -+ } -+ return 0; -+} -+ -+static int dvbsky_ci_op_cam(struct dvb_ca_en50221 *ci, int slot, -+ u8 flag, u8 read, int addr, u8 data) -+{ -+ struct dvb_usb_device *d = ci->data; -+ struct dvbsky_state *state = d_to_priv(d); -+ u8 store; -+ int ret; -+ u8 command[4], respond[2], command_size, respond_size; -+ -+ /*dprintk("%s()\n", __func__);*/ -+ if (0 != slot) -+ return -EINVAL; -+ -+ if (state->current_ci_flag != flag) { -+ ret = dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &store, 1); -+ if (ret != 0) -+ return ret; -+ -+ store &= ~0x0c; -+ store |= flag; -+ -+ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &store, 1); -+ if (ret != 0) -+ return ret; -+ } -+ state->current_ci_flag = flag; -+ -+ command[1] = (u8)((addr >> 8) & 0xff); /*high part of address*/ -+ command[2] = (u8)(addr & 0xff); /*low part of address*/ -+ if (read) { -+ command[0] = 0x71; -+ command_size = 3; -+ respond_size = 2; -+ } else { -+ command[0] = 0x70; -+ command[3] = data; -+ command_size = 4; -+ respond_size = 1; -+ } -+ ret = dvb_usbv2_generic_rw(d, command, command_size, respond, respond_size); -+ -+ return (read) ? respond[1] : 0; -+} -+ -+static int dvbsky_ci_read_attribute_mem(struct dvb_ca_en50221 *ci, -+ int slot, int addr) -+{ -+ return dvbsky_ci_op_cam(ci, slot, 0, DVBSKY_CI_RD, addr, 0); -+} -+ -+static int dvbsky_ci_write_attribute_mem(struct dvb_ca_en50221 *ci, -+ int slot, int addr, u8 data) -+{ -+ return dvbsky_ci_op_cam(ci, slot, 0, 0, addr, data); -+} -+ -+static int dvbsky_ci_read_cam_ctl(struct dvb_ca_en50221 *ci, int slot, u8 addr) -+{ -+ return dvbsky_ci_op_cam(ci, slot, DVBSKY_CI_CTL, DVBSKY_CI_RD, addr, 0); -+} -+ -+static int dvbsky_ci_write_cam_ctl(struct dvb_ca_en50221 *ci, int slot, -+ u8 addr, u8 data) -+{ -+ return dvbsky_ci_op_cam(ci, slot, DVBSKY_CI_CTL, 0, addr, data); -+} -+ -+static int dvbsky_ci_slot_reset(struct dvb_ca_en50221 *ci, int slot) -+{ -+ struct dvb_usb_device *d = ci->data; -+ struct dvbsky_state *state = d_to_priv(d); -+ u8 buf = 0x80; -+ int ret; -+ dprintk("%s() slot=%d\n", __func__, slot); -+ -+ if (0 != slot) -+ return -EINVAL; -+ -+ udelay(500); -+ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &buf, 1); -+ -+ if (ret != 0) -+ return ret; -+ -+ udelay(500); -+ -+ buf = 0x00; -+ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &buf, 1); -+ msleep(1000); -+ dprintk("%s() slot=%d complete\n", __func__, slot); -+ return 0; -+ -+} -+ -+static int dvbsky_ci_slot_shutdown(struct dvb_ca_en50221 *ci, int slot) -+{ -+ /* not implemented */ -+ dprintk("%s()\n", __func__); -+ return 0; -+} -+ -+static int dvbsky_ci_slot_ts_enable(struct dvb_ca_en50221 *ci, int slot) -+{ -+ struct dvb_usb_device *d = ci->data; -+ struct dvbsky_state *state = d_to_priv(d); -+ u8 buf; -+ int ret; -+ -+ dprintk("%s()\n", __func__); -+ if (0 != slot) -+ return -EINVAL; -+ -+ dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &buf, 1); -+ buf |= 0x60; -+ -+ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &buf, 1); -+ return ret; -+} -+ -+static int dvbsky_ci_poll_slot_status(struct dvb_ca_en50221 *ci, int slot, -+ int open) -+{ -+ struct dvb_usb_device *d = ci->data; -+ struct dvbsky_state *state = d_to_priv(d); -+ int ret = 0; -+ u8 buf = 0; -+ /*dprintk("%s()\n", __func__);*/ -+ -+ /* CAM module INSERT/REMOVE processing. slow operation because of i2c -+ * transfers */ -+ if (time_after(jiffies, state->next_status_checked_time)) { -+ ret = dvbsky_ci_read_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &buf, 1); -+ -+ /*dprintk("%s() status=%x\n", __func__, buf);*/ -+ -+ state->next_status_checked_time = jiffies -+ + msecs_to_jiffies(1000); -+ -+ if (ret != 0) -+ return 0; -+ -+ if (buf & 1) { -+ state->ci_status = DVB_CA_EN50221_POLL_CAM_PRESENT | -+ DVB_CA_EN50221_POLL_CAM_READY; -+ } -+ else -+ state->ci_status = 0; -+ } -+ /*dprintk("%s() ret=%x\n", __func__, state->ci_status);*/ -+ return state->ci_status; -+} -+ -+static int dvbsky_ci_init(struct dvb_usb_device *d) -+{ -+ struct dvbsky_state *state = d_to_priv(d); -+ int ret; -+ u8 cimax_init[34] = { -+ 0x00, /* module A control*/ -+ 0x00, /* auto select mask high A */ -+ 0x00, /* auto select mask low A */ -+ 0x00, /* auto select pattern high A */ -+ 0x00, /* auto select pattern low A */ -+ 0x44, /* memory access time A */ -+ 0x00, /* invert input A */ -+ 0x00, /* RFU */ -+ 0x00, /* RFU */ -+ 0x00, /* module B control*/ -+ 0x00, /* auto select mask high B */ -+ 0x00, /* auto select mask low B */ -+ 0x00, /* auto select pattern high B */ -+ 0x00, /* auto select pattern low B */ -+ 0x44, /* memory access time B */ -+ 0x00, /* invert input B */ -+ 0x00, /* RFU */ -+ 0x00, /* RFU */ -+ 0x00, /* auto select mask high Ext */ -+ 0x00, /* auto select mask low Ext */ -+ 0x00, /* auto select pattern high Ext */ -+ 0x00, /* auto select pattern low Ext */ -+ 0x00, /* RFU */ -+ 0x02, /* destination - module A */ -+ 0x01, /* power on (use it like store place) */ -+ 0x00, /* RFU */ -+ 0x00, /* int status read only */ -+ 0x00, /* Max: Disable the interrupt in USB solution.*/ -+ 0x05, /* EXTINT=active-high, INT=push-pull */ -+ 0x00, /* USCG1 */ -+ 0x04, /* ack active low */ -+ 0x00, /* LOCK = 0 */ -+ 0x22, /* serial mode, rising in, rising out, MSB first*/ -+ 0x00 /* synchronization */ -+ }; -+ dprintk("%s()\n", __func__); -+ state->current_ci_flag = 0xff; -+ state->ci_status = 0; -+ state->next_status_checked_time = jiffies + msecs_to_jiffies(1000); -+ state->ci_i2c_addr = 0x40; -+ -+ state->ci.owner = THIS_MODULE; -+ state->ci.read_attribute_mem = dvbsky_ci_read_attribute_mem; -+ state->ci.write_attribute_mem = dvbsky_ci_write_attribute_mem; -+ state->ci.read_cam_control = dvbsky_ci_read_cam_ctl; -+ state->ci.write_cam_control = dvbsky_ci_write_cam_ctl; -+ state->ci.slot_reset = dvbsky_ci_slot_reset; -+ state->ci.slot_shutdown = dvbsky_ci_slot_shutdown; -+ state->ci.slot_ts_enable = dvbsky_ci_slot_ts_enable; -+ state->ci.poll_slot_status = dvbsky_ci_poll_slot_status; -+ state->ci.data = d; -+ -+ ret = dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0, &cimax_init[0], 34); -+ /* lock registers */ -+ ret |= dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0x1f, &cimax_init[0x18], 1); -+ /* power on slots */ -+ ret |= dvbsky_ci_write_i2c(&d->i2c_adap, state->ci_i2c_addr, -+ 0x18, &cimax_init[0x18], 1); -+ if (0 != ret) -+ return ret; -+ -+ ret = dvb_ca_en50221_init(&d->adapter[0].dvb_adap, &state->ci, 0, 1); -+ if (ret) -+ return ret; -+ state->ci_attached = 1; -+ dprintk("%s() complete.\n", __func__); -+ return 0; -+} -+ -+static void dvbsky_ci_release(struct dvb_usb_device *d) -+{ -+ struct dvbsky_state *state = d_to_priv(d); -+ -+ /* detach CI */ -+ if (state->ci_attached) -+ dvb_ca_en50221_release(&state->ci); -+ -+ return; -+} -+ -+static int dvbsky_streaming_ctrl(struct dvb_frontend *fe, int onoff) -+{ -+ struct dvb_usb_device *d = fe_to_d(fe); -+ /*dprintk("%s() %d\n", __func__, onoff);*/ -+ return dvbsky_stream_ctrl(d, (onoff == 0) ? 0 : 1); -+} -+ -+/* GPIO */ -+static int dvbsky_gpio_ctrl(struct dvb_usb_device *d, u8 gport, u8 value) -+{ -+ u8 obuf[64], ibuf[64]; -+ obuf[0] = 0x0e; -+ obuf[1] = gport; -+ obuf[2] = value; -+ return dvb_usbv2_generic_rw(d, obuf, 3, ibuf, 1); -+} -+ -+/* I2C */ -+static int dvbsky_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], -+ int num) -+{ -+ struct dvb_usb_device *d = i2c_get_adapdata(adap); -+ int ret = 0; -+ u8 ibuf[64], obuf[64]; -+ -+ if (mutex_lock_interruptible(&d->i2c_mutex) < 0) -+ return -EAGAIN; -+ -+ if (num > 2) { -+ printk(KERN_ERR "dvbsky_usb: too many i2c messages[%d] than 2.", num); -+ ret = -EOPNOTSUPP; -+ goto i2c_error; -+ } -+ -+ if(num == 1) { -+ if (msg[0].len > 60) { -+ printk(KERN_ERR "dvbsky_usb: too many i2c bytes[%d] than 60.", msg[0].len); -+ ret = -EOPNOTSUPP; -+ goto i2c_error; -+ } -+ if (msg[0].flags & I2C_M_RD) { -+ /* single read */ -+ obuf[0] = 0x09; -+ obuf[1] = 0; -+ obuf[2] = msg[0].len; -+ obuf[3] = msg[0].addr; -+ ret = dvb_usbv2_generic_rw(d, obuf, 4, ibuf, msg[0].len + 1); -+ /*dprintk("%s(): read status = %d\n", __func__, ibuf[0]);*/ -+ if (!ret) -+ memcpy(msg[0].buf, &ibuf[1], msg[0].len); -+ } else { -+ /* write */ -+ obuf[0] = 0x08; -+ obuf[1] = msg[0].addr; -+ obuf[2] = msg[0].len; -+ memcpy(&obuf[3], msg[0].buf, msg[0].len); -+ ret = dvb_usbv2_generic_rw(d, obuf, msg[0].len + 3, ibuf, 1); -+ /*dprintk("%s(): write status = %d\n", __func__, ibuf[0]);*/ -+ } -+ } else { -+ if ((msg[0].len > 60) || (msg[1].len > 60)) { -+ printk(KERN_ERR "dvbsky_usb: too many i2c bytes[w-%d][r-%d] than 60.", msg[0].len, msg[1].len); -+ ret = -EOPNOTSUPP; -+ goto i2c_error; -+ } -+ /* write then read */ -+ obuf[0] = 0x09; -+ obuf[1] = msg[0].len; -+ obuf[2] = msg[1].len; -+ obuf[3] = msg[0].addr; -+ memcpy(&obuf[4], msg[0].buf, msg[0].len); -+ ret = dvb_usbv2_generic_rw(d, obuf, msg[0].len + 4, ibuf, msg[1].len + 1); -+ /*dprintk("%s(): write then read status = %d\n", __func__, ibuf[0]);*/ -+ if (!ret) -+ memcpy(msg[1].buf, &ibuf[1], msg[1].len); -+ } -+i2c_error: -+ mutex_unlock(&d->i2c_mutex); -+ return (ret) ? ret : num; -+} -+ -+static u32 dvbsky_i2c_func(struct i2c_adapter *adapter) -+{ -+ return I2C_FUNC_I2C; -+} -+ -+static struct i2c_algorithm dvbsky_i2c_algo = { -+ .master_xfer = dvbsky_i2c_xfer, -+ .functionality = dvbsky_i2c_func, -+}; -+ -+#if IS_ENABLED(CONFIG_RC_CORE) -+static int dvbsky_rc_query(struct dvb_usb_device *d) -+{ -+ u32 code = 0xffff; -+ u8 obuf[2], ibuf[2], toggle; -+ int ret; -+ obuf[0] = 0x10; -+ ret = dvb_usbv2_generic_rw(d, obuf, 1, ibuf, 2); -+ if(ret == 0) -+ code = (ibuf[0] << 8) | ibuf[1]; -+ -+ if (code != 0xffff) { -+ dprintk("rc code: %x", code); -+ toggle = (code & 0x800) ? 1 : 0; -+ code &= 0x3f; -+ rc_keydown(d->rc_dev, code, toggle); -+ } -+ return 0; -+} -+ -+static int dvbsky_get_rc_config(struct dvb_usb_device *d, struct dvb_usb_rc *rc) -+{ -+ rc->allowed_protos = RC_BIT_RC5; -+ rc->query = dvbsky_rc_query; -+ rc->interval = 300; -+ return 0; -+} -+#else -+ #define dvbsky_get_rc_config NULL -+#endif -+ -+static int dvbsky_sync_ctrl(struct dvb_frontend *fe) -+{ -+ struct dvb_usb_device *d = fe_to_d(fe); -+ return dvbsky_stream_ctrl(d, 1); -+} -+ -+static int dvbsky_usb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) -+{ -+ struct dvb_usb_device *d = fe_to_d(fe); -+ u8 value; -+ -+ if (voltage == SEC_VOLTAGE_OFF) -+ value = 0; -+ else -+ value = 1; -+ return dvbsky_gpio_ctrl(d, 0x80, value); -+} -+ -+static int dvbsky_read_mac_addr(struct dvb_usb_adapter *adap, u8 mac[6]) -+{ -+ struct dvb_usb_device *d = adap_to_d(adap); -+ u8 obuf[] = { 0x1e, 0x00 }; -+ u8 ibuf[6] = { 0 }; -+ struct i2c_msg msg[] = { -+ { -+ .addr = 0x51, -+ .flags = 0, -+ .buf = obuf, -+ .len = 2, -+ }, { -+ .addr = 0x51, -+ .flags = I2C_M_RD, -+ .buf = ibuf, -+ .len = 6, -+ -+ } -+ }; -+ -+ if (i2c_transfer(&d->i2c_adap, msg, 2) == 2) -+ memcpy(mac, ibuf, 6); -+ -+ printk(KERN_INFO "dvbsky_usb MAC address=%pM\n", mac); -+ -+ return 0; -+} -+ -+static struct m88ds3103_config dvbsky_usb_ds3103_config = { -+ .demod_address = 0x68, -+ .ci_mode = 1, -+ .pin_ctrl = 0x83, -+ .ts_mode = 0, -+ .start_ctrl = dvbsky_sync_ctrl, -+ .set_voltage = dvbsky_usb_set_voltage, -+}; -+ -+static int dvbsky_s960_attach(struct dvb_usb_adapter *adap) -+{ -+ struct dvbsky_state *state = adap_to_priv(adap); -+ struct dvb_usb_device *d = adap_to_d(adap); -+ int ret = 0; -+ -+ dprintk("%s()\n", __func__); -+ -+ dvbsky_gpio_ctrl(d, 0x04, 1); -+ -+ dvbsky_gpio_ctrl(d, 0x83, 0); -+ msleep(50); -+ dvbsky_gpio_ctrl(d, 0x83, 1); -+ msleep(20); -+ -+ adap->fe[0] = dvb_attach(m88ds3103_attach, -+ &dvbsky_usb_ds3103_config, -+ &d->i2c_adap); -+ if (!adap->fe[0]) { -+ printk(KERN_ERR "dvbsky_s960_attach fail."); -+ ret = -ENODEV; -+ } -+ -+ state->has_ci = 0; -+ -+ return ret; -+} -+ -+static int dvbsky_identify_state(struct dvb_usb_device *d, const char **name) -+{ -+ return WARM; -+} -+ -+static int dvbsky_init(struct dvb_usb_device *d) -+{ -+ struct dvbsky_state *state = d_to_priv(d); -+ int ret; -+ -+ /* use default interface */ -+ ret = usb_set_interface(d->udev, 0, 0); -+ if (ret) -+ return ret; -+ -+ mutex_init(&state->stream_mutex); -+ -+ /* attach CI */ -+ if (state->has_ci) { -+ dvbsky_gpio_ctrl(d, 0xc0, 1); -+ msleep(100); -+ dvbsky_gpio_ctrl(d, 0xc0, 0); -+ msleep(50); -+ state->ci_attached = 0; -+ ret = dvbsky_ci_init(d); -+ if (ret) -+ return ret; -+ } -+ return 0; -+} -+ -+static void dvbsky_exit(struct dvb_usb_device *d) -+{ -+ return dvbsky_ci_release(d); -+} -+ -+/* DVB USB Driver stuff */ -+static struct dvb_usb_device_properties dvbsky_s960_props = { -+ .driver_name = KBUILD_MODNAME, -+ .owner = THIS_MODULE, -+ .adapter_nr = adapter_nr, -+ .size_of_priv = sizeof(struct dvbsky_state), -+ -+ .generic_bulk_ctrl_endpoint = 0x01, -+ .generic_bulk_ctrl_endpoint_response = 0x81, -+ -+ .i2c_algo = &dvbsky_i2c_algo, -+ .frontend_attach = dvbsky_s960_attach, -+ .init = dvbsky_init, -+ .get_rc_config = dvbsky_get_rc_config, -+ .streaming_ctrl = dvbsky_streaming_ctrl, -+ .identify_state = dvbsky_identify_state, -+ .exit = dvbsky_exit, -+ .read_mac_address = dvbsky_read_mac_addr, -+ -+ .num_adapters = 1, -+ .adapter = { -+ { -+ .stream = DVB_USB_STREAM_BULK(0x82, 8, 4096), -+ } -+ } -+}; -+ -+static const struct usb_device_id dvbsky_id_table[] = { -+ { DVB_USB_DEVICE(0x0572, 0x6831, -+ &dvbsky_s960_props, "DVBSky S960/S860", RC_MAP_DVBSKY) }, -+ { } -+}; -+MODULE_DEVICE_TABLE(usb, dvbsky_id_table); -+ -+static struct usb_driver dvbsky_usb_driver = { -+ .name = KBUILD_MODNAME, -+ .id_table = dvbsky_id_table, -+ .probe = dvb_usbv2_probe, -+ .disconnect = dvb_usbv2_disconnect, -+ .suspend = dvb_usbv2_suspend, -+ .resume = dvb_usbv2_resume, -+ .reset_resume = dvb_usbv2_reset_resume, -+ .no_dynamic_id = 1, -+ .soft_unbind = 1, -+}; -+ -+module_usb_driver(dvbsky_usb_driver); -+ -+MODULE_AUTHOR("Max nibble nibble.max@gmail.com"); -+MODULE_DESCRIPTION("Driver for DVBSky USB2.0"); -+MODULE_LICENSE("GPL"); -diff -urN a/drivers/media/usb/dvb-usb-v2/Kconfig b/drivers/media/usb/dvb-usb-v2/Kconfig ---- a/drivers/media/usb/dvb-usb-v2/Kconfig 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/usb/dvb-usb-v2/Kconfig 2013-05-03 17:45:35.000000000 +0800 -@@ -149,3 +149,10 @@ - help - Say Y here to support the Realtek RTL28xxU DVB USB receiver. - -+config DVB_USB_DVBSKY -+ tristate "DVBSky USB2.0 support" -+ depends on DVB_USB_V2 -+ select DVB_M88DS3103 if MEDIA_SUBDRV_AUTOSELECT -+ help -+ Say Y here to support the USB receivers from DVBSky. -+ -diff -urN a/drivers/media/usb/dvb-usb-v2/Makefile b/drivers/media/usb/dvb-usb-v2/Makefile ---- a/drivers/media/usb/dvb-usb-v2/Makefile 2013-04-29 08:36:01.000000000 +0800 -+++ b/drivers/media/usb/dvb-usb-v2/Makefile 2013-02-17 12:03:00.000000000 +0800 -@@ -43,6 +43,9 @@ - dvb-usb-rtl28xxu-objs := rtl28xxu.o - obj-$(CONFIG_DVB_USB_RTL28XXU) += dvb-usb-rtl28xxu.o - -+dvb-usb-dvbsky-objs := dvbsky.o -+obj-$(CONFIG_DVB_USB_DVBSKY) += dvb-usb-dvbsky.o -+ - ccflags-y += -I$(srctree)/drivers/media/dvb-core - ccflags-y += -I$(srctree)/drivers/media/dvb-frontends - ccflags-y += -I$(srctree)/drivers/media/tuners -diff -urN a/include/media/rc-map.h b/include/media/rc-map.h ---- a/include/media/rc-map.h 2013-04-29 08:36:01.000000000 +0800 -+++ b/include/media/rc-map.h 2013-05-03 17:02:46.000000000 +0800 -@@ -118,6 +118,7 @@ - #define RC_MAP_DM1105_NEC "rc-dm1105-nec" - #define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro" - #define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t" -+#define RC_MAP_DVBSKY "rc-dvbsky" - #define RC_MAP_EMPTY "rc-empty" - #define RC_MAP_EM_TERRATEC "rc-em-terratec" - #define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2"
hooks/post-receive -- IPFire 2.x development tree
-
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