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- Log ----------------------------------------------------------------- commit b1c65a1e0113892e205407a1dce927613582b540 Author: Arne Fitzenreiter arne_f@ipfire.org Date: Wed May 19 16:21:50 2010 +0200

Cleanup: removed rootfiles unused rootfiles.

commit d1c22409c54862129ddd7c8e78288ad6699e8f80 Author: Arne Fitzenreiter arne_f@ipfire.org Date: Wed May 19 15:43:04 2010 +0200

Cleanup: removed unused source files.

commit 72d02bbfad6464c97b7271fb4ee3b78f4c9168b9 Author: Arne Fitzenreiter arne_f@ipfire.org Date: Wed May 19 15:41:06 2010 +0200

Cleanup: removed unused lfs files.

-----------------------------------------------------------------------

Summary of changes: config/rootfiles/packages/cryptsetup-disabled | 10 - config/rootfiles/packages/x11libs-disabled | 2827 -------------------- config/rootfiles/packages/xen-disabled | 667 ----- lfs/atl1c | 61 - lfs/atl2 | 86 - lfs/compat-wireless | 108 - lfs/cryptsetup | 85 - lfs/e1000e | 87 - lfs/et131x | 61 - lfs/faad | 84 - lfs/hso | 87 - lfs/mISDN | 90 - lfs/openswan | 122 - lfs/r8101 | 61 - lfs/r8168 | 85 - lfs/r8169 | 89 - lfs/x11libs | 97 - lfs/xen | 95 - src/atl1c/Makefile | 13 - src/atl1c/atl1c.h | 605 ----- src/atl1c/atl1c_ethtool.c | 319 --- src/atl1c/atl1c_hw.c | 527 ---- src/atl1c/atl1c_hw.h | 859 ------ src/atl1c/atl1c_main.c | 2801 -------------------- src/et131x/Kconfig | 18 - src/et131x/Makefile | 25 - src/et131x/README | 25 - src/et131x/et1310_address_map.h | 2399 ----------------- src/et131x/et1310_eeprom.c | 480 ---- src/et131x/et1310_eeprom.h | 89 - src/et131x/et1310_jagcore.c | 220 -- src/et131x/et1310_jagcore.h | 112 - src/et131x/et1310_mac.c | 792 ------ src/et131x/et1310_mac.h | 93 - src/et131x/et1310_phy.c | 1281 --------- src/et131x/et1310_phy.h | 910 ------- src/et131x/et1310_pm.c | 207 -- src/et131x/et1310_pm.h | 125 - src/et131x/et1310_rx.c | 1391 ---------- src/et131x/et1310_rx.h | 373 --- src/et131x/et1310_tx.c | 1525 ----------- src/et131x/et1310_tx.h | 242 -- src/et131x/et131x_adapter.h | 347 --- src/et131x/et131x_config.c | 325 --- src/et131x/et131x_config.h | 67 - src/et131x/et131x_debug.c | 218 -- src/et131x/et131x_debug.h | 201 -- src/et131x/et131x_defs.h | 128 - src/et131x/et131x_initpci.c | 1046 -------- src/et131x/et131x_initpci.h | 73 - src/et131x/et131x_isr.c | 488 ---- src/et131x/et131x_isr.h | 65 - src/et131x/et131x_netdev.c | 856 ------ src/et131x/et131x_netdev.h | 64 - src/et131x/et131x_version.h | 81 - src/r8101/Makefile | 12 - src/r8101/r8101.c | 3464 ------------------------- 57 files changed, 0 insertions(+), 27668 deletions(-) delete mode 100644 config/rootfiles/packages/cryptsetup-disabled delete mode 100644 config/rootfiles/packages/x11libs-disabled delete mode 100644 config/rootfiles/packages/xen-disabled delete mode 100644 lfs/atl1c delete mode 100644 lfs/atl2 delete mode 100644 lfs/compat-wireless delete mode 100644 lfs/cryptsetup delete mode 100644 lfs/e1000e delete mode 100644 lfs/et131x delete mode 100644 lfs/faad delete mode 100644 lfs/hso delete mode 100644 lfs/mISDN delete mode 100644 lfs/openswan delete mode 100644 lfs/r8101 delete mode 100644 lfs/r8168 delete mode 100644 lfs/r8169 delete mode 100644 lfs/x11libs delete mode 100644 lfs/xen delete mode 100644 src/atl1c/Makefile delete mode 100644 src/atl1c/atl1c.h delete mode 100644 src/atl1c/atl1c_ethtool.c delete mode 100644 src/atl1c/atl1c_hw.c delete mode 100644 src/atl1c/atl1c_hw.h delete mode 100644 src/atl1c/atl1c_main.c delete mode 100644 src/et131x/Kconfig delete mode 100644 src/et131x/Makefile delete mode 100644 src/et131x/README delete mode 100644 src/et131x/et1310_address_map.h delete mode 100644 src/et131x/et1310_eeprom.c delete mode 100644 src/et131x/et1310_eeprom.h delete mode 100644 src/et131x/et1310_jagcore.c delete mode 100644 src/et131x/et1310_jagcore.h delete mode 100644 src/et131x/et1310_mac.c delete mode 100644 src/et131x/et1310_mac.h delete mode 100644 src/et131x/et1310_phy.c delete mode 100644 src/et131x/et1310_phy.h delete mode 100644 src/et131x/et1310_pm.c delete mode 100644 src/et131x/et1310_pm.h delete mode 100644 src/et131x/et1310_rx.c delete mode 100644 src/et131x/et1310_rx.h delete mode 100644 src/et131x/et1310_tx.c delete mode 100644 src/et131x/et1310_tx.h delete mode 100644 src/et131x/et131x_adapter.h delete mode 100644 src/et131x/et131x_config.c delete mode 100644 src/et131x/et131x_config.h delete mode 100644 src/et131x/et131x_debug.c delete mode 100644 src/et131x/et131x_debug.h delete mode 100644 src/et131x/et131x_defs.h delete mode 100644 src/et131x/et131x_initpci.c delete mode 100644 src/et131x/et131x_initpci.h delete mode 100644 src/et131x/et131x_isr.c delete mode 100644 src/et131x/et131x_isr.h delete mode 100644 src/et131x/et131x_netdev.c delete mode 100644 src/et131x/et131x_netdev.h delete mode 100644 src/et131x/et131x_version.h delete mode 100644 src/r8101/Makefile delete mode 100644 src/r8101/r8101.c

Difference in files: diff --git a/config/rootfiles/packages/cryptsetup-disabled b/config/rootfiles/packages/cryptsetup-disabled deleted file mode 100644 index 65d1ed1..0000000 --- a/config/rootfiles/packages/cryptsetup-disabled +++ /dev/null @@ -1,10 +0,0 @@ -usr/include/libcryptsetup.h -usr/lib/cryptsetup -usr/lib/libcryptsetup.la -usr/lib/libcryptsetup.so -usr/lib/libcryptsetup.so.0 -usr/lib/libcryptsetup.so.0.0.0 -usr/sbin/cryptsetup -usr/share/locale/de/LC_MESSAGES/cryptsetup.mo -#usr/share/man/man8/cryptsetup.8 -#usr/share/locale/sv/LC_MESSAGES/cryptsetup.mo diff --git a/config/rootfiles/packages/x11libs-disabled b/config/rootfiles/packages/x11libs-disabled deleted file mode 100644 index 341f263..0000000 --- a/config/rootfiles/packages/x11libs-disabled +++ /dev/null @@ -1,2827 +0,0 @@ -#doc -#doc/libxcb-1.1 -#doc/libxcb-1.1/tutorial -#doc/libxcb-1.1/tutorial/index.html -#doc/libxcb-1.1/tutorial/xcb.css -#usr/bin/ar86 -#usr/bin/as86 -#usr/bin/bcc -#usr/bin/ccmakedep -#usr/bin/cleanlinks -#usr/bin/cxpm -#usr/bin/elksemu -#usr/bin/gccmakedep -#usr/bin/gperf -#usr/bin/imake -#usr/bin/ld86 -#usr/bin/lndir -#usr/bin/makedepend -#usr/bin/makeg -#usr/bin/makestrs -#usr/bin/mergelib -#usr/bin/mkdirhier -#usr/bin/mkhtmlindex -#usr/bin/nm86 -#usr/bin/objdump86 -#usr/bin/revpath -#usr/bin/size86 -#usr/bin/sxpm -#usr/bin/xft-config -#usr/bin/xmkmf -#usr/include/GL -#usr/include/GL/glxint.h -#usr/include/GL/glxmd.h -#usr/include/GL/glxproto.h -#usr/include/GL/glxtokens.h -#usr/include/GL/internal -#usr/include/GL/internal/glcore.h -#usr/include/X11 -#usr/include/X11/CallbackI.h -#usr/include/X11/Composite.h -#usr/include/X11/CompositeP.h -#usr/include/X11/ConstrainP.h -#usr/include/X11/Constraint.h -#usr/include/X11/ConvertI.h -#usr/include/X11/Core.h -#usr/include/X11/CoreP.h -#usr/include/X11/CreateI.h -#usr/include/X11/DECkeysym.h -#usr/include/X11/EventI.h -#usr/include/X11/HPkeysym.h -#usr/include/X11/HookObjI.h -#usr/include/X11/ICE -#usr/include/X11/ICE/ICE.h -#usr/include/X11/ICE/ICEconn.h -#usr/include/X11/ICE/ICElib.h -#usr/include/X11/ICE/ICEmsg.h -#usr/include/X11/ICE/ICEproto.h -#usr/include/X11/ICE/ICEutil.h -#usr/include/X11/ImUtil.h -#usr/include/X11/InitialI.h -#usr/include/X11/Intrinsic.h -#usr/include/X11/IntrinsicI.h -#usr/include/X11/IntrinsicP.h -#usr/include/X11/Object.h -#usr/include/X11/ObjectP.h -#usr/include/X11/PassivGraI.h -#usr/include/X11/RectObj.h -#usr/include/X11/RectObjP.h -#usr/include/X11/ResConfigP.h -#usr/include/X11/ResourceI.h -#usr/include/X11/SM -#usr/include/X11/SM/SM.h -#usr/include/X11/SM/SMlib.h -#usr/include/X11/SM/SMproto.h -#usr/include/X11/SelectionI.h -#usr/include/X11/Shell.h -#usr/include/X11/ShellI.h -#usr/include/X11/ShellP.h -#usr/include/X11/StringDefs.h -#usr/include/X11/Sunkeysym.h -#usr/include/X11/ThreadsI.h -#usr/include/X11/TranslateI.h -#usr/include/X11/VarargsI.h -#usr/include/X11/Vendor.h -#usr/include/X11/VendorP.h -#usr/include/X11/X.h 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-#usr/include/X11/extensions/shapestr.h -#usr/include/X11/extensions/shmstr.h -#usr/include/X11/extensions/sync.h -#usr/include/X11/extensions/syncstr.h -#usr/include/X11/extensions/vldXvMC.h -#usr/include/X11/extensions/windowswm.h -#usr/include/X11/extensions/windowswmstr.h -#usr/include/X11/extensions/xcmiscstr.h -#usr/include/X11/extensions/xf86bigfont.h -#usr/include/X11/extensions/xf86bigfstr.h -#usr/include/X11/extensions/xf86dga.h -#usr/include/X11/extensions/xf86dga1.h -#usr/include/X11/extensions/xf86dga1str.h -#usr/include/X11/extensions/xf86dgastr.h -#usr/include/X11/extensions/xf86misc.h -#usr/include/X11/extensions/xf86mscstr.h -#usr/include/X11/extensions/xf86vmode.h -#usr/include/X11/extensions/xf86vmstr.h -#usr/include/X11/extensions/xfixesproto.h -#usr/include/X11/extensions/xfixeswire.h -#usr/include/X11/extensions/xtestext1.h -#usr/include/X11/extensions/xteststr.h -#usr/include/X11/extensions/xtrapbits.h -#usr/include/X11/extensions/xtrapddmi.h -#usr/include/X11/extensions/xtrapdi.h -#usr/include/X11/extensions/xtrapemacros.h -#usr/include/X11/extensions/xtraplib.h -#usr/include/X11/extensions/xtraplibp.h -#usr/include/X11/extensions/xtrapproto.h -#usr/include/X11/fonts -#usr/include/X11/fonts/FS.h -#usr/include/X11/fonts/FSlib.h -#usr/include/X11/fonts/FSproto.h -#usr/include/X11/fonts/bdfint.h -#usr/include/X11/fonts/bitmap.h -#usr/include/X11/fonts/bufio.h -#usr/include/X11/fonts/fntfil.h -#usr/include/X11/fonts/fntfilio.h -#usr/include/X11/fonts/fntfilst.h -#usr/include/X11/fonts/font.h -#usr/include/X11/fonts/fontconf.h -#usr/include/X11/fonts/fontenc.h -#usr/include/X11/fonts/fontencc.h -#usr/include/X11/fonts/fontmisc.h -#usr/include/X11/fonts/fontmod.h -#usr/include/X11/fonts/fontproto.h -#usr/include/X11/fonts/fontshow.h -#usr/include/X11/fonts/fontstruct.h -#usr/include/X11/fonts/fontutil.h -#usr/include/X11/fonts/fontxlfd.h -#usr/include/X11/fonts/fsmasks.h -#usr/include/X11/fonts/ft.h -#usr/include/X11/fonts/ftfuncs.h -#usr/include/X11/fonts/pcf.h -#usr/include/X11/keysym.h -#usr/include/X11/keysymdef.h -#usr/include/X11/xpm.h -#usr/include/pciaccess.h -#usr/include/xcb -#usr/include/xcb/bigreq.h -#usr/include/xcb/composite.h -#usr/include/xcb/damage.h -#usr/include/xcb/dpms.h -#usr/include/xcb/glx.h -#usr/include/xcb/randr.h -#usr/include/xcb/record.h -#usr/include/xcb/render.h -#usr/include/xcb/res.h -#usr/include/xcb/screensaver.h -#usr/include/xcb/shape.h -#usr/include/xcb/shm.h -#usr/include/xcb/sync.h -#usr/include/xcb/xc_misc.h -#usr/include/xcb/xcb.h -#usr/include/xcb/xcb_atom.h -#usr/include/xcb/xcb_aux.h -#usr/include/xcb/xcb_bitops.h -#usr/include/xcb/xcb_event.h -#usr/include/xcb/xcb_icccm.h -#usr/include/xcb/xcb_image.h -#usr/include/xcb/xcb_keysyms.h -#usr/include/xcb/xcb_pixel.h -#usr/include/xcb/xcb_property.h -#usr/include/xcb/xcb_renderutil.h -#usr/include/xcb/xcb_reply.h -#usr/include/xcb/xcb_wm.h -#usr/include/xcb/xcbext.h -#usr/include/xcb/xcbxlib.h -#usr/include/xcb/xevie.h -#usr/include/xcb/xf86dri.h -#usr/include/xcb/xfixes.h -#usr/include/xcb/xinerama.h -#usr/include/xcb/xprint.h -#usr/include/xcb/xproto.h -#usr/include/xcb/xtest.h -#usr/include/xcb/xv.h -#usr/include/xcb/xvmc.h -usr/lib/X11 -usr/lib/X11/Xcms.txt -usr/lib/X11/config -usr/lib/X11/config/Amoeba.cf -usr/lib/X11/config/DGUX.cf -usr/lib/X11/config/DragonFly.cf -usr/lib/X11/config/FreeBSD.cf -usr/lib/X11/config/Imake.cf -usr/lib/X11/config/Imake.rules -usr/lib/X11/config/Imake.tmpl -usr/lib/X11/config/Library.tmpl -usr/lib/X11/config/Mips.cf -usr/lib/X11/config/Motif.rules -usr/lib/X11/config/Motif.tmpl -usr/lib/X11/config/NetBSD.cf -usr/lib/X11/config/Oki.cf -usr/lib/X11/config/OpenBSD.cf -usr/lib/X11/config/OpenBSDLib.rules -usr/lib/X11/config/OpenBSDLib.tmpl -usr/lib/X11/config/QNX4.cf -usr/lib/X11/config/QNX4.rules -usr/lib/X11/config/Server.tmpl -usr/lib/X11/config/ServerLib.tmpl -usr/lib/X11/config/Threads.tmpl -usr/lib/X11/config/Win32.cf -usr/lib/X11/config/Win32.rules -usr/lib/X11/config/WinLib.tmpl -usr/lib/X11/config/X11.rules -usr/lib/X11/config/X11.tmpl -usr/lib/X11/config/apollo.cf -usr/lib/X11/config/bsd.cf -usr/lib/X11/config/bsdLib.rules -usr/lib/X11/config/bsdLib.tmpl -usr/lib/X11/config/bsdi.cf -usr/lib/X11/config/bsdiLib.rules -usr/lib/X11/config/bsdiLib.tmpl -usr/lib/X11/config/cde.rules -usr/lib/X11/config/cde.tmpl -usr/lib/X11/config/convex.cf -usr/lib/X11/config/cray.cf -usr/lib/X11/config/cross.def -usr/lib/X11/config/cross.rules -usr/lib/X11/config/cygwin.cf -usr/lib/X11/config/cygwin.rules -usr/lib/X11/config/cygwin.tmpl -usr/lib/X11/config/darwin.cf -usr/lib/X11/config/darwinLib.rules -usr/lib/X11/config/darwinLib.tmpl -usr/lib/X11/config/date.def -usr/lib/X11/config/dmx.cf -usr/lib/X11/config/fujitsu.cf -usr/lib/X11/config/generic.cf -usr/lib/X11/config/gnu.cf -usr/lib/X11/config/gnuLib.rules -usr/lib/X11/config/gnuLib.tmpl -usr/lib/X11/config/host.def -usr/lib/X11/config/hp.cf -usr/lib/X11/config/hpLib.rules -usr/lib/X11/config/hpLib.tmpl -usr/lib/X11/config/ibm.cf -usr/lib/X11/config/ibmLib.rules -usr/lib/X11/config/ibmLib.tmpl -usr/lib/X11/config/isc.cf -usr/lib/X11/config/linux.cf -usr/lib/X11/config/lnxLib.rules -usr/lib/X11/config/lnxLib.tmpl -usr/lib/X11/config/lnxdoc.rules -usr/lib/X11/config/lnxdoc.tmpl -usr/lib/X11/config/luna.cf -usr/lib/X11/config/lynx.cf -usr/lib/X11/config/macII.cf -usr/lib/X11/config/mach.cf -usr/lib/X11/config/mingw.cf -usr/lib/X11/config/mingw.rules -usr/lib/X11/config/mingw.tmpl -usr/lib/X11/config/minix.cf -usr/lib/X11/config/moto.cf -usr/lib/X11/config/ncr.cf -usr/lib/X11/config/nec.cf -usr/lib/X11/config/necLib.rules -usr/lib/X11/config/necLib.tmpl -usr/lib/X11/config/noop.rules -usr/lib/X11/config/nto.cf -usr/lib/X11/config/nto.rules -usr/lib/X11/config/oldlib.rules -usr/lib/X11/config/os2.cf -usr/lib/X11/config/os2.rules -usr/lib/X11/config/os2Lib.rules -usr/lib/X11/config/os2Lib.tmpl -usr/lib/X11/config/osf1.cf -usr/lib/X11/config/osfLib.rules -usr/lib/X11/config/osfLib.tmpl -usr/lib/X11/config/pegasus.cf -usr/lib/X11/config/sco.cf -usr/lib/X11/config/sco5.cf -usr/lib/X11/config/scoLib.rules -usr/lib/X11/config/sequent.cf -usr/lib/X11/config/sequentLib.rules -usr/lib/X11/config/sgi.cf -usr/lib/X11/config/sgiLib.rules -usr/lib/X11/config/sgiLib.tmpl -usr/lib/X11/config/site.def -usr/lib/X11/config/sony.cf -usr/lib/X11/config/sun.cf -usr/lib/X11/config/sunLib.rules -usr/lib/X11/config/sunLib.tmpl -usr/lib/X11/config/sv3Lib.rules -usr/lib/X11/config/sv3Lib.tmpl -usr/lib/X11/config/sv4Lib.rules -usr/lib/X11/config/sv4Lib.tmpl -usr/lib/X11/config/svr3.cf -usr/lib/X11/config/svr4.cf -usr/lib/X11/config/ultrix.cf -usr/lib/X11/config/usl.cf -usr/lib/X11/config/version.def -usr/lib/X11/config/x386.cf -usr/lib/X11/config/xf86.rules -usr/lib/X11/config/xf86.tmpl -usr/lib/X11/config/xf86site.def -usr/lib/X11/config/xfree86.cf -usr/lib/X11/config/xorg.cf -usr/lib/X11/config/xorg.tmpl -usr/lib/X11/config/xorgsite.def -usr/lib/X11/config/xorgversion.def -#usr/lib/bcc -#usr/lib/bcc/as86_encap -#usr/lib/bcc/bcc-cc1 -#usr/lib/bcc/bcc-cpp -#usr/lib/bcc/copt -#usr/lib/bcc/crt0.o -#usr/lib/bcc/i386 -#usr/lib/bcc/i386/crt0.o -#usr/lib/bcc/i386/libc.a -#usr/lib/bcc/i386/rules.386 -#usr/lib/bcc/i386/rules.end -#usr/lib/bcc/i386/rules.start -#usr/lib/bcc/include -#usr/lib/bcc/include/a.out.h -#usr/lib/bcc/include/ar.h -#usr/lib/bcc/include/arch -#usr/lib/bcc/include/arch/errno.h -#usr/lib/bcc/include/arch/ioctl.h -#usr/lib/bcc/include/arch/stat.h -#usr/lib/bcc/include/arch/types.h -#usr/lib/bcc/include/asm -#usr/lib/bcc/include/asm/limits.h -#usr/lib/bcc/include/asm/types.h -#usr/lib/bcc/include/assert.h -#usr/lib/bcc/include/bios.h -#usr/lib/bcc/include/bsd -#usr/lib/bcc/include/bsd/bsd.h -#usr/lib/bcc/include/bsd/errno.h -#usr/lib/bcc/include/bsd/sgtty.h -#usr/lib/bcc/include/bsd/signal.h -#usr/lib/bcc/include/bsd/stdlib.h -#usr/lib/bcc/include/bsd/sys -#usr/lib/bcc/include/bsd/sys/ttychars.h -#usr/lib/bcc/include/bsd/tzfile.h -#usr/lib/bcc/include/bsd/unistd.h -#usr/lib/bcc/include/conio.h -#usr/lib/bcc/include/ctype.h -#usr/lib/bcc/include/dirent.h -#usr/lib/bcc/include/dos.h -#usr/lib/bcc/include/errno.h -#usr/lib/bcc/include/fcntl.h -#usr/lib/bcc/include/features.h -#usr/lib/bcc/include/generic -#usr/lib/bcc/include/generic/errno.h -#usr/lib/bcc/include/generic/fcntl.h -#usr/lib/bcc/include/generic/types.h -#usr/lib/bcc/include/getopt.h -#usr/lib/bcc/include/grp.h -#usr/lib/bcc/include/limits.h -#usr/lib/bcc/include/linux -#usr/lib/bcc/include/linux/errno.h -#usr/lib/bcc/include/linux/fcntl.h -#usr/lib/bcc/include/linux/ioctl.h -#usr/lib/bcc/include/linux/mman.h -#usr/lib/bcc/include/linux/resource.h -#usr/lib/bcc/include/linux/stat.h -#usr/lib/bcc/include/linux/termios.h -#usr/lib/bcc/include/linux/types.h -#usr/lib/bcc/include/linux/utsname.h -#usr/lib/bcc/include/linux/vm86.h -#usr/lib/bcc/include/linuxmt -#usr/lib/bcc/include/linuxmt/errno.h -#usr/lib/bcc/include/linuxmt/fcntl.h -#usr/lib/bcc/include/linuxmt/ioctl.h -#usr/lib/bcc/include/linuxmt/resource.h -#usr/lib/bcc/include/linuxmt/stat.h -#usr/lib/bcc/include/linuxmt/termios.h -#usr/lib/bcc/include/linuxmt/types.h -#usr/lib/bcc/include/malloc.h -#usr/lib/bcc/include/math.h -#usr/lib/bcc/include/memory.h -#usr/lib/bcc/include/msdos -#usr/lib/bcc/include/msdos/errno.h -#usr/lib/bcc/include/msdos/fcntl.h -#usr/lib/bcc/include/msdos/types.h -#usr/lib/bcc/include/paths.h -#usr/lib/bcc/include/pwd.h -#usr/lib/bcc/include/regexp.h -#usr/lib/bcc/include/regmagic.h -#usr/lib/bcc/include/search.h -#usr/lib/bcc/include/setjmp.h -#usr/lib/bcc/include/signal.h -#usr/lib/bcc/include/stdarg.h -#usr/lib/bcc/include/stddef.h -#usr/lib/bcc/include/stdio.h -#usr/lib/bcc/include/stdlib.h -#usr/lib/bcc/include/string.h -#usr/lib/bcc/include/strings.h -#usr/lib/bcc/include/sys -#usr/lib/bcc/include/sys/cdefs.h -#usr/lib/bcc/include/sys/errno.h -#usr/lib/bcc/include/sys/fcntl.h -#usr/lib/bcc/include/sys/file.h -#usr/lib/bcc/include/sys/ioctl.h -#usr/lib/bcc/include/sys/mman.h -#usr/lib/bcc/include/sys/param.h -#usr/lib/bcc/include/sys/resource.h -#usr/lib/bcc/include/sys/signal.h -#usr/lib/bcc/include/sys/socket.h -#usr/lib/bcc/include/sys/stat.h -#usr/lib/bcc/include/sys/time.h -#usr/lib/bcc/include/sys/times.h -#usr/lib/bcc/include/sys/types.h -#usr/lib/bcc/include/sys/utsname.h -#usr/lib/bcc/include/sys/vm86.h -#usr/lib/bcc/include/sys/wait.h -#usr/lib/bcc/include/termcap.h -#usr/lib/bcc/include/termio.h -#usr/lib/bcc/include/termios.h -#usr/lib/bcc/include/time.h -#usr/lib/bcc/include/unistd.h -#usr/lib/bcc/include/utime.h -#usr/lib/bcc/include/utmp.h -#usr/lib/bcc/include/varargs.h -#usr/lib/bcc/libbsd.a -#usr/lib/bcc/libc.a -#usr/lib/bcc/libc_f.a -#usr/lib/bcc/libc_s.a -#usr/lib/bcc/libdos.a -#usr/lib/bcc/rules.186 -#usr/lib/bcc/rules.386 -#usr/lib/bcc/rules.86 -#usr/lib/bcc/rules.end -#usr/lib/bcc/rules.i -#usr/lib/bcc/rules.net -#usr/lib/bcc/rules.start -#usr/lib/bcc/unproto -#usr/lib/libAppleWM.a -#usr/lib/libAppleWM.la -usr/lib/libAppleWM.so -usr/lib/libAppleWM.so.7 -usr/lib/libAppleWM.so.7.0.0 -#usr/lib/libFS.a -#usr/lib/libFS.la -usr/lib/libFS.so -usr/lib/libFS.so.6 -usr/lib/libFS.so.6.0.0 -#usr/lib/libICE.a -#usr/lib/libICE.la -usr/lib/libICE.so -usr/lib/libICE.so.6 -usr/lib/libICE.so.6.3.0 -#usr/lib/libSM.a -#usr/lib/libSM.la -usr/lib/libSM.so -usr/lib/libSM.so.6 -usr/lib/libSM.so.6.0.0 -#usr/lib/libWindowsWM.a -#usr/lib/libWindowsWM.la -usr/lib/libWindowsWM.so -usr/lib/libWindowsWM.so.7 -usr/lib/libWindowsWM.so.7.0.0 -#usr/lib/libX11-xcb.a -#usr/lib/libX11-xcb.la -usr/lib/libX11-xcb.so -usr/lib/libX11-xcb.so.1 -usr/lib/libX11-xcb.so.1.0.0 -#usr/lib/libX11.a -#usr/lib/libX11.la -usr/lib/libX11.so -usr/lib/libX11.so.6 -usr/lib/libX11.so.6.2.0 -#usr/lib/libXRes.a -#usr/lib/libXRes.la -usr/lib/libXRes.so -usr/lib/libXRes.so.1 -usr/lib/libXRes.so.1.0.0 -#usr/lib/libXau.a -#usr/lib/libXau.la -usr/lib/libXau.so -usr/lib/libXau.so.6 -usr/lib/libXau.so.6.0.0 -usr/lib/libXaw.so -usr/lib/libXaw.so.6 -usr/lib/libXaw.so.7 -#usr/lib/libXaw6.a -#usr/lib/libXaw6.la -usr/lib/libXaw6.so -usr/lib/libXaw6.so.6 -usr/lib/libXaw6.so.6.0.1 -#usr/lib/libXaw7.a -#usr/lib/libXaw7.la -usr/lib/libXaw7.so -usr/lib/libXaw7.so.7 -usr/lib/libXaw7.so.7.0.0 -#usr/lib/libXcomposite.a -#usr/lib/libXcomposite.la -usr/lib/libXcomposite.so -usr/lib/libXcomposite.so.1 -usr/lib/libXcomposite.so.1.0.0 -#usr/lib/libXcursor.a -#usr/lib/libXcursor.la -usr/lib/libXcursor.so -usr/lib/libXcursor.so.1 -usr/lib/libXcursor.so.1.0.2 -#usr/lib/libXdamage.a -#usr/lib/libXdamage.la -usr/lib/libXdamage.so -usr/lib/libXdamage.so.1 -usr/lib/libXdamage.so.1.1.0 -#usr/lib/libXdmcp.a -#usr/lib/libXdmcp.la -usr/lib/libXdmcp.so -usr/lib/libXdmcp.so.6 -usr/lib/libXdmcp.so.6.0.0 -#usr/lib/libXext.a -#usr/lib/libXext.la -usr/lib/libXext.so -usr/lib/libXext.so.6 -usr/lib/libXext.so.6.4.0 -#usr/lib/libXfixes.a -#usr/lib/libXfixes.la -usr/lib/libXfixes.so -usr/lib/libXfixes.so.3 -usr/lib/libXfixes.so.3.1.0 -#usr/lib/libXfont.a -#usr/lib/libXfont.la -usr/lib/libXfont.so -usr/lib/libXfont.so.1 -usr/lib/libXfont.so.1.4.1 -#usr/lib/libXfontcache.a -#usr/lib/libXfontcache.la -usr/lib/libXfontcache.so -usr/lib/libXfontcache.so.1 -usr/lib/libXfontcache.so.1.0.0 -#usr/lib/libXft.a -#usr/lib/libXft.la -usr/lib/libXft.so -usr/lib/libXft.so.2 -usr/lib/libXft.so.2.1.13 -#usr/lib/libXi.a -#usr/lib/libXi.la -usr/lib/libXi.so -usr/lib/libXi.so.6 -usr/lib/libXi.so.6.0.0 -#usr/lib/libXinerama.a -#usr/lib/libXinerama.la -usr/lib/libXinerama.so -usr/lib/libXinerama.so.1 -usr/lib/libXinerama.so.1.0.0 -#usr/lib/libXmu.a -#usr/lib/libXmu.la -usr/lib/libXmu.so -usr/lib/libXmu.so.6 -usr/lib/libXmu.so.6.2.0 -#usr/lib/libXmuu.a -#usr/lib/libXmuu.la -usr/lib/libXmuu.so -usr/lib/libXmuu.so.1 -usr/lib/libXmuu.so.1.0.0 -#usr/lib/libXpm.a -#usr/lib/libXpm.la -usr/lib/libXpm.so -usr/lib/libXpm.so.4 -usr/lib/libXpm.so.4.11.0 -#usr/lib/libXrandr.a -#usr/lib/libXrandr.la -usr/lib/libXrandr.so -usr/lib/libXrandr.so.2 -usr/lib/libXrandr.so.2.1.0 -#usr/lib/libXrender.a -#usr/lib/libXrender.la -usr/lib/libXrender.so -usr/lib/libXrender.so.1 -usr/lib/libXrender.so.1.3.0 -#usr/lib/libXss.a -#usr/lib/libXss.la -usr/lib/libXss.so -usr/lib/libXss.so.1 -usr/lib/libXss.so.1.0.0 -#usr/lib/libXt.a -#usr/lib/libXt.la -usr/lib/libXt.so -usr/lib/libXt.so.6 -usr/lib/libXt.so.6.0.0 -#usr/lib/libXtst.a -#usr/lib/libXtst.la -usr/lib/libXtst.so -usr/lib/libXtst.so.6 -usr/lib/libXtst.so.6.1.0 -#usr/lib/libXv.a -#usr/lib/libXv.la -usr/lib/libXv.so -usr/lib/libXv.so.1 -usr/lib/libXv.so.1.0.0 -#usr/lib/libXvMC.a -#usr/lib/libXvMC.la -usr/lib/libXvMC.so -usr/lib/libXvMC.so.1 -usr/lib/libXvMC.so.1.0.0 -#usr/lib/libXvMCW.a -#usr/lib/libXvMCW.la -usr/lib/libXvMCW.so -usr/lib/libXvMCW.so.1 -usr/lib/libXvMCW.so.1.0.0 -#usr/lib/libXxf86dga.a -#usr/lib/libXxf86dga.la -usr/lib/libXxf86dga.so -usr/lib/libXxf86dga.so.1 -usr/lib/libXxf86dga.so.1.0.0 -#usr/lib/libXxf86misc.a -#usr/lib/libXxf86misc.la -usr/lib/libXxf86misc.so -usr/lib/libXxf86misc.so.1 -usr/lib/libXxf86misc.so.1.1.0 -#usr/lib/libXxf86vm.a -#usr/lib/libXxf86vm.la -usr/lib/libXxf86vm.so -usr/lib/libXxf86vm.so.1 -usr/lib/libXxf86vm.so.1.0.0 -#usr/lib/libdmx.a -#usr/lib/libdmx.la -usr/lib/libdmx.so -usr/lib/libdmx.so.1 -usr/lib/libdmx.so.1.0.0 -#usr/lib/libfontenc.a -#usr/lib/libfontenc.la -usr/lib/libfontenc.so -usr/lib/libfontenc.so.1 -usr/lib/libfontenc.so.1.0.0 -#usr/lib/libpciaccess.a -#usr/lib/libpciaccess.la -usr/lib/libpciaccess.so -usr/lib/libpciaccess.so.0 -usr/lib/libpciaccess.so.0.10.2 -#usr/lib/libxcb-atom.a -#usr/lib/libxcb-atom.la -usr/lib/libxcb-atom.so -usr/lib/libxcb-atom.so.1 -usr/lib/libxcb-atom.so.1.0.0 -#usr/lib/libxcb-aux.a -#usr/lib/libxcb-aux.la -usr/lib/libxcb-aux.so -usr/lib/libxcb-aux.so.0 -usr/lib/libxcb-aux.so.0.0.0 -#usr/lib/libxcb-composite.a -#usr/lib/libxcb-composite.la -usr/lib/libxcb-composite.so -usr/lib/libxcb-composite.so.0 -usr/lib/libxcb-composite.so.0.0.0 -#usr/lib/libxcb-damage.a -#usr/lib/libxcb-damage.la -usr/lib/libxcb-damage.so -usr/lib/libxcb-damage.so.0 -usr/lib/libxcb-damage.so.0.0.0 -#usr/lib/libxcb-dpms.a -#usr/lib/libxcb-dpms.la -usr/lib/libxcb-dpms.so -usr/lib/libxcb-dpms.so.0 -usr/lib/libxcb-dpms.so.0.0.0 -#usr/lib/libxcb-event.a -#usr/lib/libxcb-event.la -usr/lib/libxcb-event.so -usr/lib/libxcb-event.so.1 -usr/lib/libxcb-event.so.1.0.0 -#usr/lib/libxcb-glx.a -#usr/lib/libxcb-glx.la -usr/lib/libxcb-glx.so -usr/lib/libxcb-glx.so.0 -usr/lib/libxcb-glx.so.0.0.0 -#usr/lib/libxcb-icccm.a -#usr/lib/libxcb-icccm.la -usr/lib/libxcb-icccm.so -usr/lib/libxcb-icccm.so.1 -usr/lib/libxcb-icccm.so.1.0.0 -#usr/lib/libxcb-image.a -#usr/lib/libxcb-image.la -usr/lib/libxcb-image.so -usr/lib/libxcb-image.so.0 -usr/lib/libxcb-image.so.0.0.0 -#usr/lib/libxcb-keysyms.a -#usr/lib/libxcb-keysyms.la -usr/lib/libxcb-keysyms.so -usr/lib/libxcb-keysyms.so.0 -usr/lib/libxcb-keysyms.so.0.0.0 -#usr/lib/libxcb-property.a -#usr/lib/libxcb-property.la -usr/lib/libxcb-property.so -usr/lib/libxcb-property.so.1 -usr/lib/libxcb-property.so.1.0.0 -#usr/lib/libxcb-randr.a -#usr/lib/libxcb-randr.la -usr/lib/libxcb-randr.so -usr/lib/libxcb-randr.so.0 -usr/lib/libxcb-randr.so.0.0.0 -#usr/lib/libxcb-record.a -#usr/lib/libxcb-record.la -usr/lib/libxcb-record.so -usr/lib/libxcb-record.so.0 -usr/lib/libxcb-record.so.0.0.0 -#usr/lib/libxcb-render-util.a -#usr/lib/libxcb-render-util.la -usr/lib/libxcb-render-util.so -usr/lib/libxcb-render-util.so.0 -usr/lib/libxcb-render-util.so.0.0.0 -#usr/lib/libxcb-render.a -#usr/lib/libxcb-render.la -usr/lib/libxcb-render.so -usr/lib/libxcb-render.so.0 -usr/lib/libxcb-render.so.0.0.0 -#usr/lib/libxcb-reply.a -#usr/lib/libxcb-reply.la -usr/lib/libxcb-reply.so -usr/lib/libxcb-reply.so.1 -usr/lib/libxcb-reply.so.1.0.0 -#usr/lib/libxcb-res.a -#usr/lib/libxcb-res.la -usr/lib/libxcb-res.so -usr/lib/libxcb-res.so.0 -usr/lib/libxcb-res.so.0.0.0 -#usr/lib/libxcb-screensaver.a -#usr/lib/libxcb-screensaver.la -usr/lib/libxcb-screensaver.so -usr/lib/libxcb-screensaver.so.0 -usr/lib/libxcb-screensaver.so.0.0.0 -#usr/lib/libxcb-shape.a -#usr/lib/libxcb-shape.la -usr/lib/libxcb-shape.so -usr/lib/libxcb-shape.so.0 -usr/lib/libxcb-shape.so.0.0.0 -#usr/lib/libxcb-shm.a -#usr/lib/libxcb-shm.la -usr/lib/libxcb-shm.so -usr/lib/libxcb-shm.so.0 -usr/lib/libxcb-shm.so.0.0.0 -#usr/lib/libxcb-sync.a -#usr/lib/libxcb-sync.la -usr/lib/libxcb-sync.so -usr/lib/libxcb-sync.so.0 -usr/lib/libxcb-sync.so.0.0.0 -#usr/lib/libxcb-wm.a -#usr/lib/libxcb-wm.la -usr/lib/libxcb-wm.so -usr/lib/libxcb-wm.so.0 -usr/lib/libxcb-wm.so.0.0.0 -#usr/lib/libxcb-xevie.a -#usr/lib/libxcb-xevie.la -usr/lib/libxcb-xevie.so -usr/lib/libxcb-xevie.so.0 -usr/lib/libxcb-xevie.so.0.0.0 -#usr/lib/libxcb-xf86dri.a -#usr/lib/libxcb-xf86dri.la -usr/lib/libxcb-xf86dri.so -usr/lib/libxcb-xf86dri.so.0 -usr/lib/libxcb-xf86dri.so.0.0.0 -#usr/lib/libxcb-xfixes.a -#usr/lib/libxcb-xfixes.la -usr/lib/libxcb-xfixes.so -usr/lib/libxcb-xfixes.so.0 -usr/lib/libxcb-xfixes.so.0.0.0 -#usr/lib/libxcb-xinerama.a -#usr/lib/libxcb-xinerama.la -usr/lib/libxcb-xinerama.so -usr/lib/libxcb-xinerama.so.0 -usr/lib/libxcb-xinerama.so.0.0.0 -#usr/lib/libxcb-xlib.a -#usr/lib/libxcb-xlib.la -usr/lib/libxcb-xlib.so -usr/lib/libxcb-xlib.so.0 -usr/lib/libxcb-xlib.so.0.0.0 -#usr/lib/libxcb-xprint.a -#usr/lib/libxcb-xprint.la -usr/lib/libxcb-xprint.so -usr/lib/libxcb-xprint.so.0 -usr/lib/libxcb-xprint.so.0.0.0 -#usr/lib/libxcb-xtest.a -#usr/lib/libxcb-xtest.la -usr/lib/libxcb-xtest.so -usr/lib/libxcb-xtest.so.0 -usr/lib/libxcb-xtest.so.0.0.0 -#usr/lib/libxcb-xv.a -#usr/lib/libxcb-xv.la -usr/lib/libxcb-xv.so -usr/lib/libxcb-xv.so.0 -usr/lib/libxcb-xv.so.0.0.0 -#usr/lib/libxcb-xvmc.a -#usr/lib/libxcb-xvmc.la -usr/lib/libxcb-xvmc.so -usr/lib/libxcb-xvmc.so.0 -usr/lib/libxcb-xvmc.so.0.0.0 -#usr/lib/libxcb.a -#usr/lib/libxcb.la -usr/lib/libxcb.so -usr/lib/libxcb.so.1 -usr/lib/libxcb.so.1.0.0 -#usr/lib/libxkbfile.a -#usr/lib/libxkbfile.la -usr/lib/libxkbfile.so -usr/lib/libxkbfile.so.1 -usr/lib/libxkbfile.so.1.0.2 -#usr/lib/pkgconfig/applewm.pc -#usr/lib/pkgconfig/applewmproto.pc -#usr/lib/pkgconfig/bigreqsproto.pc -#usr/lib/pkgconfig/compositeproto.pc -#usr/lib/pkgconfig/damageproto.pc -#usr/lib/pkgconfig/dmx.pc -#usr/lib/pkgconfig/dmxproto.pc -#usr/lib/pkgconfig/evieproto.pc -#usr/lib/pkgconfig/fixesproto.pc -#usr/lib/pkgconfig/fontcacheproto.pc -#usr/lib/pkgconfig/fontenc.pc -#usr/lib/pkgconfig/fontsproto.pc -#usr/lib/pkgconfig/glproto.pc -#usr/lib/pkgconfig/ice.pc -#usr/lib/pkgconfig/inputproto.pc -#usr/lib/pkgconfig/kbproto.pc -#usr/lib/pkgconfig/libfs.pc -#usr/lib/pkgconfig/pciaccess.pc -#usr/lib/pkgconfig/pthread-stubs.pc -#usr/lib/pkgconfig/randrproto.pc -#usr/lib/pkgconfig/recordproto.pc -#usr/lib/pkgconfig/renderproto.pc -#usr/lib/pkgconfig/resourceproto.pc -#usr/lib/pkgconfig/scrnsaverproto.pc -#usr/lib/pkgconfig/sm.pc -#usr/lib/pkgconfig/trapproto.pc -#usr/lib/pkgconfig/videoproto.pc -#usr/lib/pkgconfig/windowswm.pc -#usr/lib/pkgconfig/windowswmproto.pc -#usr/lib/pkgconfig/x11-xcb.pc -#usr/lib/pkgconfig/x11.pc -#usr/lib/pkgconfig/xau.pc -#usr/lib/pkgconfig/xaw6.pc -#usr/lib/pkgconfig/xaw7.pc -#usr/lib/pkgconfig/xcb-atom.pc -#usr/lib/pkgconfig/xcb-aux.pc -#usr/lib/pkgconfig/xcb-composite.pc -#usr/lib/pkgconfig/xcb-damage.pc -#usr/lib/pkgconfig/xcb-dpms.pc -#usr/lib/pkgconfig/xcb-event.pc -#usr/lib/pkgconfig/xcb-glx.pc -#usr/lib/pkgconfig/xcb-icccm.pc -#usr/lib/pkgconfig/xcb-image.pc -#usr/lib/pkgconfig/xcb-keysyms.pc -#usr/lib/pkgconfig/xcb-property.pc -#usr/lib/pkgconfig/xcb-proto.pc -#usr/lib/pkgconfig/xcb-randr.pc -#usr/lib/pkgconfig/xcb-record.pc -#usr/lib/pkgconfig/xcb-render.pc -#usr/lib/pkgconfig/xcb-renderutil.pc -#usr/lib/pkgconfig/xcb-reply.pc -#usr/lib/pkgconfig/xcb-res.pc -#usr/lib/pkgconfig/xcb-screensaver.pc -#usr/lib/pkgconfig/xcb-shape.pc -#usr/lib/pkgconfig/xcb-shm.pc -#usr/lib/pkgconfig/xcb-sync.pc -#usr/lib/pkgconfig/xcb-wm.pc -#usr/lib/pkgconfig/xcb-xevie.pc -#usr/lib/pkgconfig/xcb-xf86dri.pc -#usr/lib/pkgconfig/xcb-xfixes.pc -#usr/lib/pkgconfig/xcb-xinerama.pc -#usr/lib/pkgconfig/xcb-xlib.pc -#usr/lib/pkgconfig/xcb-xprint.pc -#usr/lib/pkgconfig/xcb-xtest.pc -#usr/lib/pkgconfig/xcb-xv.pc -#usr/lib/pkgconfig/xcb-xvmc.pc -#usr/lib/pkgconfig/xcb.pc -#usr/lib/pkgconfig/xcmiscproto.pc -#usr/lib/pkgconfig/xcomposite.pc -#usr/lib/pkgconfig/xcursor.pc -#usr/lib/pkgconfig/xdamage.pc -#usr/lib/pkgconfig/xdmcp.pc -#usr/lib/pkgconfig/xext.pc -#usr/lib/pkgconfig/xextproto.pc -#usr/lib/pkgconfig/xf86bigfontproto.pc -#usr/lib/pkgconfig/xf86dgaproto.pc -#usr/lib/pkgconfig/xf86driproto.pc -#usr/lib/pkgconfig/xf86miscproto.pc -#usr/lib/pkgconfig/xf86vidmodeproto.pc -#usr/lib/pkgconfig/xfixes.pc -#usr/lib/pkgconfig/xfont.pc -#usr/lib/pkgconfig/xfontcache.pc -#usr/lib/pkgconfig/xft.pc -#usr/lib/pkgconfig/xi.pc -#usr/lib/pkgconfig/xinerama.pc -#usr/lib/pkgconfig/xineramaproto.pc -#usr/lib/pkgconfig/xkbfile.pc -#usr/lib/pkgconfig/xmu.pc -#usr/lib/pkgconfig/xmuu.pc -#usr/lib/pkgconfig/xpm.pc -#usr/lib/pkgconfig/xproto.pc -#usr/lib/pkgconfig/xrandr.pc -#usr/lib/pkgconfig/xrender.pc -#usr/lib/pkgconfig/xres.pc -#usr/lib/pkgconfig/xscrnsaver.pc -#usr/lib/pkgconfig/xt.pc -#usr/lib/pkgconfig/xtrans.pc -#usr/lib/pkgconfig/xtst.pc -#usr/lib/pkgconfig/xv.pc -#usr/lib/pkgconfig/xvmc.pc -#usr/lib/pkgconfig/xxf86dga.pc -#usr/lib/pkgconfig/xxf86misc.pc -#usr/lib/pkgconfig/xxf86vm.pc -#usr/local/bin/as86 -#usr/local/bin/ld86 -#usr/local/bin/nm86 -#usr/local/bin/objdump86 -#usr/local/bin/size86 -#usr/local/man/man1/as86.1 -#usr/local/man/man1/ld86.1 -#usr/man/man1/as86.1 -#usr/man/man1/bcc.1 -#usr/man/man1/elks.1 -#usr/man/man1/elksemu.1 -#usr/man/man1/ld86.1 -#usr/share/X11 -usr/share/X11/XErrorDB -usr/share/X11/XKeysymDB -usr/share/X11/locale -#usr/share/X11/locale/C -#usr/share/X11/locale/C/Compose -#usr/share/X11/locale/C/XI18N_OBJS -#usr/share/X11/locale/C/XLC_LOCALE -#usr/share/X11/locale/am_ET.UTF-8 -#usr/share/X11/locale/am_ET.UTF-8/Compose -#usr/share/X11/locale/am_ET.UTF-8/XI18N_OBJS -#usr/share/X11/locale/am_ET.UTF-8/XLC_LOCALE -#usr/share/X11/locale/armscii-8 -#usr/share/X11/locale/armscii-8/Compose -#usr/share/X11/locale/armscii-8/XI18N_OBJS -#usr/share/X11/locale/armscii-8/XLC_LOCALE -#usr/share/X11/locale/compose.dir -#usr/share/X11/locale/el_GR.UTF-8 -#usr/share/X11/locale/el_GR.UTF-8/Compose -#usr/share/X11/locale/el_GR.UTF-8/XI18N_OBJS -#usr/share/X11/locale/el_GR.UTF-8/XLC_LOCALE -#usr/share/X11/locale/en_US.UTF-8 -#usr/share/X11/locale/en_US.UTF-8/Compose -#usr/share/X11/locale/en_US.UTF-8/XI18N_OBJS -#usr/share/X11/locale/en_US.UTF-8/XLC_LOCALE -#usr/share/X11/locale/georgian-academy -#usr/share/X11/locale/georgian-academy/Compose -#usr/share/X11/locale/georgian-academy/XI18N_OBJS -#usr/share/X11/locale/georgian-academy/XLC_LOCALE -#usr/share/X11/locale/georgian-ps -#usr/share/X11/locale/georgian-ps/Compose -#usr/share/X11/locale/georgian-ps/XI18N_OBJS -#usr/share/X11/locale/georgian-ps/XLC_LOCALE -#usr/share/X11/locale/ibm-cp1133 -#usr/share/X11/locale/ibm-cp1133/Compose -#usr/share/X11/locale/ibm-cp1133/XI18N_OBJS -#usr/share/X11/locale/ibm-cp1133/XLC_LOCALE -#usr/share/X11/locale/iscii-dev -#usr/share/X11/locale/iscii-dev/Compose -#usr/share/X11/locale/iscii-dev/XI18N_OBJS -#usr/share/X11/locale/iscii-dev/XLC_LOCALE -#usr/share/X11/locale/isiri-3342 -#usr/share/X11/locale/isiri-3342/Compose -#usr/share/X11/locale/isiri-3342/XI18N_OBJS -#usr/share/X11/locale/isiri-3342/XLC_LOCALE -#usr/share/X11/locale/iso8859-1 -#usr/share/X11/locale/iso8859-1/Compose -#usr/share/X11/locale/iso8859-1/XI18N_OBJS -#usr/share/X11/locale/iso8859-1/XLC_LOCALE -#usr/share/X11/locale/iso8859-10 -#usr/share/X11/locale/iso8859-10/Compose -#usr/share/X11/locale/iso8859-10/XI18N_OBJS -#usr/share/X11/locale/iso8859-10/XLC_LOCALE -#usr/share/X11/locale/iso8859-11 -#usr/share/X11/locale/iso8859-11/Compose -#usr/share/X11/locale/iso8859-11/XI18N_OBJS -#usr/share/X11/locale/iso8859-11/XLC_LOCALE -#usr/share/X11/locale/iso8859-13 -#usr/share/X11/locale/iso8859-13/Compose -#usr/share/X11/locale/iso8859-13/XI18N_OBJS -#usr/share/X11/locale/iso8859-13/XLC_LOCALE -#usr/share/X11/locale/iso8859-14 -#usr/share/X11/locale/iso8859-14/Compose -#usr/share/X11/locale/iso8859-14/XI18N_OBJS -#usr/share/X11/locale/iso8859-14/XLC_LOCALE -#usr/share/X11/locale/iso8859-15 -#usr/share/X11/locale/iso8859-15/Compose -#usr/share/X11/locale/iso8859-15/XI18N_OBJS -#usr/share/X11/locale/iso8859-15/XLC_LOCALE -#usr/share/X11/locale/iso8859-2 -#usr/share/X11/locale/iso8859-2/Compose -#usr/share/X11/locale/iso8859-2/XI18N_OBJS -#usr/share/X11/locale/iso8859-2/XLC_LOCALE -#usr/share/X11/locale/iso8859-3 -#usr/share/X11/locale/iso8859-3/Compose -#usr/share/X11/locale/iso8859-3/XI18N_OBJS -#usr/share/X11/locale/iso8859-3/XLC_LOCALE -#usr/share/X11/locale/iso8859-4 -#usr/share/X11/locale/iso8859-4/Compose -#usr/share/X11/locale/iso8859-4/XI18N_OBJS -#usr/share/X11/locale/iso8859-4/XLC_LOCALE -#usr/share/X11/locale/iso8859-5 -#usr/share/X11/locale/iso8859-5/Compose -#usr/share/X11/locale/iso8859-5/XI18N_OBJS -#usr/share/X11/locale/iso8859-5/XLC_LOCALE -#usr/share/X11/locale/iso8859-6 -#usr/share/X11/locale/iso8859-6/Compose -#usr/share/X11/locale/iso8859-6/XI18N_OBJS -#usr/share/X11/locale/iso8859-6/XLC_LOCALE -#usr/share/X11/locale/iso8859-7 -#usr/share/X11/locale/iso8859-7/Compose -#usr/share/X11/locale/iso8859-7/XI18N_OBJS -#usr/share/X11/locale/iso8859-7/XLC_LOCALE -#usr/share/X11/locale/iso8859-8 -#usr/share/X11/locale/iso8859-8/Compose -#usr/share/X11/locale/iso8859-8/XI18N_OBJS -#usr/share/X11/locale/iso8859-8/XLC_LOCALE -#usr/share/X11/locale/iso8859-9 -#usr/share/X11/locale/iso8859-9/Compose -#usr/share/X11/locale/iso8859-9/XI18N_OBJS -#usr/share/X11/locale/iso8859-9/XLC_LOCALE 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-#usr/share/man/man3/XkbSetDebuggingFlags.3 -#usr/share/man/man3/XkbSetDetectableAutorepeat.3 -#usr/share/man/man3/XkbSetDeviceButtonActions.3 -#usr/share/man/man3/XkbSetDeviceInfo.3 -#usr/share/man/man3/XkbSetIgnoreLockMods.3 -#usr/share/man/man3/XkbSetIndicatorMap.3 -#usr/share/man/man3/XkbSetMap.3 -#usr/share/man/man3/XkbSetModActionVMods.3 -#usr/share/man/man3/XkbSetNamedIndicator.3 -#usr/share/man/man3/XkbSetNames.3 -#usr/share/man/man3/XkbSetPtrActionX.3 -#usr/share/man/man3/XkbSetPtrActionY.3 -#usr/share/man/man3/XkbSetServerInternalMods.3 -#usr/share/man/man3/XkbSetXlibControls.3 -#usr/share/man/man3/XkbTranslateKeyCode.3 -#usr/share/man/man3/XkbTranslateKeySym.3 -#usr/share/man/man3/XkbUpdateMapFromCore.3 -#usr/share/man/man3/XkbVirtualModsToReal.3 -#usr/share/man/man3/XmbDrawImageString.3 -#usr/share/man/man3/XmbDrawString.3 -#usr/share/man/man3/XmbDrawText.3 -#usr/share/man/man3/XmbLookupString.3 -#usr/share/man/man3/XmbResetIC.3 -#usr/share/man/man3/XmbSetWMProperties.3 -#usr/share/man/man3/XmbTextEscapement.3 -#usr/share/man/man3/XmbTextExtents.3 -#usr/share/man/man3/XmbTextListToTextProperty.3 -#usr/share/man/man3/XmbTextPerCharExtents.3 -#usr/share/man/man3/XmbTextPropertyToTextList.3 -#usr/share/man/man3/Xmbuf.3 -#usr/share/man/man3/XmbufChangeBufferAttributes.3 -#usr/share/man/man3/XmbufChangeWindowAttributes.3 -#usr/share/man/man3/XmbufCreateBuffers.3 -#usr/share/man/man3/XmbufCreateStereoWindow.3 -#usr/share/man/man3/XmbufDestroyBuffers.3 -#usr/share/man/man3/XmbufDisplayBuffers.3 -#usr/share/man/man3/XmbufGetBufferAttributes.3 -#usr/share/man/man3/XmbufGetScreenInfo.3 -#usr/share/man/man3/XmbufGetVersion.3 -#usr/share/man/man3/XmbufGetWindowAttributes.3 -#usr/share/man/man3/XmbufQueryExtension.3 -#usr/share/man/man3/Xrandr.3 -#usr/share/man/man3/XrmCombineDatabase.3 -#usr/share/man/man3/XrmCombineFileDatabase.3 -#usr/share/man/man3/XrmDestroyDatabase.3 -#usr/share/man/man3/XrmEnumerateDatabase.3 -#usr/share/man/man3/XrmGetDatabase.3 -#usr/share/man/man3/XrmGetFileDatabase.3 -#usr/share/man/man3/XrmGetResource.3 -#usr/share/man/man3/XrmGetStringDatabase.3 -#usr/share/man/man3/XrmInitialize.3 -#usr/share/man/man3/XrmLocaleOfDatabase.3 -#usr/share/man/man3/XrmMergeDatabases.3 -#usr/share/man/man3/XrmOptionDescRec.3 -#usr/share/man/man3/XrmOptionKind.3 -#usr/share/man/man3/XrmParseCommand.3 -#usr/share/man/man3/XrmPermStringToQuark.3 -#usr/share/man/man3/XrmPutFileDatabase.3 -#usr/share/man/man3/XrmPutLineResource.3 -#usr/share/man/man3/XrmPutResource.3 -#usr/share/man/man3/XrmPutStringResource.3 -#usr/share/man/man3/XrmQGetResource.3 -#usr/share/man/man3/XrmQGetSearchList.3 -#usr/share/man/man3/XrmQGetSearchResource.3 -#usr/share/man/man3/XrmQPutResource.3 -#usr/share/man/man3/XrmQPutStringResource.3 -#usr/share/man/man3/XrmQuarkToString.3 -#usr/share/man/man3/XrmSetDatabase.3 -#usr/share/man/man3/XrmStringToBindingQuarkList.3 -#usr/share/man/man3/XrmStringToQuark.3 -#usr/share/man/man3/XrmStringToQuarkList.3 -#usr/share/man/man3/XrmUniqueQuark.3 -#usr/share/man/man3/XrmValue.3 -#usr/share/man/man3/Xss.3 -#usr/share/man/man3/XtAddActions.3 -#usr/share/man/man3/XtAddCallback.3 -#usr/share/man/man3/XtAddCallbacks.3 -#usr/share/man/man3/XtAddConverter.3 -#usr/share/man/man3/XtAddEventHandler.3 -#usr/share/man/man3/XtAddExposureToRegion.3 -#usr/share/man/man3/XtAddGrab.3 -#usr/share/man/man3/XtAddInput.3 -#usr/share/man/man3/XtAddRawEventHandler.3 -#usr/share/man/man3/XtAddTimeOut.3 -#usr/share/man/man3/XtAddWorkProc.3 -#usr/share/man/man3/XtAllocateGC.3 -#usr/share/man/man3/XtAppAddActionHook.3 -#usr/share/man/man3/XtAppAddActions.3 -#usr/share/man/man3/XtAppAddBlockHook.3 -#usr/share/man/man3/XtAppAddConverter.3 -#usr/share/man/man3/XtAppAddInput.3 -#usr/share/man/man3/XtAppAddSignal.3 -#usr/share/man/man3/XtAppAddTimeOut.3 -#usr/share/man/man3/XtAppAddWorkProc.3 -#usr/share/man/man3/XtAppCreateShell.3 -#usr/share/man/man3/XtAppError.3 -#usr/share/man/man3/XtAppErrorMsg.3 -#usr/share/man/man3/XtAppGetErrorDatabase.3 -#usr/share/man/man3/XtAppGetErrorDatabaseText.3 -#usr/share/man/man3/XtAppGetExitFlag.3 -#usr/share/man/man3/XtAppGetSelectionTimeout.3 -#usr/share/man/man3/XtAppInitialize.3 -#usr/share/man/man3/XtAppLock.3 -#usr/share/man/man3/XtAppMainLoop.3 -#usr/share/man/man3/XtAppNextEvent.3 -#usr/share/man/man3/XtAppPeekEvent.3 -#usr/share/man/man3/XtAppPending.3 -#usr/share/man/man3/XtAppProcessEvent.3 -#usr/share/man/man3/XtAppReleaseCacheRefs.3 -#usr/share/man/man3/XtAppSetErrorHandler.3 -#usr/share/man/man3/XtAppSetErrorMsgHandler.3 -#usr/share/man/man3/XtAppSetExitFlag.3 -#usr/share/man/man3/XtAppSetFallbackResources.3 -#usr/share/man/man3/XtAppSetSelectionTimeout.3 -#usr/share/man/man3/XtAppSetTypeConverter.3 -#usr/share/man/man3/XtAppSetWarningHandler.3 -#usr/share/man/man3/XtAppSetWarningMsgHandler.3 -#usr/share/man/man3/XtAppUnlock.3 -#usr/share/man/man3/XtAppWarning.3 -#usr/share/man/man3/XtAppWarningMsg.3 -#usr/share/man/man3/XtAugmentTranslations.3 -#usr/share/man/man3/XtBuildEventMask.3 -#usr/share/man/man3/XtCallAcceptFocus.3 -#usr/share/man/man3/XtCallActionProc.3 -#usr/share/man/man3/XtCallCallbackList.3 -#usr/share/man/man3/XtCallCallbacks.3 -#usr/share/man/man3/XtCallConverter.3 -#usr/share/man/man3/XtCallbackExclusive.3 -#usr/share/man/man3/XtCallbackNone.3 -#usr/share/man/man3/XtCallbackNonexclusive.3 -#usr/share/man/man3/XtCallbackPopdown.3 -#usr/share/man/man3/XtCalloc.3 -#usr/share/man/man3/XtCancelSelectionRequest.3 -#usr/share/man/man3/XtChangeManagedSet.3 -#usr/share/man/man3/XtCheckSubclass.3 -#usr/share/man/man3/XtClass.3 -#usr/share/man/man3/XtCloseDisplay.3 -#usr/share/man/man3/XtConfigureWidget.3 -#usr/share/man/man3/XtConvert.3 -#usr/share/man/man3/XtConvertAndStore.3 -#usr/share/man/man3/XtConvertCase.3 -#usr/share/man/man3/XtCreateApplicationContext.3 -#usr/share/man/man3/XtCreateApplicationShell.3 -#usr/share/man/man3/XtCreateManagedWidget.3 -#usr/share/man/man3/XtCreatePopupShell.3 -#usr/share/man/man3/XtCreateSelectionRequest.3 -#usr/share/man/man3/XtCreateWidget.3 -#usr/share/man/man3/XtCreateWindow.3 -#usr/share/man/man3/XtDatabase.3 -#usr/share/man/man3/XtDestroyApplicationContext.3 -#usr/share/man/man3/XtDestroyWidget.3 -#usr/share/man/man3/XtDirectConvert.3 -#usr/share/man/man3/XtDisownSelection.3 -#usr/share/man/man3/XtDispatchEvent.3 -#usr/share/man/man3/XtDispatchEventToWidget.3 -#usr/share/man/man3/XtDisplay.3 -#usr/share/man/man3/XtDisplayInitialize.3 -#usr/share/man/man3/XtDisplayOfObject.3 -#usr/share/man/man3/XtDisplayStringConversionWarning.3 -#usr/share/man/man3/XtDisplayToApplicationContext.3 -#usr/share/man/man3/XtError.3 -#usr/share/man/man3/XtErrorMsg.3 -#usr/share/man/man3/XtFindFile.3 -#usr/share/man/man3/XtFree.3 -#usr/share/man/man3/XtGetActionKeysym.3 -#usr/share/man/man3/XtGetActionList.3 -#usr/share/man/man3/XtGetApplicationNameAndClass.3 -#usr/share/man/man3/XtGetApplicationResources.3 -#usr/share/man/man3/XtGetClassExtension.3 -#usr/share/man/man3/XtGetConstraintResourceList.3 -#usr/share/man/man3/XtGetDisplays.3 -#usr/share/man/man3/XtGetErrorDatabase.3 -#usr/share/man/man3/XtGetErrorDatabaseText.3 -#usr/share/man/man3/XtGetGC.3 -#usr/share/man/man3/XtGetKeyboardFocusWidget.3 -#usr/share/man/man3/XtGetKeysymTable.3 -#usr/share/man/man3/XtGetMultiClickTime.3 -#usr/share/man/man3/XtGetResourceList.3 -#usr/share/man/man3/XtGetSelectionParameters.3 -#usr/share/man/man3/XtGetSelectionRequest.3 -#usr/share/man/man3/XtGetSelectionTimeout.3 -#usr/share/man/man3/XtGetSelectionValue.3 -#usr/share/man/man3/XtGetSelectionValueIncremental.3 -#usr/share/man/man3/XtGetSelectionValues.3 -#usr/share/man/man3/XtGetSelectionValuesIncremental.3 -#usr/share/man/man3/XtGetSubresources.3 -#usr/share/man/man3/XtGetSubvalues.3 -#usr/share/man/man3/XtGetValues.3 -#usr/share/man/man3/XtGrabButton.3 -#usr/share/man/man3/XtGrabKey.3 -#usr/share/man/man3/XtGrabKeyboard.3 -#usr/share/man/man3/XtGrabPointer.3 -#usr/share/man/man3/XtHasCallbacks.3 -#usr/share/man/man3/XtHooksOfDisplay.3 -#usr/share/man/man3/XtInitialize.3 -#usr/share/man/man3/XtInitializeWidgetClass.3 -#usr/share/man/man3/XtInsertEventHandler.3 -#usr/share/man/man3/XtInsertEventTypeHandler.3 -#usr/share/man/man3/XtInsertRawEventHandler.3 -#usr/share/man/man3/XtInstallAccelerators.3 -#usr/share/man/man3/XtInstallAllAccelerators.3 -#usr/share/man/man3/XtIsApplicationShell.3 -#usr/share/man/man3/XtIsComposite.3 -#usr/share/man/man3/XtIsConstraint.3 -#usr/share/man/man3/XtIsManaged.3 -#usr/share/man/man3/XtIsObject.3 -#usr/share/man/man3/XtIsOverrideShell.3 -#usr/share/man/man3/XtIsRealized.3 -#usr/share/man/man3/XtIsRectObj.3 -#usr/share/man/man3/XtIsSensitive.3 -#usr/share/man/man3/XtIsSessionShell.3 -#usr/share/man/man3/XtIsShell.3 -#usr/share/man/man3/XtIsSubclass.3 -#usr/share/man/man3/XtIsTopLevelShell.3 -#usr/share/man/man3/XtIsTransientShell.3 -#usr/share/man/man3/XtIsVendorShell.3 -#usr/share/man/man3/XtIsWMShell.3 -#usr/share/man/man3/XtIsWidget.3 -#usr/share/man/man3/XtKeysymToKeycodeList.3 -#usr/share/man/man3/XtLastEventProcessed.3 -#usr/share/man/man3/XtLastTimestampProcessed.3 -#usr/share/man/man3/XtMainLoop.3 -#usr/share/man/man3/XtMakeGeometryRequest.3 -#usr/share/man/man3/XtMakeResizeRequest.3 -#usr/share/man/man3/XtMalloc.3 -#usr/share/man/man3/XtManageChild.3 -#usr/share/man/man3/XtManageChildren.3 -#usr/share/man/man3/XtMapWidget.3 -#usr/share/man/man3/XtMergeArgLists.3 -#usr/share/man/man3/XtMoveWidget.3 -#usr/share/man/man3/XtName.3 -#usr/share/man/man3/XtNameToWidget.3 -#usr/share/man/man3/XtNew.3 -#usr/share/man/man3/XtNewString.3 -#usr/share/man/man3/XtNextEvent.3 -#usr/share/man/man3/XtNoticeSignal.3 -#usr/share/man/man3/XtNumber.3 -#usr/share/man/man3/XtOffset.3 -#usr/share/man/man3/XtOffsetOf.3 -#usr/share/man/man3/XtOpenApplication.3 -#usr/share/man/man3/XtOpenDisplay.3 -#usr/share/man/man3/XtOverrideTranslations.3 -#usr/share/man/man3/XtOwnSelection.3 -#usr/share/man/man3/XtOwnSelectionIncremental.3 -#usr/share/man/man3/XtParent.3 -#usr/share/man/man3/XtParseAcceleratorTable.3 -#usr/share/man/man3/XtParseTranslationTable.3 -#usr/share/man/man3/XtPeekEvent.3 -#usr/share/man/man3/XtPending.3 -#usr/share/man/man3/XtPopdown.3 -#usr/share/man/man3/XtPopup.3 -#usr/share/man/man3/XtPopupSpringLoaded.3 -#usr/share/man/man3/XtProcessEvent.3 -#usr/share/man/man3/XtProcessLock.3 -#usr/share/man/man3/XtProcessUnlock.3 -#usr/share/man/man3/XtQueryGeometry.3 -#usr/share/man/man3/XtRealizeWidget.3 -#usr/share/man/man3/XtRealloc.3 -#usr/share/man/man3/XtRegisterCaseConverter.3 -#usr/share/man/man3/XtRegisterDrawable.3 -#usr/share/man/man3/XtRegisterExtensionSelector.3 -#usr/share/man/man3/XtRegisterGrabAction.3 -#usr/share/man/man3/XtReleaseGC.3 -#usr/share/man/man3/XtReleasePropertyAtom.3 -#usr/share/man/man3/XtRemoveActionHook.3 -#usr/share/man/man3/XtRemoveAllCallbacks.3 -#usr/share/man/man3/XtRemoveBlockHook.3 -#usr/share/man/man3/XtRemoveCallback.3 -#usr/share/man/man3/XtRemoveCallbacks.3 -#usr/share/man/man3/XtRemoveEventHandler.3 -#usr/share/man/man3/XtRemoveEventTypeHandler.3 -#usr/share/man/man3/XtRemoveGrab.3 -#usr/share/man/man3/XtRemoveInput.3 -#usr/share/man/man3/XtRemoveRawEventHandler.3 -#usr/share/man/man3/XtRemoveSignal.3 -#usr/share/man/man3/XtRemoveTimeOut.3 -#usr/share/man/man3/XtRemoveWorkProc.3 -#usr/share/man/man3/XtReservePropertyAtom.3 -#usr/share/man/man3/XtResizeWidget.3 -#usr/share/man/man3/XtResolvePathname.3 -#usr/share/man/man3/XtScreen.3 -#usr/share/man/man3/XtScreenDatabase.3 -#usr/share/man/man3/XtScreenOfObject.3 -#usr/share/man/man3/XtSendSelectionRequest.3 -#usr/share/man/man3/XtSessionGetToken.3 -#usr/share/man/man3/XtSessionReturnToken.3 -#usr/share/man/man3/XtSetArg.3 -#usr/share/man/man3/XtSetErrorHandler.3 -#usr/share/man/man3/XtSetErrorMsgHandler.3 -#usr/share/man/man3/XtSetEventDispatcher.3 -#usr/share/man/man3/XtSetKeyTranslator.3 -#usr/share/man/man3/XtSetKeyboardFocus.3 -#usr/share/man/man3/XtSetLanguageProc.3 -#usr/share/man/man3/XtSetMappedWhenManaged.3 -#usr/share/man/man3/XtSetMultiClickTime.3 -#usr/share/man/man3/XtSetSelectionParameters.3 -#usr/share/man/man3/XtSetSelectionTimeout.3 -#usr/share/man/man3/XtSetSensitive.3 -#usr/share/man/man3/XtSetSubvalues.3 -#usr/share/man/man3/XtSetTypeConverter.3 -#usr/share/man/man3/XtSetValues.3 -#usr/share/man/man3/XtSetWMColormapWindows.3 -#usr/share/man/man3/XtSetWarningHandler.3 -#usr/share/man/man3/XtSetWarningMsgHandler.3 -#usr/share/man/man3/XtStringConversionWarning.3 -#usr/share/man/man3/XtSuperclass.3 -#usr/share/man/man3/XtToolkitInitialize.3 -#usr/share/man/man3/XtToolkitThreadInitialize.3 -#usr/share/man/man3/XtTranslateCoords.3 -#usr/share/man/man3/XtTranslateKeycode.3 -#usr/share/man/man3/XtUngrabButton.3 -#usr/share/man/man3/XtUngrabKey.3 -#usr/share/man/man3/XtUngrabKeyboard.3 -#usr/share/man/man3/XtUngrabPointer.3 -#usr/share/man/man3/XtUninstallTranslations.3 -#usr/share/man/man3/XtUnmanageChild.3 -#usr/share/man/man3/XtUnmanageChildren.3 -#usr/share/man/man3/XtUnmapWidget.3 -#usr/share/man/man3/XtUnrealizeWidget.3 -#usr/share/man/man3/XtUnregisterDrawable.3 -#usr/share/man/man3/XtVaAppCreateShell.3 -#usr/share/man/man3/XtVaAppInitialize.3 -#usr/share/man/man3/XtVaCreateArgsList.3 -#usr/share/man/man3/XtVaCreateManagedWidget.3 -#usr/share/man/man3/XtVaCreatePopupShell.3 -#usr/share/man/man3/XtVaCreateWidget.3 -#usr/share/man/man3/XtVaGetApplicationResources.3 -#usr/share/man/man3/XtVaGetSubresources.3 -#usr/share/man/man3/XtVaGetSubvalues.3 -#usr/share/man/man3/XtVaGetValues.3 -#usr/share/man/man3/XtVaOpenApplication.3 -#usr/share/man/man3/XtVaSetSubvalues.3 -#usr/share/man/man3/XtVaSetValues.3 -#usr/share/man/man3/XtWarning.3 -#usr/share/man/man3/XtWarningMsg.3 -#usr/share/man/man3/XtWidgetToApplicationContext.3 -#usr/share/man/man3/XtWindow.3 -#usr/share/man/man3/XtWindowOfObject.3 -#usr/share/man/man3/XtWindowToWidget.3 -#usr/share/man/man3/Xutf8DrawImageString.3 -#usr/share/man/man3/Xutf8DrawString.3 -#usr/share/man/man3/Xutf8DrawText.3 -#usr/share/man/man3/Xutf8LookupString.3 -#usr/share/man/man3/Xutf8ResetIC.3 -#usr/share/man/man3/Xutf8SetWMProperties.3 -#usr/share/man/man3/Xutf8TextEscapement.3 -#usr/share/man/man3/Xutf8TextExtents.3 -#usr/share/man/man3/Xutf8TextListToTextProperty.3 -#usr/share/man/man3/Xutf8TextPerCharExtents.3 -#usr/share/man/man3/Xutf8TextPropertyToTextList.3 -#usr/share/man/man3/Xv.3 -#usr/share/man/man3/XvFreeAdaptorInfo.3 -#usr/share/man/man3/XvFreeEncodingInfo.3 -#usr/share/man/man3/XvGetPortAttribute.3 -#usr/share/man/man3/XvGetStill.3 -#usr/share/man/man3/XvGetVideo.3 -#usr/share/man/man3/XvGrabPort.3 -#usr/share/man/man3/XvPortNotify.3 -#usr/share/man/man3/XvPutStill.3 -#usr/share/man/man3/XvPutVideo.3 -#usr/share/man/man3/XvQueryAdaptors.3 -#usr/share/man/man3/XvQueryBestSize.3 -#usr/share/man/man3/XvQueryEncodings.3 -#usr/share/man/man3/XvQueryExtension.3 -#usr/share/man/man3/XvSelectPortNotify.3 -#usr/share/man/man3/XvSelectVideoNotify.3 -#usr/share/man/man3/XvSetPortAttribute.3 -#usr/share/man/man3/XvStopVideo.3 -#usr/share/man/man3/XvUngrabPort.3 -#usr/share/man/man3/XvVideoNotify.3 -#usr/share/man/man3/XwcDrawImageString.3 -#usr/share/man/man3/XwcDrawString.3 -#usr/share/man/man3/XwcDrawText.3 -#usr/share/man/man3/XwcFreeStringList.3 -#usr/share/man/man3/XwcLookupString.3 -#usr/share/man/man3/XwcResetIC.3 -#usr/share/man/man3/XwcTextEscapement.3 -#usr/share/man/man3/XwcTextExtents.3 -#usr/share/man/man3/XwcTextListToTextProperty.3 -#usr/share/man/man3/XwcTextPerCharExtents.3 -#usr/share/man/man3/XwcTextPropertyToTextList.3 -usr/share/xcb -usr/share/xcb/bigreq.xml -usr/share/xcb/composite.xml -usr/share/xcb/damage.xml -usr/share/xcb/dpms.xml -usr/share/xcb/glx.xml -usr/share/xcb/randr.xml -usr/share/xcb/record.xml -usr/share/xcb/render.xml -usr/share/xcb/res.xml -usr/share/xcb/screensaver.xml -usr/share/xcb/shape.xml -usr/share/xcb/shm.xml -usr/share/xcb/sync.xml -usr/share/xcb/xc_misc.xml -usr/share/xcb/xcb.xsd -usr/share/xcb/xevie.xml -usr/share/xcb/xf86dri.xml -usr/share/xcb/xfixes.xml -usr/share/xcb/xinerama.xml -usr/share/xcb/xprint.xml -usr/share/xcb/xproto.xml -usr/share/xcb/xtest.xml -usr/share/xcb/xv.xml -usr/share/xcb/xvmc.xml diff --git a/config/rootfiles/packages/xen-disabled b/config/rootfiles/packages/xen-disabled deleted file mode 100644 index 2ecc82d..0000000 --- a/config/rootfiles/packages/xen-disabled +++ /dev/null @@ -1,667 +0,0 @@ -boot/xen-3.4.0.gz -boot/xen-3.4.gz -boot/xen-3.gz -boot/xen-syms-3.4.0 -boot/xen.gz -etc/rc.d/init.d/xend -etc/rc.d/init.d/xendomains -etc/sysconfig/xendomains -etc/udev/rules.d/xen-backend.rules -etc/udev/rules.d/xend.rules -etc/udev/xen-backend.rules -etc/udev/xend.rules -etc/xen -#etc/xen/README -#etc/xen/README.incompatibilities -etc/xen/auto -etc/xen/qemu-ifup -etc/xen/scripts -etc/xen/scripts/block -etc/xen/scripts/block-common.sh -etc/xen/scripts/block-enbd -etc/xen/scripts/block-nbd -etc/xen/scripts/external-device-migrate -etc/xen/scripts/locking.sh -etc/xen/scripts/logging.sh -etc/xen/scripts/network-bridge -etc/xen/scripts/network-nat -etc/xen/scripts/network-route -etc/xen/scripts/vif-bridge -etc/xen/scripts/vif-common.sh -etc/xen/scripts/vif-nat -etc/xen/scripts/vif-route -etc/xen/scripts/vscsi -etc/xen/scripts/vtpm -etc/xen/scripts/vtpm-common.sh -etc/xen/scripts/vtpm-delete -etc/xen/scripts/vtpm-hotplug-common.sh -etc/xen/scripts/vtpm-impl -etc/xen/scripts/vtpm-migration.sh -etc/xen/scripts/xen-hotplug-cleanup -etc/xen/scripts/xen-hotplug-common.sh -etc/xen/scripts/xen-network-common.sh -etc/xen/scripts/xen-script-common.sh -etc/xen/xend-config.sxp -etc/xen/xend-pci-permissive.sxp -etc/xen/xend-pci-quirks.sxp -etc/xen/xm-config.xml -etc/xen/xmexample.hvm -#etc/xen/xmexample.hvm-dm -etc/xen/xmexample.hvm-stubdom -etc/xen/xmexample.nbd -etc/xen/xmexample.pv-grub -etc/xen/xmexample.vti -etc/xen/xmexample1 -etc/xen/xmexample2 -etc/xen/xmexample3 -usr/bin/pygrub -usr/bin/qemu-img-xen -usr/bin/qemu-nbd-xen -usr/bin/xen-detect -usr/bin/xencons -usr/bin/xenstore -usr/bin/xenstore-chmod -usr/bin/xenstore-control -usr/bin/xenstore-exists -usr/bin/xenstore-list -usr/bin/xenstore-ls -usr/bin/xenstore-read -usr/bin/xenstore-rm -usr/bin/xenstore-write -usr/bin/xentrace -usr/bin/xentrace_format -usr/bin/xentrace_setsize -#usr/include/blktaplib.h -#usr/include/flask.h -#usr/include/fsimage.h -#usr/include/fsimage_grub.h -#usr/include/fsimage_plugin.h -#usr/include/xen -#usr/include/xen/COPYING -#usr/include/xen/arch-ia64 -#usr/include/xen/arch-ia64.h -#usr/include/xen/arch-ia64/debug_op.h -#usr/include/xen/arch-ia64/hvm -#usr/include/xen/arch-ia64/hvm/memmap.h -#usr/include/xen/arch-ia64/hvm/save.h -#usr/include/xen/arch-ia64/sioemu.h -#usr/include/xen/arch-x86 -#usr/include/xen/arch-x86/cpuid.h -#usr/include/xen/arch-x86/hvm -#usr/include/xen/arch-x86/hvm/save.h -#usr/include/xen/arch-x86/xen-mca.h -#usr/include/xen/arch-x86/xen-x86_32.h -#usr/include/xen/arch-x86/xen-x86_64.h -#usr/include/xen/arch-x86/xen.h -#usr/include/xen/arch-x86_32.h -#usr/include/xen/arch-x86_64.h -#usr/include/xen/callback.h -#usr/include/xen/dom0_ops.h -#usr/include/xen/domctl.h -#usr/include/xen/elfnote.h -#usr/include/xen/event_channel.h -#usr/include/xen/features.h -#usr/include/xen/foreign -#usr/include/xen/foreign/ia64.h -#usr/include/xen/foreign/x86_32.h -#usr/include/xen/foreign/x86_64.h -#usr/include/xen/grant_table.h -#usr/include/xen/hvm -#usr/include/xen/hvm/e820.h -#usr/include/xen/hvm/hvm_info_table.h -#usr/include/xen/hvm/hvm_op.h -#usr/include/xen/hvm/ioreq.h -#usr/include/xen/hvm/params.h -#usr/include/xen/hvm/save.h -#usr/include/xen/io -#usr/include/xen/io/blkif.h -#usr/include/xen/io/console.h -#usr/include/xen/io/fbif.h -#usr/include/xen/io/fsif.h -#usr/include/xen/io/kbdif.h -#usr/include/xen/io/netif.h -#usr/include/xen/io/pciif.h -#usr/include/xen/io/protocols.h -#usr/include/xen/io/ring.h -#usr/include/xen/io/tpmif.h -#usr/include/xen/io/usbif.h -#usr/include/xen/io/vscsiif.h -#usr/include/xen/io/xenbus.h -#usr/include/xen/io/xs_wire.h -#usr/include/xen/kexec.h -#usr/include/xen/memory.h -#usr/include/xen/nmi.h -#usr/include/xen/physdev.h -#usr/include/xen/platform.h -#usr/include/xen/sched.h -#usr/include/xen/sys -#usr/include/xen/sys/evtchn.h -#usr/include/xen/sys/gntdev.h -#usr/include/xen/sys/privcmd.h -#usr/include/xen/sysctl.h -#usr/include/xen/trace.h -#usr/include/xen/vcpu.h -#usr/include/xen/version.h -#usr/include/xen/xen-compat.h -#usr/include/xen/xen.h -#usr/include/xen/xencomm.h -#usr/include/xen/xenoprof.h -#usr/include/xen/xsm -#usr/include/xen/xsm/acm.h -#usr/include/xen/xsm/acm_ops.h -#usr/include/xen/xsm/flask_op.h -#usr/include/xenctrl.h -#usr/include/xenguest.h -#usr/include/xs.h -#usr/include/xs_lib.h -usr/lib/fs -usr/lib/fs/ext2fs-lib -usr/lib/fs/ext2fs-lib/fsimage.so -usr/lib/fs/fat -usr/lib/fs/fat/fsimage.so -usr/lib/fs/iso9660 -usr/lib/fs/iso9660/fsimage.so -usr/lib/fs/reiserfs -usr/lib/fs/reiserfs/fsimage.so -usr/lib/fs/ufs -usr/lib/fs/ufs/fsimage.so -usr/lib/fs/zfs -usr/lib/fs/zfs/fsimage.so -#usr/lib/libblktap.a -usr/lib/libblktap.so -usr/lib/libblktap.so.3.0 -usr/lib/libblktap.so.3.0.0 -#usr/lib/libflask.a -usr/lib/libflask.so -usr/lib/libflask.so.1.0 -usr/lib/libflask.so.1.0.0 -usr/lib/libfsimage.so -usr/lib/libfsimage.so.1.0 -usr/lib/libfsimage.so.1.0.0 -#usr/lib/libxenctrl.a -usr/lib/libxenctrl.so -usr/lib/libxenctrl.so.3.4 -usr/lib/libxenctrl.so.3.4.0 -#usr/lib/libxenguest.a -usr/lib/libxenguest.so -usr/lib/libxenguest.so.3.4 -usr/lib/libxenguest.so.3.4.0 -#usr/lib/libxenstore.a -usr/lib/libxenstore.so -usr/lib/libxenstore.so.3.0 -usr/lib/libxenstore.so.3.0.0 -usr/lib/python2.4/site-packages/fsimage.so -usr/lib/python2.4/site-packages/grub -usr/lib/python2.4/site-packages/grub/GrubConf.py -usr/lib/python2.4/site-packages/grub/GrubConf.pyc -usr/lib/python2.4/site-packages/grub/LiloConf.py -usr/lib/python2.4/site-packages/grub/LiloConf.pyc -usr/lib/python2.4/site-packages/grub/__init__.py -usr/lib/python2.4/site-packages/grub/__init__.pyc -usr/lib/python2.4/site-packages/xen -usr/lib/python2.4/site-packages/xen/__init__.py -usr/lib/python2.4/site-packages/xen/__init__.pyc -usr/lib/python2.4/site-packages/xen/lowlevel -usr/lib/python2.4/site-packages/xen/lowlevel/__init__.py -usr/lib/python2.4/site-packages/xen/lowlevel/__init__.pyc -usr/lib/python2.4/site-packages/xen/lowlevel/acm.so -usr/lib/python2.4/site-packages/xen/lowlevel/flask.so -usr/lib/python2.4/site-packages/xen/lowlevel/ptsname.so -usr/lib/python2.4/site-packages/xen/lowlevel/xc.so -usr/lib/python2.4/site-packages/xen/lowlevel/xs.so -usr/lib/python2.4/site-packages/xen/sv -usr/lib/python2.4/site-packages/xen/sv/CreateDomain.py -usr/lib/python2.4/site-packages/xen/sv/CreateDomain.pyc -usr/lib/python2.4/site-packages/xen/sv/DomInfo.py -usr/lib/python2.4/site-packages/xen/sv/DomInfo.pyc -usr/lib/python2.4/site-packages/xen/sv/GenTabbed.py -usr/lib/python2.4/site-packages/xen/sv/GenTabbed.pyc -usr/lib/python2.4/site-packages/xen/sv/HTMLBase.py -usr/lib/python2.4/site-packages/xen/sv/HTMLBase.pyc -usr/lib/python2.4/site-packages/xen/sv/Main.py -usr/lib/python2.4/site-packages/xen/sv/Main.pyc -usr/lib/python2.4/site-packages/xen/sv/NodeInfo.py -usr/lib/python2.4/site-packages/xen/sv/NodeInfo.pyc -usr/lib/python2.4/site-packages/xen/sv/RestoreDomain.py -usr/lib/python2.4/site-packages/xen/sv/RestoreDomain.pyc -usr/lib/python2.4/site-packages/xen/sv/Wizard.py -usr/lib/python2.4/site-packages/xen/sv/Wizard.pyc -usr/lib/python2.4/site-packages/xen/sv/__init__.py -usr/lib/python2.4/site-packages/xen/sv/__init__.pyc -usr/lib/python2.4/site-packages/xen/sv/util.py -usr/lib/python2.4/site-packages/xen/sv/util.pyc -usr/lib/python2.4/site-packages/xen/util -usr/lib/python2.4/site-packages/xen/util/Brctl.py -usr/lib/python2.4/site-packages/xen/util/Brctl.pyc -usr/lib/python2.4/site-packages/xen/util/SSHTransport.py -usr/lib/python2.4/site-packages/xen/util/SSHTransport.pyc -usr/lib/python2.4/site-packages/xen/util/__init__.py -usr/lib/python2.4/site-packages/xen/util/__init__.pyc -usr/lib/python2.4/site-packages/xen/util/acmpolicy.py -usr/lib/python2.4/site-packages/xen/util/acmpolicy.pyc -usr/lib/python2.4/site-packages/xen/util/asserts.py -usr/lib/python2.4/site-packages/xen/util/asserts.pyc -usr/lib/python2.4/site-packages/xen/util/auxbin.py -usr/lib/python2.4/site-packages/xen/util/auxbin.pyc -usr/lib/python2.4/site-packages/xen/util/blkif.py -usr/lib/python2.4/site-packages/xen/util/blkif.pyc -usr/lib/python2.4/site-packages/xen/util/bootloader.py -usr/lib/python2.4/site-packages/xen/util/bootloader.pyc -usr/lib/python2.4/site-packages/xen/util/bugtool.py -usr/lib/python2.4/site-packages/xen/util/bugtool.pyc -usr/lib/python2.4/site-packages/xen/util/diagnose.py -usr/lib/python2.4/site-packages/xen/util/diagnose.pyc -usr/lib/python2.4/site-packages/xen/util/dictio.py -usr/lib/python2.4/site-packages/xen/util/dictio.pyc -usr/lib/python2.4/site-packages/xen/util/ip.py -usr/lib/python2.4/site-packages/xen/util/ip.pyc -usr/lib/python2.4/site-packages/xen/util/mac.py -usr/lib/python2.4/site-packages/xen/util/mac.pyc -usr/lib/python2.4/site-packages/xen/util/mkdir.py -usr/lib/python2.4/site-packages/xen/util/mkdir.pyc -usr/lib/python2.4/site-packages/xen/util/oshelp.py -usr/lib/python2.4/site-packages/xen/util/oshelp.pyc -usr/lib/python2.4/site-packages/xen/util/pci.py -usr/lib/python2.4/site-packages/xen/util/pci.pyc -usr/lib/python2.4/site-packages/xen/util/rwlock.py -usr/lib/python2.4/site-packages/xen/util/rwlock.pyc -usr/lib/python2.4/site-packages/xen/util/utils.py -usr/lib/python2.4/site-packages/xen/util/utils.pyc -usr/lib/python2.4/site-packages/xen/util/vscsi_util.py -usr/lib/python2.4/site-packages/xen/util/vscsi_util.pyc -usr/lib/python2.4/site-packages/xen/util/xmlrpcclient.py -usr/lib/python2.4/site-packages/xen/util/xmlrpcclient.pyc -usr/lib/python2.4/site-packages/xen/util/xmlrpclib2.py -usr/lib/python2.4/site-packages/xen/util/xmlrpclib2.pyc -usr/lib/python2.4/site-packages/xen/util/xpopen.py -usr/lib/python2.4/site-packages/xen/util/xpopen.pyc -usr/lib/python2.4/site-packages/xen/util/xsconstants.py -usr/lib/python2.4/site-packages/xen/util/xsconstants.pyc -usr/lib/python2.4/site-packages/xen/util/xsm -usr/lib/python2.4/site-packages/xen/util/xsm/__init__.py -usr/lib/python2.4/site-packages/xen/util/xsm/__init__.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/acm -usr/lib/python2.4/site-packages/xen/util/xsm/acm/__init__.py -usr/lib/python2.4/site-packages/xen/util/xsm/acm/__init__.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/acm/acm.py -usr/lib/python2.4/site-packages/xen/util/xsm/acm/acm.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/dummy -usr/lib/python2.4/site-packages/xen/util/xsm/dummy/__init__.py -usr/lib/python2.4/site-packages/xen/util/xsm/dummy/__init__.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/dummy/dummy.py -usr/lib/python2.4/site-packages/xen/util/xsm/dummy/dummy.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/flask -usr/lib/python2.4/site-packages/xen/util/xsm/flask/__init__.py -usr/lib/python2.4/site-packages/xen/util/xsm/flask/__init__.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/flask/flask.py -usr/lib/python2.4/site-packages/xen/util/xsm/flask/flask.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/xsm.py -usr/lib/python2.4/site-packages/xen/util/xsm/xsm.pyc -usr/lib/python2.4/site-packages/xen/util/xsm/xsm_core.py -usr/lib/python2.4/site-packages/xen/util/xsm/xsm_core.pyc -usr/lib/python2.4/site-packages/xen/util/xspolicy.py -usr/lib/python2.4/site-packages/xen/util/xspolicy.pyc -usr/lib/python2.4/site-packages/xen/web -usr/lib/python2.4/site-packages/xen/web/SrvBase.py -usr/lib/python2.4/site-packages/xen/web/SrvBase.pyc -usr/lib/python2.4/site-packages/xen/web/SrvDir.py -usr/lib/python2.4/site-packages/xen/web/SrvDir.pyc -usr/lib/python2.4/site-packages/xen/web/__init__.py -usr/lib/python2.4/site-packages/xen/web/__init__.pyc -usr/lib/python2.4/site-packages/xen/web/connection.py -usr/lib/python2.4/site-packages/xen/web/connection.pyc -usr/lib/python2.4/site-packages/xen/web/http.py -usr/lib/python2.4/site-packages/xen/web/http.pyc -usr/lib/python2.4/site-packages/xen/web/httpserver.py -usr/lib/python2.4/site-packages/xen/web/httpserver.pyc -usr/lib/python2.4/site-packages/xen/web/protocol.py -usr/lib/python2.4/site-packages/xen/web/protocol.pyc -usr/lib/python2.4/site-packages/xen/web/resource.py -usr/lib/python2.4/site-packages/xen/web/resource.pyc -usr/lib/python2.4/site-packages/xen/web/static.py -usr/lib/python2.4/site-packages/xen/web/static.pyc -usr/lib/python2.4/site-packages/xen/web/tcp.py -usr/lib/python2.4/site-packages/xen/web/tcp.pyc -usr/lib/python2.4/site-packages/xen/web/unix.py -usr/lib/python2.4/site-packages/xen/web/unix.pyc -usr/lib/python2.4/site-packages/xen/xend -usr/lib/python2.4/site-packages/xen/xend/Args.py -usr/lib/python2.4/site-packages/xen/xend/Args.pyc -usr/lib/python2.4/site-packages/xen/xend/PrettyPrint.py -usr/lib/python2.4/site-packages/xen/xend/PrettyPrint.pyc -usr/lib/python2.4/site-packages/xen/xend/Vifctl.py -usr/lib/python2.4/site-packages/xen/xend/Vifctl.pyc -usr/lib/python2.4/site-packages/xen/xend/XendAPI.py -usr/lib/python2.4/site-packages/xen/xend/XendAPI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendAPIConstants.py -usr/lib/python2.4/site-packages/xen/xend/XendAPIConstants.pyc -usr/lib/python2.4/site-packages/xen/xend/XendAPIStore.py -usr/lib/python2.4/site-packages/xen/xend/XendAPIStore.pyc -usr/lib/python2.4/site-packages/xen/xend/XendAPIVersion.py -usr/lib/python2.4/site-packages/xen/xend/XendAPIVersion.pyc -usr/lib/python2.4/site-packages/xen/xend/XendAuthSessions.py -usr/lib/python2.4/site-packages/xen/xend/XendAuthSessions.pyc -usr/lib/python2.4/site-packages/xen/xend/XendBase.py -usr/lib/python2.4/site-packages/xen/xend/XendBase.pyc -usr/lib/python2.4/site-packages/xen/xend/XendBootloader.py -usr/lib/python2.4/site-packages/xen/xend/XendBootloader.pyc -usr/lib/python2.4/site-packages/xen/xend/XendCheckpoint.py -usr/lib/python2.4/site-packages/xen/xend/XendCheckpoint.pyc -usr/lib/python2.4/site-packages/xen/xend/XendClient.py -usr/lib/python2.4/site-packages/xen/xend/XendClient.pyc -usr/lib/python2.4/site-packages/xen/xend/XendConfig.py -usr/lib/python2.4/site-packages/xen/xend/XendConfig.pyc -usr/lib/python2.4/site-packages/xen/xend/XendConstants.py -usr/lib/python2.4/site-packages/xen/xend/XendConstants.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDPCI.py -usr/lib/python2.4/site-packages/xen/xend/XendDPCI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDSCSI.py -usr/lib/python2.4/site-packages/xen/xend/XendDSCSI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDevices.py -usr/lib/python2.4/site-packages/xen/xend/XendDevices.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDmesg.py -usr/lib/python2.4/site-packages/xen/xend/XendDmesg.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDomain.py -usr/lib/python2.4/site-packages/xen/xend/XendDomain.pyc -usr/lib/python2.4/site-packages/xen/xend/XendDomainInfo.py -usr/lib/python2.4/site-packages/xen/xend/XendDomainInfo.pyc -usr/lib/python2.4/site-packages/xen/xend/XendError.py -usr/lib/python2.4/site-packages/xen/xend/XendError.pyc -usr/lib/python2.4/site-packages/xen/xend/XendLocalStorageRepo.py -usr/lib/python2.4/site-packages/xen/xend/XendLocalStorageRepo.pyc -usr/lib/python2.4/site-packages/xen/xend/XendLogging.py -usr/lib/python2.4/site-packages/xen/xend/XendLogging.pyc -usr/lib/python2.4/site-packages/xen/xend/XendMonitor.py -usr/lib/python2.4/site-packages/xen/xend/XendMonitor.pyc -usr/lib/python2.4/site-packages/xen/xend/XendNetwork.py -usr/lib/python2.4/site-packages/xen/xend/XendNetwork.pyc -usr/lib/python2.4/site-packages/xen/xend/XendNode.py -usr/lib/python2.4/site-packages/xen/xend/XendNode.pyc -usr/lib/python2.4/site-packages/xen/xend/XendOptions.py -usr/lib/python2.4/site-packages/xen/xend/XendOptions.pyc -usr/lib/python2.4/site-packages/xen/xend/XendPBD.py -usr/lib/python2.4/site-packages/xen/xend/XendPBD.pyc -usr/lib/python2.4/site-packages/xen/xend/XendPIF.py -usr/lib/python2.4/site-packages/xen/xend/XendPIF.pyc -usr/lib/python2.4/site-packages/xen/xend/XendPIFMetrics.py -usr/lib/python2.4/site-packages/xen/xend/XendPIFMetrics.pyc -usr/lib/python2.4/site-packages/xen/xend/XendPPCI.py -usr/lib/python2.4/site-packages/xen/xend/XendPPCI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendPSCSI.py -usr/lib/python2.4/site-packages/xen/xend/XendPSCSI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendProtocol.py -usr/lib/python2.4/site-packages/xen/xend/XendProtocol.pyc -usr/lib/python2.4/site-packages/xen/xend/XendQCoWStorageRepo.py -usr/lib/python2.4/site-packages/xen/xend/XendQCoWStorageRepo.pyc -usr/lib/python2.4/site-packages/xen/xend/XendStateStore.py -usr/lib/python2.4/site-packages/xen/xend/XendStateStore.pyc -usr/lib/python2.4/site-packages/xen/xend/XendStorageRepository.py -usr/lib/python2.4/site-packages/xen/xend/XendStorageRepository.pyc -usr/lib/python2.4/site-packages/xen/xend/XendTask.py -usr/lib/python2.4/site-packages/xen/xend/XendTask.pyc -usr/lib/python2.4/site-packages/xen/xend/XendTaskManager.py -usr/lib/python2.4/site-packages/xen/xend/XendTaskManager.pyc -usr/lib/python2.4/site-packages/xen/xend/XendVDI.py -usr/lib/python2.4/site-packages/xen/xend/XendVDI.pyc -usr/lib/python2.4/site-packages/xen/xend/XendVMMetrics.py -usr/lib/python2.4/site-packages/xen/xend/XendVMMetrics.pyc -usr/lib/python2.4/site-packages/xen/xend/XendVnet.py -usr/lib/python2.4/site-packages/xen/xend/XendVnet.pyc -usr/lib/python2.4/site-packages/xen/xend/XendXSPolicy.py -usr/lib/python2.4/site-packages/xen/xend/XendXSPolicy.pyc -usr/lib/python2.4/site-packages/xen/xend/XendXSPolicyAdmin.py -usr/lib/python2.4/site-packages/xen/xend/XendXSPolicyAdmin.pyc -usr/lib/python2.4/site-packages/xen/xend/__init__.py -usr/lib/python2.4/site-packages/xen/xend/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/arch.py -usr/lib/python2.4/site-packages/xen/xend/arch.pyc -usr/lib/python2.4/site-packages/xen/xend/balloon.py -usr/lib/python2.4/site-packages/xen/xend/balloon.pyc -usr/lib/python2.4/site-packages/xen/xend/encode.py -usr/lib/python2.4/site-packages/xen/xend/encode.pyc -usr/lib/python2.4/site-packages/xen/xend/image.py -usr/lib/python2.4/site-packages/xen/xend/image.pyc -usr/lib/python2.4/site-packages/xen/xend/osdep.py -usr/lib/python2.4/site-packages/xen/xend/osdep.pyc -usr/lib/python2.4/site-packages/xen/xend/server -usr/lib/python2.4/site-packages/xen/xend/server/BlktapController.py -usr/lib/python2.4/site-packages/xen/xend/server/BlktapController.pyc -usr/lib/python2.4/site-packages/xen/xend/server/ConsoleController.py -usr/lib/python2.4/site-packages/xen/xend/server/ConsoleController.pyc -usr/lib/python2.4/site-packages/xen/xend/server/DevConstants.py -usr/lib/python2.4/site-packages/xen/xend/server/DevConstants.pyc -usr/lib/python2.4/site-packages/xen/xend/server/DevController.py -usr/lib/python2.4/site-packages/xen/xend/server/DevController.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SSLXMLRPCServer.py -usr/lib/python2.4/site-packages/xen/xend/server/SSLXMLRPCServer.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvDaemon.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvDaemon.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvDmesg.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvDmesg.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvDomain.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvDomain.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvDomainDir.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvDomainDir.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvNode.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvNode.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvRoot.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvRoot.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvServer.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvServer.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvVnetDir.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvVnetDir.pyc -usr/lib/python2.4/site-packages/xen/xend/server/SrvXendLog.py -usr/lib/python2.4/site-packages/xen/xend/server/SrvXendLog.pyc -usr/lib/python2.4/site-packages/xen/xend/server/XMLRPCServer.py -usr/lib/python2.4/site-packages/xen/xend/server/XMLRPCServer.pyc -usr/lib/python2.4/site-packages/xen/xend/server/__init__.py -usr/lib/python2.4/site-packages/xen/xend/server/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/server/blkif.py -usr/lib/python2.4/site-packages/xen/xend/server/blkif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/iopif.py -usr/lib/python2.4/site-packages/xen/xend/server/iopif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/irqif.py -usr/lib/python2.4/site-packages/xen/xend/server/irqif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/netif.py -usr/lib/python2.4/site-packages/xen/xend/server/netif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/params.py -usr/lib/python2.4/site-packages/xen/xend/server/params.pyc -usr/lib/python2.4/site-packages/xen/xend/server/pciif.py -usr/lib/python2.4/site-packages/xen/xend/server/pciif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/pciquirk.py -usr/lib/python2.4/site-packages/xen/xend/server/pciquirk.pyc -usr/lib/python2.4/site-packages/xen/xend/server/relocate.py -usr/lib/python2.4/site-packages/xen/xend/server/relocate.pyc -usr/lib/python2.4/site-packages/xen/xend/server/tests -usr/lib/python2.4/site-packages/xen/xend/server/tests/__init__.py -usr/lib/python2.4/site-packages/xen/xend/server/tests/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/server/tests/test_controllers.py -usr/lib/python2.4/site-packages/xen/xend/server/tests/test_controllers.pyc -usr/lib/python2.4/site-packages/xen/xend/server/tpmif.py -usr/lib/python2.4/site-packages/xen/xend/server/tpmif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/udevevent.py -usr/lib/python2.4/site-packages/xen/xend/server/udevevent.pyc -usr/lib/python2.4/site-packages/xen/xend/server/vfbif.py -usr/lib/python2.4/site-packages/xen/xend/server/vfbif.pyc -usr/lib/python2.4/site-packages/xen/xend/server/vscsiif.py -usr/lib/python2.4/site-packages/xen/xend/server/vscsiif.pyc -usr/lib/python2.4/site-packages/xen/xend/sxp.py -usr/lib/python2.4/site-packages/xen/xend/sxp.pyc -usr/lib/python2.4/site-packages/xen/xend/tests -usr/lib/python2.4/site-packages/xen/xend/tests/__init__.py -usr/lib/python2.4/site-packages/xen/xend/tests/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/tests/test_XendConfig.py -usr/lib/python2.4/site-packages/xen/xend/tests/test_XendConfig.pyc -usr/lib/python2.4/site-packages/xen/xend/tests/test_sxp.py -usr/lib/python2.4/site-packages/xen/xend/tests/test_sxp.pyc -usr/lib/python2.4/site-packages/xen/xend/tests/test_uuid.py -usr/lib/python2.4/site-packages/xen/xend/tests/test_uuid.pyc -usr/lib/python2.4/site-packages/xen/xend/uuid.py -usr/lib/python2.4/site-packages/xen/xend/uuid.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore -usr/lib/python2.4/site-packages/xen/xend/xenstore/__init__.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore/tests -usr/lib/python2.4/site-packages/xen/xend/xenstore/tests/__init__.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/tests/__init__.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore/tests/stress_xs.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/tests/stress_xs.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore/xstransact.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/xstransact.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore/xsutil.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/xsutil.pyc -usr/lib/python2.4/site-packages/xen/xend/xenstore/xswatch.py -usr/lib/python2.4/site-packages/xen/xend/xenstore/xswatch.pyc -usr/lib/python2.4/site-packages/xen/xm -usr/lib/python2.4/site-packages/xen/xm/XenAPI.py -usr/lib/python2.4/site-packages/xen/xm/XenAPI.pyc -usr/lib/python2.4/site-packages/xen/xm/__init__.py -usr/lib/python2.4/site-packages/xen/xm/__init__.pyc -usr/lib/python2.4/site-packages/xen/xm/addlabel.py -usr/lib/python2.4/site-packages/xen/xm/addlabel.pyc -usr/lib/python2.4/site-packages/xen/xm/console.py -usr/lib/python2.4/site-packages/xen/xm/console.pyc -usr/lib/python2.4/site-packages/xen/xm/create.py -usr/lib/python2.4/site-packages/xen/xm/create.pyc -usr/lib/python2.4/site-packages/xen/xm/dry-run.py -usr/lib/python2.4/site-packages/xen/xm/dry-run.pyc -usr/lib/python2.4/site-packages/xen/xm/dumppolicy.py -usr/lib/python2.4/site-packages/xen/xm/dumppolicy.pyc -usr/lib/python2.4/site-packages/xen/xm/getlabel.py -usr/lib/python2.4/site-packages/xen/xm/getlabel.pyc -usr/lib/python2.4/site-packages/xen/xm/getpolicy.py -usr/lib/python2.4/site-packages/xen/xm/getpolicy.pyc -usr/lib/python2.4/site-packages/xen/xm/help.py -usr/lib/python2.4/site-packages/xen/xm/help.pyc -usr/lib/python2.4/site-packages/xen/xm/labels.py -usr/lib/python2.4/site-packages/xen/xm/labels.pyc -usr/lib/python2.4/site-packages/xen/xm/main.py -usr/lib/python2.4/site-packages/xen/xm/main.pyc -usr/lib/python2.4/site-packages/xen/xm/migrate.py -usr/lib/python2.4/site-packages/xen/xm/migrate.pyc -usr/lib/python2.4/site-packages/xen/xm/new.py -usr/lib/python2.4/site-packages/xen/xm/new.pyc -usr/lib/python2.4/site-packages/xen/xm/opts.py -usr/lib/python2.4/site-packages/xen/xm/opts.pyc -usr/lib/python2.4/site-packages/xen/xm/resetpolicy.py -usr/lib/python2.4/site-packages/xen/xm/resetpolicy.pyc -usr/lib/python2.4/site-packages/xen/xm/resources.py -usr/lib/python2.4/site-packages/xen/xm/resources.pyc -usr/lib/python2.4/site-packages/xen/xm/rmlabel.py -usr/lib/python2.4/site-packages/xen/xm/rmlabel.pyc -usr/lib/python2.4/site-packages/xen/xm/setpolicy.py -usr/lib/python2.4/site-packages/xen/xm/setpolicy.pyc -usr/lib/python2.4/site-packages/xen/xm/shutdown.py -usr/lib/python2.4/site-packages/xen/xm/shutdown.pyc -usr/lib/python2.4/site-packages/xen/xm/tests -usr/lib/python2.4/site-packages/xen/xm/tests/__init__.py -usr/lib/python2.4/site-packages/xen/xm/tests/__init__.pyc -usr/lib/python2.4/site-packages/xen/xm/tests/test_create.py -usr/lib/python2.4/site-packages/xen/xm/tests/test_create.pyc -usr/lib/python2.4/site-packages/xen/xm/xenapi_create.py -usr/lib/python2.4/site-packages/xen/xm/xenapi_create.pyc -usr/lib/python2.4/site-packages/xen/xsview -usr/lib/python2.4/site-packages/xen/xsview/__init__.py -usr/lib/python2.4/site-packages/xen/xsview/__init__.pyc -usr/lib/python2.4/site-packages/xen/xsview/main.py -usr/lib/python2.4/site-packages/xen/xsview/main.pyc -usr/lib/python2.4/site-packages/xen/xsview/xsviewer.py -usr/lib/python2.4/site-packages/xen/xsview/xsviewer.pyc -usr/lib/xen -usr/lib/xen/bin -usr/lib/xen/bin/lsevtchn -usr/lib/xen/bin/qemu-dm -usr/lib/xen/bin/readnotes -usr/lib/xen/bin/xc_restore -usr/lib/xen/bin/xc_save -usr/lib/xen/bin/xenconsole -usr/lib/xen/bin/xenctx -usr/lib/xen/boot -usr/lib/xen/boot/hvmloader -usr/sbin/blktapctrl -usr/sbin/flask-loadpolicy -usr/sbin/fs-backend -usr/sbin/img2qcow -usr/sbin/qcow-create -usr/sbin/qcow2raw -usr/sbin/tapdisk -usr/sbin/xen-bugtool -usr/sbin/xen-python-path -usr/sbin/xenbaked -usr/sbin/xenconsoled -usr/sbin/xend -usr/sbin/xenmon.py -usr/sbin/xenperf -usr/sbin/xenpm -usr/sbin/xenpmd -usr/sbin/xenstored -usr/sbin/xentop -usr/sbin/xentrace_setmask -usr/sbin/xm -usr/sbin/xsview -#usr/share/doc/xen -#usr/share/doc/xen/README.blktap -#usr/share/doc/xen/README.xenmon -#usr/share/doc/xen/create.dtd -#usr/share/man/man1/xentop.1 -#usr/share/man/man1/xentrace_format.1 -#usr/share/man/man8/xentrace.8 -usr/share/xen -usr/share/xen/qemu -usr/share/xen/qemu/bamboo.dtb -usr/share/xen/qemu/bios.bin -usr/share/xen/qemu/keymaps -usr/share/xen/qemu/keymaps/ar -usr/share/xen/qemu/keymaps/common -usr/share/xen/qemu/keymaps/da -usr/share/xen/qemu/keymaps/de -usr/share/xen/qemu/keymaps/de-ch -usr/share/xen/qemu/keymaps/en-gb -usr/share/xen/qemu/keymaps/en-us -usr/share/xen/qemu/keymaps/es -usr/share/xen/qemu/keymaps/et -usr/share/xen/qemu/keymaps/fi -usr/share/xen/qemu/keymaps/fo -usr/share/xen/qemu/keymaps/fr -usr/share/xen/qemu/keymaps/fr-be -usr/share/xen/qemu/keymaps/fr-ca -usr/share/xen/qemu/keymaps/fr-ch -usr/share/xen/qemu/keymaps/hr -usr/share/xen/qemu/keymaps/hu -usr/share/xen/qemu/keymaps/is -usr/share/xen/qemu/keymaps/it -usr/share/xen/qemu/keymaps/ja -usr/share/xen/qemu/keymaps/lt -usr/share/xen/qemu/keymaps/lv -usr/share/xen/qemu/keymaps/mk -usr/share/xen/qemu/keymaps/modifiers -usr/share/xen/qemu/keymaps/nl -usr/share/xen/qemu/keymaps/nl-be -usr/share/xen/qemu/keymaps/no -usr/share/xen/qemu/keymaps/pl -usr/share/xen/qemu/keymaps/pt -usr/share/xen/qemu/keymaps/pt-br -usr/share/xen/qemu/keymaps/ru -usr/share/xen/qemu/keymaps/sl -usr/share/xen/qemu/keymaps/sv -usr/share/xen/qemu/keymaps/th -usr/share/xen/qemu/keymaps/tr -usr/share/xen/qemu/openbios-ppc -usr/share/xen/qemu/openbios-sparc32 -usr/share/xen/qemu/openbios-sparc64 -usr/share/xen/qemu/ppc_rom.bin -usr/share/xen/qemu/pxe-e1000.bin -usr/share/xen/qemu/pxe-ne2k_pci.bin -usr/share/xen/qemu/pxe-pcnet.bin -usr/share/xen/qemu/pxe-rtl8139.bin -usr/share/xen/qemu/vgabios-cirrus.bin -usr/share/xen/qemu/vgabios.bin -usr/share/xen/qemu/video.x -var/lib/xen -var/lib/xenstored -var/log/xen -var/run/xend -var/run/xend/boot -var/run/xenstored -var/xen -var/xen/dump diff --git a/lfs/atl1c b/lfs/atl1c deleted file mode 100644 index 0e67365..0000000 --- a/lfs/atl1c +++ /dev/null @@ -1,61 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2009 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = ipfire-1 - -THISAPP = atl1c -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -install : $(TARGET) - -check : - -download : - -md5 : - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cp -r $(DIR_SRC)/src/$(THISAPP) $(DIR_APP) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP) modules - cd $(DIR_APP) && install -m 644 atl1c.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/atl2 b/lfs/atl2 deleted file mode 100644 index 3d35ec3..0000000 --- a/lfs/atl2 +++ /dev/null @@ -1,86 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = 2.0.5 - -THISAPP = atl2-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = bbd5696cb6c7c6432d7338d783c408f2 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -p1 < $(DIR_SRC)/src/patches/atl2_add_tx_bytes_statistic.patch - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP) modules - cd $(DIR_APP) && install -m 644 atl2.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/compat-wireless b/lfs/compat-wireless deleted file mode 100644 index 8fb61c1..0000000 --- a/lfs/compat-wireless +++ /dev/null @@ -1,108 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2008 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX=ipfire-xen -else - VERSUFIX=ipfire -endif - -VER = 2.6.33.2 - -THISAPP = compat-wireless-$(VER) -DL_FILE = compat-wireless-$(VER).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 24438dddeda05694b94de450893847e3 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar xjf $(DIR_DL)/$(DL_FILE) - - cd $(DIR_APP) && make KLIB=/lib/modules/$(KVER)-$(VERSUFIX) KMODDIR=kernel install-modules - - # The makefile put the modules to a wrong place move back... - cp -rf /lib/modules/$(KVER)-$(VERSUFIX)/lib / - rm -rf /lib/modules/$(KVER)-$(VERSUFIX)/lib - - # Set Regulatory Domain to "EU" (use Channel 1-14 max. 20db) - echo options cfg80211 ieee80211_regdom=EU > /etc/modprobe.d/cfg80211 - - # Rename ieee80211 modules Because the conflicts with compat-wireless - -cd /lib/modules/$(KVER)-$(VERSUFIX)/kernel/net/ieee80211 && rename .ko .off * - - echo "# If you want to use hostap (prism drivers)" > /etc/modprobe.d/hostap - echo "# you must rename the ieee80211 modules. Run:" >> /etc/modprobe.d/hostap - echo "# rename .off .ko /lib/modules/*/kernel/net/ieee80211/*" >> /etc/modprobe.d/hostap - echo "# depmod -a" >> /etc/modprobe.d/hostap - echo >> /etc/modprobe.d/hostap - echo "# additional you need to blacklist the orinoco modules" >> /etc/modprobe.d/hostap - echo "# by uncommenting following lines" >> /etc/modprobe.d/hostap - echo >> /etc/modprobe.d/hostap - echo "#blacklist orinoco" >> /etc/modprobe.d/hostap - echo "#blacklist orinoco_cs" >> /etc/modprobe.d/hostap - echo "#blacklist orinoco_plx" >> /etc/modprobe.d/hostap - echo "#blacklist orinoco_pci" >> /etc/modprobe.d/hostap - echo "#blacklist orinoco_tmd" >> /etc/modprobe.d/hostap - echo "#blacklist orinoco_nortel" >> /etc/modprobe.d/hostap - - -rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/cryptsetup b/lfs/cryptsetup deleted file mode 100644 index bb6f109..0000000 --- a/lfs/cryptsetup +++ /dev/null @@ -1,85 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -PKG_NAME = cryptsetup -VER = 1.0.6 - -THISAPP = cryptsetup-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP) -PROG = cryptsetup -PAK_VER = 2 - -DEPS = "" - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 00d452eb7a76e39f5749545d48934a10 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && ./configure - cd $(DIR_APP) && make $(MAKETUNING) $(EXTRA_MAKE) - cd $(DIR_APP) && make install - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/e1000e b/lfs/e1000e deleted file mode 100644 index 79e5097..0000000 --- a/lfs/e1000e +++ /dev/null @@ -1,87 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = 1.0.2.5 - -THISAPP = e1000e-$(VER) -DL_FILE = $(THISAPP).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 734f171db3208285d1492401bd185aa0 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP)/src && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ \ - SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 e1000e.ko \ - /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/e1000e - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/et131x b/lfs/et131x deleted file mode 100644 index f23701b..0000000 --- a/lfs/et131x +++ /dev/null @@ -1,61 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2009 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = ipfire-1 - -THISAPP = et131x -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -install : $(TARGET) - -check : - -download : - -md5 : - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cp -r $(DIR_SRC)/src/$(THISAPP) $(DIR_APP) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP) modules - cd $(DIR_APP) && install -m 644 et131x.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/faad b/lfs/faad deleted file mode 100644 index bd258f7..0000000 --- a/lfs/faad +++ /dev/null @@ -1,84 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2010 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VER = 2.7 - -THISAPP = faad2-$(VER) -DL_FILE = $(THISAPP).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP) -PROG = faad2 -PAK_VER = 1 - -DEPS = "" - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = ee1b4d67ea2d76ee52c5621bc6dbf61e - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - @$(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && ./configure --prefix=/usr --enable-shared - cd $(DIR_APP) && make $(MAKETUNING) - cd $(DIR_APP) && make install - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/hso b/lfs/hso deleted file mode 100644 index 371d1c3..0000000 --- a/lfs/hso +++ /dev/null @@ -1,87 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = 1.9 - -THISAPP = hso-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/hso_26-v$(VER) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 6412b24ff8cf0527b52616e335ae24f0 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ \ - SUBDIRS=$(DIR_APP) modules - cd $(DIR_APP) && install -m 644 hso.ko \ - /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/usb - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/mISDN b/lfs/mISDN deleted file mode 100644 index b689a36..0000000 --- a/lfs/mISDN +++ /dev/null @@ -1,90 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX=ipfire-xen -else - VERSUFIX=ipfire -endif - -VER = 20090906 - -THISAPP = mISDN_$(VER) -DL_FILE = $(THISAPP).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = c5a9daab7fa18734127d481c8cfdac96 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_SRC)/mISDN* && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_SRC)/mISDN && patch -Np1 < $(DIR_SRC)/src/patches/mISDN-enable_disabled_cards.patch - cd $(DIR_SRC)/mISDN && patch -Np1 < $(DIR_SRC)/src/patches/mISDN-hfcusb_bchannels.patch - cd $(DIR_SRC)/mISDN && patch -Np1 < $(DIR_SRC)/src/patches/mISDN-hfcusb-reportl1down.patch - cd $(DIR_SRC)/mISDN && make KVERS=$(KVER)-$(VERSUFIX) force - cd $(DIR_SRC)/mISDN && make KVERS=$(KVER)-$(VERSUFIX) $(MAKETUNING) - cd $(DIR_SRC)/mISDN && make KVERS=$(KVER)-$(VERSUFIX) \ - INSTALL_PREFIX=$(DIR_SRC)/mISDN/dest/ \ - modules-install - mv $(DIR_SRC)/mISDN/dest/lib/modules/*/extra \ - /lib/modules/$(KVER)-$(VERSUFIX)/mISDN - @rm -rf $(DIR_SRC)/mISDN* - @$(POSTBUILD) diff --git a/lfs/openswan b/lfs/openswan deleted file mode 100644 index a5d6520..0000000 --- a/lfs/openswan +++ /dev/null @@ -1,122 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX=ipfire-xen -else - VERSUFIX=ipfire -endif - -VER = git-20100309 - -THISAPP = openswan.git -DL_FILE = openswan.$(VER).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) - -ifeq "$(KMOD)" "1" - TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) -else - TARGET = $(DIR_INFO)/$(THISAPP) -endif - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = f23b716b8ffb242436d8e713d93d209c - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - -ifeq "$(KMOD)" "1" - cd $(DIR_APP) && make KERNELSRC=/usr/src/linux module $(MAKETUNING) $(EXTRA_MAKE) - cd $(DIR_APP) && make minstall -else - cd $(DIR_APP) && sed -i \ - -e 's%^INC_USRLOCAL.*$$%INC_USRLOCAL=/usr%' \ - -e 's%^USERCOMPILE.*$$%USERCOMPILE=$(CFLAGS)%' \ - -e 's%^KLIPSCOMPILE.*$$%KLIPSCOMPILE=$(CFLAGS)%' \ - -e 's%^XMLTO.*$$%#&%' Makefile.inc - - cd $(DIR_APP) && patch -Np1 -i $(DIR_SRC)/src/patches/openswan-2.6.24_noxmlto.patch - - cd $(DIR_APP) && sed -i 's/-Werror//' programs/Makefile.program - - cd $(DIR_APP) && make programs - cd $(DIR_APP) && make install - - # don't know why make this doesnt made - cd $(DIR_APP) && cp -a programs/_confread/_confread.in /usr/lib/ipsec/_confread - - -rm -rfv /etc/rc*.d/*ipsec - cd $(DIR_SRC) && cp src/initscripts/init.d/ipsec /etc/rc.d/init.d/ipsec - rm -f /etc/ipsec.conf /etc/ipsec.secrets - ln -sf $(CONFIG_ROOT)/vpn/ipsec.conf /etc/ipsec.conf - ln -sf $(CONFIG_ROOT)/vpn/ipsec.secrets /etc/ipsec.secrets - - rm -rf /etc/ipsec.d/{cacerts,certs,crls} - ln -sf $(CONFIG_ROOT)/ca /etc/ipsec.d/cacerts - ln -sf $(CONFIG_ROOT)/certs /etc/ipsec.d/certs - ln -sf $(CONFIG_ROOT)/crls /etc/ipsec.d/crls - - cd /usr/lib/ipsec && patch -Np0 < $(DIR_SRC)/src/patches/openswan-2.6.16-startklips-1.patch - cd /usr/lib/ipsec && patch -Np0 < $(DIR_SRC)/src/patches/openswan-2.6.16-updown.klips-1.patch - cd /usr/lib/ipsec && patch -Np0 < $(DIR_SRC)/src/patches/openswan-2.6.23-updown-add_ipfire-snat.patch - cd /etc/ipsec.d/policies && patch -Np0 < $(DIR_SRC)/src/patches/openswan-2.6.16-clear-1.patch -endif - #@rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/r8101 b/lfs/r8101 deleted file mode 100644 index 8f92a76..0000000 --- a/lfs/r8101 +++ /dev/null @@ -1,61 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2009 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = ipfire-2 - -THISAPP = r8101 -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -install : $(TARGET) - -check : - -download : - -md5 : - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cp -r $(DIR_SRC)/src/$(THISAPP) $(DIR_APP) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP) modules - cd $(DIR_APP) && install -m 644 r8101.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/r8168 b/lfs/r8168 deleted file mode 100644 index f8efb91..0000000 --- a/lfs/r8168 +++ /dev/null @@ -1,85 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2009 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = 8.014.00 - -THISAPP = r8168-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = d69944138d576edf3f92adfe6242e753 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 r8168.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/r8169 b/lfs/r8169 deleted file mode 100644 index 2ed519d..0000000 --- a/lfs/r8169 +++ /dev/null @@ -1,89 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2009 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -ifeq "$(XEN)" "1" - VERSUFIX = ipfire-xen -else - VERSUFIX = ipfire -endif - -VER = 6.011.00 - -THISAPP = r8169-$(VER) -DL_FILE = $(THISAPP).tar.bz2 -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP)-kmod-$(KVER)-$(VERSUFIX) - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = c5e3ab4e6257cb63d46dc7929a2a5c13 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - $(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - #Save original r8169 module - -mv /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/r8169.ko \ - /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net/r8169.ko.org - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar jxf $(DIR_DL)/$(DL_FILE) - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/r8169_add_missing_pciids.patch - cd $(DIR_APP) && make -C /lib/modules/$(KVER)-$(VERSUFIX)/build/ SUBDIRS=$(DIR_APP)/src modules - cd $(DIR_APP)/src && install -m 644 r8169.ko /lib/modules/$(KVER)-$(VERSUFIX)/kernel/drivers/net - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/lfs/x11libs b/lfs/x11libs deleted file mode 100644 index 09fea90..0000000 --- a/lfs/x11libs +++ /dev/null @@ -1,97 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VER = core28-r1 - -THISAPP = x11libs-$(VER) -DL_FILE = $(THISAPP).tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP) -PROG = x11libs -PAK_VER = 1 -DEPS = "" - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = 4bd8907ab971fb8efacec575492d504b - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - @$(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - export XORG_PREFIX="/usr" - export XORG_CONFIG="--prefix=$XORG_PREFIX --sysconfdir=/etc --mandir=$XORG_PREFIX/share/man --localstatedir=/var" - cd $(DIR_APP) && ./install-proto.sh - cd $(DIR_APP) && ./install-util.sh - cd $(DIR_APP) && tar xvjf libXau-1.0.4.tar.bz2 && cd libXau-1.0.4 && ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man --localstatedir=/var && make && make install - cd $(DIR_APP) && tar xvjf libXdmcp-1.0.2.tar.bz2 && cd libXdmcp-1.0.2 && ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man --localstatedir=/var && make && make install - cd $(DIR_APP) && tar xvjf xcb-proto-1.1.tar.bz2 && cd xcb-proto-1.1 && ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man --localstatedir=/var && make && make install && install -dv -m755 /usr/share/doc/xcb-proto-1.1 && install -v -m644 doc/* /usr/share/doc/xcb-proto-1.1 - ## libpthread-stubs - cd $(DIR_APP) && tar xvjf libpthread-stubs-0.1.tar.bz2 && cd libpthread-stubs-0.1 && ./configure --prefix=/usr && make && make install - cd $(DIR_APP) && tar xvjf libxcb-1.1.tar.bz2 && cd libxcb-1.1 && ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man --localstatedir=/var --docdir='${datadir}'/doc/libxcb-1.1 && make && make install && export LIBXCB_ALLOW_SLOPPY_LOCK=1 - ## gperf - cd $(DIR_APP) && tar xvzf gperf-3.0.3.tar.gz && cd gperf-3.0.3 && ./configure --prefix=/usr && make && makeinfo -o doc/gperf.txt --plaintext doc/gperf.texi && make install && install -v -m755 -d /usr/share/doc/gperf-3.0.3 && install -m644 -v doc/gperf.{dvi,ps,pdf,txt} /usr/share/doc/gperf-3.0.3 - cd $(DIR_APP) && tar xvjf xcb-util-0.3.0.tar.bz2 && cd xcb-util-0.3.0 && ./configure --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man --localstatedir=/var && make && make install - cd $(DIR_APP) && ./install-lib.sh - cd $(DIR_APP) && tar xvzf bin86-0.16.17.tar.gz && cd bin86-0.16.17 && make && make install - cd $(DIR_APP) && tar xvzf Dev86src-0.16.17.tar.gz && cd dev86-0.16.17 && make && make install - @rm -rf $(DIR_APP) - @$(POSTBUILD) - diff --git a/lfs/xen b/lfs/xen deleted file mode 100644 index 943a775..0000000 --- a/lfs/xen +++ /dev/null @@ -1,95 +0,0 @@ -############################################################################### -# # -# IPFire.org - A linux based firewall # -# Copyright (C) 2007 Michael Tremer & Christian Schmidt # -# # -# This program is free software: you can redistribute it and/or modify # -# it under the terms of the GNU General Public License as published by # -# the Free Software Foundation, either version 3 of the License, or # -# (at your option) any later version. # -# # -# This program is distributed in the hope that it will be useful, # -# but WITHOUT ANY WARRANTY; without even the implied warranty of # -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # -# GNU General Public License for more details. # -# # -# You should have received a copy of the GNU General Public License # -# along with this program. If not, see http://www.gnu.org/licenses/. # -# # -############################################################################### - -############################################################################### -# Definitions -############################################################################### - -include Config - -VER = 3.4.0 - -THISAPP = xen-$(VER) -DL_FILE = $(THISAPP)-2.tar.gz -DL_FROM = $(URL_IPFIRE) -DIR_APP = $(DIR_SRC)/$(THISAPP) -TARGET = $(DIR_INFO)/$(THISAPP) -PROG = xen -PAK_VER = 1 -DEPS = "x11libs" - -############################################################################### -# Top-level Rules -############################################################################### - -objects = $(DL_FILE) - -$(DL_FILE) = $(DL_FROM)/$(DL_FILE) - -$(DL_FILE)_MD5 = f112adc73ba66c4cd89e4634a4d84b48 - -install : $(TARGET) - -check : $(patsubst %,$(DIR_CHK)/%,$(objects)) - -download :$(patsubst %,$(DIR_DL)/%,$(objects)) - -md5 : $(subst %,%_MD5,$(objects)) - -dist: - @$(PAK) - -############################################################################### -# Downloading, checking, md5sum -############################################################################### - -$(patsubst %,$(DIR_CHK)/%,$(objects)) : - @$(CHECK) - -$(patsubst %,$(DIR_DL)/%,$(objects)) : - @$(LOAD) - -$(subst %,%_MD5,$(objects)) : - @$(MD5) - -############################################################################### -# Installation Details -############################################################################### - -$(TARGET) : $(patsubst %,$(DIR_DL)/%,$(objects)) - @$(PREBUILD) - @rm -rf $(DIR_APP) && cd $(DIR_SRC) && tar zxf $(DIR_DL)/$(DL_FILE) - - # remove this ugly co_assignment error - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/xen-co_assignment.patch - - # removes cpu freq bug. cpu stays at lowest freq - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/xen-cpufreq.patch - - # adjust config file of the daemon - cd $(DIR_APP) && patch -Np1 < $(DIR_SRC)/src/patches/xend-config.patch - - cd $(DIR_APP) && make xen && make install-xen - cd $(DIR_APP) && make tools && make install-tools - - # sometimes the auto directory is not created - mkdir -p /etc/xen/auto - @rm -rf $(DIR_APP) - @$(POSTBUILD) diff --git a/src/atl1c/Makefile b/src/atl1c/Makefile deleted file mode 100644 index ee84883..0000000 --- a/src/atl1c/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -KSRC ?= /lib/modules/$(shell uname -r)/build - -obj-m += atl1c.o -atl1c-objs += atl1c_main.o atl1c_hw.o atl1c_ethtool.o - -all: - $(MAKE) -C $(KSRC) SUBDIRS=$(PWD) modules - -clean: - rm -rf *.ko *.mod.* *.o .*.cmd .tmp_versions Module.symvers - -distclean: clean - rm -rf cscope.* *~ diff --git a/src/atl1c/atl1c.h b/src/atl1c/atl1c.h deleted file mode 100644 index 2a1120a..0000000 --- a/src/atl1c/atl1c.h +++ /dev/null @@ -1,605 +0,0 @@ -/* - * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. - * - * Derived from Intel e1000 driver - * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 - * Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef _ATL1C_H_ -#define _ATL1C_H_ - -#include <linux/version.h> -#include <linux/init.h> -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/ioport.h> -#include <linux/slab.h> -#include <linux/list.h> -#include <linux/delay.h> -#include <linux/sched.h> -#include <linux/in.h> -#include <linux/ip.h> -#include <linux/ipv6.h> -#include <linux/udp.h> -#include <linux/mii.h> -#include <linux/io.h> -#include <linux/vmalloc.h> -#include <linux/pagemap.h> -#include <linux/tcp.h> -#include <linux/ethtool.h> -#include <linux/if_vlan.h> -#include <linux/workqueue.h> -#include <net/checksum.h> -#include <net/ip6_checksum.h> - -#include "atl1c_hw.h" - -/* Wake Up Filter Control */ -#define AT_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */ -#define AT_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */ -#define AT_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */ -#define AT_WUFC_MC 0x00000008 /* Multicast Wakeup Enable */ -#define AT_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */ - -#define AT_VLAN_TO_TAG(_vlan, _tag) \ - _tag = ((((_vlan) >> 8) & 0xFF) |\ - (((_vlan) & 0xFF) << 8)) - -#define AT_TAG_TO_VLAN(_tag, _vlan) \ - _vlan = ((((_tag) >> 8) & 0xFF) |\ - (((_tag) & 0xFF) << 8)) - -#define SPEED_0 0xffff -#define HALF_DUPLEX 1 -#define FULL_DUPLEX 2 - -#define AT_RX_BUF_SIZE (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN) -#define MAX_JUMBO_FRAME_SIZE (9*1024) -#define MAX_TX_OFFLOAD_THRESH (9*1024) - -#define AT_MAX_RECEIVE_QUEUE 4 -#define AT_DEF_RECEIVE_QUEUE 1 -#define AT_MAX_TRANSMIT_QUEUE 2 - -#define AT_DMA_HI_ADDR_MASK 0xffffffff00000000ULL -#define AT_DMA_LO_ADDR_MASK 0x00000000ffffffffULL - -#define AT_TX_WATCHDOG (5 * HZ) -#define AT_MAX_INT_WORK 5 -#define AT_TWSI_EEPROM_TIMEOUT 100 -#define AT_HW_MAX_IDLE_DELAY 10 -#define AT_SUSPEND_LINK_TIMEOUT 28 - -#define AT_ASPM_L0S_TIMER 6 -#define AT_ASPM_L1_TIMER 12 - -#define ATL1C_PCIE_L0S_L1_DISABLE 0x01 -#define ATL1C_PCIE_PHY_RESET 0x02 - -#define ATL1C_ASPM_L0s_ENABLE 0x0001 -#define ATL1C_ASPM_L1_ENABLE 0x0002 - -#define AT_REGS_LEN (75 * sizeof(u32)) -#define AT_EEPROM_LEN 512 - -#define ATL1C_GET_DESC(R, i, type) (&(((type *)((R)->desc))[i])) -#define ATL1C_RFD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_rx_free_desc) -#define ATL1C_TPD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_tpd_desc) -#define ATL1C_RRD_DESC(R, i) ATL1C_GET_DESC(R, i, struct atl1c_recv_ret_status) - -/* tpd word 1 bit 0:7 General Checksum task offload */ -#define TPD_L4HDR_OFFSET_MASK 0x00FF -#define TPD_L4HDR_OFFSET_SHIFT 0 - -/* tpd word 1 bit 0:7 Large Send task offload (IPv4/IPV6) */ -#define TPD_TCPHDR_OFFSET_MASK 0x00FF -#define TPD_TCPHDR_OFFSET_SHIFT 0 - -/* tpd word 1 bit 0:7 Custom Checksum task offload */ -#define TPD_PLOADOFFSET_MASK 0x00FF -#define TPD_PLOADOFFSET_SHIFT 0 - -/* tpd word 1 bit 8:17 */ -#define TPD_CCSUM_EN_MASK 0x0001 -#define TPD_CCSUM_EN_SHIFT 8 -#define TPD_IP_CSUM_MASK 0x0001 -#define TPD_IP_CSUM_SHIFT 9 -#define TPD_TCP_CSUM_MASK 0x0001 -#define TPD_TCP_CSUM_SHIFT 10 -#define TPD_UDP_CSUM_MASK 0x0001 -#define TPD_UDP_CSUM_SHIFT 11 -#define TPD_LSO_EN_MASK 0x0001 /* TCP Large Send Offload */ -#define TPD_LSO_EN_SHIFT 12 -#define TPD_LSO_VER_MASK 0x0001 -#define TPD_LSO_VER_SHIFT 13 /* 0 : ipv4; 1 : ipv4/ipv6 */ -#define TPD_CON_VTAG_MASK 0x0001 -#define TPD_CON_VTAG_SHIFT 14 -#define TPD_INS_VTAG_MASK 0x0001 -#define TPD_INS_VTAG_SHIFT 15 -#define TPD_IPV4_PACKET_MASK 0x0001 /* valid when LSO VER is 1 */ -#define TPD_IPV4_PACKET_SHIFT 16 -#define TPD_ETH_TYPE_MASK 0x0001 -#define TPD_ETH_TYPE_SHIFT 17 /* 0 : 802.3 frame; 1 : Ethernet */ - -/* tpd word 18:25 Custom Checksum task offload */ -#define TPD_CCSUM_OFFSET_MASK 0x00FF -#define TPD_CCSUM_OFFSET_SHIFT 18 -#define TPD_CCSUM_EPAD_MASK 0x0001 -#define TPD_CCSUM_EPAD_SHIFT 30 - -/* tpd word 18:30 Large Send task offload (IPv4/IPV6) */ -#define TPD_MSS_MASK 0x1FFF -#define TPD_MSS_SHIFT 18 - -#define TPD_EOP_MASK 0x0001 -#define TPD_EOP_SHIFT 31 - -struct atl1c_tpd_desc { - __le16 buffer_len; /* include 4-byte CRC */ - __le16 vlan_tag; - __le32 word1; - __le64 buffer_addr; -}; - -struct atl1c_tpd_ext_desc { - u32 reservd_0; - __le32 word1; - __le32 pkt_len; - u32 reservd_1; -}; -/* rrs word 0 bit 0:31 */ -#define RRS_RX_CSUM_MASK 0xFFFF -#define RRS_RX_CSUM_SHIFT 0 -#define RRS_RX_RFD_CNT_MASK 0x000F -#define RRS_RX_RFD_CNT_SHIFT 16 -#define RRS_RX_RFD_INDEX_MASK 0x0FFF -#define RRS_RX_RFD_INDEX_SHIFT 20 - -/* rrs flag bit 0:16 */ -#define RRS_HEAD_LEN_MASK 0x00FF -#define RRS_HEAD_LEN_SHIFT 0 -#define RRS_HDS_TYPE_MASK 0x0003 -#define RRS_HDS_TYPE_SHIFT 8 -#define RRS_CPU_NUM_MASK 0x0003 -#define RRS_CPU_NUM_SHIFT 10 -#define RRS_HASH_FLG_MASK 0x000F -#define RRS_HASH_FLG_SHIFT 12 - -#define RRS_HDS_TYPE_HEAD 1 -#define RRS_HDS_TYPE_DATA 2 - -#define RRS_IS_NO_HDS_TYPE(flag) \ - ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == 0) - -#define RRS_IS_HDS_HEAD(flag) \ - ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == \ - RRS_HDS_TYPE_HEAD) - -#define RRS_IS_HDS_DATA(flag) \ - ((((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK) == \ - RRS_HDS_TYPE_DATA) - -/* rrs word 3 bit 0:31 */ -#define RRS_PKT_SIZE_MASK 0x3FFF -#define RRS_PKT_SIZE_SHIFT 0 -#define RRS_ERR_L4_CSUM_MASK 0x0001 -#define RRS_ERR_L4_CSUM_SHIFT 14 -#define RRS_ERR_IP_CSUM_MASK 0x0001 -#define RRS_ERR_IP_CSUM_SHIFT 15 -#define RRS_VLAN_INS_MASK 0x0001 -#define RRS_VLAN_INS_SHIFT 16 -#define RRS_PROT_ID_MASK 0x0007 -#define RRS_PROT_ID_SHIFT 17 -#define RRS_RX_ERR_SUM_MASK 0x0001 -#define RRS_RX_ERR_SUM_SHIFT 20 -#define RRS_RX_ERR_CRC_MASK 0x0001 -#define RRS_RX_ERR_CRC_SHIFT 21 -#define RRS_RX_ERR_FAE_MASK 0x0001 -#define RRS_RX_ERR_FAE_SHIFT 22 -#define RRS_RX_ERR_TRUNC_MASK 0x0001 -#define RRS_RX_ERR_TRUNC_SHIFT 23 -#define RRS_RX_ERR_RUNC_MASK 0x0001 -#define RRS_RX_ERR_RUNC_SHIFT 24 -#define RRS_RX_ERR_ICMP_MASK 0x0001 -#define RRS_RX_ERR_ICMP_SHIFT 25 -#define RRS_PACKET_BCAST_MASK 0x0001 -#define RRS_PACKET_BCAST_SHIFT 26 -#define RRS_PACKET_MCAST_MASK 0x0001 -#define RRS_PACKET_MCAST_SHIFT 27 -#define RRS_PACKET_TYPE_MASK 0x0001 -#define RRS_PACKET_TYPE_SHIFT 28 -#define RRS_FIFO_FULL_MASK 0x0001 -#define RRS_FIFO_FULL_SHIFT 29 -#define RRS_802_3_LEN_ERR_MASK 0x0001 -#define RRS_802_3_LEN_ERR_SHIFT 30 -#define RRS_RXD_UPDATED_MASK 0x0001 -#define RRS_RXD_UPDATED_SHIFT 31 - -#define RRS_ERR_L4_CSUM 0x00004000 -#define RRS_ERR_IP_CSUM 0x00008000 -#define RRS_VLAN_INS 0x00010000 -#define RRS_RX_ERR_SUM 0x00100000 -#define RRS_RX_ERR_CRC 0x00200000 -#define RRS_802_3_LEN_ERR 0x40000000 -#define RRS_RXD_UPDATED 0x80000000 - -#define RRS_PACKET_TYPE_802_3 1 -#define RRS_PACKET_TYPE_ETH 0 -#define RRS_PACKET_IS_ETH(word) \ - ((((word) >> RRS_PACKET_TYPE_SHIFT) & RRS_PACKET_TYPE_MASK) == \ - RRS_PACKET_TYPE_ETH) -#define RRS_RXD_IS_VALID(word) \ - ((((word) >> RRS_RXD_UPDATED_SHIFT) & RRS_RXD_UPDATED_MASK) == 1) - -#define RRS_PACKET_PROT_IS_IPV4_ONLY(word) \ - ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 1) -#define RRS_PACKET_PROT_IS_IPV6_ONLY(word) \ - ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 6) - -struct atl1c_recv_ret_status { - __le32 word0; - __le32 rss_hash; - __le16 vlan_tag; - __le16 flag; - __le32 word3; -}; - -/* RFD desciptor */ -struct atl1c_rx_free_desc { - __le64 buffer_addr; -}; - -/* DMA Order Settings */ -enum atl1c_dma_order { - atl1c_dma_ord_in = 1, - atl1c_dma_ord_enh = 2, - atl1c_dma_ord_out = 4 -}; - -enum atl1c_dma_rcb { - atl1c_rcb_64 = 0, - atl1c_rcb_128 = 1 -}; - -enum atl1c_mac_speed { - atl1c_mac_speed_0 = 0, - atl1c_mac_speed_10_100 = 1, - atl1c_mac_speed_1000 = 2 -}; - -enum atl1c_dma_req_block { - atl1c_dma_req_128 = 0, - atl1c_dma_req_256 = 1, - atl1c_dma_req_512 = 2, - atl1c_dma_req_1024 = 3, - atl1c_dma_req_2048 = 4, - atl1c_dma_req_4096 = 5 -}; - -enum atl1c_rss_mode { - atl1c_rss_mode_disable = 0, - atl1c_rss_sig_que = 1, - atl1c_rss_mul_que_sig_int = 2, - atl1c_rss_mul_que_mul_int = 4, -}; - -enum atl1c_rss_type { - atl1c_rss_disable = 0, - atl1c_rss_ipv4 = 1, - atl1c_rss_ipv4_tcp = 2, - atl1c_rss_ipv6 = 4, - atl1c_rss_ipv6_tcp = 8 -}; - -enum atl1c_nic_type { - athr_l1c = 0, - athr_l2c = 1, -}; - -enum atl1c_trans_queue { - atl1c_trans_normal = 0, - atl1c_trans_high = 1 -}; - -struct atl1c_hw_stats { - /* rx */ - unsigned long rx_ok; /* The number of good packet received. */ - unsigned long rx_bcast; /* The number of good broadcast packet received. */ - unsigned long rx_mcast; /* The number of good multicast packet received. */ - unsigned long rx_pause; /* The number of Pause packet received. */ - unsigned long rx_ctrl; /* The number of Control packet received other than Pause frame. */ - unsigned long rx_fcs_err; /* The number of packets with bad FCS. */ - unsigned long rx_len_err; /* The number of packets with mismatch of length field and actual size. */ - unsigned long rx_byte_cnt; /* The number of bytes of good packet received. FCS is NOT included. */ - unsigned long rx_runt; /* The number of packets received that are less than 64 byte long and with good FCS. */ - unsigned long rx_frag; /* The number of packets received that are less than 64 byte long and with bad FCS. */ - unsigned long rx_sz_64; /* The number of good and bad packets received that are 64 byte long. */ - unsigned long rx_sz_65_127; /* The number of good and bad packets received that are between 65 and 127-byte long. */ - unsigned long rx_sz_128_255; /* The number of good and bad packets received that are between 128 and 255-byte long. */ - unsigned long rx_sz_256_511; /* The number of good and bad packets received that are between 256 and 511-byte long. */ - unsigned long rx_sz_512_1023; /* The number of good and bad packets received that are between 512 and 1023-byte long. */ - unsigned long rx_sz_1024_1518; /* The number of good and bad packets received that are between 1024 and 1518-byte long. */ - unsigned long rx_sz_1519_max; /* The number of good and bad packets received that are between 1519-byte and MTU. */ - unsigned long rx_sz_ov; /* The number of good and bad packets received that are more than MTU size truncated by Selene. */ - unsigned long rx_rxf_ov; /* The number of frame dropped due to occurrence of RX FIFO overflow. */ - unsigned long rx_rrd_ov; /* The number of frame dropped due to occurrence of RRD overflow. */ - unsigned long rx_align_err; /* Alignment Error */ - unsigned long rx_bcast_byte_cnt; /* The byte count of broadcast packet received, excluding FCS. */ - unsigned long rx_mcast_byte_cnt; /* The byte count of multicast packet received, excluding FCS. */ - unsigned long rx_err_addr; /* The number of packets dropped due to address filtering. */ - - /* tx */ - unsigned long tx_ok; /* The number of good packet transmitted. */ - unsigned long tx_bcast; /* The number of good broadcast packet transmitted. */ - unsigned long tx_mcast; /* The number of good multicast packet transmitted. */ - unsigned long tx_pause; /* The number of Pause packet transmitted. */ - unsigned long tx_exc_defer; /* The number of packets transmitted with excessive deferral. */ - unsigned long tx_ctrl; /* The number of packets transmitted is a control frame, excluding Pause frame. */ - unsigned long tx_defer; /* The number of packets transmitted that is deferred. */ - unsigned long tx_byte_cnt; /* The number of bytes of data transmitted. FCS is NOT included. */ - unsigned long tx_sz_64; /* The number of good and bad packets transmitted that are 64 byte long. */ - unsigned long tx_sz_65_127; /* The number of good and bad packets transmitted that are between 65 and 127-byte long. */ - unsigned long tx_sz_128_255; /* The number of good and bad packets transmitted that are between 128 and 255-byte long. */ - unsigned long tx_sz_256_511; /* The number of good and bad packets transmitted that are between 256 and 511-byte long. */ - unsigned long tx_sz_512_1023; /* The number of good and bad packets transmitted that are between 512 and 1023-byte long. */ - unsigned long tx_sz_1024_1518; /* The number of good and bad packets transmitted that are between 1024 and 1518-byte long. */ - unsigned long tx_sz_1519_max; /* The number of good and bad packets transmitted that are between 1519-byte and MTU. */ - unsigned long tx_1_col; /* The number of packets subsequently transmitted successfully with a single prior collision. */ - unsigned long tx_2_col; /* The number of packets subsequently transmitted successfully with multiple prior collisions. */ - unsigned long tx_late_col; /* The number of packets transmitted with late collisions. */ - unsigned long tx_abort_col; /* The number of transmit packets aborted due to excessive collisions. */ - unsigned long tx_underrun; /* The number of transmit packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */ - unsigned long tx_rd_eop; /* The number of times that read beyond the EOP into the next frame area when TRD was not written timely */ - unsigned long tx_len_err; /* The number of transmit packets with length field does NOT match the actual frame size. */ - unsigned long tx_trunc; /* The number of transmit packets truncated due to size exceeding MTU. */ - unsigned long tx_bcast_byte; /* The byte count of broadcast packet transmitted, excluding FCS. */ - unsigned long tx_mcast_byte; /* The byte count of multicast packet transmitted, excluding FCS. */ -}; - -struct atl1c_hw { - u8 __iomem *hw_addr; /* inner register address */ - struct atl1c_adapter *adapter; - enum atl1c_nic_type nic_type; - enum atl1c_dma_order dma_order; - enum atl1c_dma_rcb rcb_value; - enum atl1c_dma_req_block dmar_block; - enum atl1c_dma_req_block dmaw_block; - - u16 device_id; - u16 vendor_id; - u16 subsystem_id; - u16 subsystem_vendor_id; - u8 revision_id; - - u32 intr_mask; - u8 dmaw_dly_cnt; - u8 dmar_dly_cnt; - - u8 preamble_len; - u16 max_frame_size; - u16 min_frame_size; - - enum atl1c_mac_speed mac_speed; - bool mac_duplex; - bool hibernate; - u16 media_type; -#define MEDIA_TYPE_AUTO_SENSOR 0 -#define MEDIA_TYPE_100M_FULL 1 -#define MEDIA_TYPE_100M_HALF 2 -#define MEDIA_TYPE_10M_FULL 3 -#define MEDIA_TYPE_10M_HALF 4 - - u16 autoneg_advertised; - u16 mii_autoneg_adv_reg; - u16 mii_1000t_ctrl_reg; - - u16 tx_imt; /* TX Interrupt Moderator timer ( 2us resolution) */ - u16 rx_imt; /* RX Interrupt Moderator timer ( 2us resolution) */ - u16 ict; /* Interrupt Clear timer (2us resolution) */ - u16 ctrl_flags; -#define ATL1C_INTR_CLEAR_ON_READ 0x0001 -#define ATL1C_INTR_MODRT_ENABLE 0x0002 -#define ATL1C_CMB_ENABLE 0x0004 -#define ATL1C_SMB_ENABLE 0x0010 -#define ATL1C_TXQ_MODE_ENHANCE 0x0020 -#define ATL1C_RX_IPV6_CHKSUM 0x0040 -#define ATL1C_ASPM_L0S_SUPPORT 0x0080 -#define ATL1C_ASPM_L1_SUPPORT 0x0100 -#define ATL1C_ASPM_CTRL_MON 0x0200 -#define ATL1C_HIB_DISABLE 0x0400 -#define ATL1C_LINK_CAP_1000M 0x0800 -#define ATL1C_FPGA_VERSION 0x8000 - u16 cmb_tpd; - u16 cmb_rrd; - u16 cmb_rx_timer; /* 2us resolution */ - u16 cmb_tx_timer; - u32 smb_timer; - - u16 rrd_thresh; /* Threshold of number of RRD produced to trigger - interrupt request */ - u16 tpd_thresh; - u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned burst. */ - u8 rfd_burst; - enum atl1c_rss_type rss_type; - enum atl1c_rss_mode rss_mode; - u8 rss_hash_bits; - u32 base_cpu; - u32 indirect_tab; - u8 mac_addr[ETH_ALEN]; - u8 perm_mac_addr[ETH_ALEN]; - - bool phy_configured; - bool re_autoneg; - bool emi_ca; -}; - -/* - * atl1c_ring_header represents a single, contiguous block of DMA space - * mapped for the three descriptor rings (tpd, rfd, rrd) and the two - * message blocks (cmb, smb) described below - */ -struct atl1c_ring_header { - void *desc; /* virtual address */ - dma_addr_t dma; /* physical address*/ - unsigned int size; /* length in bytes */ -}; - -/* - * atl1c_buffer is wrapper around a pointer to a socket buffer - * so a DMA handle can be stored along with the skb - */ -struct atl1c_buffer { - struct sk_buff *skb; /* socket buffer */ - u16 length; /* rx buffer length */ - u16 state; /* state of buffer */ -#define ATL1_BUFFER_FREE 0 -#define ATL1_BUFFER_BUSY 1 - dma_addr_t dma; -}; - -/* transimit packet descriptor (tpd) ring */ -struct atl1c_tpd_ring { - void *desc; /* descriptor ring virtual address */ - dma_addr_t dma; /* descriptor ring physical address */ - u16 size; /* descriptor ring length in bytes */ - u16 count; /* number of descriptors in the ring */ - u16 next_to_use; /* this is protectd by adapter->tx_lock */ - atomic_t next_to_clean; - struct atl1c_buffer *buffer_info; -}; - -/* receive free descriptor (rfd) ring */ -struct atl1c_rfd_ring { - void *desc; /* descriptor ring virtual address */ - dma_addr_t dma; /* descriptor ring physical address */ - u16 size; /* descriptor ring length in bytes */ - u16 count; /* number of descriptors in the ring */ - u16 next_to_use; - u16 next_to_clean; - struct atl1c_buffer *buffer_info; -}; - -/* receive return desciptor (rrd) ring */ -struct atl1c_rrd_ring { - void *desc; /* descriptor ring virtual address */ - dma_addr_t dma; /* descriptor ring physical address */ - u16 size; /* descriptor ring length in bytes */ - u16 count; /* number of descriptors in the ring */ - u16 next_to_use; - u16 next_to_clean; -}; - -struct atl1c_cmb { - void *cmb; - dma_addr_t dma; -}; - -struct atl1c_smb { - void *smb; - dma_addr_t dma; -}; - -/* board specific private data structure */ -struct atl1c_adapter { - struct net_device *netdev; - struct pci_dev *pdev; - struct vlan_group *vlgrp; - struct napi_struct napi; - struct atl1c_hw hw; - struct atl1c_hw_stats hw_stats; - struct net_device_stats net_stats; - struct mii_if_info mii; /* MII interface info */ - u16 rx_buffer_len; - - unsigned long flags; -#define __AT_TESTING 0x0001 -#define __AT_RESETTING 0x0002 -#define __AT_DOWN 0x0003 - u32 msg_enable; - - bool have_msi; - u32 wol; - u16 link_speed; - u16 link_duplex; - - spinlock_t mdio_lock; - spinlock_t tx_lock; - atomic_t irq_sem; - - struct work_struct reset_task; - struct work_struct link_chg_task; - struct timer_list watchdog_timer; - struct timer_list phy_config_timer; - - /* All Descriptor memory */ - struct atl1c_ring_header ring_header; - struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE]; - struct atl1c_rfd_ring rfd_ring[AT_MAX_RECEIVE_QUEUE]; - struct atl1c_rrd_ring rrd_ring[AT_MAX_RECEIVE_QUEUE]; - struct atl1c_cmb cmb; - struct atl1c_smb smb; - int num_rx_queues; - u32 bd_number; /* board number;*/ -}; - -#define AT_WRITE_REG(a, reg, value) ( \ - writel((value), ((a)->hw_addr + reg))) - -#define AT_WRITE_FLUSH(a) (\ - readl((a)->hw_addr)) - -#define AT_READ_REG(a, reg, pdata) do { \ - if (unlikely((a)->hibernate)) { \ - readl((a)->hw_addr + reg); \ - *(u32 *)pdata = readl((a)->hw_addr + reg); \ - } else { \ - *(u32 *)pdata = readl((a)->hw_addr + reg); \ - } \ - } while (0) - -#define AT_WRITE_REGB(a, reg, value) (\ - writeb((value), ((a)->hw_addr + reg))) - -#define AT_READ_REGB(a, reg) (\ - readb((a)->hw_addr + reg)) - -#define AT_WRITE_REGW(a, reg, value) (\ - writew((value), ((a)->hw_addr + reg))) - -#define AT_READ_REGW(a, reg) (\ - readw((a)->hw_addr + reg)) - -#define AT_WRITE_REG_ARRAY(a, reg, offset, value) ( \ - writel((value), (((a)->hw_addr + reg) + ((offset) << 2)))) - -#define AT_READ_REG_ARRAY(a, reg, offset) ( \ - readl(((a)->hw_addr + reg) + ((offset) << 2))) - -extern char atl1c_driver_name[]; -extern char atl1c_driver_version[]; - -extern int atl1c_up(struct atl1c_adapter *adapter); -extern void atl1c_down(struct atl1c_adapter *adapter); -extern void atl1c_reinit_locked(struct atl1c_adapter *adapter); -extern s32 atl1c_reset_hw(struct atl1c_hw *hw); -extern void atl1c_set_ethtool_ops(struct net_device *netdev); -#endif /* _ATL1C_H_ */ diff --git a/src/atl1c/atl1c_ethtool.c b/src/atl1c/atl1c_ethtool.c deleted file mode 100644 index 607007d..0000000 --- a/src/atl1c/atl1c_ethtool.c +++ /dev/null @@ -1,319 +0,0 @@ -/* - * Copyright(c) 2009 - 2009 Atheros Corporation. All rights reserved. - * - * Derived from Intel e1000 driver - * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 - * Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - */ - -#include <linux/netdevice.h> -#include <linux/ethtool.h> - -#include "atl1c.h" - -static int atl1c_get_settings(struct net_device *netdev, - struct ethtool_cmd *ecmd) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - - ecmd->supported = (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_Autoneg | - SUPPORTED_TP); - if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M) - ecmd->supported |= SUPPORTED_1000baseT_Full; - - ecmd->advertising = ADVERTISED_TP; - - ecmd->advertising |= hw->autoneg_advertised; - - ecmd->port = PORT_TP; - ecmd->phy_address = 0; - ecmd->transceiver = XCVR_INTERNAL; - - if (adapter->link_speed != SPEED_0) { - ecmd->speed = adapter->link_speed; - if (adapter->link_duplex == FULL_DUPLEX) - ecmd->duplex = DUPLEX_FULL; - else - ecmd->duplex = DUPLEX_HALF; - } else { - ecmd->speed = -1; - ecmd->duplex = -1; - } - - ecmd->autoneg = AUTONEG_ENABLE; - return 0; -} - -static int atl1c_set_settings(struct net_device *netdev, - struct ethtool_cmd *ecmd) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - u16 autoneg_advertised; - - while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) - msleep(1); - - if (ecmd->autoneg == AUTONEG_ENABLE) { - autoneg_advertised = ADVERTISED_Autoneg; - } else { - if (ecmd->speed == SPEED_1000) { - if (ecmd->duplex != DUPLEX_FULL) { - if (netif_msg_link(adapter)) - dev_warn(&adapter->pdev->dev, - "1000M half is invalid\n"); - clear_bit(__AT_RESETTING, &adapter->flags); - return -EINVAL; - } - autoneg_advertised = ADVERTISED_1000baseT_Full; - } else if (ecmd->speed == SPEED_100) { - if (ecmd->duplex == DUPLEX_FULL) - autoneg_advertised = ADVERTISED_100baseT_Full; - else - autoneg_advertised = ADVERTISED_100baseT_Half; - } else { - if (ecmd->duplex == DUPLEX_FULL) - autoneg_advertised = ADVERTISED_10baseT_Full; - else - autoneg_advertised = ADVERTISED_10baseT_Half; - } - } - - if (hw->autoneg_advertised != autoneg_advertised) { - hw->autoneg_advertised = autoneg_advertised; - if (atl1c_restart_autoneg(hw) != 0) { - if (netif_msg_link(adapter)) - dev_warn(&adapter->pdev->dev, - "ethtool speed/duplex setting failed\n"); - clear_bit(__AT_RESETTING, &adapter->flags); - return -EINVAL; - } - } - clear_bit(__AT_RESETTING, &adapter->flags); - return 0; -} - -static u32 atl1c_get_tx_csum(struct net_device *netdev) -{ - return (netdev->features & NETIF_F_HW_CSUM) != 0; -} - -static u32 atl1c_get_msglevel(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - return adapter->msg_enable; -} - -static void atl1c_set_msglevel(struct net_device *netdev, u32 data) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - adapter->msg_enable = data; -} - -static int atl1c_get_regs_len(struct net_device *netdev) -{ - return AT_REGS_LEN; -} - -static void atl1c_get_regs(struct net_device *netdev, - struct ethtool_regs *regs, void *p) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - u32 *regs_buff = p; - u16 phy_data; - - memset(p, 0, AT_REGS_LEN); - - regs->version = 0; - AT_READ_REG(hw, REG_VPD_CAP, p++); - AT_READ_REG(hw, REG_PM_CTRL, p++); - AT_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL, p++); - AT_READ_REG(hw, REG_TWSI_CTRL, p++); - AT_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL, p++); - AT_READ_REG(hw, REG_MASTER_CTRL, p++); - AT_READ_REG(hw, REG_MANUAL_TIMER_INIT, p++); - AT_READ_REG(hw, REG_IRQ_MODRT_TIMER_INIT, p++); - AT_READ_REG(hw, REG_GPHY_CTRL, p++); - AT_READ_REG(hw, REG_LINK_CTRL, p++); - AT_READ_REG(hw, REG_IDLE_STATUS, p++); - AT_READ_REG(hw, REG_MDIO_CTRL, p++); - AT_READ_REG(hw, REG_SERDES_LOCK, p++); - AT_READ_REG(hw, REG_MAC_CTRL, p++); - AT_READ_REG(hw, REG_MAC_IPG_IFG, p++); - AT_READ_REG(hw, REG_MAC_STA_ADDR, p++); - AT_READ_REG(hw, REG_MAC_STA_ADDR+4, p++); - AT_READ_REG(hw, REG_RX_HASH_TABLE, p++); - AT_READ_REG(hw, REG_RX_HASH_TABLE+4, p++); - AT_READ_REG(hw, REG_RXQ_CTRL, p++); - AT_READ_REG(hw, REG_TXQ_CTRL, p++); - AT_READ_REG(hw, REG_MTU, p++); - AT_READ_REG(hw, REG_WOL_CTRL, p++); - - atl1c_read_phy_reg(hw, MII_BMCR, &phy_data); - regs_buff[73] = (u32) phy_data; - atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); - regs_buff[74] = (u32) phy_data; -} - -static int atl1c_get_eeprom_len(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - if (atl1c_check_eeprom_exist(&adapter->hw)) - return AT_EEPROM_LEN; - else - return 0; -} - -static int atl1c_get_eeprom(struct net_device *netdev, - struct ethtool_eeprom *eeprom, u8 *bytes) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - u32 *eeprom_buff; - int first_dword, last_dword; - int ret_val = 0; - int i; - - if (eeprom->len == 0) - return -EINVAL; - - if (!atl1c_check_eeprom_exist(hw)) /* not exist */ - return -EINVAL; - - eeprom->magic = adapter->pdev->vendor | - (adapter->pdev->device << 16); - - first_dword = eeprom->offset >> 2; - last_dword = (eeprom->offset + eeprom->len - 1) >> 2; - - eeprom_buff = kmalloc(sizeof(u32) * - (last_dword - first_dword + 1), GFP_KERNEL); - if (eeprom_buff == NULL) - return -ENOMEM; - - for (i = first_dword; i < last_dword; i++) { - if (!atl1c_read_eeprom(hw, i * 4, &(eeprom_buff[i-first_dword]))) { - kfree(eeprom_buff); - return -EIO; - } - } - - memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3), - eeprom->len); - kfree(eeprom_buff); - - return ret_val; - return 0; -} - -static void atl1c_get_drvinfo(struct net_device *netdev, - struct ethtool_drvinfo *drvinfo) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - strncpy(drvinfo->driver, atl1c_driver_name, sizeof(drvinfo->driver)); - strncpy(drvinfo->version, atl1c_driver_version, - sizeof(drvinfo->version)); - strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version)); - strncpy(drvinfo->bus_info, pci_name(adapter->pdev), - sizeof(drvinfo->bus_info)); - drvinfo->n_stats = 0; - drvinfo->testinfo_len = 0; - drvinfo->regdump_len = atl1c_get_regs_len(netdev); - drvinfo->eedump_len = atl1c_get_eeprom_len(netdev); -} - -static void atl1c_get_wol(struct net_device *netdev, - struct ethtool_wolinfo *wol) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - wol->supported = WAKE_MAGIC | WAKE_PHY; - wol->wolopts = 0; - - if (adapter->wol & AT_WUFC_EX) - wol->wolopts |= WAKE_UCAST; - if (adapter->wol & AT_WUFC_MC) - wol->wolopts |= WAKE_MCAST; - if (adapter->wol & AT_WUFC_BC) - wol->wolopts |= WAKE_BCAST; - if (adapter->wol & AT_WUFC_MAG) - wol->wolopts |= WAKE_MAGIC; - if (adapter->wol & AT_WUFC_LNKC) - wol->wolopts |= WAKE_PHY; - - return; -} - -static int atl1c_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE | - WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)) - return -EOPNOTSUPP; - /* these settings will always override what we currently have */ - adapter->wol = 0; - - if (wol->wolopts & WAKE_MAGIC) - adapter->wol |= AT_WUFC_MAG; - if (wol->wolopts & WAKE_PHY) - adapter->wol |= AT_WUFC_LNKC; - - device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); - - return 0; -} - -static int atl1c_nway_reset(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - if (netif_running(netdev)) - atl1c_reinit_locked(adapter); - return 0; -} - -static struct ethtool_ops atl1c_ethtool_ops = { - .get_settings = atl1c_get_settings, - .set_settings = atl1c_set_settings, - .get_drvinfo = atl1c_get_drvinfo, - .get_regs_len = atl1c_get_regs_len, - .get_regs = atl1c_get_regs, - .get_wol = atl1c_get_wol, - .set_wol = atl1c_set_wol, - .get_msglevel = atl1c_get_msglevel, - .set_msglevel = atl1c_set_msglevel, - .nway_reset = atl1c_nway_reset, - .get_link = ethtool_op_get_link, - .get_eeprom_len = atl1c_get_eeprom_len, - .get_eeprom = atl1c_get_eeprom, - .get_tx_csum = atl1c_get_tx_csum, - .get_sg = ethtool_op_get_sg, - .set_sg = ethtool_op_set_sg, -}; - -void atl1c_set_ethtool_ops(struct net_device *netdev) -{ - SET_ETHTOOL_OPS(netdev, &atl1c_ethtool_ops); -} diff --git a/src/atl1c/atl1c_hw.c b/src/atl1c/atl1c_hw.c deleted file mode 100644 index 3e69b94..0000000 --- a/src/atl1c/atl1c_hw.c +++ /dev/null @@ -1,527 +0,0 @@ -/* - * Copyright(c) 2007 Atheros Corporation. All rights reserved. - * - * Derived from Intel e1000 driver - * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 - * Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ -#include <linux/pci.h> -#include <linux/delay.h> -#include <linux/mii.h> -#include <linux/crc32.h> - -#include "atl1c.h" - -/* - * check_eeprom_exist - * return 1 if eeprom exist - */ -int atl1c_check_eeprom_exist(struct atl1c_hw *hw) -{ - u32 data; - - AT_READ_REG(hw, REG_TWSI_DEBUG, &data); - if (data & TWSI_DEBUG_DEV_EXIST) - return 1; - - return 0; -} - -void atl1c_hw_set_mac_addr(struct atl1c_hw *hw) -{ - u32 value; - /* - * 00-0B-6A-F6-00-DC - * 0: 6AF600DC 1: 000B - * low dword - */ - value = (((u32)hw->mac_addr[2]) << 24) | - (((u32)hw->mac_addr[3]) << 16) | - (((u32)hw->mac_addr[4]) << 8) | - (((u32)hw->mac_addr[5])) ; - AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value); - /* hight dword */ - value = (((u32)hw->mac_addr[0]) << 8) | - (((u32)hw->mac_addr[1])) ; - AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value); -} - -/* - * atl1c_get_permanent_address - * return 0 if get valid mac address, - */ -static int atl1c_get_permanent_address(struct atl1c_hw *hw) -{ - u32 addr[2]; - u32 i; - u32 otp_ctrl_data; - u32 twsi_ctrl_data; - u8 eth_addr[ETH_ALEN]; - - /* init */ - addr[0] = addr[1] = 0; - AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data); - if (atl1c_check_eeprom_exist(hw)) { - /* Enable OTP CLK */ - if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) { - otp_ctrl_data |= OTP_CTRL_CLK_EN; - AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data); - AT_WRITE_FLUSH(hw); - msleep(1); - } - - AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data); - twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART; - AT_WRITE_REG(hw, REG_TWSI_CTRL, twsi_ctrl_data); - for (i = 0; i < AT_TWSI_EEPROM_TIMEOUT; i++) { - msleep(10); - AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data); - if ((twsi_ctrl_data & TWSI_CTRL_SW_LDSTART) == 0) - break; - } - if (i >= AT_TWSI_EEPROM_TIMEOUT) - return -1; - } - /* Disable OTP_CLK */ - if (otp_ctrl_data & OTP_CTRL_CLK_EN) { - otp_ctrl_data &= ~OTP_CTRL_CLK_EN; - AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data); - AT_WRITE_FLUSH(hw); - msleep(1); - } - - /* maybe MAC-address is from BIOS */ - AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]); - AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]); - *(u32 *) &eth_addr[2] = swab32(addr[0]); - *(u16 *) &eth_addr[0] = swab16(*(u16 *)&addr[1]); - - if (is_valid_ether_addr(eth_addr)) { - memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN); - return 0; - } - - return -1; -} - -bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value) -{ - int i; - int ret = false; - u32 otp_ctrl_data; - u32 control; - u32 data; - - if (offset & 3) - return ret; /* address do not align */ - - AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data); - if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) - AT_WRITE_REG(hw, REG_OTP_CTRL, - (otp_ctrl_data | OTP_CTRL_CLK_EN)); - - AT_WRITE_REG(hw, REG_EEPROM_DATA_LO, 0); - control = (offset & EEPROM_CTRL_ADDR_MASK) << EEPROM_CTRL_ADDR_SHIFT; - AT_WRITE_REG(hw, REG_EEPROM_CTRL, control); - - for (i = 0; i < 10; i++) { - udelay(100); - AT_READ_REG(hw, REG_EEPROM_CTRL, &control); - if (control & EEPROM_CTRL_RW) - break; - } - if (control & EEPROM_CTRL_RW) { - AT_READ_REG(hw, REG_EEPROM_CTRL, &data); - AT_READ_REG(hw, REG_EEPROM_DATA_LO, p_value); - data = data & 0xFFFF; - *p_value = swab32((data << 16) | (*p_value >> 16)); - ret = true; - } - if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) - AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data); - - return ret; -} -/* - * Reads the adapter's MAC address from the EEPROM - * - * hw - Struct containing variables accessed by shared code - */ -int atl1c_read_mac_addr(struct atl1c_hw *hw) -{ - int err = 0; - - err = atl1c_get_permanent_address(hw); - if (err) - random_ether_addr(hw->perm_mac_addr); - - memcpy(hw->mac_addr, hw->perm_mac_addr, sizeof(hw->perm_mac_addr)); - return 0; -} - -/* - * atl1c_hash_mc_addr - * purpose - * set hash value for a multicast address - * hash calcu processing : - * 1. calcu 32bit CRC for multicast address - * 2. reverse crc with MSB to LSB - */ -u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr) -{ - u32 crc32; - u32 value = 0; - int i; - - crc32 = ether_crc_le(6, mc_addr); - for (i = 0; i < 32; i++) - value |= (((crc32 >> i) & 1) << (31 - i)); - - return value; -} - -/* - * Sets the bit in the multicast table corresponding to the hash value. - * hw - Struct containing variables accessed by shared code - * hash_value - Multicast address hash value - */ -void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value) -{ - u32 hash_bit, hash_reg; - u32 mta; - - /* - * The HASH Table is a register array of 2 32-bit registers. - * It is treated like an array of 64 bits. We want to set - * bit BitArray[hash_value]. So we figure out what register - * the bit is in, read it, OR in the new bit, then write - * back the new value. The register is determined by the - * upper bit of the hash value and the bit within that - * register are determined by the lower 5 bits of the value. - */ - hash_reg = (hash_value >> 31) & 0x1; - hash_bit = (hash_value >> 26) & 0x1F; - - mta = AT_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg); - - mta |= (1 << hash_bit); - - AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta); -} - -/* - * Reads the value from a PHY register - * hw - Struct containing variables accessed by shared code - * reg_addr - address of the PHY register to read - */ -int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data) -{ - u32 val; - int i; - - val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT | - MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | - MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT; - - AT_WRITE_REG(hw, REG_MDIO_CTRL, val); - - for (i = 0; i < MDIO_WAIT_TIMES; i++) { - udelay(2); - AT_READ_REG(hw, REG_MDIO_CTRL, &val); - if (!(val & (MDIO_START | MDIO_BUSY))) - break; - } - if (!(val & (MDIO_START | MDIO_BUSY))) { - *phy_data = (u16)val; - return 0; - } - - return -1; -} - -/* - * Writes a value to a PHY register - * hw - Struct containing variables accessed by shared code - * reg_addr - address of the PHY register to write - * data - data to write to the PHY - */ -int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data) -{ - int i; - u32 val; - - val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT | - (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT | - MDIO_SUP_PREAMBLE | MDIO_START | - MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT; - - AT_WRITE_REG(hw, REG_MDIO_CTRL, val); - - for (i = 0; i < MDIO_WAIT_TIMES; i++) { - udelay(2); - AT_READ_REG(hw, REG_MDIO_CTRL, &val); - if (!(val & (MDIO_START | MDIO_BUSY))) - break; - } - - if (!(val & (MDIO_START | MDIO_BUSY))) - return 0; - - return -1; -} - -/* - * Configures PHY autoneg and flow control advertisement settings - * - * hw - Struct containing variables accessed by shared code - */ -static int atl1c_phy_setup_adv(struct atl1c_hw *hw) -{ - u16 mii_adv_data = ADVERTISE_DEFAULT_CAP & ~ADVERTISE_SPEED_MASK; - u16 mii_giga_ctrl_data = GIGA_CR_1000T_DEFAULT_CAP & - ~GIGA_CR_1000T_SPEED_MASK; - - if (hw->autoneg_advertised & ADVERTISED_10baseT_Half) - mii_adv_data |= ADVERTISE_10HALF; - if (hw->autoneg_advertised & ADVERTISED_10baseT_Full) - mii_adv_data |= ADVERTISE_10FULL; - if (hw->autoneg_advertised & ADVERTISED_100baseT_Half) - mii_adv_data |= ADVERTISE_100HALF; - if (hw->autoneg_advertised & ADVERTISED_100baseT_Full) - mii_adv_data |= ADVERTISE_100FULL; - - if (hw->autoneg_advertised & ADVERTISED_Autoneg) - mii_adv_data |= ADVERTISE_10HALF | ADVERTISE_10FULL | - ADVERTISE_100HALF | ADVERTISE_100FULL; - - if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M) { - if (hw->autoneg_advertised & ADVERTISED_1000baseT_Half) - mii_giga_ctrl_data |= ADVERTISE_1000HALF; - if (hw->autoneg_advertised & ADVERTISED_1000baseT_Full) - mii_giga_ctrl_data |= ADVERTISE_1000FULL; - if (hw->autoneg_advertised & ADVERTISED_Autoneg) - mii_giga_ctrl_data |= ADVERTISE_1000HALF | - ADVERTISE_1000FULL; - } - - if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 || - atl1c_write_phy_reg(hw, MII_GIGA_CR, mii_giga_ctrl_data) != 0) - return -1; - return 0; -} - -void atl1c_phy_disable(struct atl1c_hw *hw) -{ - AT_WRITE_REGW(hw, REG_GPHY_CTRL, - GPHY_CTRL_PW_WOL_DIS | GPHY_CTRL_EXT_RESET); -} - -static void atl1c_phy_magic_data(struct atl1c_hw *hw) -{ - u16 data; - - data = ANA_LOOP_SEL_10BT | ANA_EN_MASK_TB | ANA_EN_10BT_IDLE | - ((1 & ANA_INTERVAL_SEL_TIMER_MASK) << - ANA_INTERVAL_SEL_TIMER_SHIFT); - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_18); - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - data = (2 & ANA_SERDES_CDR_BW_MASK) | ANA_MS_PAD_DBG | - ANA_SERDES_EN_DEEM | ANA_SERDES_SEL_HSP | ANA_SERDES_EN_PLL | - ANA_SERDES_EN_LCKDT; - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_5); - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - data = (44 & ANA_LONG_CABLE_TH_100_MASK) | - ((33 & ANA_SHORT_CABLE_TH_100_MASK) << - ANA_SHORT_CABLE_TH_100_SHIFT) | ANA_BP_BAD_LINK_ACCUM | - ANA_BP_SMALL_BW; - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_54); - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - data = (11 & ANA_IECHO_ADJ_MASK) | ((11 & ANA_IECHO_ADJ_MASK) << - ANA_IECHO_ADJ_2_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) << - ANA_IECHO_ADJ_1_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) << - ANA_IECHO_ADJ_0_SHIFT); - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_4); - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - data = ANA_RESTART_CAL | ((7 & ANA_MANUL_SWICH_ON_MASK) << - ANA_MANUL_SWICH_ON_SHIFT) | ANA_MAN_ENABLE | - ANA_SEL_HSP | ANA_EN_HB | ANA_OEN_125M; - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_0); - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - if (hw->ctrl_flags & ATL1C_HIB_DISABLE) { - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_41); - if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0) - return; - data &= ~ANA_TOP_PS_EN; - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - - atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_11); - if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0) - return; - data &= ~ANA_PS_HIB_EN; - atl1c_write_phy_reg(hw, MII_DBG_DATA, data); - } -} - -int atl1c_phy_reset(struct atl1c_hw *hw) -{ - struct atl1c_adapter *adapter = hw->adapter; - struct pci_dev *pdev = adapter->pdev; - u32 phy_ctrl_data = GPHY_CTRL_DEFAULT; - u32 mii_ier_data = IER_LINK_UP | IER_LINK_DOWN; - int err; - - if (hw->ctrl_flags & ATL1C_HIB_DISABLE) - phy_ctrl_data &= ~GPHY_CTRL_HIB_EN; - - AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data); - AT_WRITE_FLUSH(hw); - msleep(40); - phy_ctrl_data |= GPHY_CTRL_EXT_RESET; - AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data); - AT_WRITE_FLUSH(hw); - msleep(10); - - /*Enable PHY LinkChange Interrupt */ - err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data); - if (err) { - if (netif_msg_hw(adapter)) - dev_err(&pdev->dev, - "Error enable PHY linkChange Interrupt\n"); - return err; - } - if (!(hw->ctrl_flags & ATL1C_FPGA_VERSION)) - atl1c_phy_magic_data(hw); - return 0; -} - -int atl1c_phy_init(struct atl1c_hw *hw) -{ - struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; - struct pci_dev *pdev = adapter->pdev; - int ret_val; - u16 mii_bmcr_data = BMCR_RESET; - u16 phy_id1, phy_id2; - - if ((atl1c_read_phy_reg(hw, MII_PHYSID1, &phy_id1) != 0) || - (atl1c_read_phy_reg(hw, MII_PHYSID2, &phy_id2) != 0)) { - if (netif_msg_link(adapter)) - dev_err(&pdev->dev, "Error get phy ID\n"); - return -1; - } - switch (hw->media_type) { - case MEDIA_TYPE_AUTO_SENSOR: - ret_val = atl1c_phy_setup_adv(hw); - if (ret_val) { - if (netif_msg_link(adapter)) - dev_err(&pdev->dev, - "Error Setting up Auto-Negotiation\n"); - return ret_val; - } - mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG; - break; - case MEDIA_TYPE_100M_FULL: - mii_bmcr_data |= BMCR_SPEED_100 | BMCR_FULL_DUPLEX; - break; - case MEDIA_TYPE_100M_HALF: - mii_bmcr_data |= BMCR_SPEED_100; - break; - case MEDIA_TYPE_10M_FULL: - mii_bmcr_data |= BMCR_SPEED_10 | BMCR_FULL_DUPLEX; - break; - case MEDIA_TYPE_10M_HALF: - mii_bmcr_data |= BMCR_SPEED_10; - break; - default: - if (netif_msg_link(adapter)) - dev_err(&pdev->dev, "Wrong Media type %d\n", - hw->media_type); - return -1; - break; - } - - ret_val = atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data); - if (ret_val) - return ret_val; - hw->phy_configured = true; - - return 0; -} - -/* - * Detects the current speed and duplex settings of the hardware. - * - * hw - Struct containing variables accessed by shared code - * speed - Speed of the connection - * duplex - Duplex setting of the connection - */ -int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex) -{ - int err; - u16 phy_data; - - /* Read PHY Specific Status Register (17) */ - err = atl1c_read_phy_reg(hw, MII_GIGA_PSSR, &phy_data); - if (err) - return err; - - if (!(phy_data & GIGA_PSSR_SPD_DPLX_RESOLVED)) - return -1; - - switch (phy_data & GIGA_PSSR_SPEED) { - case GIGA_PSSR_1000MBS: - *speed = SPEED_1000; - break; - case GIGA_PSSR_100MBS: - *speed = SPEED_100; - break; - case GIGA_PSSR_10MBS: - *speed = SPEED_10; - break; - default: - return -1; - break; - } - - if (phy_data & GIGA_PSSR_DPLX) - *duplex = FULL_DUPLEX; - else - *duplex = HALF_DUPLEX; - - return 0; -} - -int atl1c_restart_autoneg(struct atl1c_hw *hw) -{ - int err = 0; - u16 mii_bmcr_data = BMCR_RESET; - - err = atl1c_phy_setup_adv(hw); - if (err) - return err; - mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG; - - return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data); -} diff --git a/src/atl1c/atl1c_hw.h b/src/atl1c/atl1c_hw.h deleted file mode 100644 index c2c738d..0000000 --- a/src/atl1c/atl1c_hw.h +++ /dev/null @@ -1,859 +0,0 @@ -/* - * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. - * - * Derived from Intel e1000 driver - * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 - * Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef _ATL1C_HW_H_ -#define _ATL1C_HW_H_ - -#include <linux/types.h> -#include <linux/mii.h> - -struct atl1c_adapter; -struct atl1c_hw; - -/* function prototype */ -void atl1c_phy_disable(struct atl1c_hw *hw); -void atl1c_hw_set_mac_addr(struct atl1c_hw *hw); -int atl1c_phy_reset(struct atl1c_hw *hw); -int atl1c_read_mac_addr(struct atl1c_hw *hw); -int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex); -u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr); -void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value); -int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data); -int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data); -bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value); -int atl1c_phy_init(struct atl1c_hw *hw); -int atl1c_check_eeprom_exist(struct atl1c_hw *hw); -int atl1c_restart_autoneg(struct atl1c_hw *hw); - -/* register definition */ -#define REG_DEVICE_CAP 0x5C -#define DEVICE_CAP_MAX_PAYLOAD_MASK 0x7 -#define DEVICE_CAP_MAX_PAYLOAD_SHIFT 0 - -#define REG_DEVICE_CTRL 0x60 -#define DEVICE_CTRL_MAX_PAYLOAD_MASK 0x7 -#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT 5 -#define DEVICE_CTRL_MAX_RREQ_SZ_MASK 0x7 -#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT 12 - -#define REG_LINK_CTRL 0x68 -#define LINK_CTRL_L0S_EN 0x01 -#define LINK_CTRL_L1_EN 0x02 - -#define REG_VPD_CAP 0x6C -#define VPD_CAP_ID_MASK 0xff -#define VPD_CAP_ID_SHIFT 0 -#define VPD_CAP_NEXT_PTR_MASK 0xFF -#define VPD_CAP_NEXT_PTR_SHIFT 8 -#define VPD_CAP_VPD_ADDR_MASK 0x7FFF -#define VPD_CAP_VPD_ADDR_SHIFT 16 -#define VPD_CAP_VPD_FLAG 0x80000000 - -#define REG_VPD_DATA 0x70 - -#define REG_PCIE_UC_SEVERITY 0x10C -#define PCIE_UC_SERVRITY_TRN 0x00000001 -#define PCIE_UC_SERVRITY_DLP 0x00000010 -#define PCIE_UC_SERVRITY_PSN_TLP 0x00001000 -#define PCIE_UC_SERVRITY_FCP 0x00002000 -#define PCIE_UC_SERVRITY_CPL_TO 0x00004000 -#define PCIE_UC_SERVRITY_CA 0x00008000 -#define PCIE_UC_SERVRITY_UC 0x00010000 -#define PCIE_UC_SERVRITY_ROV 0x00020000 -#define PCIE_UC_SERVRITY_MLFP 0x00040000 -#define PCIE_UC_SERVRITY_ECRC 0x00080000 -#define PCIE_UC_SERVRITY_UR 0x00100000 - -#define REG_DEV_SERIALNUM_CTRL 0x200 -#define REG_DEV_MAC_SEL_MASK 0x0 /* 0:EUI; 1:MAC */ -#define REG_DEV_MAC_SEL_SHIFT 0 -#define REG_DEV_SERIAL_NUM_EN_MASK 0x1 -#define REG_DEV_SERIAL_NUM_EN_SHIFT 1 - -#define REG_TWSI_CTRL 0x218 -#define TWSI_CTRL_LD_OFFSET_MASK 0xFF -#define TWSI_CTRL_LD_OFFSET_SHIFT 0 -#define TWSI_CTRL_LD_SLV_ADDR_MASK 0x7 -#define TWSI_CTRL_LD_SLV_ADDR_SHIFT 8 -#define TWSI_CTRL_SW_LDSTART 0x800 -#define TWSI_CTRL_HW_LDSTART 0x1000 -#define TWSI_CTRL_SMB_SLV_ADDR_MASK 0x7F -#define TWSI_CTRL_SMB_SLV_ADDR_SHIFT 15 -#define TWSI_CTRL_LD_EXIST 0x400000 -#define TWSI_CTRL_READ_FREQ_SEL_MASK 0x3 -#define TWSI_CTRL_READ_FREQ_SEL_SHIFT 23 -#define TWSI_CTRL_FREQ_SEL_100K 0 -#define TWSI_CTRL_FREQ_SEL_200K 1 -#define TWSI_CTRL_FREQ_SEL_300K 2 -#define TWSI_CTRL_FREQ_SEL_400K 3 -#define TWSI_CTRL_SMB_SLV_ADDR -#define TWSI_CTRL_WRITE_FREQ_SEL_MASK 0x3 -#define TWSI_CTRL_WRITE_FREQ_SEL_SHIFT 24 - - -#define REG_PCIE_DEV_MISC_CTRL 0x21C -#define PCIE_DEV_MISC_EXT_PIPE 0x2 -#define PCIE_DEV_MISC_RETRY_BUFDIS 0x1 -#define PCIE_DEV_MISC_SPIROM_EXIST 0x4 -#define PCIE_DEV_MISC_SERDES_ENDIAN 0x8 -#define PCIE_DEV_MISC_SERDES_SEL_DIN 0x10 - -#define REG_PCIE_PHYMISC 0x1000 -#define PCIE_PHYMISC_FORCE_RCV_DET 0x4 - -#define REG_TWSI_DEBUG 0x1108 -#define TWSI_DEBUG_DEV_EXIST 0x20000000 - -#define REG_EEPROM_CTRL 0x12C0 -#define EEPROM_CTRL_DATA_HI_MASK 0xFFFF -#define EEPROM_CTRL_DATA_HI_SHIFT 0 -#define EEPROM_CTRL_ADDR_MASK 0x3FF -#define EEPROM_CTRL_ADDR_SHIFT 16 -#define EEPROM_CTRL_ACK 0x40000000 -#define EEPROM_CTRL_RW 0x80000000 - -#define REG_EEPROM_DATA_LO 0x12C4 - -#define REG_OTP_CTRL 0x12F0 -#define OTP_CTRL_CLK_EN 0x0002 - -#define REG_PM_CTRL 0x12F8 -#define PM_CTRL_SDES_EN 0x00000001 -#define PM_CTRL_RBER_EN 0x00000002 -#define PM_CTRL_CLK_REQ_EN 0x00000004 -#define PM_CTRL_ASPM_L1_EN 0x00000008 -#define PM_CTRL_SERDES_L1_EN 0x00000010 -#define PM_CTRL_SERDES_PLL_L1_EN 0x00000020 -#define PM_CTRL_SERDES_PD_EX_L1 0x00000040 -#define PM_CTRL_SERDES_BUDS_RX_L1_EN 0x00000080 -#define PM_CTRL_L0S_ENTRY_TIMER_MASK 0xF -#define PM_CTRL_L0S_ENTRY_TIMER_SHIFT 8 -#define PM_CTRL_ASPM_L0S_EN 0x00001000 -#define PM_CTRL_CLK_SWH_L1 0x00002000 -#define PM_CTRL_CLK_PWM_VER1_1 0x00004000 -#define PM_CTRL_PCIE_RECV 0x00008000 -#define PM_CTRL_L1_ENTRY_TIMER_MASK 0xF -#define PM_CTRL_L1_ENTRY_TIMER_SHIFT 16 -#define PM_CTRL_PM_REQ_TIMER_MASK 0xF -#define PM_CTRL_PM_REQ_TIMER_SHIFT 20 -#define PM_CTRL_LCKDET_TIMER_MASK 0x3F -#define PM_CTRL_LCKDET_TIMER_SHIFT 24 -#define PM_CTRL_MAC_ASPM_CHK 0x40000000 -#define PM_CTRL_HOTRST 0x80000000 - -/* Selene Master Control Register */ -#define REG_MASTER_CTRL 0x1400 -#define MASTER_CTRL_SOFT_RST 0x1 -#define MASTER_CTRL_TEST_MODE_MASK 0x3 -#define MASTER_CTRL_TEST_MODE_SHIFT 2 -#define MASTER_CTRL_BERT_START 0x10 -#define MASTER_CTRL_MTIMER_EN 0x100 -#define MASTER_CTRL_MANUAL_INT 0x200 -#define MASTER_CTRL_TX_ITIMER_EN 0x400 -#define MASTER_CTRL_RX_ITIMER_EN 0x800 -#define MASTER_CTRL_CLK_SEL_DIS 0x1000 -#define MASTER_CTRL_CLK_SWH_MODE 0x2000 -#define MASTER_CTRL_INT_RDCLR 0x4000 -#define MASTER_CTRL_REV_NUM_SHIFT 16 -#define MASTER_CTRL_REV_NUM_MASK 0xff -#define MASTER_CTRL_DEV_ID_SHIFT 24 -#define MASTER_CTRL_DEV_ID_MASK 0x7f -#define MASTER_CTRL_OTP_SEL 0x80000000 - -/* Timer Initial Value Register */ -#define REG_MANUAL_TIMER_INIT 0x1404 - -/* IRQ ModeratorTimer Initial Value Register */ -#define REG_IRQ_MODRT_TIMER_INIT 0x1408 -#define IRQ_MODRT_TIMER_MASK 0xffff -#define IRQ_MODRT_TX_TIMER_SHIFT 0 -#define IRQ_MODRT_RX_TIMER_SHIFT 16 - -#define REG_GPHY_CTRL 0x140C -#define GPHY_CTRL_EXT_RESET 0x1 -#define GPHY_CTRL_RTL_MODE 0x2 -#define GPHY_CTRL_LED_MODE 0x4 -#define GPHY_CTRL_ANEG_NOW 0x8 -#define GPHY_CTRL_REV_ANEG 0x10 -#define GPHY_CTRL_GATE_25M_EN 0x20 -#define GPHY_CTRL_LPW_EXIT 0x40 -#define GPHY_CTRL_PHY_IDDQ 0x80 -#define GPHY_CTRL_PHY_IDDQ_DIS 0x100 -#define GPHY_CTRL_GIGA_DIS 0x200 -#define GPHY_CTRL_HIB_EN 0x400 -#define GPHY_CTRL_HIB_PULSE 0x800 -#define GPHY_CTRL_SEL_ANA_RST 0x1000 -#define GPHY_CTRL_PHY_PLL_ON 0x2000 -#define GPHY_CTRL_PWDOWN_HW 0x4000 -#define GPHY_CTRL_PHY_PLL_BYPASS 0x8000 - -#define GPHY_CTRL_DEFAULT ( \ - GPHY_CTRL_SEL_ANA_RST |\ - GPHY_CTRL_HIB_PULSE |\ - GPHY_CTRL_HIB_EN) - -#define GPHY_CTRL_PW_WOL_DIS ( \ - GPHY_CTRL_SEL_ANA_RST |\ - GPHY_CTRL_HIB_PULSE |\ - GPHY_CTRL_HIB_EN |\ - GPHY_CTRL_PWDOWN_HW |\ - GPHY_CTRL_PHY_IDDQ) - -/* Block IDLE Status Register */ -#define REG_IDLE_STATUS 0x1410 -#define IDLE_STATUS_MASK 0x00FF -#define IDLE_STATUS_RXMAC_NO_IDLE 0x1 -#define IDLE_STATUS_TXMAC_NO_IDLE 0x2 -#define IDLE_STATUS_RXQ_NO_IDLE 0x4 -#define IDLE_STATUS_TXQ_NO_IDLE 0x8 -#define IDLE_STATUS_DMAR_NO_IDLE 0x10 -#define IDLE_STATUS_DMAW_NO_IDLE 0x20 -#define IDLE_STATUS_SMB_NO_IDLE 0x40 -#define IDLE_STATUS_CMB_NO_IDLE 0x80 - -/* MDIO Control Register */ -#define REG_MDIO_CTRL 0x1414 -#define MDIO_DATA_MASK 0xffff /* On MDIO write, the 16-bit - * control data to write to PHY - * MII management register */ -#define MDIO_DATA_SHIFT 0 /* On MDIO read, the 16-bit - * status data that was read - * from the PHY MII management register */ -#define MDIO_REG_ADDR_MASK 0x1f /* MDIO register address */ -#define MDIO_REG_ADDR_SHIFT 16 -#define MDIO_RW 0x200000 /* 1: read, 0: write */ -#define MDIO_SUP_PREAMBLE 0x400000 /* Suppress preamble */ -#define MDIO_START 0x800000 /* Write 1 to initiate the MDIO - * master. And this bit is self - * cleared after one cycle */ -#define MDIO_CLK_SEL_SHIFT 24 -#define MDIO_CLK_25_4 0 -#define MDIO_CLK_25_6 2 -#define MDIO_CLK_25_8 3 -#define MDIO_CLK_25_10 4 -#define MDIO_CLK_25_14 5 -#define MDIO_CLK_25_20 6 -#define MDIO_CLK_25_28 7 -#define MDIO_BUSY 0x8000000 -#define MDIO_AP_EN 0x10000000 -#define MDIO_WAIT_TIMES 10 - -/* MII PHY Status Register */ -#define REG_PHY_STATUS 0x1418 -#define PHY_GENERAL_STATUS_MASK 0xFFFF -#define PHY_STATUS_RECV_ENABLE 0x0001 -#define PHY_OE_PWSP_STATUS_MASK 0x07FF -#define PHY_OE_PWSP_STATUS_SHIFT 16 -#define PHY_STATUS_LPW_STATE 0x80000000 -/* BIST Control and Status Register0 (for the Packet Memory) */ -#define REG_BIST0_CTRL 0x141c -#define BIST0_NOW 0x1 -#define BIST0_SRAM_FAIL 0x2 /* 1: The SRAM failure is - * un-repairable because - * it has address decoder - * failure or more than 1 cell - * stuck-to-x failure */ -#define BIST0_FUSE_FLAG 0x4 - -/* BIST Control and Status Register1(for the retry buffer of PCI Express) */ -#define REG_BIST1_CTRL 0x1420 -#define BIST1_NOW 0x1 -#define BIST1_SRAM_FAIL 0x2 -#define BIST1_FUSE_FLAG 0x4 - -/* SerDes Lock Detect Control and Status Register */ -#define REG_SERDES_LOCK 0x1424 -#define SERDES_LOCK_DETECT 0x1 /* SerDes lock detected. This signal - * comes from Analog SerDes */ -#define SERDES_LOCK_DETECT_EN 0x2 /* 1: Enable SerDes Lock detect function */ - -/* MAC Control Register */ -#define REG_MAC_CTRL 0x1480 -#define MAC_CTRL_TX_EN 0x1 -#define MAC_CTRL_RX_EN 0x2 -#define MAC_CTRL_TX_FLOW 0x4 -#define MAC_CTRL_RX_FLOW 0x8 -#define MAC_CTRL_LOOPBACK 0x10 -#define MAC_CTRL_DUPLX 0x20 -#define MAC_CTRL_ADD_CRC 0x40 -#define MAC_CTRL_PAD 0x80 -#define MAC_CTRL_LENCHK 0x100 -#define MAC_CTRL_HUGE_EN 0x200 -#define MAC_CTRL_PRMLEN_SHIFT 10 -#define MAC_CTRL_PRMLEN_MASK 0xf -#define MAC_CTRL_RMV_VLAN 0x4000 -#define MAC_CTRL_PROMIS_EN 0x8000 -#define MAC_CTRL_TX_PAUSE 0x10000 -#define MAC_CTRL_SCNT 0x20000 -#define MAC_CTRL_SRST_TX 0x40000 -#define MAC_CTRL_TX_SIMURST 0x80000 -#define MAC_CTRL_SPEED_SHIFT 20 -#define MAC_CTRL_SPEED_MASK 0x3 -#define MAC_CTRL_DBG_TX_BKPRESURE 0x400000 -#define MAC_CTRL_TX_HUGE 0x800000 -#define MAC_CTRL_RX_CHKSUM_EN 0x1000000 -#define MAC_CTRL_MC_ALL_EN 0x2000000 -#define MAC_CTRL_BC_EN 0x4000000 -#define MAC_CTRL_DBG 0x8000000 -#define MAC_CTRL_SINGLE_PAUSE_EN 0x10000000 - -/* MAC IPG/IFG Control Register */ -#define REG_MAC_IPG_IFG 0x1484 -#define MAC_IPG_IFG_IPGT_SHIFT 0 /* Desired back to back - * inter-packet gap. The - * default is 96-bit time */ -#define MAC_IPG_IFG_IPGT_MASK 0x7f -#define MAC_IPG_IFG_MIFG_SHIFT 8 /* Minimum number of IFG to - * enforce in between RX frames */ -#define MAC_IPG_IFG_MIFG_MASK 0xff /* Frame gap below such IFP is dropped */ -#define MAC_IPG_IFG_IPGR1_SHIFT 16 /* 64bit Carrier-Sense window */ -#define MAC_IPG_IFG_IPGR1_MASK 0x7f -#define MAC_IPG_IFG_IPGR2_SHIFT 24 /* 96-bit IPG window */ -#define MAC_IPG_IFG_IPGR2_MASK 0x7f - -/* MAC STATION ADDRESS */ -#define REG_MAC_STA_ADDR 0x1488 - -/* Hash table for multicast address */ -#define REG_RX_HASH_TABLE 0x1490 - -/* MAC Half-Duplex Control Register */ -#define REG_MAC_HALF_DUPLX_CTRL 0x1498 -#define MAC_HALF_DUPLX_CTRL_LCOL_SHIFT 0 /* Collision Window */ -#define MAC_HALF_DUPLX_CTRL_LCOL_MASK 0x3ff -#define MAC_HALF_DUPLX_CTRL_RETRY_SHIFT 12 -#define MAC_HALF_DUPLX_CTRL_RETRY_MASK 0xf -#define MAC_HALF_DUPLX_CTRL_EXC_DEF_EN 0x10000 -#define MAC_HALF_DUPLX_CTRL_NO_BACK_C 0x20000 -#define MAC_HALF_DUPLX_CTRL_NO_BACK_P 0x40000 /* No back-off on backpressure, - * immediately start the - * transmission after back pressure */ -#define MAC_HALF_DUPLX_CTRL_ABEBE 0x80000 /* 1: Alternative Binary Exponential Back-off Enabled */ -#define MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT 20 /* Maximum binary exponential number */ -#define MAC_HALF_DUPLX_CTRL_ABEBT_MASK 0xf -#define MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT 24 /* IPG to start JAM for collision based flow control in half-duplex */ -#define MAC_HALF_DUPLX_CTRL_JAMIPG_MASK 0xf /* mode. In unit of 8-bit time */ - -/* Maximum Frame Length Control Register */ -#define REG_MTU 0x149c - -/* Wake-On-Lan control register */ -#define REG_WOL_CTRL 0x14a0 -#define WOL_PATTERN_EN 0x00000001 -#define WOL_PATTERN_PME_EN 0x00000002 -#define WOL_MAGIC_EN 0x00000004 -#define WOL_MAGIC_PME_EN 0x00000008 -#define WOL_LINK_CHG_EN 0x00000010 -#define WOL_LINK_CHG_PME_EN 0x00000020 -#define WOL_PATTERN_ST 0x00000100 -#define WOL_MAGIC_ST 0x00000200 -#define WOL_LINKCHG_ST 0x00000400 -#define WOL_CLK_SWITCH_EN 0x00008000 -#define WOL_PT0_EN 0x00010000 -#define WOL_PT1_EN 0x00020000 -#define WOL_PT2_EN 0x00040000 -#define WOL_PT3_EN 0x00080000 -#define WOL_PT4_EN 0x00100000 -#define WOL_PT5_EN 0x00200000 -#define WOL_PT6_EN 0x00400000 - -/* WOL Length ( 2 DWORD ) */ -#define REG_WOL_PATTERN_LEN 0x14a4 -#define WOL_PT_LEN_MASK 0x7f -#define WOL_PT0_LEN_SHIFT 0 -#define WOL_PT1_LEN_SHIFT 8 -#define WOL_PT2_LEN_SHIFT 16 -#define WOL_PT3_LEN_SHIFT 24 -#define WOL_PT4_LEN_SHIFT 0 -#define WOL_PT5_LEN_SHIFT 8 -#define WOL_PT6_LEN_SHIFT 16 - -/* Internal SRAM Partition Register */ -#define RFDX_HEAD_ADDR_MASK 0x03FF -#define RFDX_HARD_ADDR_SHIFT 0 -#define RFDX_TAIL_ADDR_MASK 0x03FF -#define RFDX_TAIL_ADDR_SHIFT 16 - -#define REG_SRAM_RFD0_INFO 0x1500 -#define REG_SRAM_RFD1_INFO 0x1504 -#define REG_SRAM_RFD2_INFO 0x1508 -#define REG_SRAM_RFD3_INFO 0x150C - -#define REG_RFD_NIC_LEN 0x1510 /* In 8-bytes */ -#define RFD_NIC_LEN_MASK 0x03FF - -#define REG_SRAM_TRD_ADDR 0x1518 -#define TPD_HEAD_ADDR_MASK 0x03FF -#define TPD_HEAD_ADDR_SHIFT 0 -#define TPD_TAIL_ADDR_MASK 0x03FF -#define TPD_TAIL_ADDR_SHIFT 16 - -#define REG_SRAM_TRD_LEN 0x151C /* In 8-bytes */ -#define TPD_NIC_LEN_MASK 0x03FF - -#define REG_SRAM_RXF_ADDR 0x1520 -#define REG_SRAM_RXF_LEN 0x1524 -#define REG_SRAM_TXF_ADDR 0x1528 -#define REG_SRAM_TXF_LEN 0x152C -#define REG_SRAM_TCPH_ADDR 0x1530 -#define REG_SRAM_PKTH_ADDR 0x1532 - -/* - * Load Ptr Register - * Software sets this bit after the initialization of the head and tail */ -#define REG_LOAD_PTR 0x1534 - -/* - * addresses of all descriptors, as well as the following descriptor - * control register, which triggers each function block to load the head - * pointer to prepare for the operation. This bit is then self-cleared - * after one cycle. - */ -#define REG_RX_BASE_ADDR_HI 0x1540 -#define REG_TX_BASE_ADDR_HI 0x1544 -#define REG_SMB_BASE_ADDR_HI 0x1548 -#define REG_SMB_BASE_ADDR_LO 0x154C -#define REG_RFD0_HEAD_ADDR_LO 0x1550 -#define REG_RFD1_HEAD_ADDR_LO 0x1554 -#define REG_RFD2_HEAD_ADDR_LO 0x1558 -#define REG_RFD3_HEAD_ADDR_LO 0x155C -#define REG_RFD_RING_SIZE 0x1560 -#define RFD_RING_SIZE_MASK 0x0FFF -#define REG_RX_BUF_SIZE 0x1564 -#define RX_BUF_SIZE_MASK 0xFFFF -#define REG_RRD0_HEAD_ADDR_LO 0x1568 -#define REG_RRD1_HEAD_ADDR_LO 0x156C -#define REG_RRD2_HEAD_ADDR_LO 0x1570 -#define REG_RRD3_HEAD_ADDR_LO 0x1574 -#define REG_RRD_RING_SIZE 0x1578 -#define RRD_RING_SIZE_MASK 0x0FFF -#define REG_HTPD_HEAD_ADDR_LO 0x157C -#define REG_NTPD_HEAD_ADDR_LO 0x1580 -#define REG_TPD_RING_SIZE 0x1584 -#define TPD_RING_SIZE_MASK 0xFFFF -#define REG_CMB_BASE_ADDR_LO 0x1588 - -/* RSS about */ -#define REG_RSS_KEY0 0x14B0 -#define REG_RSS_KEY1 0x14B4 -#define REG_RSS_KEY2 0x14B8 -#define REG_RSS_KEY3 0x14BC -#define REG_RSS_KEY4 0x14C0 -#define REG_RSS_KEY5 0x14C4 -#define REG_RSS_KEY6 0x14C8 -#define REG_RSS_KEY7 0x14CC -#define REG_RSS_KEY8 0x14D0 -#define REG_RSS_KEY9 0x14D4 -#define REG_IDT_TABLE0 0x14E0 -#define REG_IDT_TABLE1 0x14E4 -#define REG_IDT_TABLE2 0x14E8 -#define REG_IDT_TABLE3 0x14EC -#define REG_IDT_TABLE4 0x14F0 -#define REG_IDT_TABLE5 0x14F4 -#define REG_IDT_TABLE6 0x14F8 -#define REG_IDT_TABLE7 0x14FC -#define REG_IDT_TABLE REG_IDT_TABLE0 -#define REG_RSS_HASH_VALUE 0x15B0 -#define REG_RSS_HASH_FLAG 0x15B4 -#define REG_BASE_CPU_NUMBER 0x15B8 - -/* TXQ Control Register */ -#define REG_TXQ_CTRL 0x1590 -#define TXQ_NUM_TPD_BURST_MASK 0xF -#define TXQ_NUM_TPD_BURST_SHIFT 0 -#define TXQ_CTRL_IP_OPTION_EN 0x10 -#define TXQ_CTRL_EN 0x20 -#define TXQ_CTRL_ENH_MODE 0x40 -#define TXQ_CTRL_LS_8023_EN 0x80 -#define TXQ_TXF_BURST_NUM_SHIFT 16 -#define TXQ_TXF_BURST_NUM_MASK 0xFFFF - -/* Jumbo packet Threshold for task offload */ -#define REG_TX_TSO_OFFLOAD_THRESH 0x1594 /* In 8-bytes */ -#define TX_TSO_OFFLOAD_THRESH_MASK 0x07FF - -#define REG_TXF_WATER_MARK 0x1598 /* In 8-bytes */ -#define TXF_WATER_MARK_MASK 0x0FFF -#define TXF_LOW_WATER_MARK_SHIFT 0 -#define TXF_HIGH_WATER_MARK_SHIFT 16 -#define TXQ_CTRL_BURST_MODE_EN 0x80000000 - -#define REG_THRUPUT_MON_CTRL 0x159C -#define THRUPUT_MON_RATE_MASK 0x3 -#define THRUPUT_MON_RATE_SHIFT 0 -#define THRUPUT_MON_EN 0x80 - -/* RXQ Control Register */ -#define REG_RXQ_CTRL 0x15A0 -#define ASPM_THRUPUT_LIMIT_MASK 0x3 -#define ASPM_THRUPUT_LIMIT_SHIFT 0 -#define ASPM_THRUPUT_LIMIT_NO 0x00 -#define ASPM_THRUPUT_LIMIT_1M 0x01 -#define ASPM_THRUPUT_LIMIT_10M 0x02 -#define ASPM_THRUPUT_LIMIT_100M 0x04 -#define RXQ1_CTRL_EN 0x10 -#define RXQ2_CTRL_EN 0x20 -#define RXQ3_CTRL_EN 0x40 -#define IPV6_CHKSUM_CTRL_EN 0x80 -#define RSS_HASH_BITS_MASK 0x00FF -#define RSS_HASH_BITS_SHIFT 8 -#define RSS_HASH_IPV4 0x10000 -#define RSS_HASH_IPV4_TCP 0x20000 -#define RSS_HASH_IPV6 0x40000 -#define RSS_HASH_IPV6_TCP 0x80000 -#define RXQ_RFD_BURST_NUM_MASK 0x003F -#define RXQ_RFD_BURST_NUM_SHIFT 20 -#define RSS_MODE_MASK 0x0003 -#define RSS_MODE_SHIFT 26 -#define RSS_NIP_QUEUE_SEL_MASK 0x1 -#define RSS_NIP_QUEUE_SEL_SHIFT 28 -#define RRS_HASH_CTRL_EN 0x20000000 -#define RX_CUT_THRU_EN 0x40000000 -#define RXQ_CTRL_EN 0x80000000 - -#define REG_RFD_FREE_THRESH 0x15A4 -#define RFD_FREE_THRESH_MASK 0x003F -#define RFD_FREE_HI_THRESH_SHIFT 0 -#define RFD_FREE_LO_THRESH_SHIFT 6 - -/* RXF flow control register */ -#define REG_RXQ_RXF_PAUSE_THRESH 0x15A8 -#define RXQ_RXF_PAUSE_TH_HI_SHIFT 0 -#define RXQ_RXF_PAUSE_TH_HI_MASK 0x0FFF -#define RXQ_RXF_PAUSE_TH_LO_SHIFT 16 -#define RXQ_RXF_PAUSE_TH_LO_MASK 0x0FFF - -#define REG_RXD_DMA_CTRL 0x15AC -#define RXD_DMA_THRESH_MASK 0x0FFF /* In 8-bytes */ -#define RXD_DMA_THRESH_SHIFT 0 -#define RXD_DMA_DOWN_TIMER_MASK 0xFFFF -#define RXD_DMA_DOWN_TIMER_SHIFT 16 - -/* DMA Engine Control Register */ -#define REG_DMA_CTRL 0x15C0 -#define DMA_CTRL_DMAR_IN_ORDER 0x1 -#define DMA_CTRL_DMAR_ENH_ORDER 0x2 -#define DMA_CTRL_DMAR_OUT_ORDER 0x4 -#define DMA_CTRL_RCB_VALUE 0x8 -#define DMA_CTRL_DMAR_BURST_LEN_MASK 0x0007 -#define DMA_CTRL_DMAR_BURST_LEN_SHIFT 4 -#define DMA_CTRL_DMAW_BURST_LEN_MASK 0x0007 -#define DMA_CTRL_DMAW_BURST_LEN_SHIFT 7 -#define DMA_CTRL_DMAR_REQ_PRI 0x400 -#define DMA_CTRL_DMAR_DLY_CNT_MASK 0x001F -#define DMA_CTRL_DMAR_DLY_CNT_SHIFT 11 -#define DMA_CTRL_DMAW_DLY_CNT_MASK 0x000F -#define DMA_CTRL_DMAW_DLY_CNT_SHIFT 16 -#define DMA_CTRL_CMB_EN 0x100000 -#define DMA_CTRL_SMB_EN 0x200000 -#define DMA_CTRL_CMB_NOW 0x400000 -#define MAC_CTRL_SMB_DIS 0x1000000 -#define DMA_CTRL_SMB_NOW 0x80000000 - -/* CMB/SMB Control Register */ -#define REG_SMB_STAT_TIMER 0x15C4 /* 2us resolution */ -#define SMB_STAT_TIMER_MASK 0xFFFFFF -#define REG_CMB_TPD_THRESH 0x15C8 -#define CMB_TPD_THRESH_MASK 0xFFFF -#define REG_CMB_TX_TIMER 0x15CC /* 2us resolution */ -#define CMB_TX_TIMER_MASK 0xFFFF - -/* Mail box */ -#define MB_RFDX_PROD_IDX_MASK 0xFFFF -#define REG_MB_RFD0_PROD_IDX 0x15E0 -#define REG_MB_RFD1_PROD_IDX 0x15E4 -#define REG_MB_RFD2_PROD_IDX 0x15E8 -#define REG_MB_RFD3_PROD_IDX 0x15EC - -#define MB_PRIO_PROD_IDX_MASK 0xFFFF -#define REG_MB_PRIO_PROD_IDX 0x15F0 -#define MB_HTPD_PROD_IDX_SHIFT 0 -#define MB_NTPD_PROD_IDX_SHIFT 16 - -#define MB_PRIO_CONS_IDX_MASK 0xFFFF -#define REG_MB_PRIO_CONS_IDX 0x15F4 -#define MB_HTPD_CONS_IDX_SHIFT 0 -#define MB_NTPD_CONS_IDX_SHIFT 16 - -#define REG_MB_RFD01_CONS_IDX 0x15F8 -#define MB_RFD0_CONS_IDX_MASK 0x0000FFFF -#define MB_RFD1_CONS_IDX_MASK 0xFFFF0000 -#define REG_MB_RFD23_CONS_IDX 0x15FC -#define MB_RFD2_CONS_IDX_MASK 0x0000FFFF -#define MB_RFD3_CONS_IDX_MASK 0xFFFF0000 - -/* Interrupt Status Register */ -#define REG_ISR 0x1600 -#define ISR_SMB 0x00000001 -#define ISR_TIMER 0x00000002 -/* - * Software manual interrupt, for debug. Set when SW_MAN_INT_EN is set - * in Table 51 Selene Master Control Register (Offset 0x1400). - */ -#define ISR_MANUAL 0x00000004 -#define ISR_HW_RXF_OV 0x00000008 /* RXF overflow interrupt */ -#define ISR_RFD0_UR 0x00000010 /* RFD0 under run */ -#define ISR_RFD1_UR 0x00000020 -#define ISR_RFD2_UR 0x00000040 -#define ISR_RFD3_UR 0x00000080 -#define ISR_TXF_UR 0x00000100 -#define ISR_DMAR_TO_RST 0x00000200 -#define ISR_DMAW_TO_RST 0x00000400 -#define ISR_TX_CREDIT 0x00000800 -#define ISR_GPHY 0x00001000 -/* GPHY low power state interrupt */ -#define ISR_GPHY_LPW 0x00002000 -#define ISR_TXQ_TO_RST 0x00004000 -#define ISR_TX_PKT 0x00008000 -#define ISR_RX_PKT_0 0x00010000 -#define ISR_RX_PKT_1 0x00020000 -#define ISR_RX_PKT_2 0x00040000 -#define ISR_RX_PKT_3 0x00080000 -#define ISR_MAC_RX 0x00100000 -#define ISR_MAC_TX 0x00200000 -#define ISR_UR_DETECTED 0x00400000 -#define ISR_FERR_DETECTED 0x00800000 -#define ISR_NFERR_DETECTED 0x01000000 -#define ISR_CERR_DETECTED 0x02000000 -#define ISR_PHY_LINKDOWN 0x04000000 -#define ISR_DIS_INT 0x80000000 - -/* Interrupt Mask Register */ -#define REG_IMR 0x1604 - -#define IMR_NORMAL_MASK (\ - ISR_MANUAL |\ - ISR_HW_RXF_OV |\ - ISR_RFD0_UR |\ - ISR_TXF_UR |\ - ISR_DMAR_TO_RST |\ - ISR_TXQ_TO_RST |\ - ISR_DMAW_TO_RST |\ - ISR_GPHY |\ - ISR_TX_PKT |\ - ISR_RX_PKT_0 |\ - ISR_GPHY_LPW |\ - ISR_PHY_LINKDOWN) - -#define ISR_RX_PKT (\ - ISR_RX_PKT_0 |\ - ISR_RX_PKT_1 |\ - ISR_RX_PKT_2 |\ - ISR_RX_PKT_3) - -#define ISR_OVER (\ - ISR_RFD0_UR |\ - ISR_RFD1_UR |\ - ISR_RFD2_UR |\ - ISR_RFD3_UR |\ - ISR_HW_RXF_OV |\ - ISR_TXF_UR) - -#define ISR_ERROR (\ - ISR_DMAR_TO_RST |\ - ISR_TXQ_TO_RST |\ - ISR_DMAW_TO_RST |\ - ISR_PHY_LINKDOWN) - -#define REG_INT_RETRIG_TIMER 0x1608 -#define INT_RETRIG_TIMER_MASK 0xFFFF - -#define REG_HDS_CTRL 0x160C -#define HDS_CTRL_EN 0x0001 -#define HDS_CTRL_BACKFILLSIZE_SHIFT 8 -#define HDS_CTRL_BACKFILLSIZE_MASK 0x0FFF -#define HDS_CTRL_MAX_HDRSIZE_SHIFT 20 -#define HDS_CTRL_MAC_HDRSIZE_MASK 0x0FFF - -#define REG_MAC_RX_STATUS_BIN 0x1700 -#define REG_MAC_RX_STATUS_END 0x175c -#define REG_MAC_TX_STATUS_BIN 0x1760 -#define REG_MAC_TX_STATUS_END 0x17c0 - -/* DEBUG ADDR */ -#define REG_DEBUG_DATA0 0x1900 -#define REG_DEBUG_DATA1 0x1904 - -/* PHY Control Register */ -#define MII_BMCR 0x00 -#define BMCR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */ -#define BMCR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */ -#define BMCR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */ -#define BMCR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */ -#define BMCR_ISOLATE 0x0400 /* Isolate PHY from MII */ -#define BMCR_POWER_DOWN 0x0800 /* Power down */ -#define BMCR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */ -#define BMCR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */ -#define BMCR_LOOPBACK 0x4000 /* 0 = normal, 1 = loopback */ -#define BMCR_RESET 0x8000 /* 0 = normal, 1 = PHY reset */ -#define BMCR_SPEED_MASK 0x2040 -#define BMCR_SPEED_1000 0x0040 -#define BMCR_SPEED_100 0x2000 -#define BMCR_SPEED_10 0x0000 - -/* PHY Status Register */ -#define MII_BMSR 0x01 -#define BMMSR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ -#define BMSR_JABBER_DETECT 0x0002 /* Jabber Detected */ -#define BMSR_LINK_STATUS 0x0004 /* Link Status 1 = link */ -#define BMSR_AUTONEG_CAPS 0x0008 /* Auto Neg Capable */ -#define BMSR_REMOTE_FAULT 0x0010 /* Remote Fault Detect */ -#define BMSR_AUTONEG_COMPLETE 0x0020 /* Auto Neg Complete */ -#define BMSR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */ -#define BMSR_EXTENDED_STATUS 0x0100 /* Ext. status info in Reg 0x0F */ -#define BMSR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ -#define BMSR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */ -#define BMSR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */ -#define BMSR_10T_FD_CAPS 0x1000 /* 10T Full Duplex Capable */ -#define BMSR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */ -#define BMMII_SR_100X_FD_CAPS 0x4000 /* 100X Full Duplex Capable */ -#define BMMII_SR_100T4_CAPS 0x8000 /* 100T4 Capable */ - -#define MII_PHYSID1 0x02 -#define MII_PHYSID2 0x03 - -/* Autoneg Advertisement Register */ -#define MII_ADVERTISE 0x04 -#define ADVERTISE_SPEED_MASK 0x01E0 -#define ADVERTISE_DEFAULT_CAP 0x0DE0 - -/* 1000BASE-T Control Register */ -#define MII_GIGA_CR 0x09 -#define GIGA_CR_1000T_REPEATER_DTE 0x0400 /* 1=Repeater/switch device port 0=DTE device */ - -#define GIGA_CR_1000T_MS_VALUE 0x0800 /* 1=Configure PHY as Master 0=Configure PHY as Slave */ -#define GIGA_CR_1000T_MS_ENABLE 0x1000 /* 1=Master/Slave manual config value 0=Automatic Master/Slave config */ -#define GIGA_CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */ -#define GIGA_CR_1000T_TEST_MODE_1 0x2000 /* Transmit Waveform test */ -#define GIGA_CR_1000T_TEST_MODE_2 0x4000 /* Master Transmit Jitter test */ -#define GIGA_CR_1000T_TEST_MODE_3 0x6000 /* Slave Transmit Jitter test */ -#define GIGA_CR_1000T_TEST_MODE_4 0x8000 /* Transmitter Distortion test */ -#define GIGA_CR_1000T_SPEED_MASK 0x0300 -#define GIGA_CR_1000T_DEFAULT_CAP 0x0300 - -/* PHY Specific Status Register */ -#define MII_GIGA_PSSR 0x11 -#define GIGA_PSSR_SPD_DPLX_RESOLVED 0x0800 /* 1=Speed & Duplex resolved */ -#define GIGA_PSSR_DPLX 0x2000 /* 1=Duplex 0=Half Duplex */ -#define GIGA_PSSR_SPEED 0xC000 /* Speed, bits 14:15 */ -#define GIGA_PSSR_10MBS 0x0000 /* 00=10Mbs */ -#define GIGA_PSSR_100MBS 0x4000 /* 01=100Mbs */ -#define GIGA_PSSR_1000MBS 0x8000 /* 10=1000Mbs */ - -/* PHY Interrupt Enable Register */ -#define MII_IER 0x12 -#define IER_LINK_UP 0x0400 -#define IER_LINK_DOWN 0x0800 - -/* PHY Interrupt Status Register */ -#define MII_ISR 0x13 -#define ISR_LINK_UP 0x0400 -#define ISR_LINK_DOWN 0x0800 - -/* Cable-Detect-Test Control Register */ -#define MII_CDTC 0x16 -#define CDTC_EN_OFF 0 /* sc */ -#define CDTC_EN_BITS 1 -#define CDTC_PAIR_OFF 8 -#define CDTC_PAIR_BIT 2 - -/* Cable-Detect-Test Status Register */ -#define MII_CDTS 0x1C -#define CDTS_STATUS_OFF 8 -#define CDTS_STATUS_BITS 2 -#define CDTS_STATUS_NORMAL 0 -#define CDTS_STATUS_SHORT 1 -#define CDTS_STATUS_OPEN 2 -#define CDTS_STATUS_INVALID 3 - -#define MII_DBG_ADDR 0x1D -#define MII_DBG_DATA 0x1E - -#define MII_ANA_CTRL_0 0x0 -#define ANA_RESTART_CAL 0x0001 -#define ANA_MANUL_SWICH_ON_SHIFT 0x1 -#define ANA_MANUL_SWICH_ON_MASK 0xF -#define ANA_MAN_ENABLE 0x0020 -#define ANA_SEL_HSP 0x0040 -#define ANA_EN_HB 0x0080 -#define ANA_EN_HBIAS 0x0100 -#define ANA_OEN_125M 0x0200 -#define ANA_EN_LCKDT 0x0400 -#define ANA_LCKDT_PHY 0x0800 -#define ANA_AFE_MODE 0x1000 -#define ANA_VCO_SLOW 0x2000 -#define ANA_VCO_FAST 0x4000 -#define ANA_SEL_CLK125M_DSP 0x8000 - -#define MII_ANA_CTRL_4 0x4 -#define ANA_IECHO_ADJ_MASK 0xF -#define ANA_IECHO_ADJ_3_SHIFT 0 -#define ANA_IECHO_ADJ_2_SHIFT 4 -#define ANA_IECHO_ADJ_1_SHIFT 8 -#define ANA_IECHO_ADJ_0_SHIFT 12 - -#define MII_ANA_CTRL_5 0x5 -#define ANA_SERDES_CDR_BW_SHIFT 0 -#define ANA_SERDES_CDR_BW_MASK 0x3 -#define ANA_MS_PAD_DBG 0x0004 -#define ANA_SPEEDUP_DBG 0x0008 -#define ANA_SERDES_TH_LOS_SHIFT 4 -#define ANA_SERDES_TH_LOS_MASK 0x3 -#define ANA_SERDES_EN_DEEM 0x0040 -#define ANA_SERDES_TXELECIDLE 0x0080 -#define ANA_SERDES_BEACON 0x0100 -#define ANA_SERDES_HALFTXDR 0x0200 -#define ANA_SERDES_SEL_HSP 0x0400 -#define ANA_SERDES_EN_PLL 0x0800 -#define ANA_SERDES_EN 0x1000 -#define ANA_SERDES_EN_LCKDT 0x2000 - -#define MII_ANA_CTRL_11 0xB -#define ANA_PS_HIB_EN 0x8000 - -#define MII_ANA_CTRL_18 0x12 -#define ANA_TEST_MODE_10BT_01SHIFT 0 -#define ANA_TEST_MODE_10BT_01MASK 0x3 -#define ANA_LOOP_SEL_10BT 0x0004 -#define ANA_RGMII_MODE_SW 0x0008 -#define ANA_EN_LONGECABLE 0x0010 -#define ANA_TEST_MODE_10BT_2 0x0020 -#define ANA_EN_10BT_IDLE 0x0400 -#define ANA_EN_MASK_TB 0x0800 -#define ANA_TRIGGER_SEL_TIMER_SHIFT 12 -#define ANA_TRIGGER_SEL_TIMER_MASK 0x3 -#define ANA_INTERVAL_SEL_TIMER_SHIFT 14 -#define ANA_INTERVAL_SEL_TIMER_MASK 0x3 - -#define MII_ANA_CTRL_41 0x29 -#define ANA_TOP_PS_EN 0x8000 - -#define MII_ANA_CTRL_54 0x36 -#define ANA_LONG_CABLE_TH_100_SHIFT 0 -#define ANA_LONG_CABLE_TH_100_MASK 0x3F -#define ANA_DESERVED 0x0040 -#define ANA_EN_LIT_CH 0x0080 -#define ANA_SHORT_CABLE_TH_100_SHIFT 8 -#define ANA_SHORT_CABLE_TH_100_MASK 0x3F -#define ANA_BP_BAD_LINK_ACCUM 0x4000 -#define ANA_BP_SMALL_BW 0x8000 - -#endif /*_ATL1C_HW_H_*/ diff --git a/src/atl1c/atl1c_main.c b/src/atl1c/atl1c_main.c deleted file mode 100644 index 50799db..0000000 --- a/src/atl1c/atl1c_main.c +++ /dev/null @@ -1,2801 +0,0 @@ -/* - * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved. - * - * Derived from Intel e1000 driver - * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 - * Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#include "atl1c.h" - -#define ATL1C_DRV_VERSION "1.0.0.1-NAPI" -char atl1c_driver_name[] = "atl1c"; -char atl1c_driver_version[] = ATL1C_DRV_VERSION; -#define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062 -#define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063 -/* - * atl1c_pci_tbl - PCI Device ID Table - * - * Wildcard entries (PCI_ANY_ID) should come last - * Last entry must be all 0s - * - * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, - * Class, Class Mask, private data (not used) } - */ -static struct pci_device_id atl1c_pci_tbl[] = { - {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)}, - {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)}, - /* required last entry */ - { 0 } -}; -MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl); - -MODULE_AUTHOR("Jie Yang jie.yang@atheros.com"); -MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver"); -MODULE_LICENSE("GPL"); -MODULE_VERSION(ATL1C_DRV_VERSION); - -static int atl1c_stop_mac(struct atl1c_hw *hw); -static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw); -static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw); -static void atl1c_disable_l0s_l1(struct atl1c_hw *hw); -static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup); -static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); -static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, - int *work_done, int work_to_do); - -static const u16 atl1c_pay_load_size[] = { - 128, 256, 512, 1024, 2048, 4096, -}; - -static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] = -{ - REG_MB_RFD0_PROD_IDX, - REG_MB_RFD1_PROD_IDX, - REG_MB_RFD2_PROD_IDX, - REG_MB_RFD3_PROD_IDX -}; - -static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = -{ - REG_RFD0_HEAD_ADDR_LO, - REG_RFD1_HEAD_ADDR_LO, - REG_RFD2_HEAD_ADDR_LO, - REG_RFD3_HEAD_ADDR_LO -}; - -static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] = -{ - REG_RRD0_HEAD_ADDR_LO, - REG_RRD1_HEAD_ADDR_LO, - REG_RRD2_HEAD_ADDR_LO, - REG_RRD3_HEAD_ADDR_LO -}; - -static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | - NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; - -/* - * atl1c_init_pcie - init PCIE module - */ -static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag) -{ - u32 data; - u32 pci_cmd; - struct pci_dev *pdev = hw->adapter->pdev; - - AT_READ_REG(hw, PCI_COMMAND, &pci_cmd); - pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; - pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | - PCI_COMMAND_IO); - AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd); - - /* - * Clear any PowerSaveing Settings - */ - pci_enable_wake(pdev, PCI_D3hot, 0); - pci_enable_wake(pdev, PCI_D3cold, 0); - - /* - * Mask some pcie error bits - */ - AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data); - data &= ~PCIE_UC_SERVRITY_DLP; - data &= ~PCIE_UC_SERVRITY_FCP; - AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data); - - if (flag & ATL1C_PCIE_L0S_L1_DISABLE) - atl1c_disable_l0s_l1(hw); - if (flag & ATL1C_PCIE_PHY_RESET) - AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT); - else - AT_WRITE_REG(hw, REG_GPHY_CTRL, - GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET); - - msleep(1); -} - -/* - * atl1c_irq_enable - Enable default interrupt generation settings - * @adapter: board private structure - */ -static inline void atl1c_irq_enable(struct atl1c_adapter *adapter) -{ - if (likely(atomic_dec_and_test(&adapter->irq_sem))) { - AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF); - AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); - AT_WRITE_FLUSH(&adapter->hw); - } -} - -/* - * atl1c_irq_disable - Mask off interrupt generation on the NIC - * @adapter: board private structure - */ -static inline void atl1c_irq_disable(struct atl1c_adapter *adapter) -{ - atomic_inc(&adapter->irq_sem); - AT_WRITE_REG(&adapter->hw, REG_IMR, 0); - AT_WRITE_FLUSH(&adapter->hw); - synchronize_irq(adapter->pdev->irq); -} - -/* - * atl1c_irq_reset - reset interrupt confiure on the NIC - * @adapter: board private structure - */ -static inline void atl1c_irq_reset(struct atl1c_adapter *adapter) -{ - atomic_set(&adapter->irq_sem, 1); - atl1c_irq_enable(adapter); -} - -/* - * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads - * of the idle status register until the device is actually idle - */ -static u32 atl1c_wait_until_idle(struct atl1c_hw *hw) -{ - int timeout; - u32 data; - - for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) { - AT_READ_REG(hw, REG_IDLE_STATUS, &data); - if ((data & IDLE_STATUS_MASK) == 0) - return 0; - msleep(1); - } - return data; -} - -/* - * atl1c_phy_config - Timer Call-back - * @data: pointer to netdev cast into an unsigned long - */ -static void atl1c_phy_config(unsigned long data) -{ - struct atl1c_adapter *adapter = (struct atl1c_adapter *) data; - struct atl1c_hw *hw = &adapter->hw; - unsigned long flags; - - spin_lock_irqsave(&adapter->mdio_lock, flags); - atl1c_restart_autoneg(hw); - spin_unlock_irqrestore(&adapter->mdio_lock, flags); -} - -void atl1c_reinit_locked(struct atl1c_adapter *adapter) -{ - - WARN_ON(in_interrupt()); - atl1c_down(adapter); - atl1c_up(adapter); - clear_bit(__AT_RESETTING, &adapter->flags); -} - -static void atl1c_reset_task(struct work_struct *work) -{ - struct atl1c_adapter *adapter; - struct net_device *netdev; - - adapter = container_of(work, struct atl1c_adapter, reset_task); - netdev = adapter->netdev; - - netif_device_detach(netdev); - atl1c_down(adapter); - atl1c_up(adapter); - netif_device_attach(netdev); -} - -static void atl1c_check_link_status(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - struct net_device *netdev = adapter->netdev; - struct pci_dev *pdev = adapter->pdev; - int err; - unsigned long flags; - u16 speed, duplex, phy_data; - - spin_lock_irqsave(&adapter->mdio_lock, flags); - /* MII_BMSR must read twise */ - atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); - atl1c_read_phy_reg(hw, MII_BMSR, &phy_data); - spin_unlock_irqrestore(&adapter->mdio_lock, flags); - - if ((phy_data & BMSR_LSTATUS) == 0) { - /* link down */ - if (netif_carrier_ok(netdev)) { - hw->hibernate = true; - if (atl1c_stop_mac(hw) != 0) - if (netif_msg_hw(adapter)) - dev_warn(&pdev->dev, - "stop mac failed\n"); - atl1c_set_aspm(hw, false); - } - netif_carrier_off(netdev); - } else { - /* Link Up */ - hw->hibernate = false; - spin_lock_irqsave(&adapter->mdio_lock, flags); - err = atl1c_get_speed_and_duplex(hw, &speed, &duplex); - spin_unlock_irqrestore(&adapter->mdio_lock, flags); - if (unlikely(err)) - return; - /* link result is our setting */ - if (adapter->link_speed != speed || - adapter->link_duplex != duplex) { - adapter->link_speed = speed; - adapter->link_duplex = duplex; - atl1c_set_aspm(hw, true); - atl1c_enable_tx_ctrl(hw); - atl1c_enable_rx_ctrl(hw); - atl1c_setup_mac_ctrl(adapter); - if (netif_msg_link(adapter)) - dev_info(&pdev->dev, - "%s: %s NIC Link is Up<%d Mbps %s>\n", - atl1c_driver_name, netdev->name, - adapter->link_speed, - adapter->link_duplex == FULL_DUPLEX ? - "Full Duplex" : "Half Duplex"); - } - if (!netif_carrier_ok(netdev)) - netif_carrier_on(netdev); - } -} - -/* - * atl1c_link_chg_task - deal with link change event Out of interrupt context - * @netdev: network interface device structure - */ -static void atl1c_link_chg_task(struct work_struct *work) -{ - struct atl1c_adapter *adapter; - - adapter = container_of(work, struct atl1c_adapter, link_chg_task); - atl1c_check_link_status(adapter); -} - -static void atl1c_link_chg_event(struct atl1c_adapter *adapter) -{ - struct net_device *netdev = adapter->netdev; - struct pci_dev *pdev = adapter->pdev; - u16 phy_data; - u16 link_up; - - spin_lock(&adapter->mdio_lock); - atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); - atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data); - spin_unlock(&adapter->mdio_lock); - link_up = phy_data & BMSR_LSTATUS; - /* notify upper layer link down ASAP */ - if (!link_up) { - if (netif_carrier_ok(netdev)) { - /* old link state: Up */ - netif_carrier_off(netdev); - if (netif_msg_link(adapter)) - dev_info(&pdev->dev, - "%s: %s NIC Link is Down\n", - atl1c_driver_name, netdev->name); - adapter->link_speed = SPEED_0; - } - } - schedule_work(&adapter->link_chg_task); -} - -static void atl1c_del_timer(struct atl1c_adapter *adapter) -{ - del_timer_sync(&adapter->phy_config_timer); -} - -static void atl1c_cancel_work(struct atl1c_adapter *adapter) -{ - cancel_work_sync(&adapter->reset_task); - cancel_work_sync(&adapter->link_chg_task); -} - -/* - * atl1c_tx_timeout - Respond to a Tx Hang - * @netdev: network interface device structure - */ -static void atl1c_tx_timeout(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - /* Do the reset outside of interrupt context */ - schedule_work(&adapter->reset_task); -} - -/* - * atl1c_set_multi - Multicast and Promiscuous mode set - * @netdev: network interface device structure - * - * The set_multi entry point is called whenever the multicast address - * list or the network interface flags are updated. This routine is - * responsible for configuring the hardware for proper multicast, - * promiscuous mode, and all-multi behavior. - */ -static void atl1c_set_multi(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - struct dev_mc_list *mc_ptr; - u32 mac_ctrl_data; - u32 hash_value; - - /* Check for Promiscuous and All Multicast modes */ - AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data); - - if (netdev->flags & IFF_PROMISC) { - mac_ctrl_data |= MAC_CTRL_PROMIS_EN; - } else if (netdev->flags & IFF_ALLMULTI) { - mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; - mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN; - } else { - mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN); - } - - AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); - - /* clear the old settings from the multicast hash table */ - AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0); - AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0); - - /* comoute mc addresses' hash value ,and put it into hash table */ - for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) { - hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr); - atl1c_hash_set(hw, hash_value); - } -} - -static void atl1c_vlan_rx_register(struct net_device *netdev, - struct vlan_group *grp) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct pci_dev *pdev = adapter->pdev; - u32 mac_ctrl_data = 0; - - if (netif_msg_pktdata(adapter)) - dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n"); - - atl1c_irq_disable(adapter); - - adapter->vlgrp = grp; - AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data); - - if (grp) { - /* enable VLAN tag insert/strip */ - mac_ctrl_data |= MAC_CTRL_RMV_VLAN; - } else { - /* disable VLAN tag insert/strip */ - mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN; - } - - AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data); - atl1c_irq_enable(adapter); -} - -static void atl1c_restore_vlan(struct atl1c_adapter *adapter) -{ - struct pci_dev *pdev = adapter->pdev; - - if (netif_msg_pktdata(adapter)) - dev_dbg(&pdev->dev, "atl1c_restore_vlan !"); - atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp); -} -/* - * atl1c_set_mac - Change the Ethernet Address of the NIC - * @netdev: network interface device structure - * @p: pointer to an address structure - * - * Returns 0 on success, negative on failure - */ -static int atl1c_set_mac_addr(struct net_device *netdev, void *p) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct sockaddr *addr = p; - - if (!is_valid_ether_addr(addr->sa_data)) - return -EADDRNOTAVAIL; - - if (netif_running(netdev)) - return -EBUSY; - - memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); - memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); - - atl1c_hw_set_mac_addr(&adapter->hw); - - return 0; -} - -static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter, - struct net_device *dev) -{ - int mtu = dev->mtu; - - adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ? - roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE; -} -/* - * atl1c_change_mtu - Change the Maximum Transfer Unit - * @netdev: network interface device structure - * @new_mtu: new value for maximum frame size - * - * Returns 0 on success, negative on failure - */ -static int atl1c_change_mtu(struct net_device *netdev, int new_mtu) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - int old_mtu = netdev->mtu; - int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; - - if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || - (max_frame > MAX_JUMBO_FRAME_SIZE)) { - if (netif_msg_link(adapter)) - dev_warn(&adapter->pdev->dev, "invalid MTU setting\n"); - return -EINVAL; - } - /* set MTU */ - if (old_mtu != new_mtu && netif_running(netdev)) { - while (test_and_set_bit(__AT_RESETTING, &adapter->flags)) - msleep(1); - netdev->mtu = new_mtu; - adapter->hw.max_frame_size = new_mtu; - atl1c_set_rxbufsize(adapter, netdev); - atl1c_down(adapter); - atl1c_up(adapter); - clear_bit(__AT_RESETTING, &adapter->flags); - if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { - u32 phy_data; - - AT_READ_REG(&adapter->hw, 0x1414, &phy_data); - phy_data |= 0x10000000; - AT_WRITE_REG(&adapter->hw, 0x1414, phy_data); - } - - } - return 0; -} - -/* - * caller should hold mdio_lock - */ -static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - u16 result; - - atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result); - return result; -} - -static void atl1c_mdio_write(struct net_device *netdev, int phy_id, - int reg_num, int val) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val); -} - -/* - * atl1c_mii_ioctl - - * @netdev: - * @ifreq: - * @cmd: - */ -static int atl1c_mii_ioctl(struct net_device *netdev, - struct ifreq *ifr, int cmd) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct pci_dev *pdev = adapter->pdev; - struct mii_ioctl_data *data = if_mii(ifr); - unsigned long flags; - int retval = 0; - - if (!netif_running(netdev)) - return -EINVAL; - - spin_lock_irqsave(&adapter->mdio_lock, flags); - switch (cmd) { - case SIOCGMIIPHY: - data->phy_id = 0; - break; - - case SIOCGMIIREG: - if (!capable(CAP_NET_ADMIN)) { - retval = -EPERM; - goto out; - } - if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, - &data->val_out)) { - retval = -EIO; - goto out; - } - break; - - case SIOCSMIIREG: - if (!capable(CAP_NET_ADMIN)) { - retval = -EPERM; - goto out; - } - if (data->reg_num & ~(0x1F)) { - retval = -EFAULT; - goto out; - } - - dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x", - data->reg_num, data->val_in); - if (atl1c_write_phy_reg(&adapter->hw, - data->reg_num, data->val_in)) { - retval = -EIO; - goto out; - } - break; - - default: - retval = -EOPNOTSUPP; - break; - } -out: - spin_unlock_irqrestore(&adapter->mdio_lock, flags); - return retval; -} - -/* - * atl1c_ioctl - - * @netdev: - * @ifreq: - * @cmd: - */ -static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) -{ - switch (cmd) { - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - return atl1c_mii_ioctl(netdev, ifr, cmd); - default: - return -EOPNOTSUPP; - } -} - -/* - * atl1c_alloc_queues - Allocate memory for all rings - * @adapter: board private structure to initialize - * - */ -static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter) -{ - return 0; -} - -static void atl1c_set_mac_type(struct atl1c_hw *hw) -{ - switch (hw->device_id) { - case PCI_DEVICE_ID_ATTANSIC_L2C: - hw->nic_type = athr_l2c; - break; - - case PCI_DEVICE_ID_ATTANSIC_L1C: - hw->nic_type = athr_l1c; - break; - - default: - break; - } -} - -static int atl1c_setup_mac_funcs(struct atl1c_hw *hw) -{ - u32 phy_status_data; - u32 link_ctrl_data; - - atl1c_set_mac_type(hw); - AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data); - AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data); - - hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ | - ATL1C_INTR_MODRT_ENABLE | - ATL1C_RX_IPV6_CHKSUM | - ATL1C_TXQ_MODE_ENHANCE; - if (link_ctrl_data & LINK_CTRL_L0S_EN) - hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT; - if (link_ctrl_data & LINK_CTRL_L1_EN) - hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT; - - if (hw->nic_type == athr_l1c) { - hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON; - hw->ctrl_flags |= ATL1C_LINK_CAP_1000M; - } - return 0; -} -/* - * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter) - * @adapter: board private structure to initialize - * - * atl1c_sw_init initializes the Adapter private data structure. - * Fields are initialized based on PCI device information and - * OS network device settings (MTU size). - */ -static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - struct pci_dev *pdev = adapter->pdev; - - adapter->wol = 0; - adapter->link_speed = SPEED_0; - adapter->link_duplex = FULL_DUPLEX; - adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE; - adapter->tpd_ring[0].count = 1024; - adapter->rfd_ring[0].count = 512; - - hw->vendor_id = pdev->vendor; - hw->device_id = pdev->device; - hw->subsystem_vendor_id = pdev->subsystem_vendor; - hw->subsystem_id = pdev->subsystem_device; - - /* before link up, we assume hibernate is true */ - hw->hibernate = true; - hw->media_type = MEDIA_TYPE_AUTO_SENSOR; - if (atl1c_setup_mac_funcs(hw) != 0) { - dev_err(&pdev->dev, "set mac function pointers failed\n"); - return -1; - } - hw->intr_mask = IMR_NORMAL_MASK; - hw->phy_configured = false; - hw->preamble_len = 7; - hw->max_frame_size = adapter->netdev->mtu; - if (adapter->num_rx_queues < 2) { - hw->rss_type = atl1c_rss_disable; - hw->rss_mode = atl1c_rss_mode_disable; - } else { - hw->rss_type = atl1c_rss_ipv4; - hw->rss_mode = atl1c_rss_mul_que_mul_int; - hw->rss_hash_bits = 16; - } - hw->autoneg_advertised = ADVERTISED_Autoneg; - hw->indirect_tab = 0xE4E4E4E4; - hw->base_cpu = 0; - - hw->ict = 50000; /* 100ms */ - hw->smb_timer = 200000; /* 400ms */ - hw->cmb_tpd = 4; - hw->cmb_tx_timer = 1; /* 2 us */ - hw->rx_imt = 200; - hw->tx_imt = 1000; - - hw->tpd_burst = 5; - hw->rfd_burst = 8; - hw->dma_order = atl1c_dma_ord_out; - hw->dmar_block = atl1c_dma_req_1024; - hw->dmaw_block = atl1c_dma_req_1024; - hw->dmar_dly_cnt = 15; - hw->dmaw_dly_cnt = 4; - - if (atl1c_alloc_queues(adapter)) { - dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); - return -ENOMEM; - } - /* TODO */ - atl1c_set_rxbufsize(adapter, adapter->netdev); - atomic_set(&adapter->irq_sem, 1); - spin_lock_init(&adapter->mdio_lock); - spin_lock_init(&adapter->tx_lock); - set_bit(__AT_DOWN, &adapter->flags); - - return 0; -} - -/* - * atl1c_clean_tx_ring - Free Tx-skb - * @adapter: board private structure - */ -static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter, - enum atl1c_trans_queue type) -{ - struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; - struct atl1c_buffer *buffer_info; - struct pci_dev *pdev = adapter->pdev; - u16 index, ring_count; - - ring_count = tpd_ring->count; - for (index = 0; index < ring_count; index++) { - buffer_info = &tpd_ring->buffer_info[index]; - if (buffer_info->state == ATL1_BUFFER_FREE) - continue; - if (buffer_info->dma) - pci_unmap_single(pdev, buffer_info->dma, - buffer_info->length, - PCI_DMA_TODEVICE); - if (buffer_info->skb) - dev_kfree_skb(buffer_info->skb); - buffer_info->dma = 0; - buffer_info->skb = NULL; - buffer_info->state = ATL1_BUFFER_FREE; - } - - /* Zero out Tx-buffers */ - memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) * - ring_count); - atomic_set(&tpd_ring->next_to_clean, 0); - tpd_ring->next_to_use = 0; -} - -/* - * atl1c_clean_rx_ring - Free rx-reservation skbs - * @adapter: board private structure - */ -static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter) -{ - struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; - struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; - struct atl1c_buffer *buffer_info; - struct pci_dev *pdev = adapter->pdev; - int i, j; - - for (i = 0; i < adapter->num_rx_queues; i++) { - for (j = 0; j < rfd_ring[i].count; j++) { - buffer_info = &rfd_ring[i].buffer_info[j]; - if (buffer_info->state == ATL1_BUFFER_FREE) - continue; - if (buffer_info->dma) - pci_unmap_single(pdev, buffer_info->dma, - buffer_info->length, - PCI_DMA_FROMDEVICE); - if (buffer_info->skb) - dev_kfree_skb(buffer_info->skb); - buffer_info->state = ATL1_BUFFER_FREE; - buffer_info->skb = NULL; - } - /* zero out the descriptor ring */ - memset(rfd_ring[i].desc, 0, rfd_ring[i].size); - rfd_ring[i].next_to_clean = 0; - rfd_ring[i].next_to_use = 0; - rrd_ring[i].next_to_use = 0; - rrd_ring[i].next_to_clean = 0; - } -} - -/* - * Read / Write Ptr Initialize: - */ -static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter) -{ - struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; - struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; - struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; - struct atl1c_buffer *buffer_info; - int i, j; - - for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { - tpd_ring[i].next_to_use = 0; - atomic_set(&tpd_ring[i].next_to_clean, 0); - buffer_info = tpd_ring[i].buffer_info; - for (j = 0; j < tpd_ring->count; j++) - buffer_info[i].state = ATL1_BUFFER_FREE; - } - for (i = 0; i < adapter->num_rx_queues; i++) { - rfd_ring[i].next_to_use = 0; - rfd_ring[i].next_to_clean = 0; - rrd_ring[i].next_to_use = 0; - rrd_ring[i].next_to_clean = 0; - for (j = 0; j < rfd_ring[i].count; j++) { - buffer_info = &rfd_ring[i].buffer_info[j]; - buffer_info->state = ATL1_BUFFER_FREE; - } - } -} - -/* - * atl1c_free_ring_resources - Free Tx / RX descriptor Resources - * @adapter: board private structure - * - * Free all transmit software resources - */ -static void atl1c_free_ring_resources(struct atl1c_adapter *adapter) -{ - struct pci_dev *pdev = adapter->pdev; - - pci_free_consistent(pdev, adapter->ring_header.size, - adapter->ring_header.desc, - adapter->ring_header.dma); - adapter->ring_header.desc = NULL; - - /* Note: just free tdp_ring.buffer_info, - * it contain rfd_ring.buffer_info, do not double free */ - if (adapter->tpd_ring[0].buffer_info) { - kfree(adapter->tpd_ring[0].buffer_info); - adapter->tpd_ring[0].buffer_info = NULL; - } -} - -/* - * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources - * @adapter: board private structure - * - * Return 0 on success, negative on failure - */ -static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter) -{ - struct pci_dev *pdev = adapter->pdev; - struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; - struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring; - struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring; - struct atl1c_ring_header *ring_header = &adapter->ring_header; - int num_rx_queues = adapter->num_rx_queues; - int size; - int i; - int count = 0; - int rx_desc_count = 0; - u32 offset = 0; - - rrd_ring[0].count = rfd_ring[0].count; - for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++) - tpd_ring[i].count = tpd_ring[0].count; - - for (i = 1; i < adapter->num_rx_queues; i++) - rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count; - - /* 2 tpd queue, one high priority queue, - * another normal priority queue */ - size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 + - rfd_ring->count * num_rx_queues); - tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL); - if (unlikely(!tpd_ring->buffer_info)) { - dev_err(&pdev->dev, "kzalloc failed, size = %d\n", - size); - goto err_nomem; - } - for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { - tpd_ring[i].buffer_info = - (struct atl1c_buffer *) (tpd_ring->buffer_info + count); - count += tpd_ring[i].count; - } - - for (i = 0; i < num_rx_queues; i++) { - rfd_ring[i].buffer_info = - (struct atl1c_buffer *) (tpd_ring->buffer_info + count); - count += rfd_ring[i].count; - rx_desc_count += rfd_ring[i].count; - } - /* - * real ring DMA buffer - * each ring/block may need up to 8 bytes for alignment, hence the - * additional bytes tacked onto the end. - */ - ring_header->size = size = - sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 + - sizeof(struct atl1c_rx_free_desc) * rx_desc_count + - sizeof(struct atl1c_recv_ret_status) * rx_desc_count + - sizeof(struct atl1c_hw_stats) + - 8 * 4 + 8 * 2 * num_rx_queues; - - ring_header->desc = pci_alloc_consistent(pdev, ring_header->size, - &ring_header->dma); - if (unlikely(!ring_header->desc)) { - dev_err(&pdev->dev, "pci_alloc_consistend failed\n"); - goto err_nomem; - } - memset(ring_header->desc, 0, ring_header->size); - /* init TPD ring */ - - tpd_ring[0].dma = roundup(ring_header->dma, 8); - offset = tpd_ring[0].dma - ring_header->dma; - for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) { - tpd_ring[i].dma = ring_header->dma + offset; - tpd_ring[i].desc = (u8 *) ring_header->desc + offset; - tpd_ring[i].size = - sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count; - offset += roundup(tpd_ring[i].size, 8); - } - /* init RFD ring */ - for (i = 0; i < num_rx_queues; i++) { - rfd_ring[i].dma = ring_header->dma + offset; - rfd_ring[i].desc = (u8 *) ring_header->desc + offset; - rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) * - rfd_ring[i].count; - offset += roundup(rfd_ring[i].size, 8); - } - - /* init RRD ring */ - for (i = 0; i < num_rx_queues; i++) { - rrd_ring[i].dma = ring_header->dma + offset; - rrd_ring[i].desc = (u8 *) ring_header->desc + offset; - rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) * - rrd_ring[i].count; - offset += roundup(rrd_ring[i].size, 8); - } - - adapter->smb.dma = ring_header->dma + offset; - adapter->smb.smb = (u8 *)ring_header->desc + offset; - return 0; - -err_nomem: - kfree(tpd_ring->buffer_info); - return -ENOMEM; -} - -static void atl1c_configure_des_ring(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *) - adapter->rfd_ring; - struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *) - adapter->rrd_ring; - struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) - adapter->tpd_ring; - struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb; - struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb; - int i; - - /* TPD */ - AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI, - (u32)((tpd_ring[atl1c_trans_normal].dma & - AT_DMA_HI_ADDR_MASK) >> 32)); - /* just enable normal priority TX queue */ - AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO, - (u32)(tpd_ring[atl1c_trans_normal].dma & - AT_DMA_LO_ADDR_MASK)); - AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO, - (u32)(tpd_ring[atl1c_trans_high].dma & - AT_DMA_LO_ADDR_MASK)); - AT_WRITE_REG(hw, REG_TPD_RING_SIZE, - (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK)); - - - /* RFD */ - AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI, - (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32)); - for (i = 0; i < adapter->num_rx_queues; i++) - AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i], - (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); - - AT_WRITE_REG(hw, REG_RFD_RING_SIZE, - rfd_ring[0].count & RFD_RING_SIZE_MASK); - AT_WRITE_REG(hw, REG_RX_BUF_SIZE, - adapter->rx_buffer_len & RX_BUF_SIZE_MASK); - - /* RRD */ - for (i = 0; i < adapter->num_rx_queues; i++) - AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i], - (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK)); - AT_WRITE_REG(hw, REG_RRD_RING_SIZE, - (rrd_ring[0].count & RRD_RING_SIZE_MASK)); - - /* CMB */ - AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK); - - /* SMB */ - AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI, - (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32)); - AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO, - (u32)(smb->dma & AT_DMA_LO_ADDR_MASK)); - /* Load all of base address above */ - AT_WRITE_REG(hw, REG_LOAD_PTR, 1); -} - -static void atl1c_configure_tx(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - u32 dev_ctrl_data; - u32 max_pay_load; - u16 tx_offload_thresh; - u32 txq_ctrl_data; - u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */ - - extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN; - tx_offload_thresh = MAX_TX_OFFLOAD_THRESH; - AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH, - (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK); - AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data); - max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) & - DEVICE_CTRL_MAX_PAYLOAD_MASK; - hw->dmaw_block = min(max_pay_load, hw->dmaw_block); - max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) & - DEVICE_CTRL_MAX_RREQ_SZ_MASK; - hw->dmar_block = min(max_pay_load, hw->dmar_block); - - txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) << - TXQ_NUM_TPD_BURST_SHIFT; - if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE) - txq_ctrl_data |= TXQ_CTRL_ENH_MODE; - txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] & - TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT; - - AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data); -} - -static void atl1c_configure_rx(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - u32 rxq_ctrl_data; - - rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) << - RXQ_RFD_BURST_NUM_SHIFT; - - if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM) - rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN; - if (hw->rss_type == atl1c_rss_ipv4) - rxq_ctrl_data |= RSS_HASH_IPV4; - if (hw->rss_type == atl1c_rss_ipv4_tcp) - rxq_ctrl_data |= RSS_HASH_IPV4_TCP; - if (hw->rss_type == atl1c_rss_ipv6) - rxq_ctrl_data |= RSS_HASH_IPV6; - if (hw->rss_type == atl1c_rss_ipv6_tcp) - rxq_ctrl_data |= RSS_HASH_IPV6_TCP; - if (hw->rss_type != atl1c_rss_disable) - rxq_ctrl_data |= RRS_HASH_CTRL_EN; - - rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) << - RSS_MODE_SHIFT; - rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) << - RSS_HASH_BITS_SHIFT; - if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON) - rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M & - ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT; - - AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data); -} - -static void atl1c_configure_rss(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - - AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab); - AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu); -} - -static void atl1c_configure_dma(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - u32 dma_ctrl_data; - - dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI; - if (hw->ctrl_flags & ATL1C_CMB_ENABLE) - dma_ctrl_data |= DMA_CTRL_CMB_EN; - if (hw->ctrl_flags & ATL1C_SMB_ENABLE) - dma_ctrl_data |= DMA_CTRL_SMB_EN; - else - dma_ctrl_data |= MAC_CTRL_SMB_DIS; - - switch (hw->dma_order) { - case atl1c_dma_ord_in: - dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER; - break; - case atl1c_dma_ord_enh: - dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER; - break; - case atl1c_dma_ord_out: - dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER; - break; - default: - break; - } - - dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK) - << DMA_CTRL_DMAR_BURST_LEN_SHIFT; - dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK) - << DMA_CTRL_DMAW_BURST_LEN_SHIFT; - dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK) - << DMA_CTRL_DMAR_DLY_CNT_SHIFT; - dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK) - << DMA_CTRL_DMAW_DLY_CNT_SHIFT; - - AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data); -} - -/* - * Stop the mac, transmit and receive units - * hw - Struct containing variables accessed by shared code - * return : 0 or idle status (if error) - */ -static int atl1c_stop_mac(struct atl1c_hw *hw) -{ - u32 data; - - AT_READ_REG(hw, REG_RXQ_CTRL, &data); - data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN | - RXQ3_CTRL_EN | RXQ_CTRL_EN); - AT_WRITE_REG(hw, REG_RXQ_CTRL, data); - - AT_READ_REG(hw, REG_TXQ_CTRL, &data); - data &= ~TXQ_CTRL_EN; - AT_WRITE_REG(hw, REG_TWSI_CTRL, data); - - atl1c_wait_until_idle(hw); - - AT_READ_REG(hw, REG_MAC_CTRL, &data); - data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN); - AT_WRITE_REG(hw, REG_MAC_CTRL, data); - - return (int)atl1c_wait_until_idle(hw); -} - -static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw) -{ - u32 data; - - AT_READ_REG(hw, REG_RXQ_CTRL, &data); - switch (hw->adapter->num_rx_queues) { - case 4: - data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN); - break; - case 3: - data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN); - break; - case 2: - data |= RXQ1_CTRL_EN; - break; - default: - break; - } - data |= RXQ_CTRL_EN; - AT_WRITE_REG(hw, REG_RXQ_CTRL, data); -} - -static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw) -{ - u32 data; - - AT_READ_REG(hw, REG_TXQ_CTRL, &data); - data |= TXQ_CTRL_EN; - AT_WRITE_REG(hw, REG_TXQ_CTRL, data); -} - -/* - * Reset the transmit and receive units; mask and clear all interrupts. - * hw - Struct containing variables accessed by shared code - * return : 0 or idle status (if error) - */ -static int atl1c_reset_mac(struct atl1c_hw *hw) -{ - struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter; - struct pci_dev *pdev = adapter->pdev; - int ret; - - AT_WRITE_REG(hw, REG_IMR, 0); - AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT); - - ret = atl1c_stop_mac(hw); - if (ret) - return ret; - /* - * Issue Soft Reset to the MAC. This will reset the chip's - * transmit, receive, DMA. It will not effect - * the current PCI configuration. The global reset bit is self- - * clearing, and should clear within a microsecond. - */ - AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST); - AT_WRITE_FLUSH(hw); - msleep(10); - /* Wait at least 10ms for All module to be Idle */ - - if (atl1c_wait_until_idle(hw)) { - dev_err(&pdev->dev, - "MAC state machine can't be idle since" - " disabled for 10ms second\n"); - return -1; - } - return 0; -} - -static void atl1c_disable_l0s_l1(struct atl1c_hw *hw) -{ - u32 pm_ctrl_data; - - AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); - pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << - PM_CTRL_L1_ENTRY_TIMER_SHIFT); - pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; - pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; - pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; - pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK; - pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; - - pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; - pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; - pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; - AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); -} - -/* - * Set ASPM state. - * Enable/disable L0s/L1 depend on link state. - */ -static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup) -{ - u32 pm_ctrl_data; - - AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data); - - pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1; - pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK << - PM_CTRL_L1_ENTRY_TIMER_SHIFT); - - pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK; - - if (linkup) { - pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN; - pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1; - - pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN; - pm_ctrl_data |= PM_CTRL_SERDES_L1_EN; - } else { - pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN; - pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN; - pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN; - pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN; - - pm_ctrl_data |= PM_CTRL_CLK_SWH_L1; - - if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) - pm_ctrl_data |= PM_CTRL_ASPM_L1_EN; - else - pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN; - } - - AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data); -} - -static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - struct net_device *netdev = adapter->netdev; - u32 mac_ctrl_data; - - mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN; - mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW); - - if (adapter->link_duplex == FULL_DUPLEX) { - hw->mac_duplex = true; - mac_ctrl_data |= MAC_CTRL_DUPLX; - } - - if (adapter->link_speed == SPEED_1000) - hw->mac_speed = atl1c_mac_speed_1000; - else - hw->mac_speed = atl1c_mac_speed_10_100; - - mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) << - MAC_CTRL_SPEED_SHIFT; - - mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD); - mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) << - MAC_CTRL_PRMLEN_SHIFT); - - if (adapter->vlgrp) - mac_ctrl_data |= MAC_CTRL_RMV_VLAN; - - mac_ctrl_data |= MAC_CTRL_BC_EN; - if (netdev->flags & IFF_PROMISC) - mac_ctrl_data |= MAC_CTRL_PROMIS_EN; - if (netdev->flags & IFF_ALLMULTI) - mac_ctrl_data |= MAC_CTRL_MC_ALL_EN; - - mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN; - AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); -} - -/* - * atl1c_configure - Configure Transmit&Receive Unit after Reset - * @adapter: board private structure - * - * Configure the Tx /Rx unit of the MAC after a reset. - */ -static int atl1c_configure(struct atl1c_adapter *adapter) -{ - struct atl1c_hw *hw = &adapter->hw; - u32 master_ctrl_data = 0; - u32 intr_modrt_data; - - /* clear interrupt status */ - AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF); - /* Clear any WOL status */ - AT_WRITE_REG(hw, REG_WOL_CTRL, 0); - /* set Interrupt Clear Timer - * HW will enable self to assert interrupt event to system after - * waiting x-time for software to notify it accept interrupt. - */ - AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER, - hw->ict & INT_RETRIG_TIMER_MASK); - - atl1c_configure_des_ring(adapter); - - if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) { - intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) << - IRQ_MODRT_TX_TIMER_SHIFT; - intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) << - IRQ_MODRT_RX_TIMER_SHIFT; - AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); - master_ctrl_data |= - MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN; - } - - if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ) - master_ctrl_data |= MASTER_CTRL_INT_RDCLR; - - AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); - - if (hw->ctrl_flags & ATL1C_CMB_ENABLE) { - AT_WRITE_REG(hw, REG_CMB_TPD_THRESH, - hw->cmb_tpd & CMB_TPD_THRESH_MASK); - AT_WRITE_REG(hw, REG_CMB_TX_TIMER, - hw->cmb_tx_timer & CMB_TX_TIMER_MASK); - } - - if (hw->ctrl_flags & ATL1C_SMB_ENABLE) - AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, - hw->smb_timer & SMB_STAT_TIMER_MASK); - /* set MTU */ - AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN + - VLAN_HLEN + ETH_FCS_LEN); - /* HDS, disable */ - AT_WRITE_REG(hw, REG_HDS_CTRL, 0); - - atl1c_configure_tx(adapter); - atl1c_configure_rx(adapter); - atl1c_configure_rss(adapter); - atl1c_configure_dma(adapter); - - return 0; -} - -static void atl1c_update_hw_stats(struct atl1c_adapter *adapter) -{ - u16 hw_reg_addr = 0; - unsigned long *stats_item = NULL; - u32 data; - - /* update rx status */ - hw_reg_addr = REG_MAC_RX_STATUS_BIN; - stats_item = &adapter->hw_stats.rx_ok; - while (hw_reg_addr <= REG_MAC_RX_STATUS_END) { - AT_READ_REG(&adapter->hw, hw_reg_addr, &data); - *stats_item += data; - stats_item++; - hw_reg_addr += 4; - } -/* update tx status */ - hw_reg_addr = REG_MAC_TX_STATUS_BIN; - stats_item = &adapter->hw_stats.tx_ok; - while (hw_reg_addr <= REG_MAC_TX_STATUS_END) { - AT_READ_REG(&adapter->hw, hw_reg_addr, &data); - *stats_item += data; - stats_item++; - hw_reg_addr += 4; - } -} - -/* - * atl1c_get_stats - Get System Network Statistics - * @netdev: network interface device structure - * - * Returns the address of the device statistics structure. - * The statistics are actually updated from the timer callback. - */ -static struct net_device_stats *atl1c_get_stats(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw_stats *hw_stats = &adapter->hw_stats; - struct net_device_stats *net_stats = &adapter->net_stats; - - atl1c_update_hw_stats(adapter); - net_stats->rx_packets = hw_stats->rx_ok; - net_stats->tx_packets = hw_stats->tx_ok; - net_stats->rx_bytes = hw_stats->rx_byte_cnt; - net_stats->tx_bytes = hw_stats->tx_byte_cnt; - net_stats->multicast = hw_stats->rx_mcast; - net_stats->collisions = hw_stats->tx_1_col + - hw_stats->tx_2_col * 2 + - hw_stats->tx_late_col + hw_stats->tx_abort_col; - net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err + - hw_stats->rx_len_err + hw_stats->rx_sz_ov + - hw_stats->rx_rrd_ov + hw_stats->rx_align_err; - net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov; - net_stats->rx_length_errors = hw_stats->rx_len_err; - net_stats->rx_crc_errors = hw_stats->rx_fcs_err; - net_stats->rx_frame_errors = hw_stats->rx_align_err; - net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; - - net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov; - - net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col + - hw_stats->tx_underrun + hw_stats->tx_trunc; - net_stats->tx_fifo_errors = hw_stats->tx_underrun; - net_stats->tx_aborted_errors = hw_stats->tx_abort_col; - net_stats->tx_window_errors = hw_stats->tx_late_col; - - return &adapter->net_stats; -} - -static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter) -{ - u16 phy_data; - - spin_lock(&adapter->mdio_lock); - atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data); - spin_unlock(&adapter->mdio_lock); -} - -static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter, - enum atl1c_trans_queue type) -{ - struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *) - &adapter->tpd_ring[type]; - struct atl1c_buffer *buffer_info; - u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean); - u16 hw_next_to_clean; - u16 shift; - u32 data; - - if (type == atl1c_trans_high) - shift = MB_HTPD_CONS_IDX_SHIFT; - else - shift = MB_NTPD_CONS_IDX_SHIFT; - - AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data); - hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK; - - while (next_to_clean != hw_next_to_clean) { - buffer_info = &tpd_ring->buffer_info[next_to_clean]; - if (buffer_info->state == ATL1_BUFFER_BUSY) { - pci_unmap_page(adapter->pdev, buffer_info->dma, - buffer_info->length, PCI_DMA_TODEVICE); - buffer_info->dma = 0; - if (buffer_info->skb) { - dev_kfree_skb_irq(buffer_info->skb); - buffer_info->skb = NULL; - } - buffer_info->state = ATL1_BUFFER_FREE; - } - if (++next_to_clean == tpd_ring->count) - next_to_clean = 0; - atomic_set(&tpd_ring->next_to_clean, next_to_clean); - } - - if (netif_queue_stopped(adapter->netdev) && - netif_carrier_ok(adapter->netdev)) { - netif_wake_queue(adapter->netdev); - } - - return true; -} - -/* - * atl1c_intr - Interrupt Handler - * @irq: interrupt number - * @data: pointer to a network interface device structure - * @pt_regs: CPU registers structure - */ -static irqreturn_t atl1c_intr(int irq, void *data) -{ - struct net_device *netdev = data; - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct pci_dev *pdev = adapter->pdev; - struct atl1c_hw *hw = &adapter->hw; - int max_ints = AT_MAX_INT_WORK; - int handled = IRQ_NONE; - u32 status; - u32 reg_data; - - do { - AT_READ_REG(hw, REG_ISR, &reg_data); - status = reg_data & hw->intr_mask; - - if (status == 0 || (status & ISR_DIS_INT) != 0) { - if (max_ints != AT_MAX_INT_WORK) - handled = IRQ_HANDLED; - break; - } - /* link event */ - if (status & ISR_GPHY) - atl1c_clear_phy_int(adapter); - /* Ack ISR */ - AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT); - if (status & ISR_RX_PKT) { - if (likely(napi_schedule_prep(&adapter->napi))) { - hw->intr_mask &= ~ISR_RX_PKT; - AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); - __napi_schedule(&adapter->napi); - } - } - if (status & ISR_TX_PKT) - atl1c_clean_tx_irq(adapter, atl1c_trans_normal); - - handled = IRQ_HANDLED; - /* check if PCIE PHY Link down */ - if (status & ISR_ERROR) { - if (netif_msg_hw(adapter)) - dev_err(&pdev->dev, - "atl1c hardware error (status = 0x%x)\n", - status & ISR_ERROR); - /* reset MAC */ - hw->intr_mask &= ~ISR_ERROR; - AT_WRITE_REG(hw, REG_IMR, hw->intr_mask); - schedule_work(&adapter->reset_task); - break; - } - - if (status & ISR_OVER) - if (netif_msg_intr(adapter)) - dev_warn(&pdev->dev, - "TX/RX over flow (status = 0x%x)\n", - status & ISR_OVER); - - /* link event */ - if (status & (ISR_GPHY | ISR_MANUAL)) { - adapter->net_stats.tx_carrier_errors++; - atl1c_link_chg_event(adapter); - break; - } - - } while (--max_ints > 0); - /* re-enable Interrupt*/ - AT_WRITE_REG(&adapter->hw, REG_ISR, 0); - return handled; -} - -static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter, - struct sk_buff *skb, struct atl1c_recv_ret_status *prrs) -{ - /* - * The pid field in RRS in not correct sometimes, so we - * cannot figure out if the packet is fragmented or not, - * so we tell the KERNEL CHECKSUM_NONE - */ - skb->ip_summed = CHECKSUM_NONE; -} - -static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid) -{ - struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid]; - struct pci_dev *pdev = adapter->pdev; - struct atl1c_buffer *buffer_info, *next_info; - struct sk_buff *skb; - void *vir_addr = NULL; - u16 num_alloc = 0; - u16 rfd_next_to_use, next_next; - struct atl1c_rx_free_desc *rfd_desc; - - next_next = rfd_next_to_use = rfd_ring->next_to_use; - if (++next_next == rfd_ring->count) - next_next = 0; - buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; - next_info = &rfd_ring->buffer_info[next_next]; - - while (next_info->state == ATL1_BUFFER_FREE) { - rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use); - - skb = dev_alloc_skb(adapter->rx_buffer_len); - if (unlikely(!skb)) { - if (netif_msg_rx_err(adapter)) - dev_warn(&pdev->dev, "alloc rx buffer failed\n"); - break; - } - - /* - * Make buffer alignment 2 beyond a 16 byte boundary - * this will result in a 16 byte aligned IP header after - * the 14 byte MAC header is removed - */ - vir_addr = skb->data; - buffer_info->state = ATL1_BUFFER_BUSY; - buffer_info->skb = skb; - buffer_info->length = adapter->rx_buffer_len; - buffer_info->dma = pci_map_single(pdev, vir_addr, - buffer_info->length, - PCI_DMA_FROMDEVICE); - rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma); - rfd_next_to_use = next_next; - if (++next_next == rfd_ring->count) - next_next = 0; - buffer_info = &rfd_ring->buffer_info[rfd_next_to_use]; - next_info = &rfd_ring->buffer_info[next_next]; - num_alloc++; - } - - if (num_alloc) { - /* TODO: update mailbox here */ - wmb(); - rfd_ring->next_to_use = rfd_next_to_use; - AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid], - rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK); - } - - return num_alloc; -} - -static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring, - struct atl1c_recv_ret_status *rrs, u16 num) -{ - u16 i; - /* the relationship between rrd and rfd is one map one */ - for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring, - rrd_ring->next_to_clean)) { - rrs->word3 &= ~RRS_RXD_UPDATED; - if (++rrd_ring->next_to_clean == rrd_ring->count) - rrd_ring->next_to_clean = 0; - } -} - -static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring, - struct atl1c_recv_ret_status *rrs, u16 num) -{ - u16 i; - u16 rfd_index; - struct atl1c_buffer *buffer_info = rfd_ring->buffer_info; - - rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & - RRS_RX_RFD_INDEX_MASK; - for (i = 0; i < num; i++) { - buffer_info[rfd_index].skb = NULL; - buffer_info[rfd_index].state = ATL1_BUFFER_FREE; - if (++rfd_index == rfd_ring->count) - rfd_index = 0; - } - rfd_ring->next_to_clean = rfd_index; -} - -static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, - int *work_done, int work_to_do) -{ - u16 rfd_num, rfd_index; - u16 count = 0; - u16 length; - struct pci_dev *pdev = adapter->pdev; - struct net_device *netdev = adapter->netdev; - struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que]; - struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que]; - struct sk_buff *skb; - struct atl1c_recv_ret_status *rrs; - struct atl1c_buffer *buffer_info; - - while (1) { - if (*work_done >= work_to_do) - break; - rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean); - if (likely(RRS_RXD_IS_VALID(rrs->word3))) { - rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) & - RRS_RX_RFD_CNT_MASK; - if (unlikely(rfd_num != 1)) - /* TODO support mul rfd*/ - if (netif_msg_rx_err(adapter)) - dev_warn(&pdev->dev, - "Multi rfd not support yet!\n"); - goto rrs_checked; - } else { - break; - } -rrs_checked: - atl1c_clean_rrd(rrd_ring, rrs, rfd_num); - if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) { - atl1c_clean_rfd(rfd_ring, rrs, rfd_num); - if (netif_msg_rx_err(adapter)) - dev_warn(&pdev->dev, - "wrong packet! rrs word3 is %x\n", - rrs->word3); - continue; - } - - length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) & - RRS_PKT_SIZE_MASK); - /* Good Receive */ - if (likely(rfd_num == 1)) { - rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) & - RRS_RX_RFD_INDEX_MASK; - buffer_info = &rfd_ring->buffer_info[rfd_index]; - pci_unmap_single(pdev, buffer_info->dma, - buffer_info->length, PCI_DMA_FROMDEVICE); - skb = buffer_info->skb; - } else { - /* TODO */ - if (netif_msg_rx_err(adapter)) - dev_warn(&pdev->dev, - "Multi rfd not support yet!\n"); - break; - } - atl1c_clean_rfd(rfd_ring, rrs, rfd_num); - skb_put(skb, length - ETH_FCS_LEN); - skb->protocol = eth_type_trans(skb, netdev); - skb->dev = netdev; - atl1c_rx_checksum(adapter, skb, rrs); - if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) { - u16 vlan; - - AT_TAG_TO_VLAN(rrs->vlan_tag, vlan); - vlan = le16_to_cpu(vlan); - vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan); - } else - netif_receive_skb(skb); - - netdev->last_rx = jiffies; - (*work_done)++; - count++; - } - if (count) - atl1c_alloc_rx_buffer(adapter, que); -} - -/* - * atl1c_clean - NAPI Rx polling callback - * @adapter: board private structure - */ -static int atl1c_clean(struct napi_struct *napi, int budget) -{ - struct atl1c_adapter *adapter = - container_of(napi, struct atl1c_adapter, napi); - int work_done = 0; - - /* Keep link state information with original netdev */ - if (!netif_carrier_ok(adapter->netdev)) - goto quit_polling; - /* just enable one RXQ */ - atl1c_clean_rx_irq(adapter, 0, &work_done, budget); - - if (work_done < budget) { -quit_polling: - napi_complete(napi); - adapter->hw.intr_mask |= ISR_RX_PKT; - AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); - } - return work_done; -} - -#ifdef CONFIG_NET_POLL_CONTROLLER - -/* - * Polling 'interrupt' - used by things like netconsole to send skbs - * without having to re-enable interrupts. It's not called while - * the interrupt routine is executing. - */ -static void atl1c_netpoll(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - disable_irq(adapter->pdev->irq); - atl1c_intr(adapter->pdev->irq, netdev); - enable_irq(adapter->pdev->irq); -} -#endif - -static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type) -{ - struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; - u16 next_to_use = 0; - u16 next_to_clean = 0; - - next_to_clean = atomic_read(&tpd_ring->next_to_clean); - next_to_use = tpd_ring->next_to_use; - - return (u16)(next_to_clean > next_to_use) ? - (next_to_clean - next_to_use - 1) : - (tpd_ring->count + next_to_clean - next_to_use - 1); -} - -/* - * get next usable tpd - * Note: should call atl1c_tdp_avail to make sure - * there is enough tpd to use - */ -static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter, - enum atl1c_trans_queue type) -{ - struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; - struct atl1c_tpd_desc *tpd_desc; - u16 next_to_use = 0; - - next_to_use = tpd_ring->next_to_use; - if (++tpd_ring->next_to_use == tpd_ring->count) - tpd_ring->next_to_use = 0; - tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use); - memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc)); - return tpd_desc; -} - -static struct atl1c_buffer * -atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd) -{ - struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring; - - return &tpd_ring->buffer_info[tpd - - (struct atl1c_tpd_desc *)tpd_ring->desc]; -} - -/* Calculate the transmit packet descript needed*/ -static u16 atl1c_cal_tpd_req(const struct sk_buff *skb) -{ - u16 tpd_req; - u16 proto_hdr_len = 0; - - tpd_req = skb_shinfo(skb)->nr_frags + 1; - - if (skb_is_gso(skb)) { - proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); - if (proto_hdr_len < skb_headlen(skb)) - tpd_req++; - if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) - tpd_req++; - } - return tpd_req; -} - -static int atl1c_tso_csum(struct atl1c_adapter *adapter, - struct sk_buff *skb, - struct atl1c_tpd_desc **tpd, - enum atl1c_trans_queue type) -{ - struct pci_dev *pdev = adapter->pdev; - u8 hdr_len; - u32 real_len; - unsigned short offload_type; - int err; - - if (skb_is_gso(skb)) { - if (skb_header_cloned(skb)) { - err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); - if (unlikely(err)) - return -1; - } - offload_type = skb_shinfo(skb)->gso_type; - - if (offload_type & SKB_GSO_TCPV4) { - real_len = (((unsigned char *)ip_hdr(skb) - skb->data) - + ntohs(ip_hdr(skb)->tot_len)); - - if (real_len < skb->len) - pskb_trim(skb, real_len); - - hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); - if (unlikely(skb->len == hdr_len)) { - /* only xsum need */ - if (netif_msg_tx_queued(adapter)) - dev_warn(&pdev->dev, - "IPV4 tso with zero data??\n"); - goto check_sum; - } else { - ip_hdr(skb)->check = 0; - tcp_hdr(skb)->check = ~csum_tcpudp_magic( - ip_hdr(skb)->saddr, - ip_hdr(skb)->daddr, - 0, IPPROTO_TCP, 0); - (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT; - } - } - - if (offload_type & SKB_GSO_TCPV6) { - struct atl1c_tpd_ext_desc *etpd = - *(struct atl1c_tpd_ext_desc **)(tpd); - - memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc)); - *tpd = atl1c_get_tpd(adapter, type); - ipv6_hdr(skb)->payload_len = 0; - /* check payload == 0 byte ? */ - hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb)); - if (unlikely(skb->len == hdr_len)) { - /* only xsum need */ - if (netif_msg_tx_queued(adapter)) - dev_warn(&pdev->dev, - "IPV6 tso with zero data??\n"); - goto check_sum; - } else - tcp_hdr(skb)->check = ~csum_ipv6_magic( - &ipv6_hdr(skb)->saddr, - &ipv6_hdr(skb)->daddr, - 0, IPPROTO_TCP, 0); - etpd->word1 |= 1 << TPD_LSO_EN_SHIFT; - etpd->word1 |= 1 << TPD_LSO_VER_SHIFT; - etpd->pkt_len = cpu_to_le32(skb->len); - (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT; - } - - (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT; - (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) << - TPD_TCPHDR_OFFSET_SHIFT; - (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) << - TPD_MSS_SHIFT; - return 0; - } - -check_sum: - if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { - u8 css, cso; - cso = skb_transport_offset(skb); - - if (unlikely(cso & 0x1)) { - if (netif_msg_tx_err(adapter)) - dev_err(&adapter->pdev->dev, - "payload offset should not an event number\n"); - return -1; - } else { - css = cso + skb->csum_offset; - - (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) << - TPD_PLOADOFFSET_SHIFT; - (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) << - TPD_CCSUM_OFFSET_SHIFT; - (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT; - } - } - return 0; -} - -static void atl1c_tx_map(struct atl1c_adapter *adapter, - struct sk_buff *skb, struct atl1c_tpd_desc *tpd, - enum atl1c_trans_queue type) -{ - struct atl1c_tpd_desc *use_tpd = NULL; - struct atl1c_buffer *buffer_info = NULL; - u16 buf_len = skb_headlen(skb); - u16 map_len = 0; - u16 mapped_len = 0; - u16 hdr_len = 0; - u16 nr_frags; - u16 f; - int tso; - - nr_frags = skb_shinfo(skb)->nr_frags; - tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK; - if (tso) { - /* TSO */ - map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); - use_tpd = tpd; - - buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); - buffer_info->length = map_len; - buffer_info->dma = pci_map_single(adapter->pdev, - skb->data, hdr_len, PCI_DMA_TODEVICE); - buffer_info->state = ATL1_BUFFER_BUSY; - mapped_len += map_len; - use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); - use_tpd->buffer_len = cpu_to_le16(buffer_info->length); - } - - if (mapped_len < buf_len) { - /* mapped_len == 0, means we should use the first tpd, - which is given by caller */ - if (mapped_len == 0) - use_tpd = tpd; - else { - use_tpd = atl1c_get_tpd(adapter, type); - memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); - use_tpd = atl1c_get_tpd(adapter, type); - memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); - } - buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); - buffer_info->length = buf_len - mapped_len; - buffer_info->dma = - pci_map_single(adapter->pdev, skb->data + mapped_len, - buffer_info->length, PCI_DMA_TODEVICE); - buffer_info->state = ATL1_BUFFER_BUSY; - - use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); - use_tpd->buffer_len = cpu_to_le16(buffer_info->length); - } - - for (f = 0; f < nr_frags; f++) { - struct skb_frag_struct *frag; - - frag = &skb_shinfo(skb)->frags[f]; - - use_tpd = atl1c_get_tpd(adapter, type); - memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc)); - - buffer_info = atl1c_get_tx_buffer(adapter, use_tpd); - buffer_info->length = frag->size; - buffer_info->dma = - pci_map_page(adapter->pdev, frag->page, - frag->page_offset, - buffer_info->length, - PCI_DMA_TODEVICE); - buffer_info->state = ATL1_BUFFER_BUSY; - - use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma); - use_tpd->buffer_len = cpu_to_le16(buffer_info->length); - } - - /* The last tpd */ - use_tpd->word1 |= 1 << TPD_EOP_SHIFT; - /* The last buffer info contain the skb address, - so it will be free after unmap */ - buffer_info->skb = skb; -} - -static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb, - struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type) -{ - struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type]; - u32 prod_data; - - AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data); - switch (type) { - case atl1c_trans_high: - prod_data &= 0xFFFF0000; - prod_data |= tpd_ring->next_to_use & 0xFFFF; - break; - case atl1c_trans_normal: - prod_data &= 0x0000FFFF; - prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16; - break; - default: - break; - } - wmb(); - AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data); -} - -static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - unsigned long flags; - u16 tpd_req = 1; - struct atl1c_tpd_desc *tpd; - enum atl1c_trans_queue type = atl1c_trans_normal; - - if (test_bit(__AT_DOWN, &adapter->flags)) { - dev_kfree_skb_any(skb); - return NETDEV_TX_OK; - } - - tpd_req = atl1c_cal_tpd_req(skb); - if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) { - if (netif_msg_pktdata(adapter)) - dev_info(&adapter->pdev->dev, "tx locked\n"); - return NETDEV_TX_LOCKED; - } - if (skb->mark == 0x01) - type = atl1c_trans_high; - else - type = atl1c_trans_normal; - - if (atl1c_tpd_avail(adapter, type) < tpd_req) { - /* no enough descriptor, just stop queue */ - netif_stop_queue(netdev); - spin_unlock_irqrestore(&adapter->tx_lock, flags); - return NETDEV_TX_BUSY; - } - - tpd = atl1c_get_tpd(adapter, type); - - /* do TSO and check sum */ - if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) { - spin_unlock_irqrestore(&adapter->tx_lock, flags); - dev_kfree_skb_any(skb); - return NETDEV_TX_OK; - } - - if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { - u16 vlan = vlan_tx_tag_get(skb); - __le16 tag; - - vlan = cpu_to_le16(vlan); - AT_VLAN_TO_TAG(vlan, tag); - tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT; - tpd->vlan_tag = tag; - } - - if (skb_network_offset(skb) != ETH_HLEN) - tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */ - - atl1c_tx_map(adapter, skb, tpd, type); - atl1c_tx_queue(adapter, skb, tpd, type); - - spin_unlock_irqrestore(&adapter->tx_lock, flags); - return NETDEV_TX_OK; -} - -static void atl1c_free_irq(struct atl1c_adapter *adapter) -{ - struct net_device *netdev = adapter->netdev; - - free_irq(adapter->pdev->irq, netdev); - - if (adapter->have_msi) - pci_disable_msi(adapter->pdev); -} - -static int atl1c_request_irq(struct atl1c_adapter *adapter) -{ - struct pci_dev *pdev = adapter->pdev; - struct net_device *netdev = adapter->netdev; - int flags = 0; - int err = 0; - - adapter->have_msi = true; - err = pci_enable_msi(adapter->pdev); - if (err) { - if (netif_msg_ifup(adapter)) - dev_err(&pdev->dev, - "Unable to allocate MSI interrupt Error: %d\n", - err); - adapter->have_msi = false; - } else - netdev->irq = pdev->irq; - - if (!adapter->have_msi) - flags |= IRQF_SHARED; - err = request_irq(adapter->pdev->irq, &atl1c_intr, flags, - netdev->name, netdev); - if (err) { - if (netif_msg_ifup(adapter)) - dev_err(&pdev->dev, - "Unable to allocate interrupt Error: %d\n", - err); - if (adapter->have_msi) - pci_disable_msi(adapter->pdev); - return err; - } - if (netif_msg_ifup(adapter)) - dev_dbg(&pdev->dev, "atl1c_request_irq OK\n"); - return err; -} - -int atl1c_up(struct atl1c_adapter *adapter) -{ - struct net_device *netdev = adapter->netdev; - int num; - int err; - int i; - - netif_carrier_off(netdev); - atl1c_init_ring_ptrs(adapter); - atl1c_set_multi(netdev); - atl1c_restore_vlan(adapter); - - for (i = 0; i < adapter->num_rx_queues; i++) { - num = atl1c_alloc_rx_buffer(adapter, i); - if (unlikely(num == 0)) { - err = -ENOMEM; - goto err_alloc_rx; - } - } - - if (atl1c_configure(adapter)) { - err = -EIO; - goto err_up; - } - - err = atl1c_request_irq(adapter); - if (unlikely(err)) - goto err_up; - - clear_bit(__AT_DOWN, &adapter->flags); - napi_enable(&adapter->napi); - atl1c_irq_enable(adapter); - atl1c_check_link_status(adapter); - netif_start_queue(netdev); - return err; - -err_up: -err_alloc_rx: - atl1c_clean_rx_ring(adapter); - return err; -} - -void atl1c_down(struct atl1c_adapter *adapter) -{ - struct net_device *netdev = adapter->netdev; - - atl1c_del_timer(adapter); - atl1c_cancel_work(adapter); - - /* signal that we're down so the interrupt handler does not - * reschedule our watchdog timer */ - set_bit(__AT_DOWN, &adapter->flags); - netif_carrier_off(netdev); - napi_disable(&adapter->napi); - atl1c_irq_disable(adapter); - atl1c_free_irq(adapter); - AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT); - /* reset MAC to disable all RX/TX */ - atl1c_reset_mac(&adapter->hw); - msleep(1); - - adapter->link_speed = SPEED_0; - adapter->link_duplex = -1; - atl1c_clean_tx_ring(adapter, atl1c_trans_normal); - atl1c_clean_tx_ring(adapter, atl1c_trans_high); - atl1c_clean_rx_ring(adapter); -} - -/* - * atl1c_open - Called when a network interface is made active - * @netdev: network interface device structure - * - * Returns 0 on success, negative value on failure - * - * The open entry point is called when a network interface is made - * active by the system (IFF_UP). At this point all resources needed - * for transmit and receive operations are allocated, the interrupt - * handler is registered with the OS, the watchdog timer is started, - * and the stack is notified that the interface is ready. - */ -static int atl1c_open(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - int err; - - /* disallow open during test */ - if (test_bit(__AT_TESTING, &adapter->flags)) - return -EBUSY; - - /* allocate rx/tx dma buffer & descriptors */ - err = atl1c_setup_ring_resources(adapter); - if (unlikely(err)) - return err; - - err = atl1c_up(adapter); - if (unlikely(err)) - goto err_up; - - if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) { - u32 phy_data; - - AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data); - phy_data |= MDIO_AP_EN; - AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data); - } - return 0; - -err_up: - atl1c_free_irq(adapter); - atl1c_free_ring_resources(adapter); - atl1c_reset_mac(&adapter->hw); - return err; -} - -/* - * atl1c_close - Disables a network interface - * @netdev: network interface device structure - * - * Returns 0, this is not allowed to fail - * - * The close entry point is called when an interface is de-activated - * by the OS. The hardware is still under the drivers control, but - * needs to be disabled. A global MAC reset is issued to stop the - * hardware, and all transmit and receive resources are freed. - */ -static int atl1c_close(struct net_device *netdev) -{ - struct atl1c_adapter *adapter = netdev_priv(netdev); - - WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); - atl1c_down(adapter); - atl1c_free_ring_resources(adapter); - return 0; -} - -static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - struct atl1c_hw *hw = &adapter->hw; - u32 ctrl; - u32 mac_ctrl_data; - u32 master_ctrl_data; - u32 wol_ctrl_data; - u16 mii_bmsr_data; - u16 save_autoneg_advertised; - u16 mii_intr_status_data; - u32 wufc = adapter->wol; - u32 i; - int retval = 0; - - if (netif_running(netdev)) { - WARN_ON(test_bit(__AT_RESETTING, &adapter->flags)); - atl1c_down(adapter); - } - netif_device_detach(netdev); - atl1c_disable_l0s_l1(hw); - retval = pci_save_state(pdev); - if (retval) - return retval; - if (wufc) { - AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data); - master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS; - - /* get link status */ - atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); - atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); - save_autoneg_advertised = hw->autoneg_advertised; - hw->autoneg_advertised = ADVERTISED_10baseT_Half; - if (atl1c_restart_autoneg(hw) != 0) - if (netif_msg_link(adapter)) - dev_warn(&pdev->dev, "phy autoneg failed\n"); - hw->phy_configured = false; /* re-init PHY when resume */ - hw->autoneg_advertised = save_autoneg_advertised; - /* turn on magic packet wol */ - if (wufc & AT_WUFC_MAG) - wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN; - - if (wufc & AT_WUFC_LNKC) { - for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) { - msleep(100); - atl1c_read_phy_reg(hw, MII_BMSR, - (u16 *)&mii_bmsr_data); - if (mii_bmsr_data & BMSR_LSTATUS) - break; - } - if ((mii_bmsr_data & BMSR_LSTATUS) == 0) - if (netif_msg_link(adapter)) - dev_warn(&pdev->dev, - "%s: Link may change" - "when suspend\n", - atl1c_driver_name); - wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN; - /* only link up can wake up */ - if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) { - if (netif_msg_link(adapter)) - dev_err(&pdev->dev, - "%s: read write phy " - "register failed.\n", - atl1c_driver_name); - goto wol_dis; - } - } - /* clear phy interrupt */ - atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data); - /* Config MAC Ctrl register */ - mac_ctrl_data = MAC_CTRL_RX_EN; - /* set to 10/100M halt duplex */ - mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT; - mac_ctrl_data |= (((u32)adapter->hw.preamble_len & - MAC_CTRL_PRMLEN_MASK) << - MAC_CTRL_PRMLEN_SHIFT); - - if (adapter->vlgrp) - mac_ctrl_data |= MAC_CTRL_RMV_VLAN; - - /* magic packet maybe Broadcast&multicast&Unicast frame */ - if (wufc & AT_WUFC_MAG) - mac_ctrl_data |= MAC_CTRL_BC_EN; - - if (netif_msg_hw(adapter)) - dev_dbg(&pdev->dev, - "%s: suspend MAC=0x%x\n", - atl1c_driver_name, mac_ctrl_data); - AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data); - AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data); - AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data); - - /* pcie patch */ - AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl); - ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; - AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); - - pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); - goto suspend_exit; - } -wol_dis: - - /* WOL disabled */ - AT_WRITE_REG(hw, REG_WOL_CTRL, 0); - - /* pcie patch */ - AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl); - ctrl |= PCIE_PHYMISC_FORCE_RCV_DET; - AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl); - - atl1c_phy_disable(hw); - hw->phy_configured = false; /* re-init PHY when resume */ - - pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); -suspend_exit: - - pci_disable_device(pdev); - pci_set_power_state(pdev, pci_choose_state(pdev, state)); - - return 0; -} - -static int atl1c_resume(struct pci_dev *pdev) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - - pci_set_power_state(pdev, PCI_D0); - pci_restore_state(pdev); - pci_enable_wake(pdev, PCI_D3hot, 0); - pci_enable_wake(pdev, PCI_D3cold, 0); - - AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0); - - atl1c_phy_reset(&adapter->hw); - atl1c_reset_mac(&adapter->hw); - netif_device_attach(netdev); - if (netif_running(netdev)) - atl1c_up(adapter); - - return 0; -} - -static void atl1c_shutdown(struct pci_dev *pdev) -{ - atl1c_suspend(pdev, PMSG_SUSPEND); -} - -#ifdef HAVE_NET_DEVICE_OPS -static const struct net_device_ops atl1c_netdev_ops = { - .ndo_open = atl1c_open, - .ndo_stop = atl1c_close, - .ndo_validate_addr = eth_validate_addr, - .ndo_start_xmit = atl1c_xmit_frame, - .ndo_set_mac_address = atl1c_set_mac_addr, - .ndo_set_multicast_list = atl1c_set_multi, - .ndo_change_mtu = atl1c_change_mtu, - .ndo_do_ioctl = atl1c_ioctl, - .ndo_tx_timeout = atl1c_tx_timeout, - .ndo_get_stats = atl1c_get_stats, - .ndo_vlan_rx_register = atl1c_vlan_rx_register, -#ifdef CONFIG_NET_POLL_CONTROLLER - .ndo_poll_controller = atl1c_netpoll, -#endif /*HAVE_NET_DEVICE_OPS*/ -}; -#endif - -static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev) -{ - SET_NETDEV_DEV(netdev, &pdev->dev); - pci_set_drvdata(pdev, netdev); - - netdev->irq = pdev->irq; - -#ifdef HAVE_NET_DEVICE_OPS - netdev->netdev_ops = &atl1c_netdev_ops; -#else - netdev->open = &atl1c_open; - netdev->stop = &atl1c_close; - netdev->hard_start_xmit = &atl1c_xmit_frame; - netdev->set_mac_address = &atl1c_set_mac_addr; - netdev->set_multicast_list = &atl1c_set_multi; - netdev->change_mtu = &atl1c_change_mtu; - netdev->do_ioctl = &atl1c_ioctl; - netdev->tx_timeout = &atl1c_tx_timeout; - netdev->get_stats = &atl1c_get_stats; - netdev->vlan_rx_register = atl1c_vlan_rx_register; -#endif /*HAVE_NET_DEVICE_OPS*/ - - netdev->watchdog_timeo = AT_TX_WATCHDOG; - atl1c_set_ethtool_ops(netdev); - - /* TODO: add when ready */ - netdev->features = NETIF_F_SG | - NETIF_F_HW_CSUM | - NETIF_F_HW_VLAN_TX | - NETIF_F_HW_VLAN_RX | - NETIF_F_TSO | - NETIF_F_TSO6; - return 0; -} - -/* - * atl1c_probe - Device Initialization Routine - * @pdev: PCI device information struct - * @ent: entry in atl1c_pci_tbl - * - * Returns 0 on success, negative on failure - * - * atl1c_probe initializes an adapter identified by a pci_dev structure. - * The OS initialization, configuring of the adapter private structure, - * and a hardware reset occur. - */ -static int __devinit atl1c_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - struct net_device *netdev; - struct atl1c_adapter *adapter; - static int cards_found; - - int err = 0; - - /* enable device (incl. PCI PM wakeup and hotplug setup) */ - err = pci_enable_device_mem(pdev); - if (err) { - dev_err(&pdev->dev, "cannot enable PCI device\n"); - return err; - } - - /* - * The atl1c chip can DMA to 64-bit addresses, but it uses a single - * shared register for the high 32 bits, so only a single, aligned, - * 4 GB physical address range can be used at a time. - * - * Supporting 64-bit DMA on this hardware is more trouble than it's - * worth. It is far easier to limit to 32-bit DMA than update - * various kernel subsystems to support the mechanics required by a - * fixed-high-32-bit system. - */ - if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) || - (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) { - dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); - goto err_dma; - } - - err = pci_request_regions(pdev, atl1c_driver_name); - if (err) { - dev_err(&pdev->dev, "cannot obtain PCI resources\n"); - goto err_pci_reg; - } - - pci_set_master(pdev); - - netdev = alloc_etherdev(sizeof(struct atl1c_adapter)); - if (netdev == NULL) { - err = -ENOMEM; - dev_err(&pdev->dev, "etherdev alloc failed\n"); - goto err_alloc_etherdev; - } - - err = atl1c_init_netdev(netdev, pdev); - if (err) { - dev_err(&pdev->dev, "init netdevice failed\n"); - goto err_init_netdev; - } - adapter = netdev_priv(netdev); - adapter->bd_number = cards_found; - adapter->netdev = netdev; - adapter->pdev = pdev; - adapter->hw.adapter = adapter; - adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg); - adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); - if (!adapter->hw.hw_addr) { - err = -EIO; - dev_err(&pdev->dev, "cannot map device registers\n"); - goto err_ioremap; - } - netdev->base_addr = (unsigned long)adapter->hw.hw_addr; - - /* init mii data */ - adapter->mii.dev = netdev; - adapter->mii.mdio_read = atl1c_mdio_read; - adapter->mii.mdio_write = atl1c_mdio_write; - adapter->mii.phy_id_mask = 0x1f; - adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK; - netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64); - setup_timer(&adapter->phy_config_timer, atl1c_phy_config, - (unsigned long)adapter); - /* setup the private structure */ - err = atl1c_sw_init(adapter); - if (err) { - dev_err(&pdev->dev, "net device private data init failed\n"); - goto err_sw_init; - } - atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE | - ATL1C_PCIE_PHY_RESET); - - /* Init GPHY as early as possible due to power saving issue */ - atl1c_phy_reset(&adapter->hw); - - err = atl1c_reset_mac(&adapter->hw); - if (err) { - err = -EIO; - goto err_reset; - } - - device_init_wakeup(&pdev->dev, 1); - /* reset the controller to - * put the device in a known good starting state */ - err = atl1c_phy_init(&adapter->hw); - if (err) { - err = -EIO; - goto err_reset; - } - if (atl1c_read_mac_addr(&adapter->hw) != 0) { - err = -EIO; - dev_err(&pdev->dev, "get mac address failed\n"); - goto err_eeprom; - } - memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); - memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); - if (netif_msg_probe(adapter)) - dev_dbg(&pdev->dev, - "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n", - adapter->hw.mac_addr[0], adapter->hw.mac_addr[1], - adapter->hw.mac_addr[2], adapter->hw.mac_addr[3], - adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]); - - atl1c_hw_set_mac_addr(&adapter->hw); - INIT_WORK(&adapter->reset_task, atl1c_reset_task); - INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task); - err = register_netdev(netdev); - if (err) { - dev_err(&pdev->dev, "register netdevice failed\n"); - goto err_register; - } - - if (netif_msg_probe(adapter)) - dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION); - cards_found++; - return 0; - -err_reset: -err_register: -err_sw_init: -err_eeprom: - iounmap(adapter->hw.hw_addr); -err_init_netdev: -err_ioremap: - free_netdev(netdev); -err_alloc_etherdev: - pci_release_regions(pdev); -err_pci_reg: -err_dma: - pci_disable_device(pdev); - return err; -} - -/* - * atl1c_remove - Device Removal Routine - * @pdev: PCI device information struct - * - * atl1c_remove is called by the PCI subsystem to alert the driver - * that it should release a PCI device. The could be caused by a - * Hot-Plug event, or because the driver is going to be removed from - * memory. - */ -static void __devexit atl1c_remove(struct pci_dev *pdev) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - - unregister_netdev(netdev); - atl1c_phy_disable(&adapter->hw); - - iounmap(adapter->hw.hw_addr); - - pci_release_regions(pdev); - pci_disable_device(pdev); - free_netdev(netdev); -} - -/* - * atl1c_io_error_detected - called when PCI error is detected - * @pdev: Pointer to PCI device - * @state: The current pci connection state - * - * This function is called after a PCI bus error affecting - * this device has been detected. - */ -static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev, - pci_channel_state_t state) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - - netif_device_detach(netdev); - - if (netif_running(netdev)) - atl1c_down(adapter); - - pci_disable_device(pdev); - - /* Request a slot slot reset. */ - return PCI_ERS_RESULT_NEED_RESET; -} - -/* - * atl1c_io_slot_reset - called after the pci bus has been reset. - * @pdev: Pointer to PCI device - * - * Restart the card from scratch, as if from a cold-boot. Implementation - * resembles the first-half of the e1000_resume routine. - */ -static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - - if (pci_enable_device(pdev)) { - if (netif_msg_hw(adapter)) - dev_err(&pdev->dev, - "Cannot re-enable PCI device after reset\n"); - return PCI_ERS_RESULT_DISCONNECT; - } - pci_set_master(pdev); - - pci_enable_wake(pdev, PCI_D3hot, 0); - pci_enable_wake(pdev, PCI_D3cold, 0); - - atl1c_reset_mac(&adapter->hw); - - return PCI_ERS_RESULT_RECOVERED; -} - -/* - * atl1c_io_resume - called when traffic can start flowing again. - * @pdev: Pointer to PCI device - * - * This callback is called when the error recovery driver tells us that - * its OK to resume normal operation. Implementation resembles the - * second-half of the atl1c_resume routine. - */ -static void atl1c_io_resume(struct pci_dev *pdev) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct atl1c_adapter *adapter = netdev_priv(netdev); - - if (netif_running(netdev)) { - if (atl1c_up(adapter)) { - if (netif_msg_hw(adapter)) - dev_err(&pdev->dev, - "Cannot bring device back up after reset\n"); - return; - } - } - - netif_device_attach(netdev); -} - -static struct pci_error_handlers atl1c_err_handler = { - .error_detected = atl1c_io_error_detected, - .slot_reset = atl1c_io_slot_reset, - .resume = atl1c_io_resume, -}; - -static struct pci_driver atl1c_driver = { - .name = atl1c_driver_name, - .id_table = atl1c_pci_tbl, - .probe = atl1c_probe, - .remove = __devexit_p(atl1c_remove), - /* Power Managment Hooks */ - .suspend = atl1c_suspend, - .resume = atl1c_resume, - .shutdown = atl1c_shutdown, - .err_handler = &atl1c_err_handler -}; - -/* - * atl1c_init_module - Driver Registration Routine - * - * atl1c_init_module is the first routine called when the driver is - * loaded. All it does is register with the PCI subsystem. - */ -static int __init atl1c_init_module(void) -{ - return pci_register_driver(&atl1c_driver); -} - -/* - * atl1c_exit_module - Driver Exit Cleanup Routine - * - * atl1c_exit_module is called just before the driver is removed - * from memory. - */ -static void __exit atl1c_exit_module(void) -{ - pci_unregister_driver(&atl1c_driver); -} - -module_init(atl1c_init_module); -module_exit(atl1c_exit_module); diff --git a/src/et131x/Kconfig b/src/et131x/Kconfig deleted file mode 100644 index e11cf34..0000000 --- a/src/et131x/Kconfig +++ /dev/null @@ -1,18 +0,0 @@ -config ET131X - tristate "Agere ET-1310 Gigabit Ethernet support" - depends on NETDEV_1000 && PCI - default n - ---help--- - This driver supports Agere ET-1310 ethernet adapters. - - To compile this driver as a module, choose M here. The module - will be called et131x. - -config ET131X_DEBUG - bool "Enable et131x debugging" - depends on ET131X - default n - ---help--- - Say Y for detailed debug information. - - If in doubt, say N. diff --git a/src/et131x/Makefile b/src/et131x/Makefile deleted file mode 100644 index 71640ff..0000000 --- a/src/et131x/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -KSRC ?= /lib/modules/$(shell uname -r)/build - -obj-m = et131x.o - -et131x-objs := et1310_eeprom.o \ - et1310_jagcore.o \ - et1310_mac.o \ - et1310_phy.o \ - et1310_pm.o \ - et1310_rx.o \ - et1310_tx.o \ - et131x_config.o \ - et131x_debug.o \ - et131x_initpci.o \ - et131x_isr.o \ - et131x_netdev.o - -all: - $(MAKE) -C $(KSRC) SUBDIRS=$(PWD) modules - -clean: - rm -rf *.ko *.mod.* *.o .*.cmd .tmp_versions Module.symvers - -distclean: clean - rm -rf cscope.* *~ diff --git a/src/et131x/README b/src/et131x/README deleted file mode 100644 index 28752a5..0000000 --- a/src/et131x/README +++ /dev/null @@ -1,25 +0,0 @@ -This is a driver for the ET1310 network device. - -Based on the driver found at https://sourceforge.net/projects/et131x/ - -Cleaned up immensely by Olaf Hartman o.hartmann@telovital.com and Christoph -Hellwig hch@infradead.org - -Note, the powermanagement options were removed from the vendor provided -driver as they did not build properly at the time. - -TODO: - - kernel coding style cleanups - - forward port for latest network driver changes - - kill useless typecasts (e.g. in et1310_phy.c) - - alloc_etherdev is initializing memory with zero?!? - - add_timer call in et131x_netdev.c is correct? - - Add power saving functionality (suspend, sleep, resume) - - Implement a few more kernel Parameter (set mac ) - -Please send patches to: - Greg Kroah-Hartman gregkh@suse.de - -And Cc: Olaf Hartmann o.hartmann@telovital.com as he has this device and can -test any changes. - diff --git a/src/et131x/et1310_address_map.h b/src/et131x/et1310_address_map.h deleted file mode 100644 index 3c85999..0000000 --- a/src/et131x/et1310_address_map.h +++ /dev/null @@ -1,2399 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_address_map.h - Contains the register mapping for the ET1310 - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef _ET1310_ADDRESS_MAP_H_ -#define _ET1310_ADDRESS_MAP_H_ - - -/* START OF GLOBAL REGISTER ADDRESS MAP */ - -typedef union _Q_ADDR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:22; // bits 10-31 - u32 addr:10; // bits 0-9 -#else - u32 addr:10; // bits 0-9 - u32 unused:22; // bits 10-31 -#endif - } bits; -} Q_ADDR_t, *PQ_ADDR_t; - -/* - * structure for tx queue start address reg in global address map - * located at address 0x0000 - * Defined earlier (Q_ADDR_t) - */ - -/* - * structure for tx queue end address reg in global address map - * located at address 0x0004 - * Defined earlier (Q_ADDR_t) - */ - -/* - * structure for rx queue start address reg in global address map - * located at address 0x0008 - * Defined earlier (Q_ADDR_t) - */ - -/* - * structure for rx queue end address reg in global address map - * located at address 0x000C - * Defined earlier (Q_ADDR_t) - */ - -/* - * structure for power management control status reg in global address map - * located at address 0x0010 - */ -typedef union _PM_CSR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:22; // bits 10-31 - u32 pm_jagcore_rx_rdy:1; // bit 9 - u32 pm_jagcore_tx_rdy:1; // bit 8 - u32 pm_phy_lped_en:1; // bit 7 - u32 pm_phy_sw_coma:1; // bit 6 - u32 pm_rxclk_gate:1; // bit 5 - u32 pm_txclk_gate:1; // bit 4 - u32 pm_sysclk_gate:1; // bit 3 - u32 pm_jagcore_rx_en:1; // bit 2 - u32 pm_jagcore_tx_en:1; // bit 1 - u32 pm_gigephy_en:1; // bit 0 -#else - u32 pm_gigephy_en:1; // bit 0 - u32 pm_jagcore_tx_en:1; // bit 1 - u32 pm_jagcore_rx_en:1; // bit 2 - u32 pm_sysclk_gate:1; // bit 3 - u32 pm_txclk_gate:1; // bit 4 - u32 pm_rxclk_gate:1; // bit 5 - u32 pm_phy_sw_coma:1; // bit 6 - u32 pm_phy_lped_en:1; // bit 7 - u32 pm_jagcore_tx_rdy:1; // bit 8 - u32 pm_jagcore_rx_rdy:1; // bit 9 - u32 unused:22; // bits 10-31 -#endif - } bits; -} PM_CSR_t, *PPM_CSR_t; - -/* - * structure for interrupt status reg in global address map - * located at address 0x0018 - */ -typedef union _INTERRUPT_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused5:11; // bits 21-31 - u32 slv_timeout:1; // bit 20 - u32 mac_stat_interrupt:1; // bit 19 - u32 rxmac_interrupt:1; // bit 18 - u32 txmac_interrupt:1; // bit 17 - u32 phy_interrupt:1; // bit 16 - u32 wake_on_lan:1; // bit 15 - u32 watchdog_interrupt:1; // bit 14 - u32 unused4:4; // bits 10-13 - u32 rxdma_err:1; // bit 9 - u32 rxdma_pkt_stat_ring_low:1; // bit 8 - u32 rxdma_fb_ring1_low:1; // bit 7 - u32 rxdma_fb_ring0_low:1; // bit 6 - u32 rxdma_xfr_done:1; // bit 5 - u32 txdma_err:1; // bit 4 - u32 txdma_isr:1; // bit 3 - u32 unused3:1; // bit 2 - u32 unused2:1; // bit 1 - u32 unused1:1; // bit 0 -#else - u32 unused1:1; // bit 0 - u32 unused2:1; // bit 1 - u32 unused3:1; // bit 2 - u32 txdma_isr:1; // bit 3 - u32 txdma_err:1; // bit 4 - u32 rxdma_xfr_done:1; // bit 5 - u32 rxdma_fb_ring0_low:1; // bit 6 - u32 rxdma_fb_ring1_low:1; // bit 7 - u32 rxdma_pkt_stat_ring_low:1; // bit 8 - u32 rxdma_err:1; // bit 9 - u32 unused4:4; // bits 10-13 - u32 watchdog_interrupt:1; // bit 14 - u32 wake_on_lan:1; // bit 15 - u32 phy_interrupt:1; // bit 16 - u32 txmac_interrupt:1; // bit 17 - u32 rxmac_interrupt:1; // bit 18 - u32 mac_stat_interrupt:1; // bit 19 - u32 slv_timeout:1; // bit 20 - u32 unused5:11; // bits 21-31 -#endif - } bits; -} INTERRUPT_t, *PINTERRUPT_t; - -/* - * structure for interrupt mask reg in global address map - * located at address 0x001C - * Defined earlier (INTERRUPT_t), but 'watchdog_interrupt' is not used. - */ - -/* - * structure for interrupt alias clear mask reg in global address map - * located at address 0x0020 - * Defined earlier (INTERRUPT_t) - */ - -/* - * structure for interrupt status alias reg in global address map - * located at address 0x0024 - * Defined earlier (INTERRUPT_t) - */ - -/* - * structure for software reset reg in global address map - * located at address 0x0028 - */ -typedef union _SW_RESET_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 selfclr_disable:1; // bit 31 - u32 unused:24; // bits 7-30 - u32 mmc_sw_reset:1; // bit 6 - u32 mac_stat_sw_reset:1; // bit 5 - u32 mac_sw_reset:1; // bit 4 - u32 rxmac_sw_reset:1; // bit 3 - u32 txmac_sw_reset:1; // bit 2 - u32 rxdma_sw_reset:1; // bit 1 - u32 txdma_sw_reset:1; // bit 0 -#else - u32 txdma_sw_reset:1; // bit 0 - u32 rxdma_sw_reset:1; // bit 1 - u32 txmac_sw_reset:1; // bit 2 - u32 rxmac_sw_reset:1; // bit 3 - u32 mac_sw_reset:1; // bit 4 - u32 mac_stat_sw_reset:1; // bit 5 - u32 mmc_sw_reset:1; // bit 6 - u32 unused:24; // bits 7-30 - u32 selfclr_disable:1; // bit 31 -#endif - } bits; -} SW_RESET_t, *PSW_RESET_t; - -/* - * structure for SLV Timer reg in global address map - * located at address 0x002C - */ -typedef union _SLV_TIMER_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:8; // bits 24-31 - u32 timer_ini:24; // bits 0-23 -#else - u32 timer_ini:24; // bits 0-23 - u32 unused:8; // bits 24-31 -#endif - } bits; -} SLV_TIMER_t, *PSLV_TIMER_t; - -/* - * structure for MSI Configuration reg in global address map - * located at address 0x0030 - */ -typedef union _MSI_CONFIG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused1:13; // bits 19-31 - u32 msi_tc:3; // bits 16-18 - u32 unused2:11; // bits 5-15 - u32 msi_vector:5; // bits 0-4 -#else - u32 msi_vector:5; // bits 0-4 - u32 unused2:11; // bits 5-15 - u32 msi_tc:3; // bits 16-18 - u32 unused1:13; // bits 19-31 -#endif - } bits; -} MSI_CONFIG_t, *PMSI_CONFIG_t; - -/* - * structure for Loopback reg in global address map - * located at address 0x0034 - */ -typedef union _LOOPBACK_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:30; // bits 2-31 - u32 dma_loopback:1; // bit 1 - u32 mac_loopback:1; // bit 0 -#else - u32 mac_loopback:1; // bit 0 - u32 dma_loopback:1; // bit 1 - u32 unused:30; // bits 2-31 -#endif - } bits; -} LOOPBACK_t, *PLOOPBACK_t; - -/* - * GLOBAL Module of JAGCore Address Mapping - * Located at address 0x0000 - */ -typedef struct _GLOBAL_t { // Location: - Q_ADDR_t txq_start_addr; // 0x0000 - Q_ADDR_t txq_end_addr; // 0x0004 - Q_ADDR_t rxq_start_addr; // 0x0008 - Q_ADDR_t rxq_end_addr; // 0x000C - PM_CSR_t pm_csr; // 0x0010 - u32 unused; // 0x0014 - INTERRUPT_t int_status; // 0x0018 - INTERRUPT_t int_mask; // 0x001C - INTERRUPT_t int_alias_clr_en; // 0x0020 - INTERRUPT_t int_status_alias; // 0x0024 - SW_RESET_t sw_reset; // 0x0028 - SLV_TIMER_t slv_timer; // 0x002C - MSI_CONFIG_t msi_config; // 0x0030 - LOOPBACK_t loopback; // 0x0034 - u32 watchdog_timer; // 0x0038 -} GLOBAL_t, *PGLOBAL_t; - -/* END OF GLOBAL REGISTER ADDRESS MAP */ - - -/* START OF TXDMA REGISTER ADDRESS MAP */ - -/* - * structure for txdma control status reg in txdma address map - * located at address 0x1000 - */ -typedef union _TXDMA_CSR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:19; // bits 13-31 - u32 traffic_class:4; // bits 9-12 - u32 sngl_epkt_mode:1; // bit 8 - u32 cache_thrshld:4; // bits 4-7 - u32 unused1:2; // bits 2-3 - u32 drop_TLP_disable:1; // bit 1 - u32 halt:1; // bit 0 -#else - u32 halt:1; // bit 0 - u32 drop_TLP_disable:1; // bit 1 - u32 unused1:2; // bits 2-3 - u32 cache_thrshld:4; // bits 4-7 - u32 sngl_epkt_mode:1; // bit 8 - u32 traffic_class:4; // bits 9-12 - u32 unused2:19; // bits 13-31 -#endif - } bits; -} TXDMA_CSR_t, *PTXDMA_CSR_t; - -/* - * structure for txdma packet ring base address hi reg in txdma address map - * located at address 0x1004 - * Defined earlier (u32) - */ - -/* - * structure for txdma packet ring base address low reg in txdma address map - * located at address 0x1008 - * Defined earlier (u32) - */ - -/* - * structure for txdma packet ring number of descriptor reg in txdma address - * map. Located at address 0x100C - */ -typedef union _TXDMA_PR_NUM_DES_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:22; // bits 10-31 - u32 pr_ndes:10; // bits 0-9 -#else - u32 pr_ndes:10; // bits 0-9 - u32 unused:22; // bits 10-31 -#endif - } bits; -} TXDMA_PR_NUM_DES_t, *PTXDMA_PR_NUM_DES_t; - - -typedef union _DMA10W_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:21; // bits 11-31 - u32 wrap:1; // bit 10 - u32 val:10; // bits 0-9 -#else - u32 val:10; // bits 0-9 - u32 wrap:1; // bit 10 - u32 unused:21; // bits 11-31 -#endif - } bits; -} DMA10W_t, *PDMA10W_t; - -/* - * structure for txdma tx queue write address reg in txdma address map - * located at address 0x1010 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for txdma tx queue write address external reg in txdma address map - * located at address 0x1014 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for txdma tx queue read address reg in txdma address map - * located at address 0x1018 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for txdma status writeback address hi reg in txdma address map - * located at address 0x101C - * Defined earlier (u32) - */ - -/* - * structure for txdma status writeback address lo reg in txdma address map - * located at address 0x1020 - * Defined earlier (u32) - */ - -/* - * structure for txdma service request reg in txdma address map - * located at address 0x1024 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for txdma service complete reg in txdma address map - * located at address 0x1028 - * Defined earlier (DMA10W_t) - */ - -typedef union _DMA4W_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:27; // bits 5-31 - u32 wrap:1; // bit 4 - u32 val:4; // bit 0-3 -#else - u32 val:4; // bits 0-3 - u32 wrap:1; // bit 4 - u32 unused:27; // bits 5-31 -#endif - } bits; -} DMA4W_t, *PDMA4W_t; - -/* - * structure for txdma tx descriptor cache read index reg in txdma address map - * located at address 0x102C - * Defined earlier (DMA4W_t) - */ - -/* - * structure for txdma tx descriptor cache write index reg in txdma address map - * located at address 0x1030 - * Defined earlier (DMA4W_t) - */ - -/* - * structure for txdma error reg in txdma address map - * located at address 0x1034 - */ -typedef union _TXDMA_ERROR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused3:22; // bits 10-31 - u32 WrbkRewind:1; // bit 9 - u32 WrbkResend:1; // bit 8 - u32 unused2:2; // bits 6-7 - u32 DescrRewind:1; // bit 5 - u32 DescrResend:1; // bit 4 - u32 unused1:2; // bits 2-3 - u32 PyldRewind:1; // bit 1 - u32 PyldResend:1; // bit 0 -#else - u32 PyldResend:1; // bit 0 - u32 PyldRewind:1; // bit 1 - u32 unused1:2; // bits 2-3 - u32 DescrResend:1; // bit 4 - u32 DescrRewind:1; // bit 5 - u32 unused2:2; // bits 6-7 - u32 WrbkResend:1; // bit 8 - u32 WrbkRewind:1; // bit 9 - u32 unused3:22; // bits 10-31 -#endif - } bits; -} TXDMA_ERROR_t, *PTXDMA_ERROR_t; - -/* - * Tx DMA Module of JAGCore Address Mapping - * Located at address 0x1000 - */ -typedef struct _TXDMA_t { // Location: - TXDMA_CSR_t csr; // 0x1000 - u32 pr_base_hi; // 0x1004 - u32 pr_base_lo; // 0x1008 - TXDMA_PR_NUM_DES_t pr_num_des; // 0x100C - DMA10W_t txq_wr_addr; // 0x1010 - DMA10W_t txq_wr_addr_ext; // 0x1014 - DMA10W_t txq_rd_addr; // 0x1018 - u32 dma_wb_base_hi; // 0x101C - u32 dma_wb_base_lo; // 0x1020 - DMA10W_t service_request; // 0x1024 - DMA10W_t service_complete; // 0x1028 - DMA4W_t cache_rd_index; // 0x102C - DMA4W_t cache_wr_index; // 0x1030 - TXDMA_ERROR_t TxDmaError; // 0x1034 - u32 DescAbortCount; // 0x1038 - u32 PayloadAbortCnt; // 0x103c - u32 WriteBackAbortCnt; // 0x1040 - u32 DescTimeoutCnt; // 0x1044 - u32 PayloadTimeoutCnt; // 0x1048 - u32 WriteBackTimeoutCnt; // 0x104c - u32 DescErrorCount; // 0x1050 - u32 PayloadErrorCnt; // 0x1054 - u32 WriteBackErrorCnt; // 0x1058 - u32 DroppedTLPCount; // 0x105c - DMA10W_t NewServiceComplete; // 0x1060 - u32 EthernetPacketCount; // 0x1064 -} TXDMA_t, *PTXDMA_t; - -/* END OF TXDMA REGISTER ADDRESS MAP */ - - -/* START OF RXDMA REGISTER ADDRESS MAP */ - -/* - * structure for control status reg in rxdma address map - * Located at address 0x2000 - */ -typedef union _RXDMA_CSR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:14; // bits 18-31 - u32 halt_status:1; // bit 17 - u32 pkt_done_flush:1; // bit 16 - u32 pkt_drop_disable:1; // bit 15 - u32 unused1:1; // bit 14 - u32 fbr1_enable:1; // bit 13 - u32 fbr1_size:2; // bits 11-12 - u32 fbr0_enable:1; // bit 10 - u32 fbr0_size:2; // bits 8-9 - u32 dma_big_endian:1; // bit 7 - u32 pkt_big_endian:1; // bit 6 - u32 psr_big_endian:1; // bit 5 - u32 fbr_big_endian:1; // bit 4 - u32 tc:3; // bits 1-3 - u32 halt:1; // bit 0 -#else - u32 halt:1; // bit 0 - u32 tc:3; // bits 1-3 - u32 fbr_big_endian:1; // bit 4 - u32 psr_big_endian:1; // bit 5 - u32 pkt_big_endian:1; // bit 6 - u32 dma_big_endian:1; // bit 7 - u32 fbr0_size:2; // bits 8-9 - u32 fbr0_enable:1; // bit 10 - u32 fbr1_size:2; // bits 11-12 - u32 fbr1_enable:1; // bit 13 - u32 unused1:1; // bit 14 - u32 pkt_drop_disable:1; // bit 15 - u32 pkt_done_flush:1; // bit 16 - u32 halt_status:1; // bit 17 - u32 unused2:14; // bits 18-31 -#endif - } bits; -} RXDMA_CSR_t, *PRXDMA_CSR_t; - -/* - * structure for dma writeback lo reg in rxdma address map - * located at address 0x2004 - * Defined earlier (u32) - */ - -/* - * structure for dma writeback hi reg in rxdma address map - * located at address 0x2008 - * Defined earlier (u32) - */ - -/* - * structure for number of packets done reg in rxdma address map - * located at address 0x200C - */ -typedef union _RXDMA_NUM_PKT_DONE_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:24; // bits 8-31 - u32 num_done:8; // bits 0-7 -#else - u32 num_done:8; // bits 0-7 - u32 unused:24; // bits 8-31 -#endif - } bits; -} RXDMA_NUM_PKT_DONE_t, *PRXDMA_NUM_PKT_DONE_t; - -/* - * structure for max packet time reg in rxdma address map - * located at address 0x2010 - */ -typedef union _RXDMA_MAX_PKT_TIME_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:14; // bits 18-31 - u32 time_done:18; // bits 0-17 -#else - u32 time_done:18; // bits 0-17 - u32 unused:14; // bits 18-31 -#endif - } bits; -} RXDMA_MAX_PKT_TIME_t, *PRXDMA_MAX_PKT_TIME_t; - -/* - * structure for rx queue read address reg in rxdma address map - * located at address 0x2014 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for rx queue read address external reg in rxdma address map - * located at address 0x2018 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for rx queue write address reg in rxdma address map - * located at address 0x201C - * Defined earlier (DMA10W_t) - */ - -/* - * structure for packet status ring base address lo reg in rxdma address map - * located at address 0x2020 - * Defined earlier (u32) - */ - -/* - * structure for packet status ring base address hi reg in rxdma address map - * located at address 0x2024 - * Defined earlier (u32) - */ - -/* - * structure for packet status ring number of descriptors reg in rxdma address - * map. Located at address 0x2028 - */ -typedef union _RXDMA_PSR_NUM_DES_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:20; // bits 12-31 - u32 psr_ndes:12; // bit 0-11 -#else - u32 psr_ndes:12; // bit 0-11 - u32 unused:20; // bits 12-31 -#endif - } bits; -} RXDMA_PSR_NUM_DES_t, *PRXDMA_PSR_NUM_DES_t; - -/* - * structure for packet status ring available offset reg in rxdma address map - * located at address 0x202C - */ -typedef union _RXDMA_PSR_AVAIL_OFFSET_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:19; // bits 13-31 - u32 psr_avail_wrap:1; // bit 12 - u32 psr_avail:12; // bit 0-11 -#else - u32 psr_avail:12; // bit 0-11 - u32 psr_avail_wrap:1; // bit 12 - u32 unused:19; // bits 13-31 -#endif - } bits; -} RXDMA_PSR_AVAIL_OFFSET_t, *PRXDMA_PSR_AVAIL_OFFSET_t; - -/* - * structure for packet status ring full offset reg in rxdma address map - * located at address 0x2030 - */ -typedef union _RXDMA_PSR_FULL_OFFSET_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:19; // bits 13-31 - u32 psr_full_wrap:1; // bit 12 - u32 psr_full:12; // bit 0-11 -#else - u32 psr_full:12; // bit 0-11 - u32 psr_full_wrap:1; // bit 12 - u32 unused:19; // bits 13-31 -#endif - } bits; -} RXDMA_PSR_FULL_OFFSET_t, *PRXDMA_PSR_FULL_OFFSET_t; - -/* - * structure for packet status ring access index reg in rxdma address map - * located at address 0x2034 - */ -typedef union _RXDMA_PSR_ACCESS_INDEX_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:27; // bits 5-31 - u32 psr_ai:5; // bits 0-4 -#else - u32 psr_ai:5; // bits 0-4 - u32 unused:27; // bits 5-31 -#endif - } bits; -} RXDMA_PSR_ACCESS_INDEX_t, *PRXDMA_PSR_ACCESS_INDEX_t; - -/* - * structure for packet status ring minimum descriptors reg in rxdma address - * map. Located at address 0x2038 - */ -typedef union _RXDMA_PSR_MIN_DES_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:20; // bits 12-31 - u32 psr_min:12; // bits 0-11 -#else - u32 psr_min:12; // bits 0-11 - u32 unused:20; // bits 12-31 -#endif - } bits; -} RXDMA_PSR_MIN_DES_t, *PRXDMA_PSR_MIN_DES_t; - -/* - * structure for free buffer ring base lo address reg in rxdma address map - * located at address 0x203C - * Defined earlier (u32) - */ - -/* - * structure for free buffer ring base hi address reg in rxdma address map - * located at address 0x2040 - * Defined earlier (u32) - */ - -/* - * structure for free buffer ring number of descriptors reg in rxdma address - * map. Located at address 0x2044 - */ -typedef union _RXDMA_FBR_NUM_DES_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:22; // bits 10-31 - u32 fbr_ndesc:10; // bits 0-9 -#else - u32 fbr_ndesc:10; // bits 0-9 - u32 unused:22; // bits 10-31 -#endif - } bits; -} RXDMA_FBR_NUM_DES_t, *PRXDMA_FBR_NUM_DES_t; - -/* - * structure for free buffer ring 0 available offset reg in rxdma address map - * located at address 0x2048 - * Defined earlier (DMA10W_t) - */ - -/* - * structure for free buffer ring 0 full offset reg in rxdma address map - * located at address 0x204C - * Defined earlier (DMA10W_t) - */ - -/* - * structure for free buffer cache 0 full offset reg in rxdma address map - * located at address 0x2050 - */ -typedef union _RXDMA_FBC_RD_INDEX_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:27; // bits 5-31 - u32 fbc_rdi:5; // bit 0-4 -#else - u32 fbc_rdi:5; // bit 0-4 - u32 unused:27; // bits 5-31 -#endif - } bits; -} RXDMA_FBC_RD_INDEX_t, *PRXDMA_FBC_RD_INDEX_t; - -/* - * structure for free buffer ring 0 minimum descriptor reg in rxdma address map - * located at address 0x2054 - */ -typedef union _RXDMA_FBR_MIN_DES_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:22; // bits 10-31 - u32 fbr_min:10; // bits 0-9 -#else - u32 fbr_min:10; // bits 0-9 - u32 unused:22; // bits 10-31 -#endif - } bits; -} RXDMA_FBR_MIN_DES_t, *PRXDMA_FBR_MIN_DES_t; - -/* - * structure for free buffer ring 1 base address lo reg in rxdma address map - * located at address 0x2058 - 0x205C - * Defined earlier (RXDMA_FBR_BASE_LO_t and RXDMA_FBR_BASE_HI_t) - */ - -/* - * structure for free buffer ring 1 number of descriptors reg in rxdma address - * map. Located at address 0x2060 - * Defined earlier (RXDMA_FBR_NUM_DES_t) - */ - -/* - * structure for free buffer ring 1 available offset reg in rxdma address map - * located at address 0x2064 - * Defined Earlier (RXDMA_FBR_AVAIL_OFFSET_t) - */ - -/* - * structure for free buffer ring 1 full offset reg in rxdma address map - * located at address 0x2068 - * Defined Earlier (RXDMA_FBR_FULL_OFFSET_t) - */ - -/* - * structure for free buffer cache 1 read index reg in rxdma address map - * located at address 0x206C - * Defined Earlier (RXDMA_FBC_RD_INDEX_t) - */ - -/* - * structure for free buffer ring 1 minimum descriptor reg in rxdma address map - * located at address 0x2070 - * Defined Earlier (RXDMA_FBR_MIN_DES_t) - */ - -/* - * Rx DMA Module of JAGCore Address Mapping - * Located at address 0x2000 - */ -typedef struct _RXDMA_t { // Location: - RXDMA_CSR_t csr; // 0x2000 - u32 dma_wb_base_lo; // 0x2004 - u32 dma_wb_base_hi; // 0x2008 - RXDMA_NUM_PKT_DONE_t num_pkt_done; // 0x200C - RXDMA_MAX_PKT_TIME_t max_pkt_time; // 0x2010 - DMA10W_t rxq_rd_addr; // 0x2014 - DMA10W_t rxq_rd_addr_ext; // 0x2018 - DMA10W_t rxq_wr_addr; // 0x201C - u32 psr_base_lo; // 0x2020 - u32 psr_base_hi; // 0x2024 - RXDMA_PSR_NUM_DES_t psr_num_des; // 0x2028 - RXDMA_PSR_AVAIL_OFFSET_t psr_avail_offset; // 0x202C - RXDMA_PSR_FULL_OFFSET_t psr_full_offset; // 0x2030 - RXDMA_PSR_ACCESS_INDEX_t psr_access_index; // 0x2034 - RXDMA_PSR_MIN_DES_t psr_min_des; // 0x2038 - u32 fbr0_base_lo; // 0x203C - u32 fbr0_base_hi; // 0x2040 - RXDMA_FBR_NUM_DES_t fbr0_num_des; // 0x2044 - DMA10W_t fbr0_avail_offset; // 0x2048 - DMA10W_t fbr0_full_offset; // 0x204C - RXDMA_FBC_RD_INDEX_t fbr0_rd_index; // 0x2050 - RXDMA_FBR_MIN_DES_t fbr0_min_des; // 0x2054 - u32 fbr1_base_lo; // 0x2058 - u32 fbr1_base_hi; // 0x205C - RXDMA_FBR_NUM_DES_t fbr1_num_des; // 0x2060 - DMA10W_t fbr1_avail_offset; // 0x2064 - DMA10W_t fbr1_full_offset; // 0x2068 - RXDMA_FBC_RD_INDEX_t fbr1_rd_index; // 0x206C - RXDMA_FBR_MIN_DES_t fbr1_min_des; // 0x2070 -} RXDMA_t, *PRXDMA_t; - -/* END OF RXDMA REGISTER ADDRESS MAP */ - - -/* START OF TXMAC REGISTER ADDRESS MAP */ - -/* - * structure for control reg in txmac address map - * located at address 0x3000 - */ -typedef union _TXMAC_CTL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:24; // bits 8-31 - u32 cklseg_diable:1; // bit 7 - u32 ckbcnt_disable:1; // bit 6 - u32 cksegnum:1; // bit 5 - u32 async_disable:1; // bit 4 - u32 fc_disable:1; // bit 3 - u32 mcif_disable:1; // bit 2 - u32 mif_disable:1; // bit 1 - u32 txmac_en:1; // bit 0 -#else - u32 txmac_en:1; // bit 0 - u32 mif_disable:1; // bit 1 mac interface - u32 mcif_disable:1; // bit 2 mem. contr. interface - u32 fc_disable:1; // bit 3 - u32 async_disable:1; // bit 4 - u32 cksegnum:1; // bit 5 - u32 ckbcnt_disable:1; // bit 6 - u32 cklseg_diable:1; // bit 7 - u32 unused:24; // bits 8-31 -#endif - } bits; -} TXMAC_CTL_t, *PTXMAC_CTL_t; - -/* - * structure for shadow pointer reg in txmac address map - * located at address 0x3004 - */ -typedef union _TXMAC_SHADOW_PTR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:5; // bits 27-31 - u32 txq_rd_ptr:11; // bits 16-26 - u32 reserved:5; // bits 11-15 - u32 txq_wr_ptr:11; // bits 0-10 -#else - u32 txq_wr_ptr:11; // bits 0-10 - u32 reserved:5; // bits 11-15 - u32 txq_rd_ptr:11; // bits 16-26 - u32 reserved2:5; // bits 27-31 -#endif - } bits; -} TXMAC_SHADOW_PTR_t, *PTXMAC_SHADOW_PTR_t; - -/* - * structure for error count reg in txmac address map - * located at address 0x3008 - */ -typedef union _TXMAC_ERR_CNT_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:20; // bits 12-31 - u32 reserved:4; // bits 8-11 - u32 txq_underrun:4; // bits 4-7 - u32 fifo_underrun:4; // bits 0-3 -#else - u32 fifo_underrun:4; // bits 0-3 - u32 txq_underrun:4; // bits 4-7 - u32 reserved:4; // bits 8-11 - u32 unused:20; // bits 12-31 -#endif - } bits; -} TXMAC_ERR_CNT_t, *PTXMAC_ERR_CNT_t; - -/* - * structure for max fill reg in txmac address map - * located at address 0x300C - */ -typedef union _TXMAC_MAX_FILL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:20; // bits 12-31 - u32 max_fill:12; // bits 0-11 -#else - u32 max_fill:12; // bits 0-11 - u32 unused:20; // bits 12-31 -#endif - } bits; -} TXMAC_MAX_FILL_t, *PTXMAC_MAX_FILL_t; - -/* - * structure for cf parameter reg in txmac address map - * located at address 0x3010 - */ -typedef union _TXMAC_CF_PARAM_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 cfep:16; // bits 16-31 - u32 cfpt:16; // bits 0-15 -#else - u32 cfpt:16; // bits 0-15 - u32 cfep:16; // bits 16-31 -#endif - } bits; -} TXMAC_CF_PARAM_t, *PTXMAC_CF_PARAM_t; - -/* - * structure for tx test reg in txmac address map - * located at address 0x3014 - */ -typedef union _TXMAC_TXTEST_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:15; // bits 17-31 - u32 reserved1:1; // bit 16 - u32 txtest_en:1; // bit 15 - u32 unused1:4; // bits 11-14 - u32 txqtest_ptr:11; // bits 0-11 -#else - u32 txqtest_ptr:11; // bits 0-10 - u32 unused1:4; // bits 11-14 - u32 txtest_en:1; // bit 15 - u32 reserved1:1; // bit 16 - u32 unused2:15; // bits 17-31 -#endif - } bits; -} TXMAC_TXTEST_t, *PTXMAC_TXTEST_t; - -/* - * structure for error reg in txmac address map - * located at address 0x3018 - */ -typedef union _TXMAC_ERR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:23; // bits 9-31 - u32 fifo_underrun:1; // bit 8 - u32 unused1:2; // bits 6-7 - u32 ctrl2_err:1; // bit 5 - u32 txq_underrun:1; // bit 4 - u32 bcnt_err:1; // bit 3 - u32 lseg_err:1; // bit 2 - u32 segnum_err:1; // bit 1 - u32 seg0_err:1; // bit 0 -#else - u32 seg0_err:1; // bit 0 - u32 segnum_err:1; // bit 1 - u32 lseg_err:1; // bit 2 - u32 bcnt_err:1; // bit 3 - u32 txq_underrun:1; // bit 4 - u32 ctrl2_err:1; // bit 5 - u32 unused1:2; // bits 6-7 - u32 fifo_underrun:1; // bit 8 - u32 unused2:23; // bits 9-31 -#endif - } bits; -} TXMAC_ERR_t, *PTXMAC_ERR_t; - -/* - * structure for error interrupt reg in txmac address map - * located at address 0x301C - */ -typedef union _TXMAC_ERR_INT_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:23; // bits 9-31 - u32 fifo_underrun:1; // bit 8 - u32 unused1:2; // bits 6-7 - u32 ctrl2_err:1; // bit 5 - u32 txq_underrun:1; // bit 4 - u32 bcnt_err:1; // bit 3 - u32 lseg_err:1; // bit 2 - u32 segnum_err:1; // bit 1 - u32 seg0_err:1; // bit 0 -#else - u32 seg0_err:1; // bit 0 - u32 segnum_err:1; // bit 1 - u32 lseg_err:1; // bit 2 - u32 bcnt_err:1; // bit 3 - u32 txq_underrun:1; // bit 4 - u32 ctrl2_err:1; // bit 5 - u32 unused1:2; // bits 6-7 - u32 fifo_underrun:1; // bit 8 - u32 unused2:23; // bits 9-31 -#endif - } bits; -} TXMAC_ERR_INT_t, *PTXMAC_ERR_INT_t; - -/* - * structure for error interrupt reg in txmac address map - * located at address 0x3020 - */ -typedef union _TXMAC_CP_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:30; // bits 2-31 - u32 bp_req:1; // bit 1 - u32 bp_xonxoff:1; // bit 0 -#else - u32 bp_xonxoff:1; // bit 0 - u32 bp_req:1; // bit 1 - u32 unused:30; // bits 2-31 -#endif - } bits; -} TXMAC_BP_CTRL_t, *PTXMAC_BP_CTRL_t; - -/* - * Tx MAC Module of JAGCore Address Mapping - */ -typedef struct _TXMAC_t { // Location: - TXMAC_CTL_t ctl; // 0x3000 - TXMAC_SHADOW_PTR_t shadow_ptr; // 0x3004 - TXMAC_ERR_CNT_t err_cnt; // 0x3008 - TXMAC_MAX_FILL_t max_fill; // 0x300C - TXMAC_CF_PARAM_t cf_param; // 0x3010 - TXMAC_TXTEST_t tx_test; // 0x3014 - TXMAC_ERR_t err; // 0x3018 - TXMAC_ERR_INT_t err_int; // 0x301C - TXMAC_BP_CTRL_t bp_ctrl; // 0x3020 -} TXMAC_t, *PTXMAC_t; - -/* END OF TXMAC REGISTER ADDRESS MAP */ - -/* START OF RXMAC REGISTER ADDRESS MAP */ - -/* - * structure for rxmac control reg in rxmac address map - * located at address 0x4000 - */ -typedef union _RXMAC_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:25; // bits 7-31 - u32 rxmac_int_disable:1; // bit 6 - u32 async_disable:1; // bit 5 - u32 mif_disable:1; // bit 4 - u32 wol_disable:1; // bit 3 - u32 pkt_filter_disable:1; // bit 2 - u32 mcif_disable:1; // bit 1 - u32 rxmac_en:1; // bit 0 -#else - u32 rxmac_en:1; // bit 0 - u32 mcif_disable:1; // bit 1 - u32 pkt_filter_disable:1; // bit 2 - u32 wol_disable:1; // bit 3 - u32 mif_disable:1; // bit 4 - u32 async_disable:1; // bit 5 - u32 rxmac_int_disable:1; // bit 6 - u32 reserved:25; // bits 7-31 -#endif - } bits; -} RXMAC_CTRL_t, *PRXMAC_CTRL_t; - -/* - * structure for Wake On Lan Control and CRC 0 reg in rxmac address map - * located at address 0x4004 - */ -typedef union _RXMAC_WOL_CTL_CRC0_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 crc0:16; // bits 16-31 - u32 reserve:4; // bits 12-15 - u32 ignore_pp:1; // bit 11 - u32 ignore_mp:1; // bit 10 - u32 clr_intr:1; // bit 9 - u32 ignore_link_chg:1; // bit 8 - u32 ignore_uni:1; // bit 7 - u32 ignore_multi:1; // bit 6 - u32 ignore_broad:1; // bit 5 - u32 valid_crc4:1; // bit 4 - u32 valid_crc3:1; // bit 3 - u32 valid_crc2:1; // bit 2 - u32 valid_crc1:1; // bit 1 - u32 valid_crc0:1; // bit 0 -#else - u32 valid_crc0:1; // bit 0 - u32 valid_crc1:1; // bit 1 - u32 valid_crc2:1; // bit 2 - u32 valid_crc3:1; // bit 3 - u32 valid_crc4:1; // bit 4 - u32 ignore_broad:1; // bit 5 - u32 ignore_multi:1; // bit 6 - u32 ignore_uni:1; // bit 7 - u32 ignore_link_chg:1; // bit 8 - u32 clr_intr:1; // bit 9 - u32 ignore_mp:1; // bit 10 - u32 ignore_pp:1; // bit 11 - u32 reserve:4; // bits 12-15 - u32 crc0:16; // bits 16-31 -#endif - } bits; -} RXMAC_WOL_CTL_CRC0_t, *PRXMAC_WOL_CTL_CRC0_t; - -/* - * structure for CRC 1 and CRC 2 reg in rxmac address map - * located at address 0x4008 - */ -typedef union _RXMAC_WOL_CRC12_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 crc2:16; // bits 16-31 - u32 crc1:16; // bits 0-15 -#else - u32 crc1:16; // bits 0-15 - u32 crc2:16; // bits 16-31 -#endif - } bits; -} RXMAC_WOL_CRC12_t, *PRXMAC_WOL_CRC12_t; - -/* - * structure for CRC 3 and CRC 4 reg in rxmac address map - * located at address 0x400C - */ -typedef union _RXMAC_WOL_CRC34_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 crc4:16; // bits 16-31 - u32 crc3:16; // bits 0-15 -#else - u32 crc3:16; // bits 0-15 - u32 crc4:16; // bits 16-31 -#endif - } bits; -} RXMAC_WOL_CRC34_t, *PRXMAC_WOL_CRC34_t; - -/* - * structure for Wake On Lan Source Address Lo reg in rxmac address map - * located at address 0x4010 - */ -typedef union _RXMAC_WOL_SA_LO_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 sa3:8; // bits 24-31 - u32 sa4:8; // bits 16-23 - u32 sa5:8; // bits 8-15 - u32 sa6:8; // bits 0-7 -#else - u32 sa6:8; // bits 0-7 - u32 sa5:8; // bits 8-15 - u32 sa4:8; // bits 16-23 - u32 sa3:8; // bits 24-31 -#endif - } bits; -} RXMAC_WOL_SA_LO_t, *PRXMAC_WOL_SA_LO_t; - -/* - * structure for Wake On Lan Source Address Hi reg in rxmac address map - * located at address 0x4014 - */ -typedef union _RXMAC_WOL_SA_HI_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:16; // bits 16-31 - u32 sa1:8; // bits 8-15 - u32 sa2:8; // bits 0-7 -#else - u32 sa2:8; // bits 0-7 - u32 sa1:8; // bits 8-15 - u32 reserved:16; // bits 16-31 -#endif - } bits; -} RXMAC_WOL_SA_HI_t, *PRXMAC_WOL_SA_HI_t; - -/* - * structure for Wake On Lan mask reg in rxmac address map - * located at address 0x4018 - 0x4064 - * Defined earlier (u32) - */ - -/* - * structure for Unicast Paket Filter Address 1 reg in rxmac address map - * located at address 0x4068 - */ -typedef union _RXMAC_UNI_PF_ADDR1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 addr1_3:8; // bits 24-31 - u32 addr1_4:8; // bits 16-23 - u32 addr1_5:8; // bits 8-15 - u32 addr1_6:8; // bits 0-7 -#else - u32 addr1_6:8; // bits 0-7 - u32 addr1_5:8; // bits 8-15 - u32 addr1_4:8; // bits 16-23 - u32 addr1_3:8; // bits 24-31 -#endif - } bits; -} RXMAC_UNI_PF_ADDR1_t, *PRXMAC_UNI_PF_ADDR1_t; - -/* - * structure for Unicast Paket Filter Address 2 reg in rxmac address map - * located at address 0x406C - */ -typedef union _RXMAC_UNI_PF_ADDR2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 addr2_3:8; // bits 24-31 - u32 addr2_4:8; // bits 16-23 - u32 addr2_5:8; // bits 8-15 - u32 addr2_6:8; // bits 0-7 -#else - u32 addr2_6:8; // bits 0-7 - u32 addr2_5:8; // bits 8-15 - u32 addr2_4:8; // bits 16-23 - u32 addr2_3:8; // bits 24-31 -#endif - } bits; -} RXMAC_UNI_PF_ADDR2_t, *PRXMAC_UNI_PF_ADDR2_t; - -/* - * structure for Unicast Paket Filter Address 1 & 2 reg in rxmac address map - * located at address 0x4070 - */ -typedef union _RXMAC_UNI_PF_ADDR3_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 addr2_1:8; // bits 24-31 - u32 addr2_2:8; // bits 16-23 - u32 addr1_1:8; // bits 8-15 - u32 addr1_2:8; // bits 0-7 -#else - u32 addr1_2:8; // bits 0-7 - u32 addr1_1:8; // bits 8-15 - u32 addr2_2:8; // bits 16-23 - u32 addr2_1:8; // bits 24-31 -#endif - } bits; -} RXMAC_UNI_PF_ADDR3_t, *PRXMAC_UNI_PF_ADDR3_t; - -/* - * structure for Multicast Hash reg in rxmac address map - * located at address 0x4074 - 0x4080 - * Defined earlier (u32) - */ - -/* - * structure for Packet Filter Control reg in rxmac address map - * located at address 0x4084 - */ -typedef union _RXMAC_PF_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused2:9; // bits 23-31 - u32 min_pkt_size:7; // bits 16-22 - u32 unused1:12; // bits 4-15 - u32 filter_frag_en:1; // bit 3 - u32 filter_uni_en:1; // bit 2 - u32 filter_multi_en:1; // bit 1 - u32 filter_broad_en:1; // bit 0 -#else - u32 filter_broad_en:1; // bit 0 - u32 filter_multi_en:1; // bit 1 - u32 filter_uni_en:1; // bit 2 - u32 filter_frag_en:1; // bit 3 - u32 unused1:12; // bits 4-15 - u32 min_pkt_size:7; // bits 16-22 - u32 unused2:9; // bits 23-31 -#endif - } bits; -} RXMAC_PF_CTRL_t, *PRXMAC_PF_CTRL_t; - -/* - * structure for Memory Controller Interface Control Max Segment reg in rxmac - * address map. Located at address 0x4088 - */ -typedef union _RXMAC_MCIF_CTRL_MAX_SEG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:22; // bits 10-31 - u32 max_size:8; // bits 2-9 - u32 fc_en:1; // bit 1 - u32 seg_en:1; // bit 0 -#else - u32 seg_en:1; // bit 0 - u32 fc_en:1; // bit 1 - u32 max_size:8; // bits 2-9 - u32 reserved:22; // bits 10-31 -#endif - } bits; -} RXMAC_MCIF_CTRL_MAX_SEG_t, *PRXMAC_MCIF_CTRL_MAX_SEG_t; - -/* - * structure for Memory Controller Interface Water Mark reg in rxmac address - * map. Located at address 0x408C - */ -typedef union _RXMAC_MCIF_WATER_MARK_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:6; // bits 26-31 - u32 mark_hi:10; // bits 16-25 - u32 reserved1:6; // bits 10-15 - u32 mark_lo:10; // bits 0-9 -#else - u32 mark_lo:10; // bits 0-9 - u32 reserved1:6; // bits 10-15 - u32 mark_hi:10; // bits 16-25 - u32 reserved2:6; // bits 26-31 -#endif - } bits; -} RXMAC_MCIF_WATER_MARK_t, *PRXMAC_MCIF_WATER_MARK_t; - -/* - * structure for Rx Queue Dialog reg in rxmac address map. - * located at address 0x4090 - */ -typedef union _RXMAC_RXQ_DIAG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:6; // bits 26-31 - u32 rd_ptr:10; // bits 16-25 - u32 reserved1:6; // bits 10-15 - u32 wr_ptr:10; // bits 0-9 -#else - u32 wr_ptr:10; // bits 0-9 - u32 reserved1:6; // bits 10-15 - u32 rd_ptr:10; // bits 16-25 - u32 reserved2:6; // bits 26-31 -#endif - } bits; -} RXMAC_RXQ_DIAG_t, *PRXMAC_RXQ_DIAG_t; - -/* - * structure for space availiable reg in rxmac address map. - * located at address 0x4094 - */ -typedef union _RXMAC_SPACE_AVAIL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:15; // bits 17-31 - u32 space_avail_en:1; // bit 16 - u32 reserved1:6; // bits 10-15 - u32 space_avail:10; // bits 0-9 -#else - u32 space_avail:10; // bits 0-9 - u32 reserved1:6; // bits 10-15 - u32 space_avail_en:1; // bit 16 - u32 reserved2:15; // bits 17-31 -#endif - } bits; -} RXMAC_SPACE_AVAIL_t, *PRXMAC_SPACE_AVAIL_t; - -/* - * structure for management interface reg in rxmac address map. - * located at address 0x4098 - */ -typedef union _RXMAC_MIF_CTL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserve:14; // bits 18-31 - u32 drop_pkt_en:1; // bit 17 - u32 drop_pkt_mask:17; // bits 0-16 -#else - u32 drop_pkt_mask:17; // bits 0-16 - u32 drop_pkt_en:1; // bit 17 - u32 reserve:14; // bits 18-31 -#endif - } bits; -} RXMAC_MIF_CTL_t, *PRXMAC_MIF_CTL_t; - -/* - * structure for Error reg in rxmac address map. - * located at address 0x409C - */ -typedef union _RXMAC_ERROR_REG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserve:28; // bits 4-31 - u32 mif:1; // bit 3 - u32 async:1; // bit 2 - u32 pkt_filter:1; // bit 1 - u32 mcif:1; // bit 0 -#else - u32 mcif:1; // bit 0 - u32 pkt_filter:1; // bit 1 - u32 async:1; // bit 2 - u32 mif:1; // bit 3 - u32 reserve:28; // bits 4-31 -#endif - } bits; -} RXMAC_ERROR_REG_t, *PRXMAC_ERROR_REG_t; - -/* - * Rx MAC Module of JAGCore Address Mapping - */ -typedef struct _RXMAC_t { // Location: - RXMAC_CTRL_t ctrl; // 0x4000 - RXMAC_WOL_CTL_CRC0_t crc0; // 0x4004 - RXMAC_WOL_CRC12_t crc12; // 0x4008 - RXMAC_WOL_CRC34_t crc34; // 0x400C - RXMAC_WOL_SA_LO_t sa_lo; // 0x4010 - RXMAC_WOL_SA_HI_t sa_hi; // 0x4014 - u32 mask0_word0; // 0x4018 - u32 mask0_word1; // 0x401C - u32 mask0_word2; // 0x4020 - u32 mask0_word3; // 0x4024 - u32 mask1_word0; // 0x4028 - u32 mask1_word1; // 0x402C - u32 mask1_word2; // 0x4030 - u32 mask1_word3; // 0x4034 - u32 mask2_word0; // 0x4038 - u32 mask2_word1; // 0x403C - u32 mask2_word2; // 0x4040 - u32 mask2_word3; // 0x4044 - u32 mask3_word0; // 0x4048 - u32 mask3_word1; // 0x404C - u32 mask3_word2; // 0x4050 - u32 mask3_word3; // 0x4054 - u32 mask4_word0; // 0x4058 - u32 mask4_word1; // 0x405C - u32 mask4_word2; // 0x4060 - u32 mask4_word3; // 0x4064 - RXMAC_UNI_PF_ADDR1_t uni_pf_addr1; // 0x4068 - RXMAC_UNI_PF_ADDR2_t uni_pf_addr2; // 0x406C - RXMAC_UNI_PF_ADDR3_t uni_pf_addr3; // 0x4070 - u32 multi_hash1; // 0x4074 - u32 multi_hash2; // 0x4078 - u32 multi_hash3; // 0x407C - u32 multi_hash4; // 0x4080 - RXMAC_PF_CTRL_t pf_ctrl; // 0x4084 - RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; // 0x4088 - RXMAC_MCIF_WATER_MARK_t mcif_water_mark; // 0x408C - RXMAC_RXQ_DIAG_t rxq_diag; // 0x4090 - RXMAC_SPACE_AVAIL_t space_avail; // 0x4094 - - RXMAC_MIF_CTL_t mif_ctrl; // 0x4098 - RXMAC_ERROR_REG_t err_reg; // 0x409C -} RXMAC_t, *PRXMAC_t; - -/* END OF TXMAC REGISTER ADDRESS MAP */ - - -/* START OF MAC REGISTER ADDRESS MAP */ - -/* - * structure for configuration #1 reg in mac address map. - * located at address 0x5000 - */ -typedef union _MAC_CFG1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 soft_reset:1; // bit 31 - u32 sim_reset:1; // bit 30 - u32 reserved3:10; // bits 20-29 - u32 reset_rx_mc:1; // bit 19 - u32 reset_tx_mc:1; // bit 18 - u32 reset_rx_fun:1; // bit 17 - u32 reset_tx_fun:1; // bit 16 - u32 reserved2:7; // bits 9-15 - u32 loop_back:1; // bit 8 - u32 reserved1:2; // bits 6-7 - u32 rx_flow:1; // bit 5 - u32 tx_flow:1; // bit 4 - u32 syncd_rx_en:1; // bit 3 - u32 rx_enable:1; // bit 2 - u32 syncd_tx_en:1; // bit 1 - u32 tx_enable:1; // bit 0 -#else - u32 tx_enable:1; // bit 0 - u32 syncd_tx_en:1; // bit 1 - u32 rx_enable:1; // bit 2 - u32 syncd_rx_en:1; // bit 3 - u32 tx_flow:1; // bit 4 - u32 rx_flow:1; // bit 5 - u32 reserved1:2; // bits 6-7 - u32 loop_back:1; // bit 8 - u32 reserved2:7; // bits 9-15 - u32 reset_tx_fun:1; // bit 16 - u32 reset_rx_fun:1; // bit 17 - u32 reset_tx_mc:1; // bit 18 - u32 reset_rx_mc:1; // bit 19 - u32 reserved3:10; // bits 20-29 - u32 sim_reset:1; // bit 30 - u32 soft_reset:1; // bit 31 -#endif - } bits; -} MAC_CFG1_t, *PMAC_CFG1_t; - -/* - * structure for configuration #2 reg in mac address map. - * located at address 0x5004 - */ -typedef union _MAC_CFG2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved3:16; // bits 16-31 - u32 preamble_len:4; // bits 12-15 - u32 reserved2:2; // bits 10-11 - u32 if_mode:2; // bits 8-9 - u32 reserved1:2; // bits 6-7 - u32 huge_frame:1; // bit 5 - u32 len_check:1; // bit 4 - u32 undefined:1; // bit 3 - u32 pad_crc:1; // bit 2 - u32 crc_enable:1; // bit 1 - u32 full_duplex:1; // bit 0 -#else - u32 full_duplex:1; // bit 0 - u32 crc_enable:1; // bit 1 - u32 pad_crc:1; // bit 2 - u32 undefined:1; // bit 3 - u32 len_check:1; // bit 4 - u32 huge_frame:1; // bit 5 - u32 reserved1:2; // bits 6-7 - u32 if_mode:2; // bits 8-9 - u32 reserved2:2; // bits 10-11 - u32 preamble_len:4; // bits 12-15 - u32 reserved3:16; // bits 16-31 -#endif - } bits; -} MAC_CFG2_t, *PMAC_CFG2_t; - -/* - * structure for Interpacket gap reg in mac address map. - * located at address 0x5008 - */ -typedef union _MAC_IPG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:1; // bit 31 - u32 non_B2B_ipg_1:7; // bits 24-30 - u32 undefined2:1; // bit 23 - u32 non_B2B_ipg_2:7; // bits 16-22 - u32 min_ifg_enforce:8; // bits 8-15 - u32 undefined1:1; // bit 7 - u32 B2B_ipg:7; // bits 0-6 -#else - u32 B2B_ipg:7; // bits 0-6 - u32 undefined1:1; // bit 7 - u32 min_ifg_enforce:8; // bits 8-15 - u32 non_B2B_ipg_2:7; // bits 16-22 - u32 undefined2:1; // bit 23 - u32 non_B2B_ipg_1:7; // bits 24-30 - u32 reserved:1; // bit 31 -#endif - } bits; -} MAC_IPG_t, *PMAC_IPG_t; - -/* - * structure for half duplex reg in mac address map. - * located at address 0x500C - */ -typedef union _MAC_HFDP_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:8; // bits 24-31 - u32 alt_beb_trunc:4; // bits 23-20 - u32 alt_beb_enable:1; // bit 19 - u32 bp_no_backoff:1; // bit 18 - u32 no_backoff:1; // bit 17 - u32 excess_defer:1; // bit 16 - u32 rexmit_max:4; // bits 12-15 - u32 reserved1:2; // bits 10-11 - u32 coll_window:10; // bits 0-9 -#else - u32 coll_window:10; // bits 0-9 - u32 reserved1:2; // bits 10-11 - u32 rexmit_max:4; // bits 12-15 - u32 excess_defer:1; // bit 16 - u32 no_backoff:1; // bit 17 - u32 bp_no_backoff:1; // bit 18 - u32 alt_beb_enable:1; // bit 19 - u32 alt_beb_trunc:4; // bits 23-20 - u32 reserved2:8; // bits 24-31 -#endif - } bits; -} MAC_HFDP_t, *PMAC_HFDP_t; - -/* - * structure for Maximum Frame Length reg in mac address map. - * located at address 0x5010 - */ -typedef union _MAC_MAX_FM_LEN_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:16; // bits 16-31 - u32 max_len:16; // bits 0-15 -#else - u32 max_len:16; // bits 0-15 - u32 reserved:16; // bits 16-31 -#endif - } bits; -} MAC_MAX_FM_LEN_t, *PMAC_MAX_FM_LEN_t; - -/* - * structure for Reserve 1 reg in mac address map. - * located at address 0x5014 - 0x5018 - * Defined earlier (u32) - */ - -/* - * structure for Test reg in mac address map. - * located at address 0x501C - */ -typedef union _MAC_TEST_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:29; // bits 3-31 - u32 mac_test:3; // bits 0-2 -#else - u32 mac_test:3; // bits 0-2 - u32 unused:29; // bits 3-31 -#endif - } bits; -} MAC_TEST_t, *PMAC_TEST_t; - -/* - * structure for MII Management Configuration reg in mac address map. - * located at address 0x5020 - */ -typedef union _MII_MGMT_CFG_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reset_mii_mgmt:1; // bit 31 - u32 reserved:25; // bits 6-30 - u32 scan_auto_incremt:1; // bit 5 - u32 preamble_suppress:1; // bit 4 - u32 undefined:1; // bit 3 - u32 mgmt_clk_reset:3; // bits 0-2 -#else - u32 mgmt_clk_reset:3; // bits 0-2 - u32 undefined:1; // bit 3 - u32 preamble_suppress:1; // bit 4 - u32 scan_auto_incremt:1; // bit 5 - u32 reserved:25; // bits 6-30 - u32 reset_mii_mgmt:1; // bit 31 -#endif - } bits; -} MII_MGMT_CFG_t, *PMII_MGMT_CFG_t; - -/* - * structure for MII Management Command reg in mac address map. - * located at address 0x5024 - */ -typedef union _MII_MGMT_CMD_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:30; // bits 2-31 - u32 scan_cycle:1; // bit 1 - u32 read_cycle:1; // bit 0 -#else - u32 read_cycle:1; // bit 0 - u32 scan_cycle:1; // bit 1 - u32 reserved:30; // bits 2-31 -#endif - } bits; -} MII_MGMT_CMD_t, *PMII_MGMT_CMD_t; - -/* - * structure for MII Management Address reg in mac address map. - * located at address 0x5028 - */ -typedef union _MII_MGMT_ADDR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved2:19; // bit 13-31 - u32 phy_addr:5; // bits 8-12 - u32 reserved1:3; // bits 5-7 - u32 reg_addr:5; // bits 0-4 -#else - u32 reg_addr:5; // bits 0-4 - u32 reserved1:3; // bits 5-7 - u32 phy_addr:5; // bits 8-12 - u32 reserved2:19; // bit 13-31 -#endif - } bits; -} MII_MGMT_ADDR_t, *PMII_MGMT_ADDR_t; - -/* - * structure for MII Management Control reg in mac address map. - * located at address 0x502C - */ -typedef union _MII_MGMT_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:16; // bits 16-31 - u32 phy_ctrl:16; // bits 0-15 -#else - u32 phy_ctrl:16; // bits 0-15 - u32 reserved:16; // bits 16-31 -#endif - } bits; -} MII_MGMT_CTRL_t, *PMII_MGMT_CTRL_t; - -/* - * structure for MII Management Status reg in mac address map. - * located at address 0x5030 - */ -typedef union _MII_MGMT_STAT_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:16; // bits 16-31 - u32 phy_stat:16; // bits 0-15 -#else - u32 phy_stat:16; // bits 0-15 - u32 reserved:16; // bits 16-31 -#endif - } bits; -} MII_MGMT_STAT_t, *PMII_MGMT_STAT_t; - -/* - * structure for MII Management Indicators reg in mac address map. - * located at address 0x5034 - */ -typedef union _MII_MGMT_INDICATOR_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:29; // bits 3-31 - u32 not_valid:1; // bit 2 - u32 scanning:1; // bit 1 - u32 busy:1; // bit 0 -#else - u32 busy:1; // bit 0 - u32 scanning:1; // bit 1 - u32 not_valid:1; // bit 2 - u32 reserved:29; // bits 3-31 -#endif - } bits; -} MII_MGMT_INDICATOR_t, *PMII_MGMT_INDICATOR_t; - -/* - * structure for Interface Control reg in mac address map. - * located at address 0x5038 - */ -typedef union _MAC_IF_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reset_if_module:1; // bit 31 - u32 reserved4:3; // bit 28-30 - u32 tbi_mode:1; // bit 27 - u32 ghd_mode:1; // bit 26 - u32 lhd_mode:1; // bit 25 - u32 phy_mode:1; // bit 24 - u32 reset_per_mii:1; // bit 23 - u32 reserved3:6; // bits 17-22 - u32 speed:1; // bit 16 - u32 reset_pe100x:1; // bit 15 - u32 reserved2:4; // bits 11-14 - u32 force_quiet:1; // bit 10 - u32 no_cipher:1; // bit 9 - u32 disable_link_fail:1; // bit 8 - u32 reset_gpsi:1; // bit 7 - u32 reserved1:6; // bits 1-6 - u32 enab_jab_protect:1; // bit 0 -#else - u32 enab_jab_protect:1; // bit 0 - u32 reserved1:6; // bits 1-6 - u32 reset_gpsi:1; // bit 7 - u32 disable_link_fail:1; // bit 8 - u32 no_cipher:1; // bit 9 - u32 force_quiet:1; // bit 10 - u32 reserved2:4; // bits 11-14 - u32 reset_pe100x:1; // bit 15 - u32 speed:1; // bit 16 - u32 reserved3:6; // bits 17-22 - u32 reset_per_mii:1; // bit 23 - u32 phy_mode:1; // bit 24 - u32 lhd_mode:1; // bit 25 - u32 ghd_mode:1; // bit 26 - u32 tbi_mode:1; // bit 27 - u32 reserved4:3; // bit 28-30 - u32 reset_if_module:1; // bit 31 -#endif - } bits; -} MAC_IF_CTRL_t, *PMAC_IF_CTRL_t; - -/* - * structure for Interface Status reg in mac address map. - * located at address 0x503C - */ -typedef union _MAC_IF_STAT_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:22; // bits 10-31 - u32 excess_defer:1; // bit 9 - u32 clash:1; // bit 8 - u32 phy_jabber:1; // bit 7 - u32 phy_link_ok:1; // bit 6 - u32 phy_full_duplex:1; // bit 5 - u32 phy_speed:1; // bit 4 - u32 pe100x_link_fail:1; // bit 3 - u32 pe10t_loss_carrie:1; // bit 2 - u32 pe10t_sqe_error:1; // bit 1 - u32 pe10t_jabber:1; // bit 0 -#else - u32 pe10t_jabber:1; // bit 0 - u32 pe10t_sqe_error:1; // bit 1 - u32 pe10t_loss_carrie:1; // bit 2 - u32 pe100x_link_fail:1; // bit 3 - u32 phy_speed:1; // bit 4 - u32 phy_full_duplex:1; // bit 5 - u32 phy_link_ok:1; // bit 6 - u32 phy_jabber:1; // bit 7 - u32 clash:1; // bit 8 - u32 excess_defer:1; // bit 9 - u32 reserved:22; // bits 10-31 -#endif - } bits; -} MAC_IF_STAT_t, *PMAC_IF_STAT_t; - -/* - * structure for Mac Station Address, Part 1 reg in mac address map. - * located at address 0x5040 - */ -typedef union _MAC_STATION_ADDR1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 Octet6:8; // bits 24-31 - u32 Octet5:8; // bits 16-23 - u32 Octet4:8; // bits 8-15 - u32 Octet3:8; // bits 0-7 -#else - u32 Octet3:8; // bits 0-7 - u32 Octet4:8; // bits 8-15 - u32 Octet5:8; // bits 16-23 - u32 Octet6:8; // bits 24-31 -#endif - } bits; -} MAC_STATION_ADDR1_t, *PMAC_STATION_ADDR1_t; - -/* - * structure for Mac Station Address, Part 2 reg in mac address map. - * located at address 0x5044 - */ -typedef union _MAC_STATION_ADDR2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 Octet2:8; // bits 24-31 - u32 Octet1:8; // bits 16-23 - u32 reserved:16; // bits 0-15 -#else - u32 reserved:16; // bit 0-15 - u32 Octet1:8; // bits 16-23 - u32 Octet2:8; // bits 24-31 -#endif - } bits; -} MAC_STATION_ADDR2_t, *PMAC_STATION_ADDR2_t; - -/* - * MAC Module of JAGCore Address Mapping - */ -typedef struct _MAC_t { // Location: - MAC_CFG1_t cfg1; // 0x5000 - MAC_CFG2_t cfg2; // 0x5004 - MAC_IPG_t ipg; // 0x5008 - MAC_HFDP_t hfdp; // 0x500C - MAC_MAX_FM_LEN_t max_fm_len; // 0x5010 - u32 rsv1; // 0x5014 - u32 rsv2; // 0x5018 - MAC_TEST_t mac_test; // 0x501C - MII_MGMT_CFG_t mii_mgmt_cfg; // 0x5020 - MII_MGMT_CMD_t mii_mgmt_cmd; // 0x5024 - MII_MGMT_ADDR_t mii_mgmt_addr; // 0x5028 - MII_MGMT_CTRL_t mii_mgmt_ctrl; // 0x502C - MII_MGMT_STAT_t mii_mgmt_stat; // 0x5030 - MII_MGMT_INDICATOR_t mii_mgmt_indicator; // 0x5034 - MAC_IF_CTRL_t if_ctrl; // 0x5038 - MAC_IF_STAT_t if_stat; // 0x503C - MAC_STATION_ADDR1_t station_addr_1; // 0x5040 - MAC_STATION_ADDR2_t station_addr_2; // 0x5044 -} MAC_t, *PMAC_t; - -/* END OF MAC REGISTER ADDRESS MAP */ - -/* START OF MAC STAT REGISTER ADDRESS MAP */ - -/* - * structure for Carry Register One and it's Mask Register reg located in mac - * stat address map address 0x6130 and 0x6138. - */ -typedef union _MAC_STAT_REG_1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 tr64:1; // bit 31 - u32 tr127:1; // bit 30 - u32 tr255:1; // bit 29 - u32 tr511:1; // bit 28 - u32 tr1k:1; // bit 27 - u32 trmax:1; // bit 26 - u32 trmgv:1; // bit 25 - u32 unused:8; // bits 17-24 - u32 rbyt:1; // bit 16 - u32 rpkt:1; // bit 15 - u32 rfcs:1; // bit 14 - u32 rmca:1; // bit 13 - u32 rbca:1; // bit 12 - u32 rxcf:1; // bit 11 - u32 rxpf:1; // bit 10 - u32 rxuo:1; // bit 9 - u32 raln:1; // bit 8 - u32 rflr:1; // bit 7 - u32 rcde:1; // bit 6 - u32 rcse:1; // bit 5 - u32 rund:1; // bit 4 - u32 rovr:1; // bit 3 - u32 rfrg:1; // bit 2 - u32 rjbr:1; // bit 1 - u32 rdrp:1; // bit 0 -#else - u32 rdrp:1; // bit 0 - u32 rjbr:1; // bit 1 - u32 rfrg:1; // bit 2 - u32 rovr:1; // bit 3 - u32 rund:1; // bit 4 - u32 rcse:1; // bit 5 - u32 rcde:1; // bit 6 - u32 rflr:1; // bit 7 - u32 raln:1; // bit 8 - u32 rxuo:1; // bit 9 - u32 rxpf:1; // bit 10 - u32 rxcf:1; // bit 11 - u32 rbca:1; // bit 12 - u32 rmca:1; // bit 13 - u32 rfcs:1; // bit 14 - u32 rpkt:1; // bit 15 - u32 rbyt:1; // bit 16 - u32 unused:8; // bits 17-24 - u32 trmgv:1; // bit 25 - u32 trmax:1; // bit 26 - u32 tr1k:1; // bit 27 - u32 tr511:1; // bit 28 - u32 tr255:1; // bit 29 - u32 tr127:1; // bit 30 - u32 tr64:1; // bit 31 -#endif - } bits; -} MAC_STAT_REG_1_t, *PMAC_STAT_REG_1_t; - -/* - * structure for Carry Register Two Mask Register reg in mac stat address map. - * located at address 0x613C - */ -typedef union _MAC_STAT_REG_2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:12; // bit 20-31 - u32 tjbr:1; // bit 19 - u32 tfcs:1; // bit 18 - u32 txcf:1; // bit 17 - u32 tovr:1; // bit 16 - u32 tund:1; // bit 15 - u32 tfrg:1; // bit 14 - u32 tbyt:1; // bit 13 - u32 tpkt:1; // bit 12 - u32 tmca:1; // bit 11 - u32 tbca:1; // bit 10 - u32 txpf:1; // bit 9 - u32 tdfr:1; // bit 8 - u32 tedf:1; // bit 7 - u32 tscl:1; // bit 6 - u32 tmcl:1; // bit 5 - u32 tlcl:1; // bit 4 - u32 txcl:1; // bit 3 - u32 tncl:1; // bit 2 - u32 tpfh:1; // bit 1 - u32 tdrp:1; // bit 0 -#else - u32 tdrp:1; // bit 0 - u32 tpfh:1; // bit 1 - u32 tncl:1; // bit 2 - u32 txcl:1; // bit 3 - u32 tlcl:1; // bit 4 - u32 tmcl:1; // bit 5 - u32 tscl:1; // bit 6 - u32 tedf:1; // bit 7 - u32 tdfr:1; // bit 8 - u32 txpf:1; // bit 9 - u32 tbca:1; // bit 10 - u32 tmca:1; // bit 11 - u32 tpkt:1; // bit 12 - u32 tbyt:1; // bit 13 - u32 tfrg:1; // bit 14 - u32 tund:1; // bit 15 - u32 tovr:1; // bit 16 - u32 txcf:1; // bit 17 - u32 tfcs:1; // bit 18 - u32 tjbr:1; // bit 19 - u32 unused:12; // bit 20-31 -#endif - } bits; -} MAC_STAT_REG_2_t, *PMAC_STAT_REG_2_t; - -/* - * MAC STATS Module of JAGCore Address Mapping - */ -typedef struct _MAC_STAT_t { // Location: - u32 pad[32]; // 0x6000 - 607C - - // Tx/Rx 0-64 Byte Frame Counter - u32 TR64; // 0x6080 - - // Tx/Rx 65-127 Byte Frame Counter - u32 TR127; // 0x6084 - - // Tx/Rx 128-255 Byte Frame Counter - u32 TR255; // 0x6088 - - // Tx/Rx 256-511 Byte Frame Counter - u32 TR511; // 0x608C - - // Tx/Rx 512-1023 Byte Frame Counter - u32 TR1K; // 0x6090 - - // Tx/Rx 1024-1518 Byte Frame Counter - u32 TRMax; // 0x6094 - - // Tx/Rx 1519-1522 Byte Good VLAN Frame Count - u32 TRMgv; // 0x6098 - - // Rx Byte Counter - u32 RByt; // 0x609C - - // Rx Packet Counter - u32 RPkt; // 0x60A0 - - // Rx FCS Error Counter - u32 RFcs; // 0x60A4 - - // Rx Multicast Packet Counter - u32 RMca; // 0x60A8 - - // Rx Broadcast Packet Counter - u32 RBca; // 0x60AC - - // Rx Control Frame Packet Counter - u32 RxCf; // 0x60B0 - - // Rx Pause Frame Packet Counter - u32 RxPf; // 0x60B4 - - // Rx Unknown OP Code Counter - u32 RxUo; // 0x60B8 - - // Rx Alignment Error Counter - u32 RAln; // 0x60BC - - // Rx Frame Length Error Counter - u32 RFlr; // 0x60C0 - - // Rx Code Error Counter - u32 RCde; // 0x60C4 - - // Rx Carrier Sense Error Counter - u32 RCse; // 0x60C8 - - // Rx Undersize Packet Counter - u32 RUnd; // 0x60CC - - // Rx Oversize Packet Counter - u32 ROvr; // 0x60D0 - - // Rx Fragment Counter - u32 RFrg; // 0x60D4 - - // Rx Jabber Counter - u32 RJbr; // 0x60D8 - - // Rx Drop - u32 RDrp; // 0x60DC - - // Tx Byte Counter - u32 TByt; // 0x60E0 - - // Tx Packet Counter - u32 TPkt; // 0x60E4 - - // Tx Multicast Packet Counter - u32 TMca; // 0x60E8 - - // Tx Broadcast Packet Counter - u32 TBca; // 0x60EC - - // Tx Pause Control Frame Counter - u32 TxPf; // 0x60F0 - - // Tx Deferral Packet Counter - u32 TDfr; // 0x60F4 - - // Tx Excessive Deferral Packet Counter - u32 TEdf; // 0x60F8 - - // Tx Single Collision Packet Counter - u32 TScl; // 0x60FC - - // Tx Multiple Collision Packet Counter - u32 TMcl; // 0x6100 - - // Tx Late Collision Packet Counter - u32 TLcl; // 0x6104 - - // Tx Excessive Collision Packet Counter - u32 TXcl; // 0x6108 - - // Tx Total Collision Packet Counter - u32 TNcl; // 0x610C - - // Tx Pause Frame Honored Counter - u32 TPfh; // 0x6110 - - // Tx Drop Frame Counter - u32 TDrp; // 0x6114 - - // Tx Jabber Frame Counter - u32 TJbr; // 0x6118 - - // Tx FCS Error Counter - u32 TFcs; // 0x611C - - // Tx Control Frame Counter - u32 TxCf; // 0x6120 - - // Tx Oversize Frame Counter - u32 TOvr; // 0x6124 - - // Tx Undersize Frame Counter - u32 TUnd; // 0x6128 - - // Tx Fragments Frame Counter - u32 TFrg; // 0x612C - - // Carry Register One Register - MAC_STAT_REG_1_t Carry1; // 0x6130 - - // Carry Register Two Register - MAC_STAT_REG_2_t Carry2; // 0x6134 - - // Carry Register One Mask Register - MAC_STAT_REG_1_t Carry1M; // 0x6138 - - // Carry Register Two Mask Register - MAC_STAT_REG_2_t Carry2M; // 0x613C -} MAC_STAT_t, *PMAC_STAT_t; - -/* END OF MAC STAT REGISTER ADDRESS MAP */ - - -/* START OF MMC REGISTER ADDRESS MAP */ - -/* - * structure for Main Memory Controller Control reg in mmc address map. - * located at address 0x7000 - */ -typedef union _MMC_CTRL_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:25; // bits 7-31 - u32 force_ce:1; // bit 6 - u32 rxdma_disable:1; // bit 5 - u32 txdma_disable:1; // bit 4 - u32 txmac_disable:1; // bit 3 - u32 rxmac_disable:1; // bit 2 - u32 arb_disable:1; // bit 1 - u32 mmc_enable:1; // bit 0 -#else - u32 mmc_enable:1; // bit 0 - u32 arb_disable:1; // bit 1 - u32 rxmac_disable:1; // bit 2 - u32 txmac_disable:1; // bit 3 - u32 txdma_disable:1; // bit 4 - u32 rxdma_disable:1; // bit 5 - u32 force_ce:1; // bit 6 - u32 reserved:25; // bits 7-31 -#endif - } bits; -} MMC_CTRL_t, *PMMC_CTRL_t; - -/* - * structure for Main Memory Controller Host Memory Access Address reg in mmc - * address map. Located at address 0x7004 - */ -typedef union _MMC_SRAM_ACCESS_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 byte_enable:16; // bits 16-31 - u32 reserved2:2; // bits 14-15 - u32 req_addr:10; // bits 4-13 - u32 reserved1:1; // bit 3 - u32 is_ctrl_word:1; // bit 2 - u32 wr_access:1; // bit 1 - u32 req_access:1; // bit 0 -#else - u32 req_access:1; // bit 0 - u32 wr_access:1; // bit 1 - u32 is_ctrl_word:1; // bit 2 - u32 reserved1:1; // bit 3 - u32 req_addr:10; // bits 4-13 - u32 reserved2:2; // bits 14-15 - u32 byte_enable:16; // bits 16-31 -#endif - } bits; -} MMC_SRAM_ACCESS_t, *PMMC_SRAM_ACCESS_t; - -/* - * structure for Main Memory Controller Host Memory Access Data reg in mmc - * address map. Located at address 0x7008 - 0x7014 - * Defined earlier (u32) - */ - -/* - * Memory Control Module of JAGCore Address Mapping - */ -typedef struct _MMC_t { // Location: - MMC_CTRL_t mmc_ctrl; // 0x7000 - MMC_SRAM_ACCESS_t sram_access; // 0x7004 - u32 sram_word1; // 0x7008 - u32 sram_word2; // 0x700C - u32 sram_word3; // 0x7010 - u32 sram_word4; // 0x7014 -} MMC_t, *PMMC_t; - -/* END OF MMC REGISTER ADDRESS MAP */ - - -/* START OF EXP ROM REGISTER ADDRESS MAP */ - -/* - * Expansion ROM Module of JAGCore Address Mapping - */ - -/* Take this out until it is not empty */ -#if 0 -typedef struct _EXP_ROM_t { - -} EXP_ROM_t, *PEXP_ROM_t; -#endif - -/* END OF EXP ROM REGISTER ADDRESS MAP */ - - -/* - * JAGCore Address Mapping - */ -typedef struct _ADDRESS_MAP_t { - GLOBAL_t global; - // unused section of global address map - u8 unused_global[4096 - sizeof(GLOBAL_t)]; - TXDMA_t txdma; - // unused section of txdma address map - u8 unused_txdma[4096 - sizeof(TXDMA_t)]; - RXDMA_t rxdma; - // unused section of rxdma address map - u8 unused_rxdma[4096 - sizeof(RXDMA_t)]; - TXMAC_t txmac; - // unused section of txmac address map - u8 unused_txmac[4096 - sizeof(TXMAC_t)]; - RXMAC_t rxmac; - // unused section of rxmac address map - u8 unused_rxmac[4096 - sizeof(RXMAC_t)]; - MAC_t mac; - // unused section of mac address map - u8 unused_mac[4096 - sizeof(MAC_t)]; - MAC_STAT_t macStat; - // unused section of mac stat address map - u8 unused_mac_stat[4096 - sizeof(MAC_STAT_t)]; - MMC_t mmc; - // unused section of mmc address map - u8 unused_mmc[4096 - sizeof(MMC_t)]; - // unused section of address map - u8 unused_[1015808]; - -/* Take this out until it is not empty */ -#if 0 - EXP_ROM_t exp_rom; -#endif - - u8 unused_exp_rom[4096]; // MGS-size TBD - u8 unused__[524288]; // unused section of address map -} ADDRESS_MAP_t, *PADDRESS_MAP_t; - -#endif /* _ET1310_ADDRESS_MAP_H_ */ diff --git a/src/et131x/et1310_eeprom.c b/src/et131x/et1310_eeprom.c deleted file mode 100644 index c2b194e..0000000 --- a/src/et131x/et1310_eeprom.c +++ /dev/null @@ -1,480 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_eeprom.c - Code used to access the device's EEPROM - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" -#include "et1310_eeprom.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" -#include "et131x_isr.h" - -#include "et1310_tx.h" - - -/* - * EEPROM Defines - */ - -/* LBCIF Register Groups (addressed via 32-bit offsets) */ -#define LBCIF_DWORD0_GROUP_OFFSET 0xAC -#define LBCIF_DWORD1_GROUP_OFFSET 0xB0 - -/* LBCIF Registers (addressed via 8-bit offsets) */ -#define LBCIF_ADDRESS_REGISTER_OFFSET 0xAC -#define LBCIF_DATA_REGISTER_OFFSET 0xB0 -#define LBCIF_CONTROL_REGISTER_OFFSET 0xB1 -#define LBCIF_STATUS_REGISTER_OFFSET 0xB2 - -/* LBCIF Control Register Bits */ -#define LBCIF_CONTROL_SEQUENTIAL_READ 0x01 -#define LBCIF_CONTROL_PAGE_WRITE 0x02 -#define LBCIF_CONTROL_UNUSED1 0x04 -#define LBCIF_CONTROL_EEPROM_RELOAD 0x08 -#define LBCIF_CONTROL_UNUSED2 0x10 -#define LBCIF_CONTROL_TWO_BYTE_ADDR 0x20 -#define LBCIF_CONTROL_I2C_WRITE 0x40 -#define LBCIF_CONTROL_LBCIF_ENABLE 0x80 - -/* LBCIF Status Register Bits */ -#define LBCIF_STATUS_PHY_QUEUE_AVAIL 0x01 -#define LBCIF_STATUS_I2C_IDLE 0x02 -#define LBCIF_STATUS_ACK_ERROR 0x04 -#define LBCIF_STATUS_GENERAL_ERROR 0x08 -#define LBCIF_STATUS_UNUSED 0x30 -#define LBCIF_STATUS_CHECKSUM_ERROR 0x40 -#define LBCIF_STATUS_EEPROM_PRESENT 0x80 - -/* Miscellaneous Constraints */ -#define MAX_NUM_REGISTER_POLLS 1000 -#define MAX_NUM_WRITE_RETRIES 2 - -/* - * Define macros that allow individual register values to be extracted from a - * DWORD1 register grouping - */ -#define EXTRACT_DATA_REGISTER(x) (uint8_t)(x & 0xFF) -#define EXTRACT_STATUS_REGISTER(x) (uint8_t)((x >> 16) & 0xFF) -#define EXTRACT_CONTROL_REG(x) (uint8_t)((x >> 8) & 0xFF) - -/** - * EepromWriteByte - Write a byte to the ET1310's EEPROM - * @pAdapter: pointer to our private adapter structure - * @unAddress: the address to write - * @bData: the value to write - * @unEepronId: the ID of the EEPROM - * @unAddressingMode: how the EEPROM is to be accessed - * - * Returns SUCCESS or FAILURE - */ -int32_t EepromWriteByte(struct et131x_adapter *pAdapter, uint32_t unAddress, - uint8_t bData, uint32_t unEepromId, - uint32_t unAddressingMode) -{ - struct pci_dev *pdev = pAdapter->pdev; - int32_t nIndex; - int32_t nRetries; - int32_t nError = false; - int32_t nI2CWriteActive = 0; - int32_t nWriteSuccessful = 0; - uint8_t bControl; - uint8_t bStatus = 0; - uint32_t unDword1 = 0; - uint32_t unData = 0; - - /* - * The following excerpt is from "Serial EEPROM HW Design - * Specification" Version 0.92 (9/20/2004): - * - * Single Byte Writes - * - * For an EEPROM, an I2C single byte write is defined as a START - * condition followed by the device address, EEPROM address, one byte - * of data and a STOP condition. The STOP condition will trigger the - * EEPROM's internally timed write cycle to the nonvolatile memory. - * All inputs are disabled during this write cycle and the EEPROM will - * not respond to any access until the internal write is complete. - * The steps to execute a single byte write are as follows: - * - * 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and - * bits 7,1:0 both equal to 1, at least once after reset. - * Subsequent operations need only to check that bits 1:0 are - * equal to 1 prior to starting a single byte write. - * - * 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0, - * and bits 1:0 both =0. Bit 5 should be set according to the - * type of EEPROM being accessed (1=two byte addressing, 0=one - * byte addressing). - * - * 3. Write the address to the LBCIF Address Register. - * - * 4. Write the data to the LBCIF Data Register (the I2C write will - * begin). - * - * 5. Monitor bit 1:0 of the LBCIF Status Register. When bits 1:0 are - * both equal to 1, the I2C write has completed and the internal - * write cycle of the EEPROM is about to start. (bits 1:0 = 01 is - * a legal state while waiting from both equal to 1, but bits - * 1:0 = 10 is invalid and implies that something is broken). - * - * 6. Check bit 3 of the LBCIF Status Register. If equal to 1, an - * error has occurred. - * - * 7. Check bit 2 of the LBCIF Status Register. If equal to 1 an ACK - * error has occurred on the address phase of the write. This - * could be due to an actual hardware failure or the EEPROM may - * still be in its internal write cycle from a previous write. - * This write operation was ignored and must be repeated later. - * - * 8. Set bit 6 of the LBCIF Control Register = 0. If another write is - * required, go to step 1. - */ - - /* Step 1: */ - for (nIndex = 0; nIndex < MAX_NUM_REGISTER_POLLS; nIndex++) { - /* Read registers grouped in DWORD1 */ - if (pci_read_config_dword(pdev, LBCIF_DWORD1_GROUP_OFFSET, - &unDword1)) { - nError = 1; - break; - } - - bStatus = EXTRACT_STATUS_REGISTER(unDword1); - - if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL && - bStatus & LBCIF_STATUS_I2C_IDLE) { - /* bits 1:0 are equal to 1 */ - break; - } - } - - if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) { - return FAILURE; - } - - /* Step 2: */ - bControl = 0; - bControl |= LBCIF_CONTROL_LBCIF_ENABLE | LBCIF_CONTROL_I2C_WRITE; - - if (unAddressingMode == DUAL_BYTE) { - bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR; - } - - if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET, - bControl)) { - return FAILURE; - } - - nI2CWriteActive = 1; - - /* Prepare EEPROM address for Step 3 */ - unAddress |= (unAddressingMode == DUAL_BYTE) ? - (unEepromId << 16) : (unEepromId << 8); - - for (nRetries = 0; nRetries < MAX_NUM_WRITE_RETRIES; nRetries++) { - /* Step 3:*/ - if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER_OFFSET, - unAddress)) { - break; - } - - /* Step 4: */ - if (pci_write_config_byte(pdev, LBCIF_DATA_REGISTER_OFFSET, - bData)) { - break; - } - - /* Step 5: */ - for (nIndex = 0; nIndex < MAX_NUM_REGISTER_POLLS; nIndex++) { - /* Read registers grouped in DWORD1 */ - if (pci_read_config_dword(pdev, - LBCIF_DWORD1_GROUP_OFFSET, - &unDword1)) { - nError = 1; - break; - } - - bStatus = EXTRACT_STATUS_REGISTER(unDword1); - - if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL && - bStatus & LBCIF_STATUS_I2C_IDLE) { - /* I2C write complete */ - break; - } - } - - if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) { - break; - } - - /* - * Step 6: Don't break here if we are revision 1, this is - * so we do a blind write for load bug. - */ - if (bStatus & LBCIF_STATUS_GENERAL_ERROR - && pAdapter->RevisionID == 0) { - break; - } - - /* Step 7 */ - if (bStatus & LBCIF_STATUS_ACK_ERROR) { - /* - * This could be due to an actual hardware failure - * or the EEPROM may still be in its internal write - * cycle from a previous write. This write operation - * was ignored and must be repeated later. - */ - udelay(10); - continue; - } - - nWriteSuccessful = 1; - break; - } - - /* Step 8: */ - udelay(10); - nIndex = 0; - while (nI2CWriteActive) { - bControl &= ~LBCIF_CONTROL_I2C_WRITE; - - if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET, - bControl)) { - nWriteSuccessful = 0; - } - - /* Do read until internal ACK_ERROR goes away meaning write - * completed - */ - do { - pci_write_config_dword(pdev, - LBCIF_ADDRESS_REGISTER_OFFSET, - unAddress); - do { - pci_read_config_dword(pdev, - LBCIF_DATA_REGISTER_OFFSET, &unData); - } while ((unData & 0x00010000) == 0); - } while (unData & 0x00040000); - - bControl = EXTRACT_CONTROL_REG(unData); - - if (bControl != 0xC0 || nIndex == 10000) { - break; - } - - nIndex++; - } - - return nWriteSuccessful ? SUCCESS : FAILURE; -} - -/** - * EepromReadByte - Read a byte from the ET1310's EEPROM - * @pAdapter: pointer to our private adapter structure - * @unAddress: the address from which to read - * @pbData: a pointer to a byte in which to store the value of the read - * @unEepronId: the ID of the EEPROM - * @unAddressingMode: how the EEPROM is to be accessed - * - * Returns SUCCESS or FAILURE - */ -int32_t EepromReadByte(struct et131x_adapter *pAdapter, uint32_t unAddress, - uint8_t *pbData, uint32_t unEepromId, - uint32_t unAddressingMode) -{ - struct pci_dev *pdev = pAdapter->pdev; - int32_t nIndex; - int32_t nError = 0; - uint8_t bControl; - uint8_t bStatus = 0; - uint32_t unDword1 = 0; - - /* - * The following excerpt is from "Serial EEPROM HW Design - * Specification" Version 0.92 (9/20/2004): - * - * Single Byte Reads - * - * A single byte read is similar to the single byte write, with the - * exception of the data flow: - * - * 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and - * bits 7,1:0 both equal to 1, at least once after reset. - * Subsequent operations need only to check that bits 1:0 are equal - * to 1 prior to starting a single byte read. - * - * 2. Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, - * and bits 1:0 both =0. Bit 5 should be set according to the type - * of EEPROM being accessed (1=two byte addressing, 0=one byte - * addressing). - * - * 3. Write the address to the LBCIF Address Register (I2C read will - * begin). - * - * 4. Monitor bit 0 of the LBCIF Status Register. When =1, I2C read - * is complete. (if bit 1 =1 and bit 0 stays =0, a hardware failure - * has occurred). - * - * 5. Check bit 2 of the LBCIF Status Register. If =1, then an error - * has occurred. The data that has been returned from the PHY may - * be invalid. - * - * 6. Regardless of error status, read data byte from LBCIF Data - * Register. If another byte is required, go to step 1. - */ - - /* Step 1: */ - for (nIndex = 0; nIndex < MAX_NUM_REGISTER_POLLS; nIndex++) { - /* Read registers grouped in DWORD1 */ - if (pci_read_config_dword(pdev, LBCIF_DWORD1_GROUP_OFFSET, - &unDword1)) { - nError = 1; - break; - } - - bStatus = EXTRACT_STATUS_REGISTER(unDword1); - - if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL && - bStatus & LBCIF_STATUS_I2C_IDLE) { - /* bits 1:0 are equal to 1 */ - break; - } - } - - if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) { - return FAILURE; - } - - /* Step 2: */ - bControl = 0; - bControl |= LBCIF_CONTROL_LBCIF_ENABLE; - - if (unAddressingMode == DUAL_BYTE) { - bControl |= LBCIF_CONTROL_TWO_BYTE_ADDR; - } - - if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER_OFFSET, - bControl)) { - return FAILURE; - } - - /* Step 3: */ - unAddress |= (unAddressingMode == DUAL_BYTE) ? - (unEepromId << 16) : (unEepromId << 8); - - if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER_OFFSET, - unAddress)) { - return FAILURE; - } - - /* Step 4: */ - for (nIndex = 0; nIndex < MAX_NUM_REGISTER_POLLS; nIndex++) { - /* Read registers grouped in DWORD1 */ - if (pci_read_config_dword(pdev, LBCIF_DWORD1_GROUP_OFFSET, - &unDword1)) { - nError = 1; - break; - } - - bStatus = EXTRACT_STATUS_REGISTER(unDword1); - - if (bStatus & LBCIF_STATUS_PHY_QUEUE_AVAIL - && bStatus & LBCIF_STATUS_I2C_IDLE) { - /* I2C read complete */ - break; - } - } - - if (nError || (nIndex >= MAX_NUM_REGISTER_POLLS)) { - return FAILURE; - } - - /* Step 6: */ - *pbData = EXTRACT_DATA_REGISTER(unDword1); - - return (bStatus & LBCIF_STATUS_ACK_ERROR) ? FAILURE : SUCCESS; -} diff --git a/src/et131x/et1310_eeprom.h b/src/et131x/et1310_eeprom.h deleted file mode 100644 index 9b6f8ad..0000000 --- a/src/et131x/et1310_eeprom.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_eeprom.h - Defines, structs, enums, prototypes, etc. used for EEPROM - * access routines - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET1310_EEPROM_H__ -#define __ET1310_EEPROM_H__ - -#include "et1310_address_map.h" - -#ifndef SUCCESS -#define SUCCESS 0 -#define FAILURE 1 -#endif - -#ifndef READ -#define READ 0 -#define WRITE 1 -#endif - -#ifndef SINGLE_BYTE -#define SINGLE_BYTE 0 -#define DUAL_BYTE 1 -#endif - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -int32_t EepromWriteByte(struct et131x_adapter *adapter, u32 unAddress, - u8 bData, u32 unEepromId, - u32 unAddressingMode); -int32_t EepromReadByte(struct et131x_adapter *adapter, u32 unAddress, - u8 *pbData, u32 unEepromId, - u32 unAddressingMode); - -#endif /* _ET1310_EEPROM_H_ */ diff --git a/src/et131x/et1310_jagcore.c b/src/et131x/et1310_jagcore.c deleted file mode 100644 index 993b30e..0000000 --- a/src/et131x/et1310_jagcore.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_jagcore.c - All code pertaining to the ET1301/ET131x's JAGcore - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/** - * ConfigGlobalRegs - Used to configure the global registers on the JAGCore - * @pAdpater: pointer to our adapter structure - */ -void ConfigGlobalRegs(struct et131x_adapter *pAdapter) -{ - struct _GLOBAL_t __iomem *pGbl = &pAdapter->CSRAddress->global; - - DBG_ENTER(et131x_dbginfo); - - if (pAdapter->RegistryPhyLoopbk == false) { - if (pAdapter->RegistryJumboPacket < 2048) { - /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word - * block of RAM that the driver can split between Tx - * and Rx as it desires. Our default is to split it - * 50/50: - */ - writel(0, &pGbl->rxq_start_addr.value); - writel(pAdapter->RegistryRxMemEnd, - &pGbl->rxq_end_addr.value); - writel(pAdapter->RegistryRxMemEnd + 1, - &pGbl->txq_start_addr.value); - writel(INTERNAL_MEM_SIZE - 1, - &pGbl->txq_end_addr.value); - } else if (pAdapter->RegistryJumboPacket < 8192) { - /* For jumbo packets > 2k but < 8k, split 50-50. */ - writel(0, &pGbl->rxq_start_addr.value); - writel(INTERNAL_MEM_RX_OFFSET, - &pGbl->rxq_end_addr.value); - writel(INTERNAL_MEM_RX_OFFSET + 1, - &pGbl->txq_start_addr.value); - writel(INTERNAL_MEM_SIZE - 1, - &pGbl->txq_end_addr.value); - } else { - /* 9216 is the only packet size greater than 8k that - * is available. The Tx buffer has to be big enough - * for one whole packet on the Tx side. We'll make - * the Tx 9408, and give the rest to Rx - */ - writel(0x0000, &pGbl->rxq_start_addr.value); - writel(0x01b3, &pGbl->rxq_end_addr.value); - writel(0x01b4, &pGbl->txq_start_addr.value); - writel(INTERNAL_MEM_SIZE - 1, - &pGbl->txq_end_addr.value); - } - - /* Initialize the loopback register. Disable all loopbacks. */ - writel(0, &pGbl->loopback.value); - } else { - /* For PHY Line loopback, the memory is configured as if Tx - * and Rx both have all the memory. This is because the - * RxMAC will write data into the space, and the TxMAC will - * read it out. - */ - writel(0, &pGbl->rxq_start_addr.value); - writel(INTERNAL_MEM_SIZE - 1, &pGbl->rxq_end_addr.value); - writel(0, &pGbl->txq_start_addr.value); - writel(INTERNAL_MEM_SIZE - 1, &pGbl->txq_end_addr.value); - - /* Initialize the loopback register (MAC loopback). */ - writel(1, &pGbl->loopback.value); - } - - /* MSI Register */ - writel(0, &pGbl->msi_config.value); - - /* By default, disable the watchdog timer. It will be enabled when - * a packet is queued. - */ - writel(0, &pGbl->watchdog_timer); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * ConfigMMCRegs - Used to configure the main memory registers in the JAGCore - * @pAdapter: pointer to our adapter structure - */ -void ConfigMMCRegs(struct et131x_adapter *pAdapter) -{ - MMC_CTRL_t mmc_ctrl = { 0 }; - - DBG_ENTER(et131x_dbginfo); - - /* All we need to do is initialize the Memory Control Register */ - mmc_ctrl.bits.force_ce = 0x0; - mmc_ctrl.bits.rxdma_disable = 0x0; - mmc_ctrl.bits.txdma_disable = 0x0; - mmc_ctrl.bits.txmac_disable = 0x0; - mmc_ctrl.bits.rxmac_disable = 0x0; - mmc_ctrl.bits.arb_disable = 0x0; - mmc_ctrl.bits.mmc_enable = 0x1; - - writel(mmc_ctrl.value, &pAdapter->CSRAddress->mmc.mmc_ctrl.value); - - DBG_LEAVE(et131x_dbginfo); -} - -void et131x_enable_interrupts(struct et131x_adapter *adapter) -{ - uint32_t MaskValue; - - /* Enable all global interrupts */ - if ((adapter->FlowControl == TxOnly) || (adapter->FlowControl == Both)) { - MaskValue = INT_MASK_ENABLE; - } else { - MaskValue = INT_MASK_ENABLE_NO_FLOW; - } - - if (adapter->DriverNoPhyAccess) { - MaskValue |= 0x10000; - } - - adapter->CachedMaskValue.value = MaskValue; - writel(MaskValue, &adapter->CSRAddress->global.int_mask.value); -} - -void et131x_disable_interrupts(struct et131x_adapter * adapter) -{ - /* Disable all global interrupts */ - adapter->CachedMaskValue.value = INT_MASK_DISABLE; - writel(INT_MASK_DISABLE, &adapter->CSRAddress->global.int_mask.value); -} diff --git a/src/et131x/et1310_jagcore.h b/src/et131x/et1310_jagcore.h deleted file mode 100644 index 9fc8293..0000000 --- a/src/et131x/et1310_jagcore.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_jagcore.h - Defines, structs, enums, prototypes, etc. pertaining to - * the JAGCore - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET1310_JAGCORE_H__ -#define __ET1310_JAGCORE_H__ - -#include "et1310_address_map.h" - - -#define INTERNAL_MEM_SIZE 0x400 //1024 of internal memory -#define INTERNAL_MEM_RX_OFFSET 0x1FF //50% Tx, 50% Rx - -#define REGS_MAX_ARRAY 4096 - -/* - * For interrupts, normal running is: - * rxdma_xfr_done, phy_interrupt, mac_stat_interrupt, - * watchdog_interrupt & txdma_xfer_done - * - * In both cases, when flow control is enabled for either Tx or bi-direction, - * we additional enable rx_fbr0_low and rx_fbr1_low, so we know when the - * buffer rings are running low. - */ -#define INT_MASK_DISABLE 0xffffffff - -// NOTE: Masking out MAC_STAT Interrupt for now... -//#define INT_MASK_ENABLE 0xfff6bf17 -//#define INT_MASK_ENABLE_NO_FLOW 0xfff6bfd7 -#define INT_MASK_ENABLE 0xfffebf17 -#define INT_MASK_ENABLE_NO_FLOW 0xfffebfd7 - -/* DATA STRUCTURES FOR DIRECT REGISTER ACCESS */ - -typedef struct { - u8 bReadWrite; - u32 nRegCount; - u32 nData[REGS_MAX_ARRAY]; - u32 nOffsets[REGS_MAX_ARRAY]; -} JAGCORE_ACCESS_REGS, *PJAGCORE_ACCESS_REGS; - -typedef struct { - u8 bReadWrite; - u32 nDataWidth; - u32 nRegCount; - u32 nOffsets[REGS_MAX_ARRAY]; - u32 nData[REGS_MAX_ARRAY]; -} PCI_CFG_SPACE_REGS, *PPCI_CFG_SPACE_REGS; - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -void ConfigGlobalRegs(struct et131x_adapter *pAdapter); -void ConfigMMCRegs(struct et131x_adapter *pAdapter); -void et131x_enable_interrupts(struct et131x_adapter *adapter); -void et131x_disable_interrupts(struct et131x_adapter *adapter); - -#endif /* __ET1310_JAGCORE_H__ */ diff --git a/src/et131x/et1310_mac.c b/src/et131x/et1310_mac.c deleted file mode 100644 index 1924968..0000000 --- a/src/et131x/et1310_mac.c +++ /dev/null @@ -1,792 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_mac.c - All code and routines pertaining to the MAC - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> -#include <linux/crc32.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" -#include "et1310_mac.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/** - * ConfigMacRegs1 - Initialize the first part of MAC regs - * @pAdpater: pointer to our adapter structure - */ -void ConfigMACRegs1(struct et131x_adapter *pAdapter) -{ - struct _MAC_t __iomem *pMac = &pAdapter->CSRAddress->mac; - MAC_STATION_ADDR1_t station1; - MAC_STATION_ADDR2_t station2; - MAC_IPG_t ipg; - MAC_HFDP_t hfdp; - MII_MGMT_CFG_t mii_mgmt_cfg; - - DBG_ENTER(et131x_dbginfo); - - /* First we need to reset everything. Write to MAC configuration - * register 1 to perform reset. - */ - writel(0xC00F0000, &pMac->cfg1.value); - - /* Next lets configure the MAC Inter-packet gap register */ - ipg.bits.non_B2B_ipg_1 = 0x38; // 58d - ipg.bits.non_B2B_ipg_2 = 0x58; // 88d - ipg.bits.min_ifg_enforce = 0x50; // 80d - ipg.bits.B2B_ipg = 0x60; // 96d - writel(ipg.value, &pMac->ipg.value); - - /* Next lets configure the MAC Half Duplex register */ - hfdp.bits.alt_beb_trunc = 0xA; - hfdp.bits.alt_beb_enable = 0x0; - hfdp.bits.bp_no_backoff = 0x0; - hfdp.bits.no_backoff = 0x0; - hfdp.bits.excess_defer = 0x1; - hfdp.bits.rexmit_max = 0xF; - hfdp.bits.coll_window = 0x37; // 55d - writel(hfdp.value, &pMac->hfdp.value); - - /* Next lets configure the MAC Interface Control register */ - writel(0, &pMac->if_ctrl.value); - - /* Let's move on to setting up the mii managment configuration */ - mii_mgmt_cfg.bits.reset_mii_mgmt = 0; - mii_mgmt_cfg.bits.scan_auto_incremt = 0; - mii_mgmt_cfg.bits.preamble_suppress = 0; - mii_mgmt_cfg.bits.mgmt_clk_reset = 0x7; - writel(mii_mgmt_cfg.value, &pMac->mii_mgmt_cfg.value); - - /* Next lets configure the MAC Station Address register. These - * values are read from the EEPROM during initialization and stored - * in the adapter structure. We write what is stored in the adapter - * structure to the MAC Station Address registers high and low. This - * station address is used for generating and checking pause control - * packets. - */ - station2.bits.Octet1 = pAdapter->CurrentAddress[0]; - station2.bits.Octet2 = pAdapter->CurrentAddress[1]; - station1.bits.Octet3 = pAdapter->CurrentAddress[2]; - station1.bits.Octet4 = pAdapter->CurrentAddress[3]; - station1.bits.Octet5 = pAdapter->CurrentAddress[4]; - station1.bits.Octet6 = pAdapter->CurrentAddress[5]; - writel(station1.value, &pMac->station_addr_1.value); - writel(station2.value, &pMac->station_addr_2.value); - - /* Max ethernet packet in bytes that will passed by the mac without - * being truncated. Allow the MAC to pass 4 more than our max packet - * size. This is 4 for the Ethernet CRC. - * - * Packets larger than (RegistryJumboPacket) that do not contain a - * VLAN ID will be dropped by the Rx function. - */ - writel(pAdapter->RegistryJumboPacket + 4, &pMac->max_fm_len.value); - - /* clear out MAC config reset */ - writel(0, &pMac->cfg1.value); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * ConfigMacRegs2 - Initialize the second part of MAC regs - * @pAdpater: pointer to our adapter structure - */ -void ConfigMACRegs2(struct et131x_adapter *pAdapter) -{ - int32_t delay = 0; - struct _MAC_t __iomem *pMac = &pAdapter->CSRAddress->mac; - MAC_CFG1_t cfg1; - MAC_CFG2_t cfg2; - MAC_IF_CTRL_t ifctrl; - TXMAC_CTL_t ctl; - - DBG_ENTER(et131x_dbginfo); - - ctl.value = readl(&pAdapter->CSRAddress->txmac.ctl.value); - cfg1.value = readl(&pMac->cfg1.value); - cfg2.value = readl(&pMac->cfg2.value); - ifctrl.value = readl(&pMac->if_ctrl.value); - - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { - cfg2.bits.if_mode = 0x2; - ifctrl.bits.phy_mode = 0x0; - } else { - cfg2.bits.if_mode = 0x1; - ifctrl.bits.phy_mode = 0x1; - } - - /* We need to enable Rx/Tx */ - cfg1.bits.rx_enable = 0x1; - cfg1.bits.tx_enable = 0x1; - - /* Set up flow control */ - cfg1.bits.tx_flow = 0x1; - - if ((pAdapter->FlowControl == RxOnly) || - (pAdapter->FlowControl == Both)) { - cfg1.bits.rx_flow = 0x1; - } else { - cfg1.bits.rx_flow = 0x0; - } - - /* Initialize loop back to off */ - cfg1.bits.loop_back = 0; - - writel(cfg1.value, &pMac->cfg1.value); - - /* Now we need to initialize the MAC Configuration 2 register */ - cfg2.bits.preamble_len = 0x7; - cfg2.bits.huge_frame = 0x0; - /* LENGTH FIELD CHECKING bit4: Set this bit to cause the MAC to check - * the frame's length field to ensure it matches the actual data - * field length. Clear this bit if no length field checking is - * desired. Its default is 0. - */ - cfg2.bits.len_check = 0x1; - - if (pAdapter->RegistryPhyLoopbk == false) { - cfg2.bits.pad_crc = 0x1; - cfg2.bits.crc_enable = 0x1; - } else { - cfg2.bits.pad_crc = 0; - cfg2.bits.crc_enable = 0; - } - - /* 1 - full duplex, 0 - half-duplex */ - cfg2.bits.full_duplex = pAdapter->uiDuplexMode; - ifctrl.bits.ghd_mode = !pAdapter->uiDuplexMode; - - writel(ifctrl.value, &pMac->if_ctrl.value); - writel(cfg2.value, &pMac->cfg2.value); - - do { - udelay(10); - delay++; - cfg1.value = readl(&pMac->cfg1.value); - } while ((!cfg1.bits.syncd_rx_en || - !cfg1.bits.syncd_tx_en) && - delay < 100); - - if (delay == 100) { - DBG_ERROR(et131x_dbginfo, - "Syncd bits did not respond correctly cfg1 word 0x%08x\n", - cfg1.value); - } - - DBG_TRACE(et131x_dbginfo, - "Speed %d, Dup %d, CFG1 0x%08x, CFG2 0x%08x, if_ctrl 0x%08x\n", - pAdapter->uiLinkSpeed, pAdapter->uiDuplexMode, - readl(&pMac->cfg1.value), readl(&pMac->cfg2.value), - readl(&pMac->if_ctrl.value)); - - /* Enable TXMAC */ - ctl.bits.txmac_en = 0x1; - ctl.bits.fc_disable = 0x1; - writel(ctl.value, &pAdapter->CSRAddress->txmac.ctl.value); - - /* Ready to start the RXDMA/TXDMA engine */ - if (!MP_TEST_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER)) { - et131x_rx_dma_enable(pAdapter); - et131x_tx_dma_enable(pAdapter); - } else { - DBG_WARNING(et131x_dbginfo, - "Didn't enable Rx/Tx due to low-power mode\n"); - } - - DBG_LEAVE(et131x_dbginfo); -} - -void ConfigRxMacRegs(struct et131x_adapter *pAdapter) -{ - struct _RXMAC_t __iomem *pRxMac = &pAdapter->CSRAddress->rxmac; - RXMAC_WOL_SA_LO_t sa_lo; - RXMAC_WOL_SA_HI_t sa_hi; - RXMAC_PF_CTRL_t pf_ctrl = { 0 }; - - DBG_ENTER(et131x_dbginfo); - - /* Disable the MAC while it is being configured (also disable WOL) */ - writel(0x8, &pRxMac->ctrl.value); - - /* Initialize WOL to disabled. */ - writel(0, &pRxMac->crc0.value); - writel(0, &pRxMac->crc12.value); - writel(0, &pRxMac->crc34.value); - - /* We need to set the WOL mask0 - mask4 next. We initialize it to - * its default Values of 0x00000000 because there are not WOL masks - * as of this time. - */ - writel(0, &pRxMac->mask0_word0); - writel(0, &pRxMac->mask0_word1); - writel(0, &pRxMac->mask0_word2); - writel(0, &pRxMac->mask0_word3); - - writel(0, &pRxMac->mask1_word0); - writel(0, &pRxMac->mask1_word1); - writel(0, &pRxMac->mask1_word2); - writel(0, &pRxMac->mask1_word3); - - writel(0, &pRxMac->mask2_word0); - writel(0, &pRxMac->mask2_word1); - writel(0, &pRxMac->mask2_word2); - writel(0, &pRxMac->mask2_word3); - - writel(0, &pRxMac->mask3_word0); - writel(0, &pRxMac->mask3_word1); - writel(0, &pRxMac->mask3_word2); - writel(0, &pRxMac->mask3_word3); - - writel(0, &pRxMac->mask4_word0); - writel(0, &pRxMac->mask4_word1); - writel(0, &pRxMac->mask4_word2); - writel(0, &pRxMac->mask4_word3); - - /* Lets setup the WOL Source Address */ - sa_lo.bits.sa3 = pAdapter->CurrentAddress[2]; - sa_lo.bits.sa4 = pAdapter->CurrentAddress[3]; - sa_lo.bits.sa5 = pAdapter->CurrentAddress[4]; - sa_lo.bits.sa6 = pAdapter->CurrentAddress[5]; - writel(sa_lo.value, &pRxMac->sa_lo.value); - - sa_hi.bits.sa1 = pAdapter->CurrentAddress[0]; - sa_hi.bits.sa2 = pAdapter->CurrentAddress[1]; - writel(sa_hi.value, &pRxMac->sa_hi.value); - - /* Disable all Packet Filtering */ - writel(0, &pRxMac->pf_ctrl.value); - - /* Let's initialize the Unicast Packet filtering address */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { - SetupDeviceForUnicast(pAdapter); - pf_ctrl.bits.filter_uni_en = 1; - } else { - writel(0, &pRxMac->uni_pf_addr1.value); - writel(0, &pRxMac->uni_pf_addr2.value); - writel(0, &pRxMac->uni_pf_addr3.value); - } - - /* Let's initialize the Multicast hash */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { - pf_ctrl.bits.filter_multi_en = 0; - } else { - pf_ctrl.bits.filter_multi_en = 1; - SetupDeviceForMulticast(pAdapter); - } - - /* Runt packet filtering. Didn't work in version A silicon. */ - pf_ctrl.bits.min_pkt_size = NIC_MIN_PACKET_SIZE + 4; - pf_ctrl.bits.filter_frag_en = 1; - - if (pAdapter->RegistryJumboPacket > 8192) { - RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; - - /* In order to transmit jumbo packets greater than 8k, the - * FIFO between RxMAC and RxDMA needs to be reduced in size - * to (16k - Jumbo packet size). In order to implement this, - * we must use "cut through" mode in the RxMAC, which chops - * packets down into segments which are (max_size * 16). In - * this case we selected 256 bytes, since this is the size of - * the PCI-Express TLP's that the 1310 uses. - */ - mcif_ctrl_max_seg.bits.seg_en = 0x1; - mcif_ctrl_max_seg.bits.fc_en = 0x0; - mcif_ctrl_max_seg.bits.max_size = 0x10; - - writel(mcif_ctrl_max_seg.value, - &pRxMac->mcif_ctrl_max_seg.value); - } else { - writel(0, &pRxMac->mcif_ctrl_max_seg.value); - } - - /* Initialize the MCIF water marks */ - writel(0, &pRxMac->mcif_water_mark.value); - - /* Initialize the MIF control */ - writel(0, &pRxMac->mif_ctrl.value); - - /* Initialize the Space Available Register */ - writel(0, &pRxMac->space_avail.value); - - /* Initialize the the mif_ctrl register - * bit 3: Receive code error. One or more nibbles were signaled as - * errors during the reception of the packet. Clear this - * bit in Gigabit, set it in 100Mbit. This was derived - * experimentally at UNH. - * bit 4: Receive CRC error. The packet's CRC did not match the - * internally generated CRC. - * bit 5: Receive length check error. Indicates that frame length - * field value in the packet does not match the actual data - * byte length and is not a type field. - * bit 16: Receive frame truncated. - * bit 17: Drop packet enable - */ - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS) { - writel(0x30038, &pRxMac->mif_ctrl.value); - } else { - writel(0x30030, &pRxMac->mif_ctrl.value); - } - - /* Finally we initialize RxMac to be enabled & WOL disabled. Packet - * filter is always enabled since it is where the runt packets are - * supposed to be dropped. For version A silicon, runt packet - * dropping doesn't work, so it is disabled in the pf_ctrl register, - * but we still leave the packet filter on. - */ - writel(pf_ctrl.value, &pRxMac->pf_ctrl.value); - writel(0x9, &pRxMac->ctrl.value); - - DBG_LEAVE(et131x_dbginfo); -} - -void ConfigTxMacRegs(struct et131x_adapter *pAdapter) -{ - struct _TXMAC_t __iomem *pTxMac = &pAdapter->CSRAddress->txmac; - TXMAC_CF_PARAM_t Local; - - DBG_ENTER(et131x_dbginfo); - - /* We need to update the Control Frame Parameters - * cfpt - control frame pause timer set to 64 (0x40) - * cfep - control frame extended pause timer set to 0x0 - */ - if (pAdapter->FlowControl == None) { - writel(0, &pTxMac->cf_param.value); - } else { - Local.bits.cfpt = 0x40; - Local.bits.cfep = 0x0; - writel(Local.value, &pTxMac->cf_param.value); - } - - DBG_LEAVE(et131x_dbginfo); -} - -void ConfigMacStatRegs(struct et131x_adapter *pAdapter) -{ - struct _MAC_STAT_t __iomem *pDevMacStat = - &pAdapter->CSRAddress->macStat; - - DBG_ENTER(et131x_dbginfo); - - /* Next we need to initialize all the MAC_STAT registers to zero on - * the device. - */ - writel(0, &pDevMacStat->RFcs); - writel(0, &pDevMacStat->RAln); - writel(0, &pDevMacStat->RFlr); - writel(0, &pDevMacStat->RDrp); - writel(0, &pDevMacStat->RCde); - writel(0, &pDevMacStat->ROvr); - writel(0, &pDevMacStat->RFrg); - - writel(0, &pDevMacStat->TScl); - writel(0, &pDevMacStat->TDfr); - writel(0, &pDevMacStat->TMcl); - writel(0, &pDevMacStat->TLcl); - writel(0, &pDevMacStat->TNcl); - writel(0, &pDevMacStat->TOvr); - writel(0, &pDevMacStat->TUnd); - - /* Unmask any counters that we want to track the overflow of. - * Initially this will be all counters. It may become clear later - * that we do not need to track all counters. - */ - { - MAC_STAT_REG_1_t Carry1M = { 0xffffffff }; - - Carry1M.bits.rdrp = 0; - Carry1M.bits.rjbr = 1; - Carry1M.bits.rfrg = 0; - Carry1M.bits.rovr = 0; - Carry1M.bits.rund = 1; - Carry1M.bits.rcse = 1; - Carry1M.bits.rcde = 0; - Carry1M.bits.rflr = 0; - Carry1M.bits.raln = 0; - Carry1M.bits.rxuo = 1; - Carry1M.bits.rxpf = 1; - Carry1M.bits.rxcf = 1; - Carry1M.bits.rbca = 1; - Carry1M.bits.rmca = 1; - Carry1M.bits.rfcs = 0; - Carry1M.bits.rpkt = 1; - Carry1M.bits.rbyt = 1; - Carry1M.bits.trmgv = 1; - Carry1M.bits.trmax = 1; - Carry1M.bits.tr1k = 1; - Carry1M.bits.tr511 = 1; - Carry1M.bits.tr255 = 1; - Carry1M.bits.tr127 = 1; - Carry1M.bits.tr64 = 1; - - writel(Carry1M.value, &pDevMacStat->Carry1M.value); - } - - { - MAC_STAT_REG_2_t Carry2M = { 0xffffffff }; - - Carry2M.bits.tdrp = 1; - Carry2M.bits.tpfh = 1; - Carry2M.bits.tncl = 0; - Carry2M.bits.txcl = 1; - Carry2M.bits.tlcl = 0; - Carry2M.bits.tmcl = 0; - Carry2M.bits.tscl = 0; - Carry2M.bits.tedf = 1; - Carry2M.bits.tdfr = 0; - Carry2M.bits.txpf = 1; - Carry2M.bits.tbca = 1; - Carry2M.bits.tmca = 1; - Carry2M.bits.tpkt = 1; - Carry2M.bits.tbyt = 1; - Carry2M.bits.tfrg = 1; - Carry2M.bits.tund = 0; - Carry2M.bits.tovr = 0; - Carry2M.bits.txcf = 1; - Carry2M.bits.tfcs = 1; - Carry2M.bits.tjbr = 1; - - writel(Carry2M.value, &pDevMacStat->Carry2M.value); - } - - DBG_LEAVE(et131x_dbginfo); -} - -void ConfigFlowControl(struct et131x_adapter * pAdapter) -{ - if (pAdapter->uiDuplexMode == 0) { - pAdapter->FlowControl = None; - } else { - char RemotePause, RemoteAsyncPause; - - ET1310_PhyAccessMiBit(pAdapter, - TRUEPHY_BIT_READ, 5, 10, &RemotePause); - ET1310_PhyAccessMiBit(pAdapter, - TRUEPHY_BIT_READ, 5, 11, - &RemoteAsyncPause); - - if ((RemotePause == TRUEPHY_BIT_SET) && - (RemoteAsyncPause == TRUEPHY_BIT_SET)) { - pAdapter->FlowControl = pAdapter->RegistryFlowControl; - } else if ((RemotePause == TRUEPHY_BIT_SET) && - (RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) { - if (pAdapter->RegistryFlowControl == Both) { - pAdapter->FlowControl = Both; - } else { - pAdapter->FlowControl = None; - } - } else if ((RemotePause == TRUEPHY_BIT_CLEAR) && - (RemoteAsyncPause == TRUEPHY_BIT_CLEAR)) { - pAdapter->FlowControl = None; - } else {/* if (RemotePause == TRUEPHY_CLEAR_BIT && - RemoteAsyncPause == TRUEPHY_SET_BIT) */ - if (pAdapter->RegistryFlowControl == Both) { - pAdapter->FlowControl = RxOnly; - } else { - pAdapter->FlowControl = None; - } - } - } -} - -/** - * UpdateMacStatHostCounters - Update the local copy of the statistics - * @pAdapter: pointer to the adapter structure - */ -void UpdateMacStatHostCounters(struct et131x_adapter *pAdapter) -{ - struct _ce_stats_t *stats = &pAdapter->Stats; - struct _MAC_STAT_t __iomem *pDevMacStat = - &pAdapter->CSRAddress->macStat; - - stats->collisions += readl(&pDevMacStat->TNcl); - stats->first_collision += readl(&pDevMacStat->TScl); - stats->tx_deferred += readl(&pDevMacStat->TDfr); - stats->excessive_collisions += readl(&pDevMacStat->TMcl); - stats->late_collisions += readl(&pDevMacStat->TLcl); - stats->tx_uflo += readl(&pDevMacStat->TUnd); - stats->max_pkt_error += readl(&pDevMacStat->TOvr); - - stats->alignment_err += readl(&pDevMacStat->RAln); - stats->crc_err += readl(&pDevMacStat->RCde); - stats->norcvbuf += readl(&pDevMacStat->RDrp); - stats->rx_ov_flow += readl(&pDevMacStat->ROvr); - stats->code_violations += readl(&pDevMacStat->RFcs); - stats->length_err += readl(&pDevMacStat->RFlr); - - stats->other_errors += readl(&pDevMacStat->RFrg); -} - -/** - * HandleMacStatInterrupt - * @pAdapter: pointer to the adapter structure - * - * One of the MACSTAT counters has wrapped. Update the local copy of - * the statistics held in the adapter structure, checking the "wrap" - * bit for each counter. - */ -void HandleMacStatInterrupt(struct et131x_adapter *pAdapter) -{ - MAC_STAT_REG_1_t Carry1; - MAC_STAT_REG_2_t Carry2; - - DBG_ENTER(et131x_dbginfo); - - /* Read the interrupt bits from the register(s). These are Clear On - * Write. - */ - Carry1.value = readl(&pAdapter->CSRAddress->macStat.Carry1.value); - Carry2.value = readl(&pAdapter->CSRAddress->macStat.Carry2.value); - - writel(Carry1.value, &pAdapter->CSRAddress->macStat.Carry1.value); - writel(Carry2.value, &pAdapter->CSRAddress->macStat.Carry2.value); - - /* We need to do update the host copy of all the MAC_STAT counters. - * For each counter, check it's overflow bit. If the overflow bit is - * set, then increment the host version of the count by one complete - * revolution of the counter. This routine is called when the counter - * block indicates that one of the counters has wrapped. - */ - if (Carry1.bits.rfcs) { - pAdapter->Stats.code_violations += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.raln) { - pAdapter->Stats.alignment_err += COUNTER_WRAP_12_BIT; - } - if (Carry1.bits.rflr) { - pAdapter->Stats.length_err += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rfrg) { - pAdapter->Stats.other_errors += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rcde) { - pAdapter->Stats.crc_err += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rovr) { - pAdapter->Stats.rx_ov_flow += COUNTER_WRAP_16_BIT; - } - if (Carry1.bits.rdrp) { - pAdapter->Stats.norcvbuf += COUNTER_WRAP_16_BIT; - } - if (Carry2.bits.tovr) { - pAdapter->Stats.max_pkt_error += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tund) { - pAdapter->Stats.tx_uflo += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tscl) { - pAdapter->Stats.first_collision += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tdfr) { - pAdapter->Stats.tx_deferred += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tmcl) { - pAdapter->Stats.excessive_collisions += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tlcl) { - pAdapter->Stats.late_collisions += COUNTER_WRAP_12_BIT; - } - if (Carry2.bits.tncl) { - pAdapter->Stats.collisions += COUNTER_WRAP_12_BIT; - } - - DBG_LEAVE(et131x_dbginfo); -} - -void SetupDeviceForMulticast(struct et131x_adapter *pAdapter) -{ - struct _RXMAC_t __iomem *rxmac = &pAdapter->CSRAddress->rxmac; - uint32_t nIndex; - uint32_t result; - uint32_t hash1 = 0; - uint32_t hash2 = 0; - uint32_t hash3 = 0; - uint32_t hash4 = 0; - PM_CSR_t pm_csr; - - DBG_ENTER(et131x_dbginfo); - - /* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision - * the multi-cast LIST. If it is NOT specified, (and "ALL" is not - * specified) then we should pass NO multi-cast addresses to the - * driver. - */ - if (pAdapter->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) { - DBG_VERBOSE(et131x_dbginfo, - "MULTICAST flag is set, MCCount: %d\n", - pAdapter->MCAddressCount); - - /* Loop through our multicast array and set up the device */ - for (nIndex = 0; nIndex < pAdapter->MCAddressCount; nIndex++) { - DBG_VERBOSE(et131x_dbginfo, - "MCList[%d]: %02x:%02x:%02x:%02x:%02x:%02x\n", - nIndex, - pAdapter->MCList[nIndex][0], - pAdapter->MCList[nIndex][1], - pAdapter->MCList[nIndex][2], - pAdapter->MCList[nIndex][3], - pAdapter->MCList[nIndex][4], - pAdapter->MCList[nIndex][5]); - - result = ether_crc(6, pAdapter->MCList[nIndex]); - - result = (result & 0x3F800000) >> 23; - - if (result < 32) { - hash1 |= (1 << result); - } else if ((31 < result) && (result < 64)) { - result -= 32; - hash2 |= (1 << result); - } else if ((63 < result) && (result < 96)) { - result -= 64; - hash3 |= (1 << result); - } else { - result -= 96; - hash4 |= (1 << result); - } - } - } - - /* Write out the new hash to the device */ - pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 0) { - writel(hash1, &rxmac->multi_hash1); - writel(hash2, &rxmac->multi_hash2); - writel(hash3, &rxmac->multi_hash3); - writel(hash4, &rxmac->multi_hash4); - } - - DBG_LEAVE(et131x_dbginfo); -} - -void SetupDeviceForUnicast(struct et131x_adapter *pAdapter) -{ - struct _RXMAC_t __iomem *rxmac = &pAdapter->CSRAddress->rxmac; - RXMAC_UNI_PF_ADDR1_t uni_pf1; - RXMAC_UNI_PF_ADDR2_t uni_pf2; - RXMAC_UNI_PF_ADDR3_t uni_pf3; - PM_CSR_t pm_csr; - - DBG_ENTER(et131x_dbginfo); - - /* Set up unicast packet filter reg 3 to be the first two octets of - * the MAC address for both address - * - * Set up unicast packet filter reg 2 to be the octets 2 - 5 of the - * MAC address for second address - * - * Set up unicast packet filter reg 3 to be the octets 2 - 5 of the - * MAC address for first address - */ - uni_pf3.bits.addr1_1 = pAdapter->CurrentAddress[0]; - uni_pf3.bits.addr1_2 = pAdapter->CurrentAddress[1]; - uni_pf3.bits.addr2_1 = pAdapter->CurrentAddress[0]; - uni_pf3.bits.addr2_2 = pAdapter->CurrentAddress[1]; - - uni_pf2.bits.addr2_3 = pAdapter->CurrentAddress[2]; - uni_pf2.bits.addr2_4 = pAdapter->CurrentAddress[3]; - uni_pf2.bits.addr2_5 = pAdapter->CurrentAddress[4]; - uni_pf2.bits.addr2_6 = pAdapter->CurrentAddress[5]; - - uni_pf1.bits.addr1_3 = pAdapter->CurrentAddress[2]; - uni_pf1.bits.addr1_4 = pAdapter->CurrentAddress[3]; - uni_pf1.bits.addr1_5 = pAdapter->CurrentAddress[4]; - uni_pf1.bits.addr1_6 = pAdapter->CurrentAddress[5]; - - pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 0) { - writel(uni_pf1.value, &rxmac->uni_pf_addr1.value); - writel(uni_pf2.value, &rxmac->uni_pf_addr2.value); - writel(uni_pf3.value, &rxmac->uni_pf_addr3.value); - } - - DBG_LEAVE(et131x_dbginfo); -} diff --git a/src/et131x/et1310_mac.h b/src/et131x/et1310_mac.h deleted file mode 100644 index bd26cd3..0000000 --- a/src/et131x/et1310_mac.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_mac.h - Defines, structs, enums, prototypes, etc. pertaining to the - * MAC. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef _ET1310_MAC_H_ -#define _ET1310_MAC_H_ - - -#include "et1310_address_map.h" - - -#define COUNTER_WRAP_28_BIT 0x10000000 -#define COUNTER_WRAP_22_BIT 0x400000 -#define COUNTER_WRAP_16_BIT 0x10000 -#define COUNTER_WRAP_12_BIT 0x1000 - -#define COUNTER_MASK_28_BIT (COUNTER_WRAP_28_BIT - 1) -#define COUNTER_MASK_22_BIT (COUNTER_WRAP_22_BIT - 1) -#define COUNTER_MASK_16_BIT (COUNTER_WRAP_16_BIT - 1) -#define COUNTER_MASK_12_BIT (COUNTER_WRAP_12_BIT - 1) - -#define UPDATE_COUNTER(HostCnt,DevCnt) \ - HostCnt = HostCnt + DevCnt; - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -void ConfigMACRegs1(struct et131x_adapter *adapter); -void ConfigMACRegs2(struct et131x_adapter *adapter); -void ConfigRxMacRegs(struct et131x_adapter *adapter); -void ConfigTxMacRegs(struct et131x_adapter *adapter); -void ConfigMacStatRegs(struct et131x_adapter *adapter); -void ConfigFlowControl(struct et131x_adapter *adapter); -void UpdateMacStatHostCounters(struct et131x_adapter *adapter); -void HandleMacStatInterrupt(struct et131x_adapter *adapter); -void SetupDeviceForMulticast(struct et131x_adapter *adapter); -void SetupDeviceForUnicast(struct et131x_adapter *adapter); - -#endif /* _ET1310_MAC_H_ */ diff --git a/src/et131x/et1310_phy.c b/src/et131x/et1310_phy.c deleted file mode 100644 index 6c4fa54..0000000 --- a/src/et131x/et1310_phy.c +++ /dev/null @@ -1,1281 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_phy.c - Routines for configuring and accessing the PHY - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> -#include <linux/random.h> -#include <linux/delay.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_netdev.h" -#include "et131x_initpci.h" - -#include "et1310_address_map.h" -#include "et1310_jagcore.h" -#include "et1310_tx.h" -#include "et1310_rx.h" -#include "et1310_mac.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/* Prototypes for functions with local scope */ -static int et131x_xcvr_init(struct et131x_adapter *adapter); - -/** - * PhyMiRead - Read from the PHY through the MII Interface on the MAC - * @adapter: pointer to our private adapter structure - * @xcvrAddr: the address of the transciever - * @xcvrReg: the register to read - * @value: pointer to a 16-bit value in which the value will be stored - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int PhyMiRead(struct et131x_adapter *adapter, uint8_t xcvrAddr, - uint8_t xcvrReg, uint16_t *value) -{ - struct _MAC_t __iomem *mac = &adapter->CSRAddress->mac; - int status = 0; - uint32_t delay; - MII_MGMT_ADDR_t miiAddr; - MII_MGMT_CMD_t miiCmd; - MII_MGMT_INDICATOR_t miiIndicator; - - /* Save a local copy of the registers we are dealing with so we can - * set them back - */ - miiAddr.value = readl(&mac->mii_mgmt_addr.value); - miiCmd.value = readl(&mac->mii_mgmt_cmd.value); - - /* Stop the current operation */ - writel(0, &mac->mii_mgmt_cmd.value); - - /* Set up the register we need to read from on the correct PHY */ - { - MII_MGMT_ADDR_t mii_mgmt_addr = { 0 }; - - mii_mgmt_addr.bits.phy_addr = xcvrAddr; - mii_mgmt_addr.bits.reg_addr = xcvrReg; - writel(mii_mgmt_addr.value, &mac->mii_mgmt_addr.value); - } - - /* Kick the read cycle off */ - delay = 0; - - writel(0x1, &mac->mii_mgmt_cmd.value); - - do { - udelay(50); - delay++; - miiIndicator.value = readl(&mac->mii_mgmt_indicator.value); - } while ((miiIndicator.bits.not_valid || miiIndicator.bits.busy) && - delay < 50); - - /* If we hit the max delay, we could not read the register */ - if (delay >= 50) { - DBG_WARNING(et131x_dbginfo, - "xcvrReg 0x%08x could not be read\n", xcvrReg); - DBG_WARNING(et131x_dbginfo, "status is 0x%08x\n", - miiIndicator.value); - - status = -EIO; - } - - /* If we hit here we were able to read the register and we need to - * return the value to the caller - */ - /* TODO: make this stuff a simple readw()?! */ - { - MII_MGMT_STAT_t mii_mgmt_stat; - - mii_mgmt_stat.value = readl(&mac->mii_mgmt_stat.value); - *value = (uint16_t) mii_mgmt_stat.bits.phy_stat; - } - - /* Stop the read operation */ - writel(0, &mac->mii_mgmt_cmd.value); - - DBG_VERBOSE(et131x_dbginfo, " xcvr_addr = 0x%02x, " - "xcvr_reg = 0x%02x, " - "value = 0x%04x.\n", xcvrAddr, xcvrReg, *value); - - /* set the registers we touched back to the state at which we entered - * this function - */ - writel(miiAddr.value, &mac->mii_mgmt_addr.value); - writel(miiCmd.value, &mac->mii_mgmt_cmd.value); - - return status; -} - -/** - * MiWrite - Write to a PHY register through the MII interface of the MAC - * @adapter: pointer to our private adapter structure - * @xcvrReg: the register to read - * @value: 16-bit value to write - * - * Return 0 on success, errno on failure (as defined in errno.h) - */ -int MiWrite(struct et131x_adapter *adapter, uint8_t xcvrReg, uint16_t value) -{ - struct _MAC_t __iomem *mac = &adapter->CSRAddress->mac; - int status = 0; - uint8_t xcvrAddr = adapter->Stats.xcvr_addr; - uint32_t delay; - MII_MGMT_ADDR_t miiAddr; - MII_MGMT_CMD_t miiCmd; - MII_MGMT_INDICATOR_t miiIndicator; - - /* Save a local copy of the registers we are dealing with so we can - * set them back - */ - miiAddr.value = readl(&mac->mii_mgmt_addr.value); - miiCmd.value = readl(&mac->mii_mgmt_cmd.value); - - /* Stop the current operation */ - writel(0, &mac->mii_mgmt_cmd.value); - - /* Set up the register we need to write to on the correct PHY */ - { - MII_MGMT_ADDR_t mii_mgmt_addr; - - mii_mgmt_addr.bits.phy_addr = xcvrAddr; - mii_mgmt_addr.bits.reg_addr = xcvrReg; - writel(mii_mgmt_addr.value, &mac->mii_mgmt_addr.value); - } - - /* Add the value to write to the registers to the mac */ - writel(value, &mac->mii_mgmt_ctrl.value); - delay = 0; - - do { - udelay(50); - delay++; - miiIndicator.value = readl(&mac->mii_mgmt_indicator.value); - } while (miiIndicator.bits.busy && delay < 100); - - /* If we hit the max delay, we could not write the register */ - if (delay == 100) { - uint16_t TempValue; - - DBG_WARNING(et131x_dbginfo, - "xcvrReg 0x%08x could not be written", xcvrReg); - DBG_WARNING(et131x_dbginfo, "status is 0x%08x\n", - miiIndicator.value); - DBG_WARNING(et131x_dbginfo, "command is 0x%08x\n", - readl(&mac->mii_mgmt_cmd.value)); - - MiRead(adapter, xcvrReg, &TempValue); - - status = -EIO; - } - - /* Stop the write operation */ - writel(0, &mac->mii_mgmt_cmd.value); - - /* set the registers we touched back to the state at which we entered - * this function - */ - writel(miiAddr.value, &mac->mii_mgmt_addr.value); - writel(miiCmd.value, &mac->mii_mgmt_cmd.value); - - DBG_VERBOSE(et131x_dbginfo, " xcvr_addr = 0x%02x, " - "xcvr_reg = 0x%02x, " - "value = 0x%04x.\n", xcvrAddr, xcvrReg, value); - - return status; -} - -/** - * et131x_xcvr_find - Find the PHY ID - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_xcvr_find(struct et131x_adapter *adapter) -{ - int status = -ENODEV; - uint8_t xcvr_addr; - MI_IDR1_t idr1; - MI_IDR2_t idr2; - uint32_t xcvr_id; - - DBG_ENTER(et131x_dbginfo); - - /* We need to get xcvr id and address we just get the first one */ - for (xcvr_addr = 0; xcvr_addr < 32; xcvr_addr++) { - /* Read the ID from the PHY */ - PhyMiRead(adapter, xcvr_addr, - (uint8_t) offsetof(MI_REGS_t, idr1), - &idr1.value); - PhyMiRead(adapter, xcvr_addr, - (uint8_t) offsetof(MI_REGS_t, idr2), - &idr2.value); - - xcvr_id = (uint32_t) ((idr1.value << 16) | idr2.value); - - if ((idr1.value != 0) && (idr1.value != 0xffff)) { - DBG_TRACE(et131x_dbginfo, - "Xcvr addr: 0x%02x\tXcvr_id: 0x%08x\n", - xcvr_addr, xcvr_id); - - adapter->Stats.xcvr_id = xcvr_id; - adapter->Stats.xcvr_addr = xcvr_addr; - - status = 0; - break; - } - } - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_setphy_normal - Set PHY for normal operation. - * @adapter: pointer to our private adapter structure - * - * Used by Power Management to force the PHY into 10 Base T half-duplex mode, - * when going to D3 in WOL mode. Also used during initialization to set the - * PHY for normal operation. - */ -int et131x_setphy_normal(struct et131x_adapter *adapter) -{ - int status; - - DBG_ENTER(et131x_dbginfo); - - /* Make sure the PHY is powered up */ - ET1310_PhyPowerDown(adapter, 0); - status = et131x_xcvr_init(adapter); - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_xcvr_init - Init the phy if we are setting it into force mode - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -static int et131x_xcvr_init(struct et131x_adapter *adapter) -{ - int status = 0; - MI_IMR_t imr; - MI_ISR_t isr; - MI_LCR2_t lcr2; - - DBG_ENTER(et131x_dbginfo); - - /* Zero out the adapter structure variable representing BMSR */ - adapter->Bmsr.value = 0; - - MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, isr), &isr.value); - - MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, imr), &imr.value); - - /* Set the link status interrupt only. Bad behavior when link status - * and auto neg are set, we run into a nested interrupt problem - */ - imr.bits.int_en = 0x1; - imr.bits.link_status = 0x1; - imr.bits.autoneg_status = 0x1; - - MiWrite(adapter, (uint8_t) offsetof(MI_REGS_t, imr), imr.value); - - /* Set the LED behavior such that LED 1 indicates speed (off = - * 10Mbits, blink = 100Mbits, on = 1000Mbits) and LED 2 indicates - * link and activity (on for link, blink off for activity). - * - * NOTE: Some customizations have been added here for specific - * vendors; The LED behavior is now determined by vendor data in the - * EEPROM. However, the above description is the default. - */ - if ((adapter->eepromData[1] & 0x4) == 0) { - MiRead(adapter, (uint8_t) offsetof(MI_REGS_t, lcr2), - &lcr2.value); - if ((adapter->eepromData[1] & 0x8) == 0) - lcr2.bits.led_tx_rx = 0x3; - else - lcr2.bits.led_tx_rx = 0x4; - lcr2.bits.led_link = 0xa; - MiWrite(adapter, (uint8_t) offsetof(MI_REGS_t, lcr2), - lcr2.value); - } - - /* Determine if we need to go into a force mode and set it */ - if (adapter->AiForceSpeed == 0 && adapter->AiForceDpx == 0) { - if ((adapter->RegistryFlowControl == TxOnly) || - (adapter->RegistryFlowControl == Both)) { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_SET, 4, 11, NULL); - } else { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 11, NULL); - } - - if (adapter->RegistryFlowControl == Both) { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_SET, 4, 10, NULL); - } else { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 10, NULL); - } - - /* Set the phy to autonegotiation */ - ET1310_PhyAutoNeg(adapter, true); - - /* NOTE - Do we need this? */ - ET1310_PhyAccessMiBit(adapter, TRUEPHY_BIT_SET, 0, 9, NULL); - - DBG_LEAVE(et131x_dbginfo); - return status; - } else { - ET1310_PhyAutoNeg(adapter, false); - - /* Set to the correct force mode. */ - if (adapter->AiForceDpx != 1) { - if ((adapter->RegistryFlowControl == TxOnly) || - (adapter->RegistryFlowControl == Both)) { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_SET, 4, 11, - NULL); - } else { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 11, - NULL); - } - - if (adapter->RegistryFlowControl == Both) { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_SET, 4, 10, - NULL); - } else { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 10, - NULL); - } - } else { - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 10, NULL); - ET1310_PhyAccessMiBit(adapter, - TRUEPHY_BIT_CLEAR, 4, 11, NULL); - } - - switch (adapter->AiForceSpeed) { - case 10: - if (adapter->AiForceDpx == 1) { - TPAL_SetPhy10HalfDuplex(adapter); - } else if (adapter->AiForceDpx == 2) { - TPAL_SetPhy10FullDuplex(adapter); - } else { - TPAL_SetPhy10Force(adapter); - } - break; - case 100: - if (adapter->AiForceDpx == 1) { - TPAL_SetPhy100HalfDuplex(adapter); - } else if (adapter->AiForceDpx == 2) { - TPAL_SetPhy100FullDuplex(adapter); - } else { - TPAL_SetPhy100Force(adapter); - } - break; - case 1000: - TPAL_SetPhy1000FullDuplex(adapter); - break; - } - - DBG_LEAVE(et131x_dbginfo); - return status; - } -} - -void et131x_Mii_check(struct et131x_adapter *pAdapter, - MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints) -{ - uint8_t ucLinkStatus; - uint32_t uiAutoNegStatus; - uint32_t uiSpeed; - uint32_t uiDuplex; - uint32_t uiMdiMdix; - uint32_t uiMasterSlave; - uint32_t uiPolarity; - unsigned long lockflags; - - DBG_ENTER(et131x_dbginfo); - - if (bmsr_ints.bits.link_status) { - if (bmsr.bits.link_status) { - pAdapter->PoMgmt.TransPhyComaModeOnBoot = 20; - - /* Update our state variables and indicate the - * connected state - */ - spin_lock_irqsave(&pAdapter->Lock, lockflags); - - pAdapter->MediaState = NETIF_STATUS_MEDIA_CONNECT; - MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION); - - spin_unlock_irqrestore(&pAdapter->Lock, lockflags); - - /* Don't indicate state if we're in loopback mode */ - if (pAdapter->RegistryPhyLoopbk == false) { - netif_carrier_on(pAdapter->netdev); - } - } else { - DBG_WARNING(et131x_dbginfo, - "Link down cable problem\n"); - - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) { - // NOTE - Is there a way to query this without TruePHY? - // && TRU_QueryCoreType(pAdapter->hTruePhy, 0) == EMI_TRUEPHY_A13O) { - uint16_t Register18; - - MiRead(pAdapter, 0x12, &Register18); - MiWrite(pAdapter, 0x12, Register18 | 0x4); - MiWrite(pAdapter, 0x10, Register18 | 0x8402); - MiWrite(pAdapter, 0x11, Register18 | 511); - MiWrite(pAdapter, 0x12, Register18); - } - - /* For the first N seconds of life, we are in "link - * detection" When we are in this state, we should - * only report "connected". When the LinkDetection - * Timer expires, we can report disconnected (handled - * in the LinkDetectionDPC). - */ - if ((MP_IS_FLAG_CLEAR - (pAdapter, fMP_ADAPTER_LINK_DETECTION)) - || (pAdapter->MediaState == - NETIF_STATUS_MEDIA_DISCONNECT)) { - spin_lock_irqsave(&pAdapter->Lock, lockflags); - pAdapter->MediaState = - NETIF_STATUS_MEDIA_DISCONNECT; - spin_unlock_irqrestore(&pAdapter->Lock, - lockflags); - - /* Only indicate state if we're in loopback - * mode - */ - if (pAdapter->RegistryPhyLoopbk == false) { - netif_carrier_off(pAdapter->netdev); - } - } - - pAdapter->uiLinkSpeed = 0; - pAdapter->uiDuplexMode = 0; - - /* Free the packets being actively sent & stopped */ - et131x_free_busy_send_packets(pAdapter); - - /* Re-initialize the send structures */ - et131x_init_send(pAdapter); - - /* Reset the RFD list and re-start RU */ - et131x_reset_recv(pAdapter); - - /* - * Bring the device back to the state it was during - * init prior to autonegotiation being complete. This - * way, when we get the auto-neg complete interrupt, - * we can complete init by calling ConfigMacREGS2. - */ - et131x_soft_reset(pAdapter); - - /* Setup ET1310 as per the documentation */ - et131x_adapter_setup(pAdapter); - - /* Setup the PHY into coma mode until the cable is - * plugged back in - */ - if (pAdapter->RegistryPhyComa == 1) { - EnablePhyComa(pAdapter); - } - } - } - - if (bmsr_ints.bits.auto_neg_complete || - ((pAdapter->AiForceDpx == 3) && (bmsr_ints.bits.link_status))) { - if (bmsr.bits.auto_neg_complete || (pAdapter->AiForceDpx == 3)) { - ET1310_PhyLinkStatus(pAdapter, - &ucLinkStatus, &uiAutoNegStatus, - &uiSpeed, &uiDuplex, &uiMdiMdix, - &uiMasterSlave, &uiPolarity); - - pAdapter->uiLinkSpeed = uiSpeed; - pAdapter->uiDuplexMode = uiDuplex; - - DBG_TRACE(et131x_dbginfo, - "pAdapter->uiLinkSpeed 0x%04x, pAdapter->uiDuplex 0x%08x\n", - pAdapter->uiLinkSpeed, - pAdapter->uiDuplexMode); - - pAdapter->PoMgmt.TransPhyComaModeOnBoot = 20; - - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS) { - // NOTE - Is there a way to query this without TruePHY? - // && TRU_QueryCoreType(pAdapter->hTruePhy, 0) == EMI_TRUEPHY_A13O) { - uint16_t Register18; - - MiRead(pAdapter, 0x12, &Register18); - MiWrite(pAdapter, 0x12, Register18 | 0x4); - MiWrite(pAdapter, 0x10, Register18 | 0x8402); - MiWrite(pAdapter, 0x11, Register18 | 511); - MiWrite(pAdapter, 0x12, Register18); - } - - ConfigFlowControl(pAdapter); - - if ((pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) && - (pAdapter->RegistryJumboPacket > 2048)) - { - ET1310_PhyAndOrReg(pAdapter, 0x16, 0xcfff, - 0x2000); - } - - SetRxDmaTimer(pAdapter); - ConfigMACRegs2(pAdapter); - } - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy10HalfDuplex - Force the phy into 10 Base T Half Duplex mode. - * @pAdapter: pointer to the adapter structure - * - * Also sets the MAC so it is syncd up properly - */ -void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* First we need to turn off all other advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Set our advertise values accordingly */ - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_HALF); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy10FullDuplex - Force the phy into 10 Base T Full Duplex mode. - * @pAdapter: pointer to the adapter structure - * - * Also sets the MAC so it is syncd up properly - */ -void TPAL_SetPhy10FullDuplex(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* First we need to turn off all other advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Set our advertise values accordingly */ - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy10Force - Force Base-T FD mode WITHOUT using autonegotiation - * @pAdapter: pointer to the adapter structure - */ -void TPAL_SetPhy10Force(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* Disable autoneg */ - ET1310_PhyAutoNeg(pAdapter, false); - - /* Disable all advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Force 10 Mbps */ - ET1310_PhySpeedSelect(pAdapter, TRUEPHY_SPEED_10MBPS); - - /* Force Full duplex */ - ET1310_PhyDuplexMode(pAdapter, TRUEPHY_DUPLEX_FULL); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy100HalfDuplex - Force 100 Base T Half Duplex mode. - * @pAdapter: pointer to the adapter structure - * - * Also sets the MAC so it is syncd up properly. - */ -void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* first we need to turn off all other advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Set our advertise values accordingly */ - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_HALF); - - /* Set speed */ - ET1310_PhySpeedSelect(pAdapter, TRUEPHY_SPEED_100MBPS); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy100FullDuplex - Force 100 Base T Full Duplex mode. - * @pAdapter: pointer to the adapter structure - * - * Also sets the MAC so it is syncd up properly - */ -void TPAL_SetPhy100FullDuplex(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* First we need to turn off all other advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Set our advertise values accordingly */ - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy100Force - Force 100 BaseT FD mode WITHOUT using autonegotiation - * @pAdapter: pointer to the adapter structure - */ -void TPAL_SetPhy100Force(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* Disable autoneg */ - ET1310_PhyAutoNeg(pAdapter, false); - - /* Disable all advertisement */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* Force 100 Mbps */ - ET1310_PhySpeedSelect(pAdapter, TRUEPHY_SPEED_100MBPS); - - /* Force Full duplex */ - ET1310_PhyDuplexMode(pAdapter, TRUEPHY_DUPLEX_FULL); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhy1000FullDuplex - Force 1000 Base T Full Duplex mode - * @pAdapter: pointer to the adapter structure - * - * Also sets the MAC so it is syncd up properly. - */ -void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* first we need to turn off all other advertisement */ - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - - /* set our advertise values accordingly */ - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL); - - /* power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * TPAL_SetPhyAutoNeg - Set phy to autonegotiation mode. - * @pAdapter: pointer to the adapter structure - */ -void TPAL_SetPhyAutoNeg(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* Turn on advertisement of all capabilities */ - ET1310_PhyAdvertise10BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_BOTH); - - ET1310_PhyAdvertise100BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_BOTH); - - if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST) { - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL); - } else { - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - } - - /* Make sure auto-neg is ON (it is disabled in FORCE modes) */ - ET1310_PhyAutoNeg(pAdapter, true); - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - DBG_LEAVE(et131x_dbginfo); -} - - -/* - * The routines which follow provide low-level access to the PHY, and are used - * primarily by the routines above (although there are a few places elsewhere - * in the driver where this level of access is required). - */ - -static const uint16_t ConfigPhy[25][2] = { - /* Reg Value Register */ - /* Addr */ - {0x880B, 0x0926}, /* AfeIfCreg4B1000Msbs */ - {0x880C, 0x0926}, /* AfeIfCreg4B100Msbs */ - {0x880D, 0x0926}, /* AfeIfCreg4B10Msbs */ - - {0x880E, 0xB4D3}, /* AfeIfCreg4B1000Lsbs */ - {0x880F, 0xB4D3}, /* AfeIfCreg4B100Lsbs */ - {0x8810, 0xB4D3}, /* AfeIfCreg4B10Lsbs */ - - {0x8805, 0xB03E}, /* AfeIfCreg3B1000Msbs */ - {0x8806, 0xB03E}, /* AfeIfCreg3B100Msbs */ - {0x8807, 0xFF00}, /* AfeIfCreg3B10Msbs */ - - {0x8808, 0xE090}, /* AfeIfCreg3B1000Lsbs */ - {0x8809, 0xE110}, /* AfeIfCreg3B100Lsbs */ - {0x880A, 0x0000}, /* AfeIfCreg3B10Lsbs */ - - {0x300D, 1}, /* DisableNorm */ - - {0x280C, 0x0180}, /* LinkHoldEnd */ - - {0x1C21, 0x0002}, /* AlphaM */ - - {0x3821, 6}, /* FfeLkgTx0 */ - {0x381D, 1}, /* FfeLkg1g4 */ - {0x381E, 1}, /* FfeLkg1g5 */ - {0x381F, 1}, /* FfeLkg1g6 */ - {0x3820, 1}, /* FfeLkg1g7 */ - - {0x8402, 0x01F0}, /* Btinact */ - {0x800E, 20}, /* LftrainTime */ - {0x800F, 24}, /* DvguardTime */ - {0x8010, 46}, /* IdlguardTime */ - - {0, 0} - -}; - -/* condensed version of the phy initialization routine */ -void ET1310_PhyInit(struct et131x_adapter *pAdapter) -{ - uint16_t usData, usIndex; - - if (pAdapter == NULL) { - return; - } - - // get the identity (again ?) - MiRead(pAdapter, PHY_ID_1, &usData); - MiRead(pAdapter, PHY_ID_2, &usData); - - // what does this do/achieve ? - MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002 - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006); - - // read modem register 0402, should I do something with the return data ? - MiWrite(pAdapter, PHY_INDEX_REG, 0x0402); - MiRead(pAdapter, PHY_DATA_REG, &usData); - - // what does this do/achieve ? - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002); - - // get the identity (again ?) - MiRead(pAdapter, PHY_ID_1, &usData); - MiRead(pAdapter, PHY_ID_2, &usData); - - // what does this achieve ? - MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002 - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0006); - - // read modem register 0402, should I do something with the return data? - MiWrite(pAdapter, PHY_INDEX_REG, 0x0402); - MiRead(pAdapter, PHY_DATA_REG, &usData); - - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002); - - // what does this achieve (should return 0x1040) - MiRead(pAdapter, PHY_CONTROL, &usData); - MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0002 - MiWrite(pAdapter, PHY_CONTROL, 0x1840); - - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0007); - - // here the writing of the array starts.... - usIndex = 0; - while (ConfigPhy[usIndex][0] != 0x0000) { - // write value - MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]); - MiWrite(pAdapter, PHY_DATA_REG, ConfigPhy[usIndex][1]); - - // read it back - MiWrite(pAdapter, PHY_INDEX_REG, ConfigPhy[usIndex][0]); - MiRead(pAdapter, PHY_DATA_REG, &usData); - - // do a check on the value read back ? - usIndex++; - } - // here the writing of the array ends... - - MiRead(pAdapter, PHY_CONTROL, &usData); // 0x1840 - MiRead(pAdapter, PHY_MPHY_CONTROL_REG, &usData); // should read 0007 - MiWrite(pAdapter, PHY_CONTROL, 0x1040); - MiWrite(pAdapter, PHY_MPHY_CONTROL_REG, 0x0002); -} - -void ET1310_PhyReset(struct et131x_adapter *pAdapter) -{ - MiWrite(pAdapter, PHY_CONTROL, 0x8000); -} - -void ET1310_PhyPowerDown(struct et131x_adapter *pAdapter, bool down) -{ - uint16_t usData; - - MiRead(pAdapter, PHY_CONTROL, &usData); - - if (down == false) { - // Power UP - usData &= ~0x0800; - MiWrite(pAdapter, PHY_CONTROL, usData); - } else { - // Power DOWN - usData |= 0x0800; - MiWrite(pAdapter, PHY_CONTROL, usData); - } -} - -void ET1310_PhyAutoNeg(struct et131x_adapter *pAdapter, bool enable) -{ - uint16_t usData; - - MiRead(pAdapter, PHY_CONTROL, &usData); - - if (enable == true) { - // Autonegotiation ON - usData |= 0x1000; - MiWrite(pAdapter, PHY_CONTROL, usData); - } else { - // Autonegotiation OFF - usData &= ~0x1000; - MiWrite(pAdapter, PHY_CONTROL, usData); - } -} - -void ET1310_PhyDuplexMode(struct et131x_adapter *pAdapter, uint16_t duplex) -{ - uint16_t usData; - - MiRead(pAdapter, PHY_CONTROL, &usData); - - if (duplex == TRUEPHY_DUPLEX_FULL) { - // Set Full Duplex - usData |= 0x100; - MiWrite(pAdapter, PHY_CONTROL, usData); - } else { - // Set Half Duplex - usData &= ~0x100; - MiWrite(pAdapter, PHY_CONTROL, usData); - } -} - -void ET1310_PhySpeedSelect(struct et131x_adapter *pAdapter, uint16_t speed) -{ - uint16_t usData; - - // Read the PHY control register - MiRead(pAdapter, PHY_CONTROL, &usData); - - // Clear all Speed settings (Bits 6, 13) - usData &= ~0x2040; - - // Reset the speed bits based on user selection - switch (speed) { - case TRUEPHY_SPEED_10MBPS: - // Bits already cleared above, do nothing - break; - - case TRUEPHY_SPEED_100MBPS: - // 100M == Set bit 13 - usData |= 0x2000; - break; - - case TRUEPHY_SPEED_1000MBPS: - default: - usData |= 0x0040; - break; - } - - // Write back the new speed - MiWrite(pAdapter, PHY_CONTROL, usData); -} - -void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *pAdapter, - uint16_t duplex) -{ - uint16_t usData; - - // Read the PHY 1000 Base-T Control Register - MiRead(pAdapter, PHY_1000_CONTROL, &usData); - - // Clear Bits 8,9 - usData &= ~0x0300; - - switch (duplex) { - case TRUEPHY_ADV_DUPLEX_NONE: - // Duplex already cleared, do nothing - break; - - case TRUEPHY_ADV_DUPLEX_FULL: - // Set Bit 9 - usData |= 0x0200; - break; - - case TRUEPHY_ADV_DUPLEX_HALF: - // Set Bit 8 - usData |= 0x0100; - break; - - case TRUEPHY_ADV_DUPLEX_BOTH: - default: - usData |= 0x0300; - break; - } - - // Write back advertisement - MiWrite(pAdapter, PHY_1000_CONTROL, usData); -} - -void ET1310_PhyAdvertise100BaseT(struct et131x_adapter *pAdapter, - uint16_t duplex) -{ - uint16_t usData; - - // Read the Autonegotiation Register (10/100) - MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData); - - // Clear bits 7,8 - usData &= ~0x0180; - - switch (duplex) { - case TRUEPHY_ADV_DUPLEX_NONE: - // Duplex already cleared, do nothing - break; - - case TRUEPHY_ADV_DUPLEX_FULL: - // Set Bit 8 - usData |= 0x0100; - break; - - case TRUEPHY_ADV_DUPLEX_HALF: - // Set Bit 7 - usData |= 0x0080; - break; - - case TRUEPHY_ADV_DUPLEX_BOTH: - default: - // Set Bits 7,8 - usData |= 0x0180; - break; - } - - // Write back advertisement - MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData); -} - -void ET1310_PhyAdvertise10BaseT(struct et131x_adapter *pAdapter, - uint16_t duplex) -{ - uint16_t usData; - - // Read the Autonegotiation Register (10/100) - MiRead(pAdapter, PHY_AUTO_ADVERTISEMENT, &usData); - - // Clear bits 5,6 - usData &= ~0x0060; - - switch (duplex) { - case TRUEPHY_ADV_DUPLEX_NONE: - // Duplex already cleared, do nothing - break; - - case TRUEPHY_ADV_DUPLEX_FULL: - // Set Bit 6 - usData |= 0x0040; - break; - - case TRUEPHY_ADV_DUPLEX_HALF: - // Set Bit 5 - usData |= 0x0020; - break; - - case TRUEPHY_ADV_DUPLEX_BOTH: - default: - // Set Bits 5,6 - usData |= 0x0060; - break; - } - - // Write back advertisement - MiWrite(pAdapter, PHY_AUTO_ADVERTISEMENT, usData); -} - -void ET1310_PhyLinkStatus(struct et131x_adapter *pAdapter, - uint8_t *ucLinkStatus, - uint32_t *uiAutoNeg, - uint32_t *uiLinkSpeed, - uint32_t *uiDuplexMode, - uint32_t *uiMdiMdix, - uint32_t *uiMasterSlave, uint32_t *uiPolarity) -{ - uint16_t usMiStatus = 0; - uint16_t us1000BaseT = 0; - uint16_t usVmiPhyStatus = 0; - uint16_t usControl = 0; - - MiRead(pAdapter, PHY_STATUS, &usMiStatus); - MiRead(pAdapter, PHY_1000_STATUS, &us1000BaseT); - MiRead(pAdapter, PHY_PHY_STATUS, &usVmiPhyStatus); - MiRead(pAdapter, PHY_CONTROL, &usControl); - - if (ucLinkStatus) { - *ucLinkStatus = - (unsigned char)((usVmiPhyStatus & 0x0040) ? 1 : 0); - } - - if (uiAutoNeg) { - *uiAutoNeg = - (usControl & 0x1000) ? ((usVmiPhyStatus & 0x0020) ? - TRUEPHY_ANEG_COMPLETE : - TRUEPHY_ANEG_NOT_COMPLETE) : - TRUEPHY_ANEG_DISABLED; - } - - if (uiLinkSpeed) { - *uiLinkSpeed = (usVmiPhyStatus & 0x0300) >> 8; - } - - if (uiDuplexMode) { - *uiDuplexMode = (usVmiPhyStatus & 0x0080) >> 7; - } - - if (uiMdiMdix) { - /* NOTE: Need to complete this */ - *uiMdiMdix = 0; - } - - if (uiMasterSlave) { - *uiMasterSlave = - (us1000BaseT & 0x4000) ? TRUEPHY_CFG_MASTER : - TRUEPHY_CFG_SLAVE; - } - - if (uiPolarity) { - *uiPolarity = - (usVmiPhyStatus & 0x0400) ? TRUEPHY_POLARITY_INVERTED : - TRUEPHY_POLARITY_NORMAL; - } -} - -void ET1310_PhyAndOrReg(struct et131x_adapter *pAdapter, - uint16_t regnum, uint16_t andMask, uint16_t orMask) -{ - uint16_t reg; - - // Read the requested register - MiRead(pAdapter, regnum, &reg); - - // Apply the AND mask - reg &= andMask; - - // Apply the OR mask - reg |= orMask; - - // Write the value back to the register - MiWrite(pAdapter, regnum, reg); -} - -void ET1310_PhyAccessMiBit(struct et131x_adapter *pAdapter, uint16_t action, - uint16_t regnum, uint16_t bitnum, uint8_t *value) -{ - uint16_t reg; - uint16_t mask = 0; - - // Create a mask to isolate the requested bit - mask = 0x0001 << bitnum; - - // Read the requested register - MiRead(pAdapter, regnum, &reg); - - switch (action) { - case TRUEPHY_BIT_READ: - if (value != NULL) { - *value = (reg & mask) >> bitnum; - } - break; - - case TRUEPHY_BIT_SET: - reg |= mask; - MiWrite(pAdapter, regnum, reg); - break; - - case TRUEPHY_BIT_CLEAR: - reg &= ~mask; - MiWrite(pAdapter, regnum, reg); - break; - - default: - break; - } -} diff --git a/src/et131x/et1310_phy.h b/src/et131x/et1310_phy.h deleted file mode 100644 index d624cbb..0000000 --- a/src/et131x/et1310_phy.h +++ /dev/null @@ -1,910 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_phy.h - Defines, structs, enums, prototypes, etc. pertaining to the - * PHY. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef _ET1310_PHY_H_ -#define _ET1310_PHY_H_ - -#include "et1310_address_map.h" - -#define TRUEPHY_SUCCESS 0 -#define TRUEPHY_FAILURE 1 -typedef void *TRUEPHY_HANDLE; -typedef void *TRUEPHY_PLATFORM_HANDLE; -typedef void *TRUEPHY_OSAL_HANDLE; - -/* MI Register Addresses */ -#define MI_CONTROL_REG 0 -#define MI_STATUS_REG 1 -#define MI_PHY_IDENTIFIER_1_REG 2 -#define MI_PHY_IDENTIFIER_2_REG 3 -#define MI_AUTONEG_ADVERTISEMENT_REG 4 -#define MI_AUTONEG_LINK_PARTNER_ABILITY_REG 5 -#define MI_AUTONEG_EXPANSION_REG 6 -#define MI_AUTONEG_NEXT_PAGE_TRANSMIT_REG 7 -#define MI_LINK_PARTNER_NEXT_PAGE_REG 8 -#define MI_1000BASET_CONTROL_REG 9 -#define MI_1000BASET_STATUS_REG 10 -#define MI_RESERVED11_REG 11 -#define MI_RESERVED12_REG 12 -#define MI_RESERVED13_REG 13 -#define MI_RESERVED14_REG 14 -#define MI_EXTENDED_STATUS_REG 15 - -/* VMI Register Addresses */ -#define VMI_RESERVED16_REG 16 -#define VMI_RESERVED17_REG 17 -#define VMI_RESERVED18_REG 18 -#define VMI_LOOPBACK_CONTROL_REG 19 -#define VMI_RESERVED20_REG 20 -#define VMI_MI_CONTROL_REG 21 -#define VMI_PHY_CONFIGURATION_REG 22 -#define VMI_PHY_CONTROL_REG 23 -#define VMI_INTERRUPT_MASK_REG 24 -#define VMI_INTERRUPT_STATUS_REG 25 -#define VMI_PHY_STATUS_REG 26 -#define VMI_LED_CONTROL_1_REG 27 -#define VMI_LED_CONTROL_2_REG 28 -#define VMI_RESERVED29_REG 29 -#define VMI_RESERVED30_REG 30 -#define VMI_RESERVED31_REG 31 - -/* PHY Register Mapping(MI) Management Interface Regs */ -typedef struct _MI_REGS_t { - u8 bmcr; // Basic mode control reg(Reg 0x00) - u8 bmsr; // Basic mode status reg(Reg 0x01) - u8 idr1; // Phy identifier reg 1(Reg 0x02) - u8 idr2; // Phy identifier reg 2(Reg 0x03) - u8 anar; // Auto-Negotiation advertisement(Reg 0x04) - u8 anlpar; // Auto-Negotiation link Partner Ability(Reg 0x05) - u8 aner; // Auto-Negotiation expansion reg(Reg 0x06) - u8 annptr; // Auto-Negotiation next page transmit reg(Reg 0x07) - u8 lpnpr; // link partner next page reg(Reg 0x08) - u8 gcr; // Gigabit basic mode control reg(Reg 0x09) - u8 gsr; // Gigabit basic mode status reg(Reg 0x0A) - u8 mi_res1[4]; // Future use by MI working group(Reg 0x0B - 0x0E) - u8 esr; // Extended status reg(Reg 0x0F) - u8 mi_res2[3]; // Future use by MI working group(Reg 0x10 - 0x12) - u8 loop_ctl; // Loopback Control Reg(Reg 0x13) - u8 mi_res3; // Future use by MI working group(Reg 0x14) - u8 mcr; // MI Control Reg(Reg 0x15) - u8 pcr; // Configuration Reg(Reg 0x16) - u8 phy_ctl; // PHY Control Reg(Reg 0x17) - u8 imr; // Interrupt Mask Reg(Reg 0x18) - u8 isr; // Interrupt Status Reg(Reg 0x19) - u8 psr; // PHY Status Reg(Reg 0x1A) - u8 lcr1; // LED Control 1 Reg(Reg 0x1B) - u8 lcr2; // LED Control 2 Reg(Reg 0x1C) - u8 mi_res4[3]; // Future use by MI working group(Reg 0x1D - 0x1F) -} MI_REGS_t, *PMI_REGS_t; - -/* MI Register 0: Basic mode control register */ -typedef union _MI_BMCR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 reset:1; // bit 15 - u16 loopback:1; // bit 14 - u16 speed_sel:1; // bit 13 - u16 enable_autoneg:1; // bit 12 - u16 power_down:1; // bit 11 - u16 isolate:1; // bit 10 - u16 restart_autoneg:1; // bit 9 - u16 duplex_mode:1; // bit 8 - u16 col_test:1; // bit 7 - u16 speed_1000_sel:1; // bit 6 - u16 res1:6; // bits 0-5 -#else - u16 res1:6; // bits 0-5 - u16 speed_1000_sel:1; // bit 6 - u16 col_test:1; // bit 7 - u16 duplex_mode:1; // bit 8 - u16 restart_autoneg:1; // bit 9 - u16 isolate:1; // bit 10 - u16 power_down:1; // bit 11 - u16 enable_autoneg:1; // bit 12 - u16 speed_sel:1; // bit 13 - u16 loopback:1; // bit 14 - u16 reset:1; // bit 15 -#endif - } bits; -} MI_BMCR_t, *PMI_BMCR_t; - -/* MI Register 1: Basic mode status register */ -typedef union _MI_BMSR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 link_100T4:1; // bit 15 - u16 link_100fdx:1; // bit 14 - u16 link_100hdx:1; // bit 13 - u16 link_10fdx:1; // bit 12 - u16 link_10hdx:1; // bit 11 - u16 link_100T2fdx:1; // bit 10 - u16 link_100T2hdx:1; // bit 9 - u16 extend_status:1; // bit 8 - u16 res1:1; // bit 7 - u16 preamble_supress:1; // bit 6 - u16 auto_neg_complete:1; // bit 5 - u16 remote_fault:1; // bit 4 - u16 auto_neg_able:1; // bit 3 - u16 link_status:1; // bit 2 - u16 jabber_detect:1; // bit 1 - u16 ext_cap:1; // bit 0 -#else - u16 ext_cap:1; // bit 0 - u16 jabber_detect:1; // bit 1 - u16 link_status:1; // bit 2 - u16 auto_neg_able:1; // bit 3 - u16 remote_fault:1; // bit 4 - u16 auto_neg_complete:1; // bit 5 - u16 preamble_supress:1; // bit 6 - u16 res1:1; // bit 7 - u16 extend_status:1; // bit 8 - u16 link_100T2hdx:1; // bit 9 - u16 link_100T2fdx:1; // bit 10 - u16 link_10hdx:1; // bit 11 - u16 link_10fdx:1; // bit 12 - u16 link_100hdx:1; // bit 13 - u16 link_100fdx:1; // bit 14 - u16 link_100T4:1; // bit 15 -#endif - } bits; -} MI_BMSR_t, *PMI_BMSR_t; - -/* MI Register 2: Physical Identifier 1 */ -typedef union _MI_IDR1_t { - u16 value; - struct { - u16 ieee_address:16; // 0x0282 default(bits 0-15) - } bits; -} MI_IDR1_t, *PMI_IDR1_t; - -/* MI Register 3: Physical Identifier 2 */ -typedef union _MI_IDR2_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 ieee_address:6; // 111100 default(bits 10-15) - u16 model_no:6; // 000001 default(bits 4-9) - u16 rev_no:4; // 0010 default(bits 0-3) -#else - u16 rev_no:4; // 0010 default(bits 0-3) - u16 model_no:6; // 000001 default(bits 4-9) - u16 ieee_address:6; // 111100 default(bits 10-15) -#endif - } bits; -} MI_IDR2_t, *PMI_IDR2_t; - -/* MI Register 4: Auto-negotiation advertisement register */ -typedef union _MI_ANAR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 np_indication:1; // bit 15 - u16 res2:1; // bit 14 - u16 remote_fault:1; // bit 13 - u16 res1:1; // bit 12 - u16 cap_asmpause:1; // bit 11 - u16 cap_pause:1; // bit 10 - u16 cap_100T4:1; // bit 9 - u16 cap_100fdx:1; // bit 8 - u16 cap_100hdx:1; // bit 7 - u16 cap_10fdx:1; // bit 6 - u16 cap_10hdx:1; // bit 5 - u16 selector:5; // bits 0-4 -#else - u16 selector:5; // bits 0-4 - u16 cap_10hdx:1; // bit 5 - u16 cap_10fdx:1; // bit 6 - u16 cap_100hdx:1; // bit 7 - u16 cap_100fdx:1; // bit 8 - u16 cap_100T4:1; // bit 9 - u16 cap_pause:1; // bit 10 - u16 cap_asmpause:1; // bit 11 - u16 res1:1; // bit 12 - u16 remote_fault:1; // bit 13 - u16 res2:1; // bit 14 - u16 np_indication:1; // bit 15 -#endif - } bits; -} MI_ANAR_t, *PMI_ANAR_t; - -/* MI Register 5: Auto-negotiation link partner advertisement register */ -typedef struct _MI_ANLPAR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 np_indication:1; // bit 15 - u16 acknowledge:1; // bit 14 - u16 remote_fault:1; // bit 13 - u16 res1:1; // bit 12 - u16 cap_asmpause:1; // bit 11 - u16 cap_pause:1; // bit 10 - u16 cap_100T4:1; // bit 9 - u16 cap_100fdx:1; // bit 8 - u16 cap_100hdx:1; // bit 7 - u16 cap_10fdx:1; // bit 6 - u16 cap_10hdx:1; // bit 5 - u16 selector:5; // bits 0-4 -#else - u16 selector:5; // bits 0-4 - u16 cap_10hdx:1; // bit 5 - u16 cap_10fdx:1; // bit 6 - u16 cap_100hdx:1; // bit 7 - u16 cap_100fdx:1; // bit 8 - u16 cap_100T4:1; // bit 9 - u16 cap_pause:1; // bit 10 - u16 cap_asmpause:1; // bit 11 - u16 res1:1; // bit 12 - u16 remote_fault:1; // bit 13 - u16 acknowledge:1; // bit 14 - u16 np_indication:1; // bit 15 -#endif - } bits; -} MI_ANLPAR_t, *PMI_ANLPAR_t; - -/* MI Register 6: Auto-negotiation expansion register */ -typedef union _MI_ANER_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res:11; // bits 5-15 - u16 pdf:1; // bit 4 - u16 lp_np_able:1; // bit 3 - u16 np_able:1; // bit 2 - u16 page_rx:1; // bit 1 - u16 lp_an_able:1; // bit 0 -#else - u16 lp_an_able:1; // bit 0 - u16 page_rx:1; // bit 1 - u16 np_able:1; // bit 2 - u16 lp_np_able:1; // bit 3 - u16 pdf:1; // bit 4 - u16 res:11; // bits 5-15 -#endif - } bits; -} MI_ANER_t, *PMI_ANER_t; - -/* MI Register 7: Auto-negotiation next page transmit reg(0x07) */ -typedef union _MI_ANNPTR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 np:1; // bit 15 - u16 res1:1; // bit 14 - u16 msg_page:1; // bit 13 - u16 ack2:1; // bit 12 - u16 toggle:1; // bit 11 - u16 msg:11; // bits 0-10 -#else - u16 msg:11; // bits 0-10 - u16 toggle:1; // bit 11 - u16 ack2:1; // bit 12 - u16 msg_page:1; // bit 13 - u16 res1:1; // bit 14 - u16 np:1; // bit 15 -#endif - } bits; -} MI_ANNPTR_t, *PMI_ANNPTR_t; - -/* MI Register 8: Link Partner Next Page Reg(0x08) */ -typedef union _MI_LPNPR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 np:1; // bit 15 - u16 ack:1; // bit 14 - u16 msg_page:1; // bit 13 - u16 ack2:1; // bit 12 - u16 toggle:1; // bit 11 - u16 msg:11; // bits 0-10 -#else - u16 msg:11; // bits 0-10 - u16 toggle:1; // bit 11 - u16 ack2:1; // bit 12 - u16 msg_page:1; // bit 13 - u16 ack:1; // bit 14 - u16 np:1; // bit 15 -#endif - } bits; -} MI_LPNPR_t, *PMI_LPNPR_t; - -/* MI Register 9: 1000BaseT Control Reg(0x09) */ -typedef union _MI_GCR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 test_mode:3; // bits 13-15 - u16 ms_config_en:1; // bit 12 - u16 ms_value:1; // bit 11 - u16 port_type:1; // bit 10 - u16 link_1000fdx:1; // bit 9 - u16 link_1000hdx:1; // bit 8 - u16 res:8; // bit 0-7 -#else - u16 res:8; // bit 0-7 - u16 link_1000hdx:1; // bit 8 - u16 link_1000fdx:1; // bit 9 - u16 port_type:1; // bit 10 - u16 ms_value:1; // bit 11 - u16 ms_config_en:1; // bit 12 - u16 test_mode:3; // bits 13-15 -#endif - } bits; -} MI_GCR_t, *PMI_GCR_t; - -/* MI Register 10: 1000BaseT Status Reg(0x0A) */ -typedef union _MI_GSR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 ms_config_fault:1; // bit 15 - u16 ms_resolve:1; // bit 14 - u16 local_rx_status:1; // bit 13 - u16 remote_rx_status:1; // bit 12 - u16 link_1000fdx:1; // bit 11 - u16 link_1000hdx:1; // bit 10 - u16 res:2; // bits 8-9 - u16 idle_err_cnt:8; // bits 0-7 -#else - u16 idle_err_cnt:8; // bits 0-7 - u16 res:2; // bits 8-9 - u16 link_1000hdx:1; // bit 10 - u16 link_1000fdx:1; // bit 11 - u16 remote_rx_status:1; // bit 12 - u16 local_rx_status:1; // bit 13 - u16 ms_resolve:1; // bit 14 - u16 ms_config_fault:1; // bit 15 -#endif - } bits; -} MI_GSR_t, *PMI_GSR_t; - -/* MI Register 11 - 14: Reserved Regs(0x0B - 0x0E) */ -typedef union _MI_RES_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res15:1; // bit 15 - u16 res14:1; // bit 14 - u16 res13:1; // bit 13 - u16 res12:1; // bit 12 - u16 res11:1; // bit 11 - u16 res10:1; // bit 10 - u16 res9:1; // bit 9 - u16 res8:1; // bit 8 - u16 res7:1; // bit 7 - u16 res6:1; // bit 6 - u16 res5:1; // bit 5 - u16 res4:1; // bit 4 - u16 res3:1; // bit 3 - u16 res2:1; // bit 2 - u16 res1:1; // bit 1 - u16 res0:1; // bit 0 -#else - u16 res0:1; // bit 0 - u16 res1:1; // bit 1 - u16 res2:1; // bit 2 - u16 res3:1; // bit 3 - u16 res4:1; // bit 4 - u16 res5:1; // bit 5 - u16 res6:1; // bit 6 - u16 res7:1; // bit 7 - u16 res8:1; // bit 8 - u16 res9:1; // bit 9 - u16 res10:1; // bit 10 - u16 res11:1; // bit 11 - u16 res12:1; // bit 12 - u16 res13:1; // bit 13 - u16 res14:1; // bit 14 - u16 res15:1; // bit 15 -#endif - } bits; -} MI_RES_t, *PMI_RES_t; - -/* MI Register 15: Extended status Reg(0x0F) */ -typedef union _MI_ESR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 link_1000Xfdx:1; // bit 15 - u16 link_1000Xhdx:1; // bit 14 - u16 link_1000fdx:1; // bit 13 - u16 link_1000hdx:1; // bit 12 - u16 res:12; // bit 0-11 -#else - u16 res:12; // bit 0-11 - u16 link_1000hdx:1; // bit 12 - u16 link_1000fdx:1; // bit 13 - u16 link_1000Xhdx:1; // bit 14 - u16 link_1000Xfdx:1; // bit 15 -#endif - } bits; -} MI_ESR_t, *PMI_ESR_t; - -/* MI Register 16 - 18: Reserved Reg(0x10-0x12) */ - -/* MI Register 19: Loopback Control Reg(0x13) */ -typedef union _MI_LCR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 mii_en:1; // bit 15 - u16 pcs_en:1; // bit 14 - u16 pmd_en:1; // bit 13 - u16 all_digital_en:1; // bit 12 - u16 replica_en:1; // bit 11 - u16 line_driver_en:1; // bit 10 - u16 res:10; // bit 0-9 -#else - u16 res:10; // bit 0-9 - u16 line_driver_en:1; // bit 10 - u16 replica_en:1; // bit 11 - u16 all_digital_en:1; // bit 12 - u16 pmd_en:1; // bit 13 - u16 pcs_en:1; // bit 14 - u16 mii_en:1; // bit 15 -#endif - } bits; -} MI_LCR_t, *PMI_LCR_t; - -/* MI Register 20: Reserved Reg(0x14) */ - -/* MI Register 21: Management Interface Control Reg(0x15) */ -typedef union _MI_MICR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:5; // bits 11-15 - u16 mi_error_count:7; // bits 4-10 - u16 res2:1; // bit 3 - u16 ignore_10g_fr:1; // bit 2 - u16 res3:1; // bit 1 - u16 preamble_supress_en:1; // bit 0 -#else - u16 preamble_supress_en:1; // bit 0 - u16 res3:1; // bit 1 - u16 ignore_10g_fr:1; // bit 2 - u16 res2:1; // bit 3 - u16 mi_error_count:7; // bits 4-10 - u16 res1:5; // bits 11-15 -#endif - } bits; -} MI_MICR_t, *PMI_MICR_t; - -/* MI Register 22: PHY Configuration Reg(0x16) */ -typedef union _MI_PHY_CONFIG_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 crs_tx_en:1; // bit 15 - u16 res1:1; // bit 14 - u16 tx_fifo_depth:2; // bits 12-13 - u16 speed_downshift:2; // bits 10-11 - u16 pbi_detect:1; // bit 9 - u16 tbi_rate:1; // bit 8 - u16 alternate_np:1; // bit 7 - u16 group_mdio_en:1; // bit 6 - u16 tx_clock_en:1; // bit 5 - u16 sys_clock_en:1; // bit 4 - u16 res2:1; // bit 3 - u16 mac_if_mode:3; // bits 0-2 -#else - u16 mac_if_mode:3; // bits 0-2 - u16 res2:1; // bit 3 - u16 sys_clock_en:1; // bit 4 - u16 tx_clock_en:1; // bit 5 - u16 group_mdio_en:1; // bit 6 - u16 alternate_np:1; // bit 7 - u16 tbi_rate:1; // bit 8 - u16 pbi_detect:1; // bit 9 - u16 speed_downshift:2; // bits 10-11 - u16 tx_fifo_depth:2; // bits 12-13 - u16 res1:1; // bit 14 - u16 crs_tx_en:1; // bit 15 -#endif - } bits; -} MI_PHY_CONFIG_t, *PMI_PHY_CONFIG_t; - -/* MI Register 23: PHY CONTROL Reg(0x17) */ -typedef union _MI_PHY_CONTROL_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:1; // bit 15 - u16 tdr_en:1; // bit 14 - u16 res2:1; // bit 13 - u16 downshift_attempts:2; // bits 11-12 - u16 res3:5; // bit 6-10 - u16 jabber_10baseT:1; // bit 5 - u16 sqe_10baseT:1; // bit 4 - u16 tp_loopback_10baseT:1; // bit 3 - u16 preamble_gen_en:1; // bit 2 - u16 res4:1; // bit 1 - u16 force_int:1; // bit 0 -#else - u16 force_int:1; // bit 0 - u16 res4:1; // bit 1 - u16 preamble_gen_en:1; // bit 2 - u16 tp_loopback_10baseT:1; // bit 3 - u16 sqe_10baseT:1; // bit 4 - u16 jabber_10baseT:1; // bit 5 - u16 res3:5; // bit 6-10 - u16 downshift_attempts:2; // bits 11-12 - u16 res2:1; // bit 13 - u16 tdr_en:1; // bit 14 - u16 res1:1; // bit 15 -#endif - } bits; -} MI_PHY_CONTROL_t, *PMI_PHY_CONTROL_t; - -/* MI Register 24: Interrupt Mask Reg(0x18) */ -typedef union _MI_IMR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:6; // bits 10-15 - u16 mdio_sync_lost:1; // bit 9 - u16 autoneg_status:1; // bit 8 - u16 hi_bit_err:1; // bit 7 - u16 np_rx:1; // bit 6 - u16 err_counter_full:1; // bit 5 - u16 fifo_over_underflow:1; // bit 4 - u16 rx_status:1; // bit 3 - u16 link_status:1; // bit 2 - u16 automatic_speed:1; // bit 1 - u16 int_en:1; // bit 0 -#else - u16 int_en:1; // bit 0 - u16 automatic_speed:1; // bit 1 - u16 link_status:1; // bit 2 - u16 rx_status:1; // bit 3 - u16 fifo_over_underflow:1; // bit 4 - u16 err_counter_full:1; // bit 5 - u16 np_rx:1; // bit 6 - u16 hi_bit_err:1; // bit 7 - u16 autoneg_status:1; // bit 8 - u16 mdio_sync_lost:1; // bit 9 - u16 res1:6; // bits 10-15 -#endif - } bits; -} MI_IMR_t, *PMI_IMR_t; - -/* MI Register 25: Interrupt Status Reg(0x19) */ -typedef union _MI_ISR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:6; // bits 10-15 - u16 mdio_sync_lost:1; // bit 9 - u16 autoneg_status:1; // bit 8 - u16 hi_bit_err:1; // bit 7 - u16 np_rx:1; // bit 6 - u16 err_counter_full:1; // bit 5 - u16 fifo_over_underflow:1; // bit 4 - u16 rx_status:1; // bit 3 - u16 link_status:1; // bit 2 - u16 automatic_speed:1; // bit 1 - u16 int_en:1; // bit 0 -#else - u16 int_en:1; // bit 0 - u16 automatic_speed:1; // bit 1 - u16 link_status:1; // bit 2 - u16 rx_status:1; // bit 3 - u16 fifo_over_underflow:1; // bit 4 - u16 err_counter_full:1; // bit 5 - u16 np_rx:1; // bit 6 - u16 hi_bit_err:1; // bit 7 - u16 autoneg_status:1; // bit 8 - u16 mdio_sync_lost:1; // bit 9 - u16 res1:6; // bits 10-15 -#endif - } bits; -} MI_ISR_t, *PMI_ISR_t; - -/* MI Register 26: PHY Status Reg(0x1A) */ -typedef union _MI_PSR_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:1; // bit 15 - u16 autoneg_fault:2; // bit 13-14 - u16 autoneg_status:1; // bit 12 - u16 mdi_x_status:1; // bit 11 - u16 polarity_status:1; // bit 10 - u16 speed_status:2; // bits 8-9 - u16 duplex_status:1; // bit 7 - u16 link_status:1; // bit 6 - u16 tx_status:1; // bit 5 - u16 rx_status:1; // bit 4 - u16 collision_status:1; // bit 3 - u16 autoneg_en:1; // bit 2 - u16 pause_en:1; // bit 1 - u16 asymmetric_dir:1; // bit 0 -#else - u16 asymmetric_dir:1; // bit 0 - u16 pause_en:1; // bit 1 - u16 autoneg_en:1; // bit 2 - u16 collision_status:1; // bit 3 - u16 rx_status:1; // bit 4 - u16 tx_status:1; // bit 5 - u16 link_status:1; // bit 6 - u16 duplex_status:1; // bit 7 - u16 speed_status:2; // bits 8-9 - u16 polarity_status:1; // bit 10 - u16 mdi_x_status:1; // bit 11 - u16 autoneg_status:1; // bit 12 - u16 autoneg_fault:2; // bit 13-14 - u16 res1:1; // bit 15 -#endif - } bits; -} MI_PSR_t, *PMI_PSR_t; - -/* MI Register 27: LED Control Reg 1(0x1B) */ -typedef union _MI_LCR1_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 res1:2; // bits 14-15 - u16 led_dup_indicate:2; // bits 12-13 - u16 led_10baseT:2; // bits 10-11 - u16 led_collision:2; // bits 8-9 - u16 res2:2; // bits 6-7 - u16 res3:2; // bits 4-5 - u16 pulse_dur:2; // bits 2-3 - u16 pulse_stretch1:1; // bit 1 - u16 pulse_stretch0:1; // bit 0 -#else - u16 pulse_stretch0:1; // bit 0 - u16 pulse_stretch1:1; // bit 1 - u16 pulse_dur:2; // bits 2-3 - u16 res3:2; // bits 4-5 - u16 res2:2; // bits 6-7 - u16 led_collision:2; // bits 8-9 - u16 led_10baseT:2; // bits 10-11 - u16 led_dup_indicate:2; // bits 12-13 - u16 res1:2; // bits 14-15 -#endif - } bits; -} MI_LCR1_t, *PMI_LCR1_t; - -/* MI Register 28: LED Control Reg 2(0x1C) */ -typedef union _MI_LCR2_t { - u16 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u16 led_link:4; // bits 12-15 - u16 led_tx_rx:4; // bits 8-11 - u16 led_100BaseTX:4; // bits 4-7 - u16 led_1000BaseT:4; // bits 0-3 -#else - u16 led_1000BaseT:4; // bits 0-3 - u16 led_100BaseTX:4; // bits 4-7 - u16 led_tx_rx:4; // bits 8-11 - u16 led_link:4; // bits 12-15 -#endif - } bits; -} MI_LCR2_t, *PMI_LCR2_t; - -/* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */ - -/* TruePHY headers */ -typedef struct _TRUEPHY_ACCESS_MI_REGS_ { - TRUEPHY_HANDLE hTruePhy; - int32_t nPhyId; - u8 bReadWrite; - u8 *pbyRegs; - u8 *pwData; - int32_t nRegCount; -} TRUEPHY_ACCESS_MI_REGS, *PTRUEPHY_ACCESS_MI_REGS; - -/* TruePHY headers */ -typedef struct _TAG_TPAL_ACCESS_MI_REGS_ { - u32 nPhyId; - u8 bReadWrite; - u32 nRegCount; - u16 Data[4096]; - u8 Regs[4096]; -} TPAL_ACCESS_MI_REGS, *PTPAL_ACCESS_MI_REGS; - - -typedef TRUEPHY_HANDLE TPAL_HANDLE; - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -/* OS Specific Functions*/ -void TPAL_SetPhy10HalfDuplex(struct et131x_adapter *adapter); -void TPAL_SetPhy10FullDuplex(struct et131x_adapter *adapter); -void TPAL_SetPhy10Force(struct et131x_adapter *pAdapter); -void TPAL_SetPhy100HalfDuplex(struct et131x_adapter *adapter); -void TPAL_SetPhy100FullDuplex(struct et131x_adapter *adapter); -void TPAL_SetPhy100Force(struct et131x_adapter *pAdapter); -void TPAL_SetPhy1000FullDuplex(struct et131x_adapter *adapter); -void TPAL_SetPhyAutoNeg(struct et131x_adapter *adapter); - -/* Prototypes for ET1310_phy.c */ -int et131x_xcvr_find(struct et131x_adapter *adapter); -int et131x_setphy_normal(struct et131x_adapter *adapter); -int32_t PhyMiRead(struct et131x_adapter *adapter, - u8 xcvrAddr, u8 xcvrReg, u16 *value); - -/* static inline function does not work because et131x_adapter is not always - * defined - */ -#define MiRead(adapter, xcvrReg, value) \ - PhyMiRead((adapter), (adapter)->Stats.xcvr_addr, (xcvrReg), (value)) - -int32_t MiWrite(struct et131x_adapter *adapter, - u8 xcvReg, u16 value); -void et131x_Mii_check(struct et131x_adapter *pAdapter, - MI_BMSR_t bmsr, MI_BMSR_t bmsr_ints); - -/* This last is not strictly required (the driver could call the TPAL - * version instead), but this sets the adapter up correctly, and calls the - * access routine indirectly. This protects the driver from changes in TPAL. - */ -void SetPhy_10BaseTHalfDuplex(struct et131x_adapter *adapter); - -/* Defines for PHY access routines */ - -// Define bit operation flags -#define TRUEPHY_BIT_CLEAR 0 -#define TRUEPHY_BIT_SET 1 -#define TRUEPHY_BIT_READ 2 - -// Define read/write operation flags -#ifndef TRUEPHY_READ -#define TRUEPHY_READ 0 -#define TRUEPHY_WRITE 1 -#define TRUEPHY_MASK 2 -#endif - -// Define speeds -#define TRUEPHY_SPEED_10MBPS 0 -#define TRUEPHY_SPEED_100MBPS 1 -#define TRUEPHY_SPEED_1000MBPS 2 - -// Define duplex modes -#define TRUEPHY_DUPLEX_HALF 0 -#define TRUEPHY_DUPLEX_FULL 1 - -// Define master/slave configuration values -#define TRUEPHY_CFG_SLAVE 0 -#define TRUEPHY_CFG_MASTER 1 - -// Define MDI/MDI-X settings -#define TRUEPHY_MDI 0 -#define TRUEPHY_MDIX 1 -#define TRUEPHY_AUTO_MDI_MDIX 2 - -// Define 10Base-T link polarities -#define TRUEPHY_POLARITY_NORMAL 0 -#define TRUEPHY_POLARITY_INVERTED 1 - -// Define auto-negotiation results -#define TRUEPHY_ANEG_NOT_COMPLETE 0 -#define TRUEPHY_ANEG_COMPLETE 1 -#define TRUEPHY_ANEG_DISABLED 2 - -/* Define duplex advertisment flags */ -#define TRUEPHY_ADV_DUPLEX_NONE 0x00 -#define TRUEPHY_ADV_DUPLEX_FULL 0x01 -#define TRUEPHY_ADV_DUPLEX_HALF 0x02 -#define TRUEPHY_ADV_DUPLEX_BOTH \ - (TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF) - -#define PHY_CONTROL 0x00 //#define TRU_MI_CONTROL_REGISTER 0 -#define PHY_STATUS 0x01 //#define TRU_MI_STATUS_REGISTER 1 -#define PHY_ID_1 0x02 //#define TRU_MI_PHY_IDENTIFIER_1_REGISTER 2 -#define PHY_ID_2 0x03 //#define TRU_MI_PHY_IDENTIFIER_2_REGISTER 3 -#define PHY_AUTO_ADVERTISEMENT 0x04 //#define TRU_MI_ADVERTISEMENT_REGISTER 4 -#define PHY_AUTO_LINK_PARTNER 0x05 //#define TRU_MI_LINK_PARTNER_ABILITY_REGISTER 5 -#define PHY_AUTO_EXPANSION 0x06 //#define TRU_MI_EXPANSION_REGISTER 6 -#define PHY_AUTO_NEXT_PAGE_TX 0x07 //#define TRU_MI_NEXT_PAGE_TRANSMIT_REGISTER 7 -#define PHY_LINK_PARTNER_NEXT_PAGE 0x08 //#define TRU_MI_LINK_PARTNER_NEXT_PAGE_REGISTER 8 -#define PHY_1000_CONTROL 0x09 //#define TRU_MI_1000BASET_CONTROL_REGISTER 9 -#define PHY_1000_STATUS 0x0A //#define TRU_MI_1000BASET_STATUS_REGISTER 10 - -#define PHY_EXTENDED_STATUS 0x0F //#define TRU_MI_EXTENDED_STATUS_REGISTER 15 - -// some defines for modem registers that seem to be 'reserved' -#define PHY_INDEX_REG 0x10 -#define PHY_DATA_REG 0x11 - -#define PHY_MPHY_CONTROL_REG 0x12 //#define TRU_VMI_MPHY_CONTROL_REGISTER 18 - -#define PHY_LOOPBACK_CONTROL 0x13 //#define TRU_VMI_LOOPBACK_CONTROL_1_REGISTER 19 - //#define TRU_VMI_LOOPBACK_CONTROL_2_REGISTER 20 -#define PHY_REGISTER_MGMT_CONTROL 0x15 //#define TRU_VMI_MI_SEQ_CONTROL_REGISTER 21 -#define PHY_CONFIG 0x16 //#define TRU_VMI_CONFIGURATION_REGISTER 22 -#define PHY_PHY_CONTROL 0x17 //#define TRU_VMI_PHY_CONTROL_REGISTER 23 -#define PHY_INTERRUPT_MASK 0x18 //#define TRU_VMI_INTERRUPT_MASK_REGISTER 24 -#define PHY_INTERRUPT_STATUS 0x19 //#define TRU_VMI_INTERRUPT_STATUS_REGISTER 25 -#define PHY_PHY_STATUS 0x1A //#define TRU_VMI_PHY_STATUS_REGISTER 26 -#define PHY_LED_1 0x1B //#define TRU_VMI_LED_CONTROL_1_REGISTER 27 -#define PHY_LED_2 0x1C //#define TRU_VMI_LED_CONTROL_2_REGISTER 28 - //#define TRU_VMI_LINK_CONTROL_REGISTER 29 - //#define TRU_VMI_TIMING_CONTROL_REGISTER - -/* Prototypes for PHY access routines */ -void ET1310_PhyInit(struct et131x_adapter *adapter); -void ET1310_PhyReset(struct et131x_adapter *adapter); -void ET1310_PhyPowerDown(struct et131x_adapter *adapter, bool down); -void ET1310_PhyAutoNeg(struct et131x_adapter *adapter, bool enable); -void ET1310_PhyDuplexMode(struct et131x_adapter *adapter, u16 duplex); -void ET1310_PhySpeedSelect(struct et131x_adapter *adapter, u16 speed); -void ET1310_PhyAdvertise1000BaseT(struct et131x_adapter *adapter, - u16 duplex); -void ET1310_PhyAdvertise100BaseT(struct et131x_adapter *adapter, - u16 duplex); -void ET1310_PhyAdvertise10BaseT(struct et131x_adapter *adapter, - u16 duplex); -void ET1310_PhyLinkStatus(struct et131x_adapter *adapter, - u8 *ucLinkStatus, - u32 *uiAutoNeg, - u32 *uiLinkSpeed, - u32 *uiDuplexMode, - u32 *uiMdiMdix, - u32 *uiMasterSlave, u32 *uiPolarity); -void ET1310_PhyAndOrReg(struct et131x_adapter *adapter, - u16 regnum, u16 andMask, u16 orMask); -void ET1310_PhyAccessMiBit(struct et131x_adapter *adapter, - u16 action, - u16 regnum, u16 bitnum, u8 *value); - -#endif /* _ET1310_PHY_H_ */ diff --git a/src/et131x/et1310_pm.c b/src/et131x/et1310_pm.c deleted file mode 100644 index 9539bc6..0000000 --- a/src/et131x/et1310_pm.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_pm.c - All power management related code (not completely implemented) - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" -#include "et1310_mac.h" -#include "et1310_rx.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/** - * EnablePhyComa - called when network cable is unplugged - * @pAdapter: pointer to our adapter structure - * - * driver receive an phy status change interrupt while in D0 and check that - * phy_status is down. - * - * -- gate off JAGCore; - * -- set gigE PHY in Coma mode - * -- wake on phy_interrupt; Perform software reset JAGCore, - * re-initialize jagcore and gigE PHY - * - * Add D0-ASPM-PhyLinkDown Support: - * -- while in D0, when there is a phy_interrupt indicating phy link - * down status, call the MPSetPhyComa routine to enter this active - * state power saving mode - * -- while in D0-ASPM-PhyLinkDown mode, when there is a phy_interrupt - * indicating linkup status, call the MPDisablePhyComa routine to - * restore JAGCore and gigE PHY - */ -void EnablePhyComa(struct et131x_adapter *pAdapter) -{ - unsigned long lockflags; - PM_CSR_t GlobalPmCSR; - int32_t LoopCounter = 10; - - DBG_ENTER(et131x_dbginfo); - - GlobalPmCSR.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - - /* Save the GbE PHY speed and duplex modes. Need to restore this - * when cable is plugged back in - */ - pAdapter->PoMgmt.PowerDownSpeed = pAdapter->AiForceSpeed; - pAdapter->PoMgmt.PowerDownDuplex = pAdapter->AiForceDpx; - - /* Stop sending packets. */ - spin_lock_irqsave(&pAdapter->SendHWLock, lockflags); - MP_SET_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER); - spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags); - - /* Wait for outstanding Receive packets */ - while ((MP_GET_RCV_REF(pAdapter) != 0) && (LoopCounter-- > 0)) { - mdelay(2); - } - - /* Gate off JAGCore 3 clock domains */ - GlobalPmCSR.bits.pm_sysclk_gate = 0; - GlobalPmCSR.bits.pm_txclk_gate = 0; - GlobalPmCSR.bits.pm_rxclk_gate = 0; - writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value); - - /* Program gigE PHY in to Coma mode */ - GlobalPmCSR.bits.pm_phy_sw_coma = 1; - writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * DisablePhyComa - Disable the Phy Coma Mode - * @pAdapter: pointer to our adapter structure - */ -void DisablePhyComa(struct et131x_adapter *pAdapter) -{ - PM_CSR_t GlobalPmCSR; - - DBG_ENTER(et131x_dbginfo); - - GlobalPmCSR.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - - /* Disable phy_sw_coma register and re-enable JAGCore clocks */ - GlobalPmCSR.bits.pm_sysclk_gate = 1; - GlobalPmCSR.bits.pm_txclk_gate = 1; - GlobalPmCSR.bits.pm_rxclk_gate = 1; - GlobalPmCSR.bits.pm_phy_sw_coma = 0; - writel(GlobalPmCSR.value, &pAdapter->CSRAddress->global.pm_csr.value); - - /* Restore the GbE PHY speed and duplex modes; - * Reset JAGCore; re-configure and initialize JAGCore and gigE PHY - */ - pAdapter->AiForceSpeed = pAdapter->PoMgmt.PowerDownSpeed; - pAdapter->AiForceDpx = pAdapter->PoMgmt.PowerDownDuplex; - - /* Re-initialize the send structures */ - et131x_init_send(pAdapter); - - /* Reset the RFD list and re-start RU */ - et131x_reset_recv(pAdapter); - - /* Bring the device back to the state it was during init prior to - * autonegotiation being complete. This way, when we get the auto-neg - * complete interrupt, we can complete init by calling ConfigMacREGS2. - */ - et131x_soft_reset(pAdapter); - - /* setup et1310 as per the documentation ?? */ - et131x_adapter_setup(pAdapter); - - /* Allow Tx to restart */ - MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LOWER_POWER); - - /* Need to re-enable Rx. */ - et131x_rx_dma_enable(pAdapter); - - DBG_LEAVE(et131x_dbginfo); -} - diff --git a/src/et131x/et1310_pm.h b/src/et131x/et1310_pm.h deleted file mode 100644 index 6802338..0000000 --- a/src/et131x/et1310_pm.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_pm.h - Defines, structs, enums, prototypes, etc. pertaining to power - * management. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef _ET1310_PM_H_ -#define _ET1310_PM_H_ - -#include "et1310_address_map.h" - -#define MAX_WOL_PACKET_SIZE 0x80 -#define MAX_WOL_MASK_SIZE ( MAX_WOL_PACKET_SIZE / 8 ) -#define NUM_WOL_PATTERNS 0x5 -#define CRC16_POLY 0x1021 - -/* Definition of NDIS_DEVICE_POWER_STATE */ -typedef enum { - NdisDeviceStateUnspecified = 0, - NdisDeviceStateD0, - NdisDeviceStateD1, - NdisDeviceStateD2, - NdisDeviceStateD3 -} NDIS_DEVICE_POWER_STATE; - -typedef struct _MP_POWER_MGMT { - /* variable putting the phy into coma mode when boot up with no cable - * plugged in after 5 seconds - */ - u8 TransPhyComaModeOnBoot; - - /* Array holding the five CRC values that the device is currently - * using for WOL. This will be queried when a pattern is to be - * removed. - */ - u32 localWolAndCrc0; - u16 WOLPatternList[NUM_WOL_PATTERNS]; - u8 WOLMaskList[NUM_WOL_PATTERNS][MAX_WOL_MASK_SIZE]; - u32 WOLMaskSize[NUM_WOL_PATTERNS]; - - /* IP address */ - union { - u32 u32; - u8 u8[4]; - } IPAddress; - - /* Current Power state of the adapter. */ - NDIS_DEVICE_POWER_STATE PowerState; - bool WOLState; - bool WOLEnabled; - bool Failed10Half; - bool bFailedStateTransition; - - /* Next two used to save power information at power down. This - * information will be used during power up to set up parts of Power - * Management in JAGCore - */ - u32 tx_en; - u32 rx_en; - u16 PowerDownSpeed; - u8 PowerDownDuplex; -} MP_POWER_MGMT, *PMP_POWER_MGMT; - -/* Forward declaration of the private adapter structure - * ( IS THERE A WAY TO DO THIS WITH A TYPEDEF??? ) - */ -struct et131x_adapter; - -u16 CalculateCCITCRC16(u8 *Pattern, u8 *Mask, u32 MaskSize); -void EnablePhyComa(struct et131x_adapter *adapter); -void DisablePhyComa(struct et131x_adapter *adapter); - -#endif /* _ET1310_PM_H_ */ diff --git a/src/et131x/et1310_rx.c b/src/et131x/et1310_rx.c deleted file mode 100644 index ec98da5..0000000 --- a/src/et131x/et1310_rx.c +++ /dev/null @@ -1,1391 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_rx.c - Routines used to perform data reception - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" - -#include "et1310_rx.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - - -void nic_return_rfd(struct et131x_adapter *pAdapter, PMP_RFD pMpRfd); - -/** - * et131x_rx_dma_memory_alloc - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success and errno on failure (as defined in errno.h) - * - * Allocates Free buffer ring 1 for sure, free buffer ring 0 if required, - * and the Packet Status Ring. - */ -int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) -{ - uint32_t OuterLoop, InnerLoop; - uint32_t bufsize; - uint32_t pktStatRingSize, FBRChunkSize; - RX_RING_t *rx_ring; - - DBG_ENTER(et131x_dbginfo); - - /* Setup some convenience pointers */ - rx_ring = (RX_RING_t *) & adapter->RxRing; - - /* Alloc memory for the lookup table */ -#ifdef USE_FBR0 - rx_ring->Fbr[0] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL); -#endif - - rx_ring->Fbr[1] = kmalloc(sizeof(FBRLOOKUPTABLE), GFP_KERNEL); - - /* The first thing we will do is configure the sizes of the buffer - * rings. These will change based on jumbo packet support. Larger - * jumbo packets increases the size of each entry in FBR0, and the - * number of entries in FBR0, while at the same time decreasing the - * number of entries in FBR1. - * - * FBR1 holds "large" frames, FBR0 holds "small" frames. If FBR1 - * entries are huge in order to accomodate a "jumbo" frame, then it - * will have less entries. Conversely, FBR1 will now be relied upon - * to carry more "normal" frames, thus it's entry size also increases - * and the number of entries goes up too (since it now carries - * "small" + "regular" packets. - * - * In this scheme, we try to maintain 512 entries between the two - * rings. Also, FBR1 remains a constant size - when it's size doubles - * the number of entries halves. FBR0 increases in size, however. - */ - - if (adapter->RegistryJumboPacket < 2048) { -#ifdef USE_FBR0 - rx_ring->Fbr0BufferSize = 256; - rx_ring->Fbr0NumEntries = 512; -#endif - rx_ring->Fbr1BufferSize = 2048; - rx_ring->Fbr1NumEntries = 512; - } else if (adapter->RegistryJumboPacket < 4096) { -#ifdef USE_FBR0 - rx_ring->Fbr0BufferSize = 512; - rx_ring->Fbr0NumEntries = 1024; -#endif - rx_ring->Fbr1BufferSize = 4096; - rx_ring->Fbr1NumEntries = 512; - } else { -#ifdef USE_FBR0 - rx_ring->Fbr0BufferSize = 1024; - rx_ring->Fbr0NumEntries = 768; -#endif - rx_ring->Fbr1BufferSize = 16384; - rx_ring->Fbr1NumEntries = 128; - } - -#ifdef USE_FBR0 - adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr0NumEntries + - adapter->RxRing.Fbr1NumEntries; -#else - adapter->RxRing.PsrNumEntries = adapter->RxRing.Fbr1NumEntries; -#endif - - /* Allocate an area of memory for Free Buffer Ring 1 */ - bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff; - rx_ring->pFbr1RingVa = pci_alloc_consistent(adapter->pdev, - bufsize, - &rx_ring->pFbr1RingPa); - if (!rx_ring->pFbr1RingVa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Free Buffer Ring 1\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Save physical address - * - * NOTE: pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here - * before storing the adjusted address. - */ - rx_ring->Fbr1Realpa = rx_ring->pFbr1RingPa; - - /* Align Free Buffer Ring 1 on a 4K boundary */ - et131x_align_allocated_memory(adapter, - &rx_ring->Fbr1Realpa, - &rx_ring->Fbr1offset, 0x0FFF); - - rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa + - rx_ring->Fbr1offset); - -#ifdef USE_FBR0 - /* Allocate an area of memory for Free Buffer Ring 0 */ - bufsize = (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff; - rx_ring->pFbr0RingVa = pci_alloc_consistent(adapter->pdev, - bufsize, - &rx_ring->pFbr0RingPa); - if (!rx_ring->pFbr0RingVa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Free Buffer Ring 0\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Save physical address - * - * NOTE: pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here before - * storing the adjusted address. - */ - rx_ring->Fbr0Realpa = rx_ring->pFbr0RingPa; - - /* Align Free Buffer Ring 0 on a 4K boundary */ - et131x_align_allocated_memory(adapter, - &rx_ring->Fbr0Realpa, - &rx_ring->Fbr0offset, 0x0FFF); - - rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa + - rx_ring->Fbr0offset); -#endif - - for (OuterLoop = 0; OuterLoop < (rx_ring->Fbr1NumEntries / FBR_CHUNKS); - OuterLoop++) { - uint64_t Fbr1Offset; - uint64_t Fbr1TempPa; - uint32_t Fbr1Align; - - /* This code allocates an area of memory big enough for N - * free buffers + (buffer_size - 1) so that the buffers can - * be aligned on 4k boundaries. If each buffer were aligned - * to a buffer_size boundary, the effect would be to double - * the size of FBR0. By allocating N buffers at once, we - * reduce this overhead. - */ - if (rx_ring->Fbr1BufferSize > 4096) { - Fbr1Align = 4096; - } else { - Fbr1Align = rx_ring->Fbr1BufferSize; - } - - FBRChunkSize = - (FBR_CHUNKS * rx_ring->Fbr1BufferSize) + Fbr1Align - 1; - rx_ring->Fbr1MemVa[OuterLoop] = - pci_alloc_consistent(adapter->pdev, FBRChunkSize, - &rx_ring->Fbr1MemPa[OuterLoop]); - - if (!rx_ring->Fbr1MemVa[OuterLoop]) { - DBG_ERROR(et131x_dbginfo, "Could not alloc memory\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* See NOTE in "Save Physical Address" comment above */ - Fbr1TempPa = rx_ring->Fbr1MemPa[OuterLoop]; - - et131x_align_allocated_memory(adapter, - &Fbr1TempPa, - &Fbr1Offset, (Fbr1Align - 1)); - - for (InnerLoop = 0; InnerLoop < FBR_CHUNKS; InnerLoop++) { - uint32_t index = (OuterLoop * FBR_CHUNKS) + InnerLoop; - - /* Save the Virtual address of this index for quick - * access later - */ - rx_ring->Fbr[1]->Va[index] = - (uint8_t *) rx_ring->Fbr1MemVa[OuterLoop] + - (InnerLoop * rx_ring->Fbr1BufferSize) + Fbr1Offset; - - /* now store the physical address in the descriptor - * so the device can access it - */ - rx_ring->Fbr[1]->PAHigh[index] = - (uint32_t) (Fbr1TempPa >> 32); - rx_ring->Fbr[1]->PALow[index] = (uint32_t) Fbr1TempPa; - - Fbr1TempPa += rx_ring->Fbr1BufferSize; - - rx_ring->Fbr[1]->Buffer1[index] = - rx_ring->Fbr[1]->Va[index]; - rx_ring->Fbr[1]->Buffer2[index] = - rx_ring->Fbr[1]->Va[index] - 4; - } - } - -#ifdef USE_FBR0 - /* Same for FBR0 (if in use) */ - for (OuterLoop = 0; OuterLoop < (rx_ring->Fbr0NumEntries / FBR_CHUNKS); - OuterLoop++) { - uint64_t Fbr0Offset; - uint64_t Fbr0TempPa; - - FBRChunkSize = ((FBR_CHUNKS + 1) * rx_ring->Fbr0BufferSize) - 1; - rx_ring->Fbr0MemVa[OuterLoop] = - pci_alloc_consistent(adapter->pdev, FBRChunkSize, - &rx_ring->Fbr0MemPa[OuterLoop]); - - if (!rx_ring->Fbr0MemVa[OuterLoop]) { - DBG_ERROR(et131x_dbginfo, "Could not alloc memory\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* See NOTE in "Save Physical Address" comment above */ - Fbr0TempPa = rx_ring->Fbr0MemPa[OuterLoop]; - - et131x_align_allocated_memory(adapter, - &Fbr0TempPa, - &Fbr0Offset, - rx_ring->Fbr0BufferSize - 1); - - for (InnerLoop = 0; InnerLoop < FBR_CHUNKS; InnerLoop++) { - uint32_t index = (OuterLoop * FBR_CHUNKS) + InnerLoop; - - rx_ring->Fbr[0]->Va[index] = - (uint8_t *) rx_ring->Fbr0MemVa[OuterLoop] + - (InnerLoop * rx_ring->Fbr0BufferSize) + Fbr0Offset; - - rx_ring->Fbr[0]->PAHigh[index] = - (uint32_t) (Fbr0TempPa >> 32); - rx_ring->Fbr[0]->PALow[index] = (uint32_t) Fbr0TempPa; - - Fbr0TempPa += rx_ring->Fbr0BufferSize; - - rx_ring->Fbr[0]->Buffer1[index] = - rx_ring->Fbr[0]->Va[index]; - rx_ring->Fbr[0]->Buffer2[index] = - rx_ring->Fbr[0]->Va[index] - 4; - } - } -#endif - - /* Allocate an area of memory for FIFO of Packet Status ring entries */ - pktStatRingSize = - sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries; - - rx_ring->pPSRingVa = pci_alloc_consistent(adapter->pdev, - pktStatRingSize + 0x0fff, - &rx_ring->pPSRingPa); - - if (!rx_ring->pPSRingVa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Packet Status Ring\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Save physical address - * - * NOTE : pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here before - * storing the adjusted address. - */ - rx_ring->pPSRingRealPa = rx_ring->pPSRingPa; - - /* Align Packet Status Ring on a 4K boundary */ - et131x_align_allocated_memory(adapter, - &rx_ring->pPSRingRealPa, - &rx_ring->pPSRingOffset, 0x0FFF); - - rx_ring->pPSRingVa = (void *)((uint8_t *) rx_ring->pPSRingVa + - rx_ring->pPSRingOffset); - - /* Allocate an area of memory for writeback of status information */ - rx_ring->pRxStatusVa = pci_alloc_consistent(adapter->pdev, - sizeof(RX_STATUS_BLOCK_t) + - 0x7, &rx_ring->pRxStatusPa); - if (!rx_ring->pRxStatusVa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Status Block\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Save physical address */ - rx_ring->RxStatusRealPA = rx_ring->pRxStatusPa; - - /* Align write back on an 8 byte boundary */ - et131x_align_allocated_memory(adapter, - &rx_ring->RxStatusRealPA, - &rx_ring->RxStatusOffset, 0x07); - - rx_ring->pRxStatusVa = (void *)((uint8_t *) rx_ring->pRxStatusVa + - rx_ring->RxStatusOffset); - rx_ring->NumRfd = NIC_DEFAULT_NUM_RFD; - - /* Recv - * pci_pool_create initializes a lookaside list. After successful - * creation, nonpaged fixed-size blocks can be allocated from and - * freed to the lookaside list. - * RFDs will be allocated from this pool. - */ - rx_ring->RecvLookaside = kmem_cache_create(adapter->netdev->name, - sizeof(MP_RFD), - 0, - SLAB_CACHE_DMA | - SLAB_HWCACHE_ALIGN, - NULL); - - MP_SET_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE); - - /* The RFDs are going to be put on lists later on, so initialize the - * lists now. - */ - INIT_LIST_HEAD(&rx_ring->RecvList); - INIT_LIST_HEAD(&rx_ring->RecvPendingList); - - DBG_LEAVE(et131x_dbginfo); - return 0; -} - -/** - * et131x_rx_dma_memory_free - Free all memory allocated within this module. - * @adapter: pointer to our private adapter structure - */ -void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) -{ - uint32_t index; - uint32_t bufsize; - uint32_t pktStatRingSize; - PMP_RFD pMpRfd; - RX_RING_t *rx_ring; - - DBG_ENTER(et131x_dbginfo); - - /* Setup some convenience pointers */ - rx_ring = (RX_RING_t *) & adapter->RxRing; - - /* Free RFDs and associated packet descriptors */ - DBG_ASSERT(rx_ring->nReadyRecv == rx_ring->NumRfd); - - while (!list_empty(&rx_ring->RecvList)) { - pMpRfd = (MP_RFD *) list_entry(rx_ring->RecvList.next, - MP_RFD, list_node); - - list_del(&pMpRfd->list_node); - et131x_rfd_resources_free(adapter, pMpRfd); - } - - while (!list_empty(&rx_ring->RecvPendingList)) { - pMpRfd = (MP_RFD *) list_entry(rx_ring->RecvPendingList.next, - MP_RFD, list_node); - list_del(&pMpRfd->list_node); - et131x_rfd_resources_free(adapter, pMpRfd); - } - - /* Free Free Buffer Ring 1 */ - if (rx_ring->pFbr1RingVa) { - /* First the packet memory */ - for (index = 0; index < - (rx_ring->Fbr1NumEntries / FBR_CHUNKS); index++) { - if (rx_ring->Fbr1MemVa[index]) { - uint32_t Fbr1Align; - - if (rx_ring->Fbr1BufferSize > 4096) { - Fbr1Align = 4096; - } else { - Fbr1Align = rx_ring->Fbr1BufferSize; - } - - bufsize = - (rx_ring->Fbr1BufferSize * FBR_CHUNKS) + - Fbr1Align - 1; - - pci_free_consistent(adapter->pdev, - bufsize, - rx_ring->Fbr1MemVa[index], - rx_ring->Fbr1MemPa[index]); - - rx_ring->Fbr1MemVa[index] = NULL; - } - } - - /* Now the FIFO itself */ - rx_ring->pFbr1RingVa = (void *)((uint8_t *) rx_ring->pFbr1RingVa - - rx_ring->Fbr1offset); - - bufsize = - (sizeof(FBR_DESC_t) * rx_ring->Fbr1NumEntries) + 0xfff; - - pci_free_consistent(adapter->pdev, - bufsize, - rx_ring->pFbr1RingVa, rx_ring->pFbr1RingPa); - - rx_ring->pFbr1RingVa = NULL; - } - -#ifdef USE_FBR0 - /* Now the same for Free Buffer Ring 0 */ - if (rx_ring->pFbr0RingVa) { - /* First the packet memory */ - for (index = 0; index < - (rx_ring->Fbr0NumEntries / FBR_CHUNKS); index++) { - if (rx_ring->Fbr0MemVa[index]) { - bufsize = - (rx_ring->Fbr0BufferSize * - (FBR_CHUNKS + 1)) - 1; - - pci_free_consistent(adapter->pdev, - bufsize, - rx_ring->Fbr0MemVa[index], - rx_ring->Fbr0MemPa[index]); - - rx_ring->Fbr0MemVa[index] = NULL; - } - } - - /* Now the FIFO itself */ - rx_ring->pFbr0RingVa = (void *)((uint8_t *) rx_ring->pFbr0RingVa - - rx_ring->Fbr0offset); - - bufsize = - (sizeof(FBR_DESC_t) * rx_ring->Fbr0NumEntries) + 0xfff; - - pci_free_consistent(adapter->pdev, - bufsize, - rx_ring->pFbr0RingVa, rx_ring->pFbr0RingPa); - - rx_ring->pFbr0RingVa = NULL; - } -#endif - - /* Free Packet Status Ring */ - if (rx_ring->pPSRingVa) { - rx_ring->pPSRingVa = (void *)((uint8_t *) rx_ring->pPSRingVa - - rx_ring->pPSRingOffset); - - pktStatRingSize = - sizeof(PKT_STAT_DESC_t) * adapter->RxRing.PsrNumEntries; - - pci_free_consistent(adapter->pdev, - pktStatRingSize + 0x0fff, - rx_ring->pPSRingVa, rx_ring->pPSRingPa); - - rx_ring->pPSRingVa = NULL; - } - - /* Free area of memory for the writeback of status information */ - if (rx_ring->pRxStatusVa) { - rx_ring->pRxStatusVa = (void *)((uint8_t *) rx_ring->pRxStatusVa - - rx_ring->RxStatusOffset); - - pci_free_consistent(adapter->pdev, - sizeof(RX_STATUS_BLOCK_t) + 0x7, - rx_ring->pRxStatusVa, rx_ring->pRxStatusPa); - - rx_ring->pRxStatusVa = NULL; - } - - /* Free receive buffer pool */ - - /* Free receive packet pool */ - - /* Destroy the lookaside (RFD) pool */ - if (MP_TEST_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE)) { - kmem_cache_destroy(rx_ring->RecvLookaside); - MP_CLEAR_FLAG(adapter, fMP_ADAPTER_RECV_LOOKASIDE); - } - - /* Free the FBR Lookup Table */ -#ifdef USE_FBR0 - kfree(rx_ring->Fbr[0]); -#endif - - kfree(rx_ring->Fbr[1]); - - /* Reset Counters */ - rx_ring->nReadyRecv = 0; - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_init_recv - Initialize receive data structures. - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success and errno on failure (as defined in errno.h) - */ -int et131x_init_recv(struct et131x_adapter *adapter) -{ - int status = -ENOMEM; - PMP_RFD pMpRfd = NULL; - uint32_t RfdCount; - uint32_t TotalNumRfd = 0; - RX_RING_t *rx_ring = NULL; - - DBG_ENTER(et131x_dbginfo); - - /* Setup some convenience pointers */ - rx_ring = (RX_RING_t *) & adapter->RxRing; - - /* Setup each RFD */ - for (RfdCount = 0; RfdCount < rx_ring->NumRfd; RfdCount++) { - pMpRfd = (MP_RFD *) kmem_cache_alloc(rx_ring->RecvLookaside, - GFP_ATOMIC | GFP_DMA); - - if (!pMpRfd) { - DBG_ERROR(et131x_dbginfo, - "Couldn't alloc RFD out of kmem_cache\n"); - status = -ENOMEM; - continue; - } - - status = et131x_rfd_resources_alloc(adapter, pMpRfd); - if (status != 0) { - DBG_ERROR(et131x_dbginfo, - "Couldn't alloc packet for RFD\n"); - kmem_cache_free(rx_ring->RecvLookaside, pMpRfd); - continue; - } - - /* Add this RFD to the RecvList */ - list_add_tail(&pMpRfd->list_node, &rx_ring->RecvList); - - /* Increment both the available RFD's, and the total RFD's. */ - rx_ring->nReadyRecv++; - TotalNumRfd++; - } - - if (TotalNumRfd > NIC_MIN_NUM_RFD) { - status = 0; - } - - rx_ring->NumRfd = TotalNumRfd; - - if (status != 0) { - kmem_cache_free(rx_ring->RecvLookaside, pMpRfd); - DBG_ERROR(et131x_dbginfo, - "Allocation problems in et131x_init_recv\n"); - } - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_rfd_resources_alloc - * @adapter: pointer to our private adapter structure - * @pMpRfd: pointer to a RFD - * - * Returns 0 on success and errno on failure (as defined in errno.h) - */ -int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, MP_RFD *pMpRfd) -{ - pMpRfd->Packet = NULL; - - return 0; -} - -/** - * et131x_rfd_resources_free - Free the packet allocated for the given RFD - * @adapter: pointer to our private adapter structure - * @pMpRfd: pointer to a RFD - */ -void et131x_rfd_resources_free(struct et131x_adapter *adapter, MP_RFD *pMpRfd) -{ - pMpRfd->Packet = NULL; - kmem_cache_free(adapter->RxRing.RecvLookaside, pMpRfd); -} - -/** - * ConfigRxDmaRegs - Start of Rx_DMA init sequence - * @pAdapter: pointer to our adapter structure - */ -void ConfigRxDmaRegs(struct et131x_adapter *pAdapter) -{ - struct _RXDMA_t __iomem *pRxDma = &pAdapter->CSRAddress->rxdma; - struct _rx_ring_t *pRxLocal = &pAdapter->RxRing; - PFBR_DESC_t pFbrEntry; - uint32_t iEntry; - RXDMA_PSR_NUM_DES_t psr_num_des; - unsigned long lockflags; - - DBG_ENTER(et131x_dbginfo); - - /* Halt RXDMA to perform the reconfigure. */ - et131x_rx_dma_disable(pAdapter); - - /* Load the completion writeback physical address - * - * NOTE : pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here - * before storing the adjusted address. - */ - writel((uint32_t) (pRxLocal->RxStatusRealPA >> 32), - &pRxDma->dma_wb_base_hi); - writel((uint32_t) pRxLocal->RxStatusRealPA, &pRxDma->dma_wb_base_lo); - - memset(pRxLocal->pRxStatusVa, 0, sizeof(RX_STATUS_BLOCK_t)); - - /* Set the address and parameters of the packet status ring into the - * 1310's registers - */ - writel((uint32_t) (pRxLocal->pPSRingRealPa >> 32), - &pRxDma->psr_base_hi); - writel((uint32_t) pRxLocal->pPSRingRealPa, &pRxDma->psr_base_lo); - writel(pRxLocal->PsrNumEntries - 1, &pRxDma->psr_num_des.value); - writel(0, &pRxDma->psr_full_offset.value); - - psr_num_des.value = readl(&pRxDma->psr_num_des.value); - writel((psr_num_des.bits.psr_ndes * LO_MARK_PERCENT_FOR_PSR) / 100, - &pRxDma->psr_min_des.value); - - spin_lock_irqsave(&pAdapter->RcvLock, lockflags); - - /* These local variables track the PSR in the adapter structure */ - pRxLocal->local_psr_full.bits.psr_full = 0; - pRxLocal->local_psr_full.bits.psr_full_wrap = 0; - - /* Now's the best time to initialize FBR1 contents */ - pFbrEntry = (PFBR_DESC_t) pRxLocal->pFbr1RingVa; - for (iEntry = 0; iEntry < pRxLocal->Fbr1NumEntries; iEntry++) { - pFbrEntry->addr_hi = pRxLocal->Fbr[1]->PAHigh[iEntry]; - pFbrEntry->addr_lo = pRxLocal->Fbr[1]->PALow[iEntry]; - pFbrEntry->word2.bits.bi = iEntry; - pFbrEntry++; - } - - /* Set the address and parameters of Free buffer ring 1 (and 0 if - * required) into the 1310's registers - */ - writel((uint32_t) (pRxLocal->Fbr1Realpa >> 32), &pRxDma->fbr1_base_hi); - writel((uint32_t) pRxLocal->Fbr1Realpa, &pRxDma->fbr1_base_lo); - writel(pRxLocal->Fbr1NumEntries - 1, &pRxDma->fbr1_num_des.value); - - { - DMA10W_t fbr1_full = { 0 }; - - fbr1_full.bits.val = 0; - fbr1_full.bits.wrap = 1; - writel(fbr1_full.value, &pRxDma->fbr1_full_offset.value); - } - - /* This variable tracks the free buffer ring 1 full position, so it - * has to match the above. - */ - pRxLocal->local_Fbr1_full.bits.val = 0; - pRxLocal->local_Fbr1_full.bits.wrap = 1; - writel(((pRxLocal->Fbr1NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, - &pRxDma->fbr1_min_des.value); - -#ifdef USE_FBR0 - /* Now's the best time to initialize FBR0 contents */ - pFbrEntry = (PFBR_DESC_t) pRxLocal->pFbr0RingVa; - for (iEntry = 0; iEntry < pRxLocal->Fbr0NumEntries; iEntry++) { - pFbrEntry->addr_hi = pRxLocal->Fbr[0]->PAHigh[iEntry]; - pFbrEntry->addr_lo = pRxLocal->Fbr[0]->PALow[iEntry]; - pFbrEntry->word2.bits.bi = iEntry; - pFbrEntry++; - } - - writel((uint32_t) (pRxLocal->Fbr0Realpa >> 32), &pRxDma->fbr0_base_hi); - writel((uint32_t) pRxLocal->Fbr0Realpa, &pRxDma->fbr0_base_lo); - writel(pRxLocal->Fbr0NumEntries - 1, &pRxDma->fbr0_num_des.value); - - { - DMA10W_t fbr0_full = { 0 }; - - fbr0_full.bits.val = 0; - fbr0_full.bits.wrap = 1; - writel(fbr0_full.value, &pRxDma->fbr0_full_offset.value); - } - - /* This variable tracks the free buffer ring 0 full position, so it - * has to match the above. - */ - pRxLocal->local_Fbr0_full.bits.val = 0; - pRxLocal->local_Fbr0_full.bits.wrap = 1; - writel(((pRxLocal->Fbr0NumEntries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, - &pRxDma->fbr0_min_des.value); -#endif - - /* Program the number of packets we will receive before generating an - * interrupt. - * For version B silicon, this value gets updated once autoneg is - *complete. - */ - writel(pAdapter->RegistryRxNumBuffers, &pRxDma->num_pkt_done.value); - - /* The "time_done" is not working correctly to coalesce interrupts - * after a given time period, but rather is giving us an interrupt - * regardless of whether we have received packets. - * This value gets updated once autoneg is complete. - */ - writel(pAdapter->RegistryRxTimeInterval, &pRxDma->max_pkt_time.value); - - spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * SetRxDmaTimer - Set the heartbeat timer according to line rate. - * @pAdapter: pointer to our adapter structure - */ -void SetRxDmaTimer(struct et131x_adapter *pAdapter) -{ - /* For version B silicon, we do not use the RxDMA timer for 10 and 100 - * Mbits/s line rates. We do not enable and RxDMA interrupt coalescing. - */ - if ((pAdapter->uiLinkSpeed == TRUEPHY_SPEED_100MBPS) || - (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_10MBPS)) { - writel(0, &pAdapter->CSRAddress->rxdma.max_pkt_time.value); - writel(1, &pAdapter->CSRAddress->rxdma.num_pkt_done.value); - } -} - -/** - * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310 - * @pAdapter: pointer to our adapter structure - */ -void et131x_rx_dma_disable(struct et131x_adapter *pAdapter) -{ - RXDMA_CSR_t csr; - - DBG_ENTER(et131x_dbginfo); - - /* Setup the receive dma configuration register */ - writel(0x00002001, &pAdapter->CSRAddress->rxdma.csr.value); - csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value); - if (csr.bits.halt_status != 1) { - udelay(5); - csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value); - if (csr.bits.halt_status != 1) { - DBG_ERROR(et131x_dbginfo, - "RX Dma failed to enter halt state. CSR 0x%08x\n", - csr.value); - } - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310. - * @pAdapter: pointer to our adapter structure - */ -void et131x_rx_dma_enable(struct et131x_adapter *pAdapter) -{ - DBG_RX_ENTER(et131x_dbginfo); - - if (pAdapter->RegistryPhyLoopbk) { - /* RxDMA is disabled for loopback operation. */ - writel(0x1, &pAdapter->CSRAddress->rxdma.csr.value); - } else { - /* Setup the receive dma configuration register for normal operation */ - RXDMA_CSR_t csr = { 0 }; - - csr.bits.fbr1_enable = 1; - if (pAdapter->RxRing.Fbr1BufferSize == 4096) { - csr.bits.fbr1_size = 1; - } else if (pAdapter->RxRing.Fbr1BufferSize == 8192) { - csr.bits.fbr1_size = 2; - } else if (pAdapter->RxRing.Fbr1BufferSize == 16384) { - csr.bits.fbr1_size = 3; - } -#ifdef USE_FBR0 - csr.bits.fbr0_enable = 1; - if (pAdapter->RxRing.Fbr0BufferSize == 256) { - csr.bits.fbr0_size = 1; - } else if (pAdapter->RxRing.Fbr0BufferSize == 512) { - csr.bits.fbr0_size = 2; - } else if (pAdapter->RxRing.Fbr0BufferSize == 1024) { - csr.bits.fbr0_size = 3; - } -#endif - writel(csr.value, &pAdapter->CSRAddress->rxdma.csr.value); - - csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value); - if (csr.bits.halt_status != 0) { - udelay(5); - csr.value = readl(&pAdapter->CSRAddress->rxdma.csr.value); - if (csr.bits.halt_status != 0) { - DBG_ERROR(et131x_dbginfo, - "RX Dma failed to exit halt state. CSR 0x%08x\n", - csr.value); - } - } - } - - DBG_RX_LEAVE(et131x_dbginfo); -} - -/** - * nic_rx_pkts - Checks the hardware for available packets - * @pAdapter: pointer to our adapter - * - * Returns pMpRfd, a pointer to our MPRFD. - * - * Checks the hardware for available packets, using completion ring - * If packets are available, it gets an RFD from the RecvList, attaches - * the packet to it, puts the RFD in the RecvPendList, and also returns - * the pointer to the RFD. - */ -PMP_RFD nic_rx_pkts(struct et131x_adapter *pAdapter) -{ - struct _rx_ring_t *pRxLocal = &pAdapter->RxRing; - PRX_STATUS_BLOCK_t pRxStatusBlock; - PPKT_STAT_DESC_t pPSREntry; - PMP_RFD pMpRfd; - uint32_t nIndex; - uint8_t *pBufVa; - unsigned long lockflags; - struct list_head *element; - uint8_t ringIndex; - uint16_t bufferIndex; - uint32_t localLen; - PKT_STAT_DESC_WORD0_t Word0; - - - DBG_RX_ENTER(et131x_dbginfo); - - /* RX Status block is written by the DMA engine prior to every - * interrupt. It contains the next to be used entry in the Packet - * Status Ring, and also the two Free Buffer rings. - */ - pRxStatusBlock = (PRX_STATUS_BLOCK_t) pRxLocal->pRxStatusVa; - - if (pRxStatusBlock->Word1.bits.PSRoffset == - pRxLocal->local_psr_full.bits.psr_full && - pRxStatusBlock->Word1.bits.PSRwrap == - pRxLocal->local_psr_full.bits.psr_full_wrap) { - /* Looks like this ring is not updated yet */ - DBG_RX(et131x_dbginfo, "(0)\n"); - DBG_RX_LEAVE(et131x_dbginfo); - return NULL; - } - - /* The packet status ring indicates that data is available. */ - pPSREntry = (PPKT_STAT_DESC_t) (pRxLocal->pPSRingVa) + - pRxLocal->local_psr_full.bits.psr_full; - - /* Grab any information that is required once the PSR is - * advanced, since we can no longer rely on the memory being - * accurate - */ - localLen = pPSREntry->word1.bits.length; - ringIndex = (uint8_t) pPSREntry->word1.bits.ri; - bufferIndex = (uint16_t) pPSREntry->word1.bits.bi; - Word0 = pPSREntry->word0; - - DBG_RX(et131x_dbginfo, "RX PACKET STATUS\n"); - DBG_RX(et131x_dbginfo, "\tlength : %d\n", localLen); - DBG_RX(et131x_dbginfo, "\tringIndex : %d\n", ringIndex); - DBG_RX(et131x_dbginfo, "\tbufferIndex : %d\n", bufferIndex); - DBG_RX(et131x_dbginfo, "\tword0 : 0x%08x\n", Word0.value); - -#if 0 - /* Check the Status Word that the MAC has appended to the PSR - * entry in case the MAC has detected errors. - */ - if (Word0.value & ALCATEL_BAD_STATUS) { - DBG_ERROR(et131x_dbginfo, - "NICRxPkts >> Alcatel Status Word error." - "Value 0x%08x\n", pPSREntry->word0.value); - } -#endif - - /* Indicate that we have used this PSR entry. */ - if (++pRxLocal->local_psr_full.bits.psr_full > - pRxLocal->PsrNumEntries - 1) { - pRxLocal->local_psr_full.bits.psr_full = 0; - pRxLocal->local_psr_full.bits.psr_full_wrap ^= 1; - } - - writel(pRxLocal->local_psr_full.value, - &pAdapter->CSRAddress->rxdma.psr_full_offset.value); - -#ifndef USE_FBR0 - if (ringIndex != 1) { - DBG_ERROR(et131x_dbginfo, - "NICRxPkts PSR Entry %d indicates " - "Buffer Ring 0 in use\n", - pRxLocal->local_psr_full.bits.psr_full); - DBG_RX_LEAVE(et131x_dbginfo); - return NULL; - } -#endif - -#ifdef USE_FBR0 - if (ringIndex > 1 || - (ringIndex == 0 && - bufferIndex > pRxLocal->Fbr0NumEntries - 1) || - (ringIndex == 1 && - bufferIndex > pRxLocal->Fbr1NumEntries - 1)) -#else - if (ringIndex != 1 || - bufferIndex > pRxLocal->Fbr1NumEntries - 1) -#endif - { - /* Illegal buffer or ring index cannot be used by S/W*/ - DBG_ERROR(et131x_dbginfo, - "NICRxPkts PSR Entry %d indicates " - "length of %d and/or bad bi(%d)\n", - pRxLocal->local_psr_full.bits.psr_full, - localLen, bufferIndex); - DBG_RX_LEAVE(et131x_dbginfo); - return NULL; - } - - /* Get and fill the RFD. */ - spin_lock_irqsave(&pAdapter->RcvLock, lockflags); - - pMpRfd = NULL; - element = pRxLocal->RecvList.next; - pMpRfd = (PMP_RFD) list_entry(element, MP_RFD, list_node); - - if (pMpRfd == NULL) { - DBG_RX(et131x_dbginfo, - "NULL RFD returned from RecvList via list_entry()\n"); - DBG_RX_LEAVE(et131x_dbginfo); - spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags); - return NULL; - } - - list_del(&pMpRfd->list_node); - pRxLocal->nReadyRecv--; - - spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags); - - pMpRfd->iBufferIndex = bufferIndex; - pMpRfd->iRingIndex = ringIndex; - - /* In V1 silicon, there is a bug which screws up filtering of - * runt packets. Therefore runt packet filtering is disabled - * in the MAC and the packets are dropped here. They are - * also counted here. - */ - if (localLen < (NIC_MIN_PACKET_SIZE + 4)) { - pAdapter->Stats.other_errors++; - localLen = 0; - } - - if (localLen) { - if (pAdapter->ReplicaPhyLoopbk == 1) { - pBufVa = pRxLocal->Fbr[ringIndex]->Va[bufferIndex]; - - if (memcmp(&pBufVa[6], &pAdapter->CurrentAddress[0], - ETH_ALEN) == 0) { - if (memcmp(&pBufVa[42], "Replica packet", - ETH_HLEN)) { - pAdapter->ReplicaPhyLoopbkPF = 1; - } - } - DBG_WARNING(et131x_dbginfo, - "pBufVa:\t%02x:%02x:%02x:%02x:%02x:%02x\n", - pBufVa[6], pBufVa[7], pBufVa[8], - pBufVa[9], pBufVa[10], pBufVa[11]); - - DBG_WARNING(et131x_dbginfo, - "CurrentAddr:\t%02x:%02x:%02x:%02x:%02x:%02x\n", - pAdapter->CurrentAddress[0], - pAdapter->CurrentAddress[1], - pAdapter->CurrentAddress[2], - pAdapter->CurrentAddress[3], - pAdapter->CurrentAddress[4], - pAdapter->CurrentAddress[5]); - } - - /* Determine if this is a multicast packet coming in */ - if ((Word0.value & ALCATEL_MULTICAST_PKT) && - !(Word0.value & ALCATEL_BROADCAST_PKT)) { - /* Promiscuous mode and Multicast mode are - * not mutually exclusive as was first - * thought. I guess Promiscuous is just - * considered a super-set of the other - * filters. Generally filter is 0x2b when in - * promiscuous mode. - */ - if ((pAdapter->PacketFilter & ET131X_PACKET_TYPE_MULTICAST) - && !(pAdapter->PacketFilter & ET131X_PACKET_TYPE_PROMISCUOUS) - && !(pAdapter->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { - pBufVa = pRxLocal->Fbr[ringIndex]-> - Va[bufferIndex]; - - /* Loop through our list to see if the - * destination address of this packet - * matches one in our list. - */ - for (nIndex = 0; - nIndex < pAdapter->MCAddressCount; - nIndex++) { - if (pBufVa[0] == - pAdapter->MCList[nIndex][0] - && pBufVa[1] == - pAdapter->MCList[nIndex][1] - && pBufVa[2] == - pAdapter->MCList[nIndex][2] - && pBufVa[3] == - pAdapter->MCList[nIndex][3] - && pBufVa[4] == - pAdapter->MCList[nIndex][4] - && pBufVa[5] == - pAdapter->MCList[nIndex][5]) { - break; - } - } - - /* If our index is equal to the number - * of Multicast address we have, then - * this means we did not find this - * packet's matching address in our - * list. Set the PacketSize to zero, - * so we free our RFD when we return - * from this function. - */ - if (nIndex == pAdapter->MCAddressCount) { - localLen = 0; - } - } - - if (localLen > 0) { - pAdapter->Stats.multircv++; - } - } else if (Word0.value & ALCATEL_BROADCAST_PKT) { - pAdapter->Stats.brdcstrcv++; - } else { - /* Not sure what this counter measures in - * promiscuous mode. Perhaps we should check - * the MAC address to see if it is directed - * to us in promiscuous mode. - */ - pAdapter->Stats.unircv++; - } - } - - if (localLen > 0) { - struct sk_buff *skb = NULL; - - //pMpRfd->PacketSize = localLen - 4; - pMpRfd->PacketSize = localLen; - - skb = dev_alloc_skb(pMpRfd->PacketSize + 2); - if (!skb) { - DBG_ERROR(et131x_dbginfo, - "Couldn't alloc an SKB for Rx\n"); - DBG_RX_LEAVE(et131x_dbginfo); - return NULL; - } - - pAdapter->net_stats.rx_bytes += pMpRfd->PacketSize; - - memcpy(skb_put(skb, pMpRfd->PacketSize), - pRxLocal->Fbr[ringIndex]->Va[bufferIndex], - pMpRfd->PacketSize); - - skb->dev = pAdapter->netdev; - skb->protocol = eth_type_trans(skb, pAdapter->netdev); - skb->ip_summed = CHECKSUM_NONE; - - netif_rx(skb); - } else { - pMpRfd->PacketSize = 0; - } - - nic_return_rfd(pAdapter, pMpRfd); - - DBG_RX(et131x_dbginfo, "(1)\n"); - DBG_RX_LEAVE(et131x_dbginfo); - return pMpRfd; -} - -/** - * et131x_reset_recv - Reset the receive list - * @pAdapter: pointer to our adapter - * - * Assumption, Rcv spinlock has been acquired. - */ -void et131x_reset_recv(struct et131x_adapter *pAdapter) -{ - PMP_RFD pMpRfd; - struct list_head *element; - - DBG_ENTER(et131x_dbginfo); - - DBG_ASSERT(!list_empty(&pAdapter->RxRing.RecvList)); - - /* Take all the RFD's from the pending list, and stick them on the - * RecvList. - */ - while (!list_empty(&pAdapter->RxRing.RecvPendingList)) { - element = pAdapter->RxRing.RecvPendingList.next; - - pMpRfd = (PMP_RFD) list_entry(element, MP_RFD, list_node); - - list_del(&pMpRfd->list_node); - list_add_tail(&pMpRfd->list_node, &pAdapter->RxRing.RecvList); - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_handle_recv_interrupt - Interrupt handler for receive processing - * @pAdapter: pointer to our adapter - * - * Assumption, Rcv spinlock has been acquired. - */ -void et131x_handle_recv_interrupt(struct et131x_adapter *pAdapter) -{ - PMP_RFD pMpRfd = NULL; - struct sk_buff *PacketArray[NUM_PACKETS_HANDLED]; - PMP_RFD RFDFreeArray[NUM_PACKETS_HANDLED]; - uint32_t PacketArrayCount = 0; - uint32_t PacketsToHandle; - uint32_t PacketFreeCount = 0; - bool TempUnfinishedRec = false; - - DBG_RX_ENTER(et131x_dbginfo); - - PacketsToHandle = NUM_PACKETS_HANDLED; - - /* Process up to available RFD's */ - while (PacketArrayCount < PacketsToHandle) { - if (list_empty(&pAdapter->RxRing.RecvList)) { - DBG_ASSERT(pAdapter->RxRing.nReadyRecv == 0); - DBG_ERROR(et131x_dbginfo, "NO RFD's !!!!!!!!!!!!!\n"); - TempUnfinishedRec = true; - break; - } - - pMpRfd = nic_rx_pkts(pAdapter); - - if (pMpRfd == NULL) { - break; - } - - /* Do not receive any packets until a filter has been set. - * Do not receive any packets until we are at D0. - * Do not receive any packets until we have link. - * If length is zero, return the RFD in order to advance the - * Free buffer ring. - */ - if ((!pAdapter->PacketFilter) || - (pAdapter->PoMgmt.PowerState != NdisDeviceStateD0) || - (!MP_LINK_DETECTED(pAdapter)) || - (pMpRfd->PacketSize == 0)) { - continue; - } - - /* Increment the number of packets we received */ - pAdapter->Stats.ipackets++; - - /* Set the status on the packet, either resources or success */ - if (pAdapter->RxRing.nReadyRecv >= RFD_LOW_WATER_MARK) { - /* Put this RFD on the pending list - * - * NOTE: nic_rx_pkts() above is already returning the - * RFD to the RecvList, so don't additionally do that - * here. - * Besides, we don't really need (at this point) the - * pending list anyway. - */ - //spin_lock_irqsave( &pAdapter->RcvPendLock, lockflags ); - //list_add_tail( &pMpRfd->list_node, &pAdapter->RxRing.RecvPendingList ); - //spin_unlock_irqrestore( &pAdapter->RcvPendLock, lockflags ); - - /* Update the number of outstanding Recvs */ - //MP_INC_RCV_REF( pAdapter ); - } else { - RFDFreeArray[PacketFreeCount] = pMpRfd; - PacketFreeCount++; - - DBG_WARNING(et131x_dbginfo, - "RFD's are running out !!!!!!!!!!!!!\n"); - } - - PacketArray[PacketArrayCount] = pMpRfd->Packet; - PacketArrayCount++; - } - - if ((PacketArrayCount == NUM_PACKETS_HANDLED) || TempUnfinishedRec) { - pAdapter->RxRing.UnfinishedReceives = true; - writel(pAdapter->RegistryTxTimeInterval * NANO_IN_A_MICRO, - &pAdapter->CSRAddress->global.watchdog_timer); - } else { - /* Watchdog timer will disable itself if appropriate. */ - pAdapter->RxRing.UnfinishedReceives = false; - } - - DBG_RX_LEAVE(et131x_dbginfo); -} - -/** - * NICReturnRFD - Recycle a RFD and put it back onto the receive list - * @pAdapter: pointer to our adapter - * @pMpRfd: pointer to the RFD - */ -void nic_return_rfd(struct et131x_adapter *pAdapter, PMP_RFD pMpRfd) -{ - struct _rx_ring_t *pRxLocal = &pAdapter->RxRing; - struct _RXDMA_t __iomem *pRxDma = &pAdapter->CSRAddress->rxdma; - uint16_t bi = pMpRfd->iBufferIndex; - uint8_t ri = pMpRfd->iRingIndex; - unsigned long lockflags; - - DBG_RX_ENTER(et131x_dbginfo); - - /* We don't use any of the OOB data besides status. Otherwise, we - * need to clean up OOB data - */ - if ( -#ifdef USE_FBR0 - (ri == 0 && bi < pRxLocal->Fbr0NumEntries) || -#endif - (ri == 1 && bi < pRxLocal->Fbr1NumEntries)) { - spin_lock_irqsave(&pAdapter->FbrLock, lockflags); - - if (ri == 1) { - PFBR_DESC_t pNextDesc = - (PFBR_DESC_t) (pRxLocal->pFbr1RingVa) + - pRxLocal->local_Fbr1_full.bits.val; - - /* Handle the Free Buffer Ring advancement here. Write - * the PA / Buffer Index for the returned buffer into - * the oldest (next to be freed)FBR entry - */ - pNextDesc->addr_hi = pRxLocal->Fbr[1]->PAHigh[bi]; - pNextDesc->addr_lo = pRxLocal->Fbr[1]->PALow[bi]; - pNextDesc->word2.value = bi; - - if (++pRxLocal->local_Fbr1_full.bits.val > - (pRxLocal->Fbr1NumEntries - 1)) { - pRxLocal->local_Fbr1_full.bits.val = 0; - pRxLocal->local_Fbr1_full.bits.wrap ^= 1; - } - - writel(pRxLocal->local_Fbr1_full.value, - &pRxDma->fbr1_full_offset.value); - } -#ifdef USE_FBR0 - else { - PFBR_DESC_t pNextDesc = - (PFBR_DESC_t) pRxLocal->pFbr0RingVa + - pRxLocal->local_Fbr0_full.bits.val; - - /* Handle the Free Buffer Ring advancement here. Write - * the PA / Buffer Index for the returned buffer into - * the oldest (next to be freed) FBR entry - */ - pNextDesc->addr_hi = pRxLocal->Fbr[0]->PAHigh[bi]; - pNextDesc->addr_lo = pRxLocal->Fbr[0]->PALow[bi]; - pNextDesc->word2.value = bi; - - if (++pRxLocal->local_Fbr0_full.bits.val > - (pRxLocal->Fbr0NumEntries - 1)) { - pRxLocal->local_Fbr0_full.bits.val = 0; - pRxLocal->local_Fbr0_full.bits.wrap ^= 1; - } - - writel(pRxLocal->local_Fbr0_full.value, - &pRxDma->fbr0_full_offset.value); - } -#endif - spin_unlock_irqrestore(&pAdapter->FbrLock, lockflags); - } else { - DBG_ERROR(et131x_dbginfo, - "NICReturnRFD illegal Buffer Index returned\n"); - } - - /* The processing on this RFD is done, so put it back on the tail of - * our list - */ - spin_lock_irqsave(&pAdapter->RcvLock, lockflags); - list_add_tail(&pMpRfd->list_node, &pRxLocal->RecvList); - pRxLocal->nReadyRecv++; - spin_unlock_irqrestore(&pAdapter->RcvLock, lockflags); - - DBG_ASSERT(pRxLocal->nReadyRecv <= pRxLocal->NumRfd); - DBG_RX_LEAVE(et131x_dbginfo); -} diff --git a/src/et131x/et1310_rx.h b/src/et131x/et1310_rx.h deleted file mode 100644 index ea66dbc..0000000 --- a/src/et131x/et1310_rx.h +++ /dev/null @@ -1,373 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_rx.h - Defines, structs, enums, prototypes, etc. pertaining to data - * reception. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET1310_RX_H__ -#define __ET1310_RX_H__ - -#include "et1310_address_map.h" - -#define USE_FBR0 true - -#ifdef USE_FBR0 -//#define FBR0_BUFFER_SIZE 256 -#endif - -//#define FBR1_BUFFER_SIZE 2048 - -#define FBR_CHUNKS 32 - -#define MAX_DESC_PER_RING_RX 1024 - -/* number of RFDs - default and min */ -#ifdef USE_FBR0 -#define RFD_LOW_WATER_MARK 40 -#define NIC_MIN_NUM_RFD 64 -#define NIC_DEFAULT_NUM_RFD 1024 -#else -#define RFD_LOW_WATER_MARK 20 -#define NIC_MIN_NUM_RFD 64 -#define NIC_DEFAULT_NUM_RFD 256 -#endif - -#define NUM_PACKETS_HANDLED 256 - -#define ALCATEL_BAD_STATUS 0xe47f0000 -#define ALCATEL_MULTICAST_PKT 0x01000000 -#define ALCATEL_BROADCAST_PKT 0x02000000 - -/* typedefs for Free Buffer Descriptors */ -typedef union _FBR_WORD2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 reserved:22; // bits 10-31 - u32 bi:10; // bits 0-9(Buffer Index) -#else - u32 bi:10; // bits 0-9(Buffer Index) - u32 reserved:22; // bit 10-31 -#endif - } bits; -} FBR_WORD2_t, *PFBR_WORD2_t; - -typedef struct _FBR_DESC_t { - u32 addr_lo; - u32 addr_hi; - FBR_WORD2_t word2; -} FBR_DESC_t, *PFBR_DESC_t; - -/* Typedefs for Packet Status Ring Descriptors */ -typedef union _PKT_STAT_DESC_WORD0_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - // top 16 bits are from the Alcatel Status Word as enumerated in - // PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2) -#if 0 - u32 asw_trunc:1; // bit 31(Rx frame truncated) -#endif - u32 asw_long_evt:1; // bit 31(Rx long event) - u32 asw_VLAN_tag:1; // bit 30(VLAN tag detected) - u32 asw_unsupported_op:1; // bit 29(unsupported OP code) - u32 asw_pause_frame:1; // bit 28(is a pause frame) - u32 asw_control_frame:1; // bit 27(is a control frame) - u32 asw_dribble_nibble:1; // bit 26(spurious bits after EOP) - u32 asw_broadcast:1; // bit 25(has a broadcast address) - u32 asw_multicast:1; // bit 24(has a multicast address) - u32 asw_OK:1; // bit 23(valid CRC + no code error) - u32 asw_too_long:1; // bit 22(frame length > 1518 bytes) - u32 asw_len_chk_err:1; // bit 21(frame length field incorrect) - u32 asw_CRC_err:1; // bit 20(CRC error) - u32 asw_code_err:1; // bit 19(one or more nibbles signalled as errors) - u32 asw_false_carrier_event:1; // bit 18(bad carrier since last good packet) - u32 asw_RX_DV_event:1; // bit 17(short receive event detected) - u32 asw_prev_pkt_dropped:1;// bit 16(e.g. IFG too small on previous) - u32 unused:5; // bits 11-15 - u32 vp:1; // bit 10(VLAN Packet) - u32 jp:1; // bit 9(Jumbo Packet) - u32 ft:1; // bit 8(Frame Truncated) - u32 drop:1; // bit 7(Drop packet) - u32 rxmac_error:1; // bit 6(RXMAC Error Indicator) - u32 wol:1; // bit 5(WOL Event) - u32 tcpp:1; // bit 4(TCP checksum pass) - u32 tcpa:1; // bit 3(TCP checksum assist) - u32 ipp:1; // bit 2(IP checksum pass) - u32 ipa:1; // bit 1(IP checksum assist) - u32 hp:1; // bit 0(hash pass) -#else - u32 hp:1; // bit 0(hash pass) - u32 ipa:1; // bit 1(IP checksum assist) - u32 ipp:1; // bit 2(IP checksum pass) - u32 tcpa:1; // bit 3(TCP checksum assist) - u32 tcpp:1; // bit 4(TCP checksum pass) - u32 wol:1; // bit 5(WOL Event) - u32 rxmac_error:1; // bit 6(RXMAC Error Indicator) - u32 drop:1; // bit 7(Drop packet) - u32 ft:1; // bit 8(Frame Truncated) - u32 jp:1; // bit 9(Jumbo Packet) - u32 vp:1; // bit 10(VLAN Packet) - u32 unused:5; // bits 11-15 - u32 asw_prev_pkt_dropped:1;// bit 16(e.g. IFG too small on previous) - u32 asw_RX_DV_event:1; // bit 17(short receive event detected) - u32 asw_false_carrier_event:1; // bit 18(bad carrier since last good packet) - u32 asw_code_err:1; // bit 19(one or more nibbles signalled as errors) - u32 asw_CRC_err:1; // bit 20(CRC error) - u32 asw_len_chk_err:1; // bit 21(frame length field incorrect) - u32 asw_too_long:1; // bit 22(frame length > 1518 bytes) - u32 asw_OK:1; // bit 23(valid CRC + no code error) - u32 asw_multicast:1; // bit 24(has a multicast address) - u32 asw_broadcast:1; // bit 25(has a broadcast address) - u32 asw_dribble_nibble:1; // bit 26(spurious bits after EOP) - u32 asw_control_frame:1; // bit 27(is a control frame) - u32 asw_pause_frame:1; // bit 28(is a pause frame) - u32 asw_unsupported_op:1; // bit 29(unsupported OP code) - u32 asw_VLAN_tag:1; // bit 30(VLAN tag detected) - u32 asw_long_evt:1; // bit 31(Rx long event) -#if 0 - u32 asw_trunc:1; // bit 31(Rx frame truncated) -#endif -#endif - } bits; -} PKT_STAT_DESC_WORD0_t, *PPKT_STAT_WORD0_t; - -typedef union _PKT_STAT_DESC_WORD1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:4; // bits 28-31 - u32 ri:2; // bits 26-27(Ring Index) - u32 bi:10; // bits 16-25(Buffer Index) - u32 length:16; // bit 0-15(length in bytes) -#else - u32 length:16; // bit 0-15(length in bytes) - u32 bi:10; // bits 16-25(Buffer Index) - u32 ri:2; // bits 26-27(Ring Index) - u32 unused:4; // bits 28-31 -#endif - } bits; -} PKT_STAT_DESC_WORD1_t, *PPKT_STAT_WORD1_t; - -typedef struct _PKT_STAT_DESC_t { - PKT_STAT_DESC_WORD0_t word0; - PKT_STAT_DESC_WORD1_t word1; -} PKT_STAT_DESC_t, *PPKT_STAT_DESC_t; - -/* Typedefs for the RX DMA status word */ - -/* - * RXSTAT_WORD0_t structure holds part of the status bits of the Rx DMA engine - * that get copied out to memory by the ET-1310. Word 0 is a 32 bit word - * whichcontains Free Buffer ring 0 and 1 available offset. - */ -typedef union _rxstat_word0_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 FBR1unused:5; // bits 27-31 - u32 FBR1wrap:1; // bit 26 - u32 FBR1offset:10; // bits 16-25 - u32 FBR0unused:5; // bits 11-15 - u32 FBR0wrap:1; // bit 10 - u32 FBR0offset:10; // bits 0-9 -#else - u32 FBR0offset:10; // bits 0-9 - u32 FBR0wrap:1; // bit 10 - u32 FBR0unused:5; // bits 11-15 - u32 FBR1offset:10; // bits 16-25 - u32 FBR1wrap:1; // bit 26 - u32 FBR1unused:5; // bits 27-31 -#endif - } bits; -} RXSTAT_WORD0_t, *PRXSTAT_WORD0_t; - -/* - * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine - * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word - * which contains the Packet Status Ring available offset. - */ -typedef union _rxstat_word1_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 PSRunused:3; // bits 29-31 - u32 PSRwrap:1; // bit 28 - u32 PSRoffset:12; // bits 16-27 - u32 reserved:16; // bits 0-15 -#else - u32 reserved:16; // bits 0-15 - u32 PSRoffset:12; // bits 16-27 - u32 PSRwrap:1; // bit 28 - u32 PSRunused:3; // bits 29-31 -#endif - } bits; -} RXSTAT_WORD1_t, *PRXSTAT_WORD1_t; - -/* - * RX_STATUS_BLOCK_t is sructure representing the status of the Rx DMA engine - * it sits in free memory, and is pointed to by 0x101c / 0x1020 - */ -typedef struct _rx_status_block_t { - RXSTAT_WORD0_t Word0; - RXSTAT_WORD1_t Word1; -} RX_STATUS_BLOCK_t, *PRX_STATUS_BLOCK_t; - -/* - * Structure for look-up table holding free buffer ring pointers - */ -typedef struct _FbrLookupTable { - void *Va[MAX_DESC_PER_RING_RX]; - void *Buffer1[MAX_DESC_PER_RING_RX]; - void *Buffer2[MAX_DESC_PER_RING_RX]; - u32 PAHigh[MAX_DESC_PER_RING_RX]; - u32 PALow[MAX_DESC_PER_RING_RX]; -} FBRLOOKUPTABLE, *PFBRLOOKUPTABLE; - -typedef enum { - ONE_PACKET_INTERRUPT, - FOUR_PACKET_INTERRUPT -} eRX_INTERRUPT_STATE_t, *PeRX_INTERRUPT_STATE_t; - -/* - * Structure to hold the skb's in a list - */ -typedef struct rx_skb_list_elem { - struct list_head skb_list_elem; - dma_addr_t dma_addr; - struct sk_buff *skb; -} RX_SKB_LIST_ELEM, *PRX_SKB_LIST_ELEM; - -/* - * RX_RING_t is sructure representing the adaptor's local reference(s) to the - * rings - */ -typedef struct _rx_ring_t { -#ifdef USE_FBR0 - void *pFbr0RingVa; - dma_addr_t pFbr0RingPa; - void *Fbr0MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; - dma_addr_t Fbr0MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; - uint64_t Fbr0Realpa; - uint64_t Fbr0offset; - DMA10W_t local_Fbr0_full; - u32 Fbr0NumEntries; - u32 Fbr0BufferSize; -#endif - void *pFbr1RingVa; - dma_addr_t pFbr1RingPa; - void *Fbr1MemVa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; - dma_addr_t Fbr1MemPa[MAX_DESC_PER_RING_RX / FBR_CHUNKS]; - uint64_t Fbr1Realpa; - uint64_t Fbr1offset; - FBRLOOKUPTABLE *Fbr[2]; - DMA10W_t local_Fbr1_full; - u32 Fbr1NumEntries; - u32 Fbr1BufferSize; - - void *pPSRingVa; - dma_addr_t pPSRingPa; - uint64_t pPSRingRealPa; - uint64_t pPSRingOffset; - RXDMA_PSR_FULL_OFFSET_t local_psr_full; - u32 PsrNumEntries; - - void *pRxStatusVa; - dma_addr_t pRxStatusPa; - uint64_t RxStatusRealPA; - uint64_t RxStatusOffset; - - struct list_head RecvBufferPool; - - /* RECV */ - struct list_head RecvList; - struct list_head RecvPendingList; - u32 nReadyRecv; - - u32 NumRfd; - - bool UnfinishedReceives; - - struct list_head RecvPacketPool; - - /* lookaside lists */ - struct kmem_cache *RecvLookaside; -} RX_RING_t, *PRX_RING_t; - -/* Forward reference of RFD */ -struct _MP_RFD; - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -/* PROTOTYPES for Initialization */ -int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter); -void et131x_rx_dma_memory_free(struct et131x_adapter *adapter); -int et131x_rfd_resources_alloc(struct et131x_adapter *adapter, - struct _MP_RFD *pMpRfd); -void et131x_rfd_resources_free(struct et131x_adapter *adapter, - struct _MP_RFD *pMpRfd); -int et131x_init_recv(struct et131x_adapter *adapter); - -void ConfigRxDmaRegs(struct et131x_adapter *adapter); -void SetRxDmaTimer(struct et131x_adapter *adapter); -void et131x_rx_dma_disable(struct et131x_adapter *adapter); -void et131x_rx_dma_enable(struct et131x_adapter *adapter); - -void et131x_reset_recv(struct et131x_adapter *adapter); - -void et131x_handle_recv_interrupt(struct et131x_adapter *adapter); - -#endif /* __ET1310_RX_H__ */ diff --git a/src/et131x/et1310_tx.c b/src/et131x/et1310_tx.c deleted file mode 100644 index a95c260..0000000 --- a/src/et131x/et1310_tx.c +++ /dev/null @@ -1,1525 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_tx.c - Routines used to perform data transmission. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" -#include "et131x_isr.h" - -#include "et1310_tx.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -static void et131x_update_tcb_list(struct et131x_adapter *pAdapter); -static void et131x_check_send_wait_list(struct et131x_adapter *pAdapter); -static inline void et131x_free_send_packet(struct et131x_adapter *pAdapter, - PMP_TCB pMpTcb); -static int et131x_send_packet(struct sk_buff *skb, - struct et131x_adapter *pAdapter); -static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb); - -/** - * et131x_tx_dma_memory_alloc - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success and errno on failure (as defined in errno.h). - * - * Allocates memory that will be visible both to the device and to the CPU. - * The OS will pass us packets, pointers to which we will insert in the Tx - * Descriptor queue. The device will read this queue to find the packets in - * memory. The device will update the "status" in memory each time it xmits a - * packet. - */ -int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter) -{ - int desc_size = 0; - TX_RING_t *tx_ring = &adapter->TxRing; - - DBG_ENTER(et131x_dbginfo); - - /* Allocate memory for the TCB's (Transmit Control Block) */ - adapter->TxRing.MpTcbMem = (MP_TCB *) kcalloc(NUM_TCB, sizeof(MP_TCB), - GFP_ATOMIC | GFP_DMA); - if (!adapter->TxRing.MpTcbMem) { - DBG_ERROR(et131x_dbginfo, "Cannot alloc memory for TCBs\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Allocate enough memory for the Tx descriptor ring, and allocate - * some extra so that the ring can be aligned on a 4k boundary. - */ - desc_size = (sizeof(TX_DESC_ENTRY_t) * NUM_DESC_PER_RING_TX) + 4096 - 1; - tx_ring->pTxDescRingVa = - (PTX_DESC_ENTRY_t) pci_alloc_consistent(adapter->pdev, desc_size, - &tx_ring->pTxDescRingPa); - if (!adapter->TxRing.pTxDescRingVa) { - DBG_ERROR(et131x_dbginfo, "Cannot alloc memory for Tx Ring\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Save physical address - * - * NOTE: pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here before - * storing the adjusted address. - */ - tx_ring->pTxDescRingAdjustedPa = tx_ring->pTxDescRingPa; - - /* Align Tx Descriptor Ring on a 4k (0x1000) byte boundary */ - et131x_align_allocated_memory(adapter, - &tx_ring->pTxDescRingAdjustedPa, - &tx_ring->TxDescOffset, 0x0FFF); - - tx_ring->pTxDescRingVa += tx_ring->TxDescOffset; - - /* Allocate memory for the Tx status block */ - tx_ring->pTxStatusVa = pci_alloc_consistent(adapter->pdev, - sizeof(TX_STATUS_BLOCK_t), - &tx_ring->pTxStatusPa); - if (!adapter->TxRing.pTxStatusPa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Tx status block\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - /* Allocate memory for a dummy buffer */ - tx_ring->pTxDummyBlkVa = pci_alloc_consistent(adapter->pdev, - NIC_MIN_PACKET_SIZE, - &tx_ring->pTxDummyBlkPa); - if (!adapter->TxRing.pTxDummyBlkPa) { - DBG_ERROR(et131x_dbginfo, - "Cannot alloc memory for Tx dummy buffer\n"); - DBG_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - DBG_LEAVE(et131x_dbginfo); - return 0; -} - -/** - * et131x_tx_dma_memory_free - Free all memory allocated within this module - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success and errno on failure (as defined in errno.h). - */ -void et131x_tx_dma_memory_free(struct et131x_adapter *adapter) -{ - int desc_size = 0; - - DBG_ENTER(et131x_dbginfo); - - if (adapter->TxRing.pTxDescRingVa) { - /* Free memory relating to Tx rings here */ - adapter->TxRing.pTxDescRingVa -= adapter->TxRing.TxDescOffset; - - desc_size = - (sizeof(TX_DESC_ENTRY_t) * NUM_DESC_PER_RING_TX) + 4096 - 1; - - pci_free_consistent(adapter->pdev, - desc_size, - adapter->TxRing.pTxDescRingVa, - adapter->TxRing.pTxDescRingPa); - - adapter->TxRing.pTxDescRingVa = NULL; - } - - /* Free memory for the Tx status block */ - if (adapter->TxRing.pTxStatusVa) { - pci_free_consistent(adapter->pdev, - sizeof(TX_STATUS_BLOCK_t), - adapter->TxRing.pTxStatusVa, - adapter->TxRing.pTxStatusPa); - - adapter->TxRing.pTxStatusVa = NULL; - } - - /* Free memory for the dummy buffer */ - if (adapter->TxRing.pTxDummyBlkVa) { - pci_free_consistent(adapter->pdev, - NIC_MIN_PACKET_SIZE, - adapter->TxRing.pTxDummyBlkVa, - adapter->TxRing.pTxDummyBlkPa); - - adapter->TxRing.pTxDummyBlkVa = NULL; - } - - /* Free the memory for MP_TCB structures */ - if (adapter->TxRing.MpTcbMem) { - kfree(adapter->TxRing.MpTcbMem); - adapter->TxRing.MpTcbMem = NULL; - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * ConfigTxDmaRegs - Set up the tx dma section of the JAGCore. - * @adapter: pointer to our private adapter structure - */ -void ConfigTxDmaRegs(struct et131x_adapter *pAdapter) -{ - struct _TXDMA_t __iomem *pTxDma = &pAdapter->CSRAddress->txdma; - - DBG_ENTER(et131x_dbginfo); - - /* Load the hardware with the start of the transmit descriptor ring. */ - writel((uint32_t) (pAdapter->TxRing.pTxDescRingAdjustedPa >> 32), - &pTxDma->pr_base_hi); - writel((uint32_t) pAdapter->TxRing.pTxDescRingAdjustedPa, - &pTxDma->pr_base_lo); - - /* Initialise the transmit DMA engine */ - writel(NUM_DESC_PER_RING_TX - 1, &pTxDma->pr_num_des.value); - - /* Load the completion writeback physical address - * - * NOTE: pci_alloc_consistent(), used above to alloc DMA regions, - * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses - * are ever returned, make sure the high part is retrieved here before - * storing the adjusted address. - */ - writel(0, &pTxDma->dma_wb_base_hi); - writel(pAdapter->TxRing.pTxStatusPa, &pTxDma->dma_wb_base_lo); - - memset(pAdapter->TxRing.pTxStatusVa, 0, sizeof(TX_STATUS_BLOCK_t)); - - writel(0, &pTxDma->service_request.value); - pAdapter->TxRing.txDmaReadyToSend.value = 0; - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310 - * @pAdapter: pointer to our adapter structure - */ -void et131x_tx_dma_disable(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Setup the tramsmit dma configuration register */ - writel(0x101, &pAdapter->CSRAddress->txdma.csr.value); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_tx_dma_enable - re-start of Tx_DMA on the ET1310. - * @pAdapter: pointer to our adapter structure - * - * Mainly used after a return to the D0 (full-power) state from a lower state. - */ -void et131x_tx_dma_enable(struct et131x_adapter *pAdapter) -{ - DBG_ENTER(et131x_dbginfo); - - if (pAdapter->RegistryPhyLoopbk) { - /* TxDMA is disabled for loopback operation. */ - writel(0x101, &pAdapter->CSRAddress->txdma.csr.value); - } else { - TXDMA_CSR_t csr = { 0 }; - - /* Setup the transmit dma configuration register for normal - * operation - */ - csr.bits.sngl_epkt_mode = 1; - csr.bits.halt = 0; - csr.bits.cache_thrshld = pAdapter->RegistryDMACache; - writel(csr.value, &pAdapter->CSRAddress->txdma.csr.value); - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_init_send - Initialize send data structures - * @adapter: pointer to our private adapter structure - */ -void et131x_init_send(struct et131x_adapter *adapter) -{ - PMP_TCB pMpTcb; - uint32_t TcbCount; - TX_RING_t *tx_ring; - - DBG_ENTER(et131x_dbginfo); - - /* Setup some convenience pointers */ - tx_ring = &adapter->TxRing; - pMpTcb = adapter->TxRing.MpTcbMem; - - tx_ring->TCBReadyQueueHead = pMpTcb; - - /* Go through and set up each TCB */ - for (TcbCount = 0; TcbCount < NUM_TCB; TcbCount++) { - memset(pMpTcb, 0, sizeof(MP_TCB)); - - /* Set the link pointer in HW TCB to the next TCB in the - * chain. If this is the last TCB in the chain, also set the - * tail pointer. - */ - if (TcbCount < NUM_TCB - 1) { - pMpTcb->Next = pMpTcb + 1; - } else { - tx_ring->TCBReadyQueueTail = pMpTcb; - pMpTcb->Next = (PMP_TCB) NULL; - } - - pMpTcb++; - } - - /* Curr send queue should now be empty */ - tx_ring->CurrSendHead = (PMP_TCB) NULL; - tx_ring->CurrSendTail = (PMP_TCB) NULL; - - INIT_LIST_HEAD(&adapter->TxRing.SendWaitQueue); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_send_packets - This function is called by the OS to send packets - * @skb: the packet(s) to send - * @netdev:device on which to TX the above packet(s) - * - * Return 0 in almost all cases; non-zero value in extreme hard failure only - */ -int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev) -{ - int status = 0; - struct et131x_adapter *pAdapter = NULL; - - DBG_TX_ENTER(et131x_dbginfo); - - pAdapter = netdev_priv(netdev); - - /* Send these packets - * - * NOTE: The Linux Tx entry point is only given one packet at a time - * to Tx, so the PacketCount and it's array used makes no sense here - */ - - /* Queue is not empty or TCB is not available */ - if (!list_empty(&pAdapter->TxRing.SendWaitQueue) || - MP_TCB_RESOURCES_NOT_AVAILABLE(pAdapter)) { - /* NOTE: If there's an error on send, no need to queue the - * packet under Linux; if we just send an error up to the - * netif layer, it will resend the skb to us. - */ - DBG_VERBOSE(et131x_dbginfo, "TCB Resources Not Available\n"); - status = -ENOMEM; - } else { - /* We need to see if the link is up; if it's not, make the - * netif layer think we're good and drop the packet - */ - //if( MP_SHOULD_FAIL_SEND( pAdapter ) || pAdapter->DriverNoPhyAccess ) - if (MP_SHOULD_FAIL_SEND(pAdapter) || pAdapter->DriverNoPhyAccess - || !netif_carrier_ok(netdev)) { - DBG_VERBOSE(et131x_dbginfo, - "Can't Tx, Link is DOWN; drop the packet\n"); - - dev_kfree_skb_any(skb); - skb = NULL; - - pAdapter->net_stats.tx_dropped++; - } else { - status = et131x_send_packet(skb, pAdapter); - - if (status == -ENOMEM) { - - /* NOTE: If there's an error on send, no need - * to queue the packet under Linux; if we just - * send an error up to the netif layer, it - * will resend the skb to us. - */ - DBG_WARNING(et131x_dbginfo, - "Resources problem, Queue tx packet\n"); - } else if (status != 0) { - /* On any other error, make netif think we're - * OK and drop the packet - */ - DBG_WARNING(et131x_dbginfo, - "General error, drop packet\n"); - - dev_kfree_skb_any(skb); - skb = NULL; - - pAdapter->net_stats.tx_dropped++; - } - } - } - - DBG_TX_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_send_packet - Do the work to send a packet - * @skb: the packet(s) to send - * @pAdapter: a pointer to the device's private adapter structure - * - * Return 0 in almost all cases; non-zero value in extreme hard failure only. - * - * Assumption: Send spinlock has been acquired - */ -static int et131x_send_packet(struct sk_buff *skb, - struct et131x_adapter *pAdapter) -{ - int status = 0; - PMP_TCB pMpTcb = NULL; - uint16_t *pShBufVa; - unsigned long lockflags; - - DBG_TX_ENTER(et131x_dbginfo); - - /* Is our buffer scattered, or continuous? */ - if (skb_shinfo(skb)->nr_frags == 0) { - DBG_TX(et131x_dbginfo, "Scattered buffer: NO\n"); - } else { - DBG_TX(et131x_dbginfo, "Scattered buffer: YES, Num Frags: %d\n", - skb_shinfo(skb)->nr_frags); - } - - /* All packets must have at least a MAC address and a protocol type */ - if (skb->len < ETH_HLEN) { - DBG_ERROR(et131x_dbginfo, - "Packet size < ETH_HLEN (14 bytes)\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* Get a TCB for this packet */ - spin_lock_irqsave(&pAdapter->TCBReadyQLock, lockflags); - - pMpTcb = pAdapter->TxRing.TCBReadyQueueHead; - - if (pMpTcb == NULL) { - spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags); - - DBG_WARNING(et131x_dbginfo, "Can't obtain a TCB\n"); - DBG_TX_LEAVE(et131x_dbginfo); - return -ENOMEM; - } - - pAdapter->TxRing.TCBReadyQueueHead = pMpTcb->Next; - - if (pAdapter->TxRing.TCBReadyQueueHead == NULL) { - pAdapter->TxRing.TCBReadyQueueTail = NULL; - } - - spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags); - - pMpTcb->PacketLength = skb->len; - pMpTcb->Packet = skb; - - if ((skb->data != NULL) && ((skb->len - skb->data_len) >= 6)) { - pShBufVa = (uint16_t *) skb->data; - - if ((pShBufVa[0] == 0xffff) && - (pShBufVa[1] == 0xffff) && (pShBufVa[2] == 0xffff)) { - MP_SET_FLAG(pMpTcb, fMP_DEST_BROAD); - } else if ((pShBufVa[0] & 0x3) == 0x0001) { - MP_SET_FLAG(pMpTcb, fMP_DEST_MULTI); - } - } - - pMpTcb->Next = NULL; - - /* Call the NIC specific send handler. */ - if (status == 0) { - status = nic_send_packet(pAdapter, pMpTcb); - } - - if (status != 0) { - spin_lock_irqsave(&pAdapter->TCBReadyQLock, lockflags); - - if (pAdapter->TxRing.TCBReadyQueueTail) { - pAdapter->TxRing.TCBReadyQueueTail->Next = pMpTcb; - } else { - /* Apparently ready Q is empty. */ - pAdapter->TxRing.TCBReadyQueueHead = pMpTcb; - } - - pAdapter->TxRing.TCBReadyQueueTail = pMpTcb; - - spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags); - - DBG_TX_LEAVE(et131x_dbginfo); - return status; - } - - DBG_ASSERT(pAdapter->TxRing.nBusySend <= NUM_TCB); - - DBG_TX_LEAVE(et131x_dbginfo); - return 0; -} - -/** - * nic_send_packet - NIC specific send handler for version B silicon. - * @pAdapter: pointer to our adapter - * @pMpTcb: pointer to MP_TCB - * - * Returns 0 or errno. - */ -static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb) -{ - uint32_t loopIndex; - TX_DESC_ENTRY_t CurDesc[24]; - uint32_t FragmentNumber = 0; - uint32_t iThisCopy, iRemainder; - struct sk_buff *pPacket = pMpTcb->Packet; - uint32_t FragListCount = skb_shinfo(pPacket)->nr_frags + 1; - struct skb_frag_struct *pFragList = &skb_shinfo(pPacket)->frags[0]; - unsigned long lockflags1, lockflags2; - - DBG_TX_ENTER(et131x_dbginfo); - - /* Part of the optimizations of this send routine restrict us to - * sending 24 fragments at a pass. In practice we should never see - * more than 5 fragments. - * - * NOTE: The older version of this function (below) can handle any - * number of fragments. If needed, we can call this function, - * although it is less efficient. - */ - if (FragListCount > 23) { - DBG_TX_LEAVE(et131x_dbginfo); - return -EIO; - } - - memset(CurDesc, 0, sizeof(TX_DESC_ENTRY_t) * (FragListCount + 1)); - - for (loopIndex = 0; loopIndex < FragListCount; loopIndex++) { - /* If there is something in this element, lets get a - * descriptor from the ring and get the necessary data - */ - if (loopIndex == 0) { - /* If the fragments are smaller than a standard MTU, - * then map them to a single descriptor in the Tx - * Desc ring. However, if they're larger, as is - * possible with support for jumbo packets, then - * split them each across 2 descriptors. - * - * This will work until we determine why the hardware - * doesn't seem to like large fragments. - */ - if ((pPacket->len - pPacket->data_len) <= 1514) { - DBG_TX(et131x_dbginfo, - "Got packet of length %d, " - "filling desc entry %d, " - "TCB: 0x%p\n", - (pPacket->len - pPacket->data_len), - pAdapter->TxRing.txDmaReadyToSend.bits. - val, pMpTcb); - - CurDesc[FragmentNumber].DataBufferPtrHigh = 0; - - CurDesc[FragmentNumber].word2.bits. - length_in_bytes = - pPacket->len - pPacket->data_len; - - /* NOTE: Here, the dma_addr_t returned from - * pci_map_single() is implicitly cast as a - * uint32_t. Although dma_addr_t can be - * 64-bit, the address returned by - * pci_map_single() is always 32-bit - * addressable (as defined by the pci/dma - * subsystem) - */ - CurDesc[FragmentNumber++].DataBufferPtrLow = - pci_map_single(pAdapter->pdev, - pPacket->data, - pPacket->len - - pPacket->data_len, - PCI_DMA_TODEVICE); - } else { - DBG_TX(et131x_dbginfo, - "Got packet of length %d, " - "filling desc entry %d, " - "TCB: 0x%p\n", - (pPacket->len - pPacket->data_len), - pAdapter->TxRing.txDmaReadyToSend.bits. - val, pMpTcb); - - CurDesc[FragmentNumber].DataBufferPtrHigh = 0; - - CurDesc[FragmentNumber].word2.bits. - length_in_bytes = - ((pPacket->len - pPacket->data_len) / 2); - - /* NOTE: Here, the dma_addr_t returned from - * pci_map_single() is implicitly cast as a - * uint32_t. Although dma_addr_t can be - * 64-bit, the address returned by - * pci_map_single() is always 32-bit - * addressable (as defined by the pci/dma - * subsystem) - */ - CurDesc[FragmentNumber++].DataBufferPtrLow = - pci_map_single(pAdapter->pdev, - pPacket->data, - ((pPacket->len - - pPacket->data_len) / 2), - PCI_DMA_TODEVICE); - CurDesc[FragmentNumber].DataBufferPtrHigh = 0; - - CurDesc[FragmentNumber].word2.bits. - length_in_bytes = - ((pPacket->len - pPacket->data_len) / 2); - - /* NOTE: Here, the dma_addr_t returned from - * pci_map_single() is implicitly cast as a - * uint32_t. Although dma_addr_t can be - * 64-bit, the address returned by - * pci_map_single() is always 32-bit - * addressable (as defined by the pci/dma - * subsystem) - */ - CurDesc[FragmentNumber++].DataBufferPtrLow = - pci_map_single(pAdapter->pdev, - pPacket->data + - ((pPacket->len - - pPacket->data_len) / 2), - ((pPacket->len - - pPacket->data_len) / 2), - PCI_DMA_TODEVICE); - } - } else { - DBG_TX(et131x_dbginfo, - "Got packet of length %d," - "filling desc entry %d\n" - "TCB: 0x%p\n", - pFragList[loopIndex].size, - pAdapter->TxRing.txDmaReadyToSend.bits.val, - pMpTcb); - - CurDesc[FragmentNumber].DataBufferPtrHigh = 0; - - CurDesc[FragmentNumber].word2.bits.length_in_bytes = - pFragList[loopIndex - 1].size; - - /* NOTE: Here, the dma_addr_t returned from - * pci_map_page() is implicitly cast as a uint32_t. - * Although dma_addr_t can be 64-bit, the address - * returned by pci_map_page() is always 32-bit - * addressable (as defined by the pci/dma subsystem) - */ - CurDesc[FragmentNumber++].DataBufferPtrLow = - pci_map_page(pAdapter->pdev, - pFragList[loopIndex - 1].page, - pFragList[loopIndex - 1].page_offset, - pFragList[loopIndex - 1].size, - PCI_DMA_TODEVICE); - } - } - - if (FragmentNumber == 0) { - DBG_WARNING(et131x_dbginfo, "No. frags is 0\n"); - return -EIO; - } - - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { - if (++pAdapter->TxRing.TxPacketsSinceLastinterrupt == - pAdapter->RegistryTxNumBuffers) { - CurDesc[FragmentNumber - 1].word3.value = 0x5; - pAdapter->TxRing.TxPacketsSinceLastinterrupt = 0; - } else { - CurDesc[FragmentNumber - 1].word3.value = 0x1; - } - } else { - CurDesc[FragmentNumber - 1].word3.value = 0x5; - } - - CurDesc[0].word3.bits.f = 1; - - pMpTcb->WrIndexStart = pAdapter->TxRing.txDmaReadyToSend; - pMpTcb->PacketStaleCount = 0; - - spin_lock_irqsave(&pAdapter->SendHWLock, lockflags1); - - iThisCopy = - NUM_DESC_PER_RING_TX - pAdapter->TxRing.txDmaReadyToSend.bits.val; - - if (iThisCopy >= FragmentNumber) { - iRemainder = 0; - iThisCopy = FragmentNumber; - } else { - iRemainder = FragmentNumber - iThisCopy; - } - - memcpy(pAdapter->TxRing.pTxDescRingVa + - pAdapter->TxRing.txDmaReadyToSend.bits.val, CurDesc, - sizeof(TX_DESC_ENTRY_t) * iThisCopy); - - pAdapter->TxRing.txDmaReadyToSend.bits.val += iThisCopy; - - if ((pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) || - (pAdapter->TxRing.txDmaReadyToSend.bits.val == - NUM_DESC_PER_RING_TX)) { - if (pAdapter->TxRing.txDmaReadyToSend.bits.wrap) { - pAdapter->TxRing.txDmaReadyToSend.value = 0; - } else { - pAdapter->TxRing.txDmaReadyToSend.value = 0x400; - } - } - - if (iRemainder) { - memcpy(pAdapter->TxRing.pTxDescRingVa, - CurDesc + iThisCopy, - sizeof(TX_DESC_ENTRY_t) * iRemainder); - - pAdapter->TxRing.txDmaReadyToSend.bits.val += iRemainder; - } - - if (pAdapter->TxRing.txDmaReadyToSend.bits.val == 0) { - if (pAdapter->TxRing.txDmaReadyToSend.value) { - pMpTcb->WrIndex.value = NUM_DESC_PER_RING_TX - 1; - } else { - pMpTcb->WrIndex.value = - 0x400 | (NUM_DESC_PER_RING_TX - 1); - } - } else { - pMpTcb->WrIndex.value = - pAdapter->TxRing.txDmaReadyToSend.value - 1; - } - - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2); - - if (pAdapter->TxRing.CurrSendTail) { - pAdapter->TxRing.CurrSendTail->Next = pMpTcb; - } else { - pAdapter->TxRing.CurrSendHead = pMpTcb; - } - - pAdapter->TxRing.CurrSendTail = pMpTcb; - - DBG_ASSERT(pMpTcb->Next == NULL); - - pAdapter->TxRing.nBusySend++; - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags2); - - /* Write the new write pointer back to the device. */ - writel(pAdapter->TxRing.txDmaReadyToSend.value, - &pAdapter->CSRAddress->txdma.service_request.value); - - /* For Gig only, we use Tx Interrupt coalescing. Enable the software - * timer to wake us up if this packet isn't followed by N more. - */ - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { - writel(pAdapter->RegistryTxTimeInterval * NANO_IN_A_MICRO, - &pAdapter->CSRAddress->global.watchdog_timer); - } - - spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags1); - - DBG_TX_LEAVE(et131x_dbginfo); - return 0; -} - -/* - * NOTE: For now, keep this older version of NICSendPacket around for - * reference, even though it's not used - */ -#if 0 - -/** - * NICSendPacket - NIC specific send handler. - * @pAdapter: pointer to our adapter - * @pMpTcb: pointer to MP_TCB - * - * Returns 0 on succes, errno on failure. - * - * This version of the send routine is designed for version A silicon. - * Assumption - Send spinlock has been acquired. - */ -static int nic_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb) -{ - uint32_t loopIndex, fragIndex, loopEnd; - uint32_t iSplitFirstElement = 0; - uint32_t SegmentSize = 0; - TX_DESC_ENTRY_t CurDesc; - TX_DESC_ENTRY_t *CurDescPostCopy = NULL; - uint32_t SlotsAvailable; - DMA10W_t ServiceComplete; - unsigned int lockflags1, lockflags2; - struct sk_buff *pPacket = pMpTcb->Packet; - uint32_t FragListCount = skb_shinfo(pPacket)->nr_frags + 1; - struct skb_frag_struct *pFragList = &skb_shinfo(pPacket)->frags[0]; - - DBG_TX_ENTER(et131x_dbginfo); - - ServiceComplete.value = - readl(&pAdapter->CSRAddress->txdma.NewServiceComplete.value); - - /* - * Attempt to fix TWO hardware bugs: - * 1) NEVER write an odd number of descriptors. - * 2) If packet length is less than NIC_MIN_PACKET_SIZE, then pad the - * packet to NIC_MIN_PACKET_SIZE bytes by adding a new last - * descriptor IN HALF DUPLEX MODE ONLY - * NOTE that (2) interacts with (1). If the packet is less than - * NIC_MIN_PACKET_SIZE bytes then we will append a descriptor. - * Therefore if it is even now, it will eventually end up odd, and - * so will need adjusting. - * - * VLAN tags get involved since VLAN tags add another one or two - * segments. - */ - DBG_TX(et131x_dbginfo, - "pMpTcb->PacketLength: %d\n", pMpTcb->PacketLength); - - if ((pAdapter->uiDuplexMode == 0) - && (pMpTcb->PacketLength < NIC_MIN_PACKET_SIZE)) { - DBG_TX(et131x_dbginfo, - "HALF DUPLEX mode AND len < MIN_PKT_SIZE\n"); - if ((FragListCount & 0x1) == 0) { - DBG_TX(et131x_dbginfo, - "Even number of descs, split 1st elem\n"); - iSplitFirstElement = 1; - //SegmentSize = pFragList[0].size / 2; - SegmentSize = (pPacket->len - pPacket->data_len) / 2; - } - } else if (FragListCount & 0x1) { - DBG_TX(et131x_dbginfo, "Odd number of descs, split 1st elem\n"); - - iSplitFirstElement = 1; - //SegmentSize = pFragList[0].size / 2; - SegmentSize = (pPacket->len - pPacket->data_len) / 2; - } - - spin_lock_irqsave(&pAdapter->SendHWLock, lockflags1); - - if (pAdapter->TxRing.txDmaReadyToSend.bits.serv_req_wrap == - ServiceComplete.bits.serv_cpl_wrap) { - /* The ring hasn't wrapped. Slots available should be - * (RING_SIZE) - the difference between the two pointers. - */ - SlotsAvailable = NUM_DESC_PER_RING_TX - - (pAdapter->TxRing.txDmaReadyToSend.bits.serv_req - - ServiceComplete.bits.serv_cpl); - } else { - /* The ring has wrapped. Slots available should be the - * difference between the two pointers. - */ - SlotsAvailable = ServiceComplete.bits.serv_cpl - - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req; - } - - if ((FragListCount + iSplitFirstElement) > SlotsAvailable) { - DBG_WARNING(et131x_dbginfo, - "Not Enough Space in Tx Desc Ring\n"); - spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags1); - return -ENOMEM; - } - - loopEnd = (FragListCount) + iSplitFirstElement; - fragIndex = 0; - - DBG_TX(et131x_dbginfo, - "TCB : 0x%p\n" - "Packet (SKB) : 0x%p\t Packet->len: %d\t Packet->data_len: %d\n" - "FragListCount : %d\t iSplitFirstElement: %d\t loopEnd:%d\n", - pMpTcb, - pPacket, pPacket->len, pPacket->data_len, - FragListCount, iSplitFirstElement, loopEnd); - - for (loopIndex = 0; loopIndex < loopEnd; loopIndex++) { - if (loopIndex > iSplitFirstElement) { - fragIndex++; - } - - DBG_TX(et131x_dbginfo, - "In loop, loopIndex: %d\t fragIndex: %d\n", loopIndex, - fragIndex); - - /* If there is something in this element, let's get a - * descriptor from the ring and get the necessary data - */ - DBG_TX(et131x_dbginfo, - "Packet Length %d," - "filling desc entry %d\n", - pPacket->len, - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req); - - // NOTE - Should we do a paranoia check here to make sure the fragment - // actually has a length? It's HIGHLY unlikely the fragment would - // contain no data... - if (1) { - // NOTE - Currently always getting 32-bit addrs, and dma_addr_t is - // only 32-bit, so leave "high" ptr value out for now - CurDesc.DataBufferPtrHigh = 0; - - CurDesc.word2.value = 0; - CurDesc.word3.value = 0; - - if (fragIndex == 0) { - if (iSplitFirstElement) { - DBG_TX(et131x_dbginfo, - "Split first element: YES\n"); - - if (loopIndex == 0) { - DBG_TX(et131x_dbginfo, - "Got fragment of length %d, fragIndex: %d\n", - pPacket->len - - pPacket->data_len, - fragIndex); - DBG_TX(et131x_dbginfo, - "SegmentSize: %d\n", - SegmentSize); - - CurDesc.word2.bits. - length_in_bytes = - SegmentSize; - CurDesc.DataBufferPtrLow = - pci_map_single(pAdapter-> - pdev, - pPacket-> - data, - SegmentSize, - PCI_DMA_TODEVICE); - DBG_TX(et131x_dbginfo, - "pci_map_single() returns: 0x%08x\n", - CurDesc. - DataBufferPtrLow); - } else { - DBG_TX(et131x_dbginfo, - "Got fragment of length %d, fragIndex: %d\n", - pPacket->len - - pPacket->data_len, - fragIndex); - DBG_TX(et131x_dbginfo, - "Leftover Size: %d\n", - (pPacket->len - - pPacket->data_len - - SegmentSize)); - - CurDesc.word2.bits. - length_in_bytes = - ((pPacket->len - - pPacket->data_len) - - SegmentSize); - CurDesc.DataBufferPtrLow = - pci_map_single(pAdapter-> - pdev, - (pPacket-> - data + - SegmentSize), - (pPacket-> - len - - pPacket-> - data_len - - SegmentSize), - PCI_DMA_TODEVICE); - DBG_TX(et131x_dbginfo, - "pci_map_single() returns: 0x%08x\n", - CurDesc. - DataBufferPtrLow); - } - } else { - DBG_TX(et131x_dbginfo, - "Split first element: NO\n"); - - CurDesc.word2.bits.length_in_bytes = - pPacket->len - pPacket->data_len; - - CurDesc.DataBufferPtrLow = - pci_map_single(pAdapter->pdev, - pPacket->data, - (pPacket->len - - pPacket->data_len), - PCI_DMA_TODEVICE); - DBG_TX(et131x_dbginfo, - "pci_map_single() returns: 0x%08x\n", - CurDesc.DataBufferPtrLow); - } - } else { - - CurDesc.word2.bits.length_in_bytes = - pFragList[fragIndex - 1].size; - CurDesc.DataBufferPtrLow = - pci_map_page(pAdapter->pdev, - pFragList[fragIndex - 1].page, - pFragList[fragIndex - - 1].page_offset, - pFragList[fragIndex - 1].size, - PCI_DMA_TODEVICE); - DBG_TX(et131x_dbginfo, - "pci_map_page() returns: 0x%08x\n", - CurDesc.DataBufferPtrLow); - } - - if (loopIndex == 0) { - /* This is the first descriptor of the packet - * - * Set the "f" bit to indicate this is the - * first descriptor in the packet. - */ - DBG_TX(et131x_dbginfo, - "This is our FIRST descriptor\n"); - CurDesc.word3.bits.f = 1; - - pMpTcb->WrIndexStart = - pAdapter->TxRing.txDmaReadyToSend; - } - - if ((loopIndex == (loopEnd - 1)) && - (pAdapter->uiDuplexMode || - (pMpTcb->PacketLength >= NIC_MIN_PACKET_SIZE))) { - /* This is the Last descriptor of the packet */ - DBG_TX(et131x_dbginfo, - "THIS is our LAST descriptor\n"); - - if (pAdapter->uiLinkSpeed == - TRUEPHY_SPEED_1000MBPS) { - if (++pAdapter->TxRing. - TxPacketsSinceLastinterrupt >= - pAdapter->RegistryTxNumBuffers) { - CurDesc.word3.value = 0x5; - pAdapter->TxRing. - TxPacketsSinceLastinterrupt - = 0; - } else { - CurDesc.word3.value = 0x1; - } - } else { - CurDesc.word3.value = 0x5; - } - - /* Following index will be used during freeing - * of packet - */ - pMpTcb->WrIndex = - pAdapter->TxRing.txDmaReadyToSend; - pMpTcb->PacketStaleCount = 0; - } - - /* Copy the descriptor (filled above) into the - * descriptor ring at the next free entry. Advance - * the "next free entry" variable - */ - memcpy(pAdapter->TxRing.pTxDescRingVa + - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req, - &CurDesc, sizeof(TX_DESC_ENTRY_t)); - - CurDescPostCopy = - pAdapter->TxRing.pTxDescRingVa + - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req; - - DBG_TX(et131x_dbginfo, - "CURRENT DESCRIPTOR\n" - "\tAddress : 0x%p\n" - "\tDataBufferPtrHigh : 0x%08x\n" - "\tDataBufferPtrLow : 0x%08x\n" - "\tword2 : 0x%08x\n" - "\tword3 : 0x%08x\n", - CurDescPostCopy, - CurDescPostCopy->DataBufferPtrHigh, - CurDescPostCopy->DataBufferPtrLow, - CurDescPostCopy->word2.value, - CurDescPostCopy->word3.value); - - if (++pAdapter->TxRing.txDmaReadyToSend.bits.serv_req >= - NUM_DESC_PER_RING_TX) { - if (pAdapter->TxRing.txDmaReadyToSend.bits. - serv_req_wrap) { - pAdapter->TxRing.txDmaReadyToSend. - value = 0; - } else { - pAdapter->TxRing.txDmaReadyToSend. - value = 0x400; - } - } - } - } - - if (pAdapter->uiDuplexMode == 0 && - pMpTcb->PacketLength < NIC_MIN_PACKET_SIZE) { - // NOTE - Same 32/64-bit issue as above... - CurDesc.DataBufferPtrHigh = 0x0; - CurDesc.DataBufferPtrLow = pAdapter->TxRing.pTxDummyBlkPa; - CurDesc.word2.value = 0; - - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { - if (++pAdapter->TxRing.TxPacketsSinceLastinterrupt >= - pAdapter->RegistryTxNumBuffers) { - CurDesc.word3.value = 0x5; - pAdapter->TxRing.TxPacketsSinceLastinterrupt = - 0; - } else { - CurDesc.word3.value = 0x1; - } - } else { - CurDesc.word3.value = 0x5; - } - - CurDesc.word2.bits.length_in_bytes = - NIC_MIN_PACKET_SIZE - pMpTcb->PacketLength; - - pMpTcb->WrIndex = pAdapter->TxRing.txDmaReadyToSend; - - memcpy(pAdapter->TxRing.pTxDescRingVa + - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req, - &CurDesc, sizeof(TX_DESC_ENTRY_t)); - - CurDescPostCopy = - pAdapter->TxRing.pTxDescRingVa + - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req; - - DBG_TX(et131x_dbginfo, - "CURRENT DESCRIPTOR\n" - "\tAddress : 0x%p\n" - "\tDataBufferPtrHigh : 0x%08x\n" - "\tDataBufferPtrLow : 0x%08x\n" - "\tword2 : 0x%08x\n" - "\tword3 : 0x%08x\n", - CurDescPostCopy, - CurDescPostCopy->DataBufferPtrHigh, - CurDescPostCopy->DataBufferPtrLow, - CurDescPostCopy->word2.value, - CurDescPostCopy->word3.value); - - if (++pAdapter->TxRing.txDmaReadyToSend.bits.serv_req >= - NUM_DESC_PER_RING_TX) { - if (pAdapter->TxRing.txDmaReadyToSend.bits. - serv_req_wrap) { - pAdapter->TxRing.txDmaReadyToSend.value = 0; - } else { - pAdapter->TxRing.txDmaReadyToSend.value = 0x400; - } - } - - DBG_TX(et131x_dbginfo, "Padding descriptor %d by %d bytes\n", - //pAdapter->TxRing.txDmaReadyToSend.value, - pAdapter->TxRing.txDmaReadyToSend.bits.serv_req, - NIC_MIN_PACKET_SIZE - pMpTcb->PacketLength); - } - - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags2); - - if (pAdapter->TxRing.CurrSendTail) { - pAdapter->TxRing.CurrSendTail->Next = pMpTcb; - } else { - pAdapter->TxRing.CurrSendHead = pMpTcb; - } - - pAdapter->TxRing.CurrSendTail = pMpTcb; - - DBG_ASSERT(pMpTcb->Next == NULL); - - pAdapter->TxRing.nBusySend++; - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags2); - - /* Write the new write pointer back to the device. */ - writel(pAdapter->TxRing.txDmaReadyToSend.value, - &pAdapter->CSRAddress->txdma.service_request.value); - -#ifdef CONFIG_ET131X_DEBUG - DumpDeviceBlock(DBG_TX_ON, pAdapter, 1); -#endif - - /* For Gig only, we use Tx Interrupt coalescing. Enable the software - * timer to wake us up if this packet isn't followed by N more. - */ - if (pAdapter->uiLinkSpeed == TRUEPHY_SPEED_1000MBPS) { - writel(pAdapter->RegistryTxTimeInterval * NANO_IN_A_MICRO, - &pAdapter->CSRAddress->global.watchdog_timer); - } - - spin_unlock_irqrestore(&pAdapter->SendHWLock, lockflags1); - - DBG_TX_LEAVE(et131x_dbginfo); - return 0; -} - -#endif - -/** - * et131x_free_send_packet - Recycle a MP_TCB, complete the packet if necessary - * @pAdapter: pointer to our adapter - * @pMpTcb: pointer to MP_TCB - * - * Assumption - Send spinlock has been acquired - */ -__inline void et131x_free_send_packet(struct et131x_adapter *pAdapter, PMP_TCB pMpTcb) -{ - unsigned long lockflags; - TX_DESC_ENTRY_t *desc = NULL; - struct net_device_stats *stats = &pAdapter->net_stats; - - if (MP_TEST_FLAG(pMpTcb, fMP_DEST_BROAD)) { - atomic_inc(&pAdapter->Stats.brdcstxmt); - } else if (MP_TEST_FLAG(pMpTcb, fMP_DEST_MULTI)) { - atomic_inc(&pAdapter->Stats.multixmt); - } else { - atomic_inc(&pAdapter->Stats.unixmt); - } - - if (pMpTcb->Packet) { - stats->tx_bytes += pMpTcb->Packet->len; - - /* Iterate through the TX descriptors on the ring - * corresponding to this packet and umap the fragments - * they point to - */ - DBG_TX(et131x_dbginfo, - "Unmap descriptors Here\n" - "TCB : 0x%p\n" - "TCB Next : 0x%p\n" - "TCB PacketLength : %d\n" - "TCB WrIndex.value : 0x%08x\n" - "TCB WrIndex.bits.val : %d\n" - "TCB WrIndex.value : 0x%08x\n" - "TCB WrIndex.bits.val : %d\n", - pMpTcb, - pMpTcb->Next, - pMpTcb->PacketLength, - pMpTcb->WrIndexStart.value, - pMpTcb->WrIndexStart.bits.val, - pMpTcb->WrIndex.value, - pMpTcb->WrIndex.bits.val); - - do { - desc = - (TX_DESC_ENTRY_t *) (pAdapter->TxRing. - pTxDescRingVa + - pMpTcb->WrIndexStart.bits.val); - - DBG_TX(et131x_dbginfo, - "CURRENT DESCRIPTOR\n" - "\tAddress : 0x%p\n" - "\tDataBufferPtrHigh : 0x%08x\n" - "\tDataBufferPtrLow : 0x%08x\n" - "\tword2 : 0x%08x\n" - "\tword3 : 0x%08x\n", - desc, - desc->DataBufferPtrHigh, - desc->DataBufferPtrLow, - desc->word2.value, - desc->word3.value); - - pci_unmap_single(pAdapter->pdev, - desc->DataBufferPtrLow, - desc->word2.value, PCI_DMA_TODEVICE); - - if (++pMpTcb->WrIndexStart.bits.val >= - NUM_DESC_PER_RING_TX) { - if (pMpTcb->WrIndexStart.bits.wrap) { - pMpTcb->WrIndexStart.value = 0; - } else { - pMpTcb->WrIndexStart.value = 0x400; - } - } - } - while (desc != (pAdapter->TxRing.pTxDescRingVa + - pMpTcb->WrIndex.bits.val)); - - DBG_TX(et131x_dbginfo, - "Free Packet (SKB) : 0x%p\n", pMpTcb->Packet); - - dev_kfree_skb_any(pMpTcb->Packet); - } - - memset(pMpTcb, 0, sizeof(MP_TCB)); - - /* Add the TCB to the Ready Q */ - spin_lock_irqsave(&pAdapter->TCBReadyQLock, lockflags); - - pAdapter->Stats.opackets++; - - if (pAdapter->TxRing.TCBReadyQueueTail) { - pAdapter->TxRing.TCBReadyQueueTail->Next = pMpTcb; - } else { - /* Apparently ready Q is empty. */ - pAdapter->TxRing.TCBReadyQueueHead = pMpTcb; - } - - pAdapter->TxRing.TCBReadyQueueTail = pMpTcb; - - spin_unlock_irqrestore(&pAdapter->TCBReadyQLock, lockflags); - - DBG_ASSERT(pAdapter->TxRing.nBusySend >= 0); -} - -/** - * et131x_free_busy_send_packets - Free and complete the stopped active sends - * @pAdapter: pointer to our adapter - * - * Assumption - Send spinlock has been acquired - */ -void et131x_free_busy_send_packets(struct et131x_adapter *pAdapter) -{ - PMP_TCB pMpTcb; - struct list_head *pEntry; - struct sk_buff *pPacket = NULL; - unsigned long lockflags; - uint32_t FreeCounter = 0; - - DBG_ENTER(et131x_dbginfo); - - while (!list_empty(&pAdapter->TxRing.SendWaitQueue)) { - spin_lock_irqsave(&pAdapter->SendWaitLock, lockflags); - - pAdapter->TxRing.nWaitSend--; - spin_unlock_irqrestore(&pAdapter->SendWaitLock, lockflags); - - pEntry = pAdapter->TxRing.SendWaitQueue.next; - - pPacket = NULL; - } - - pAdapter->TxRing.nWaitSend = 0; - - /* Any packets being sent? Check the first TCB on the send list */ - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - pMpTcb = pAdapter->TxRing.CurrSendHead; - - while ((pMpTcb != NULL) && (FreeCounter < NUM_TCB)) { - PMP_TCB pNext = pMpTcb->Next; - - pAdapter->TxRing.CurrSendHead = pNext; - - if (pNext == NULL) { - pAdapter->TxRing.CurrSendTail = NULL; - } - - pAdapter->TxRing.nBusySend--; - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); - - DBG_VERBOSE(et131x_dbginfo, "pMpTcb = 0x%p\n", pMpTcb); - - FreeCounter++; - MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb); - - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - pMpTcb = pAdapter->TxRing.CurrSendHead; - } - - if (FreeCounter == NUM_TCB) { - DBG_ERROR(et131x_dbginfo, - "MpFreeBusySendPackets exitted loop for a bad reason\n"); - BUG(); - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); - - pAdapter->TxRing.nBusySend = 0; - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_handle_send_interrupt - Interrupt handler for sending processing - * @pAdapter: pointer to our adapter - * - * Re-claim the send resources, complete sends and get more to send from - * the send wait queue. - * - * Assumption - Send spinlock has been acquired - */ -void et131x_handle_send_interrupt(struct et131x_adapter *pAdapter) -{ - DBG_TX_ENTER(et131x_dbginfo); - - /* Mark as completed any packets which have been sent by the device. */ - et131x_update_tcb_list(pAdapter); - - /* If we queued any transmits because we didn't have any TCBs earlier, - * dequeue and send those packets now, as long as we have free TCBs. - */ - et131x_check_send_wait_list(pAdapter); - - DBG_TX_LEAVE(et131x_dbginfo); -} - -/** - * et131x_update_tcb_list - Helper routine for Send Interrupt handler - * @pAdapter: pointer to our adapter - * - * Re-claims the send resources and completes sends. Can also be called as - * part of the NIC send routine when the "ServiceComplete" indication has - * wrapped. - */ -static void et131x_update_tcb_list(struct et131x_adapter *pAdapter) -{ - unsigned long lockflags; - DMA10W_t ServiceComplete; - PMP_TCB pMpTcb; - - ServiceComplete.value = - readl(&pAdapter->CSRAddress->txdma.NewServiceComplete.value); - - /* Has the ring wrapped? Process any descriptors that do not have - * the same "wrap" indicator as the current completion indicator - */ - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - pMpTcb = pAdapter->TxRing.CurrSendHead; - while (pMpTcb && - ServiceComplete.bits.wrap != pMpTcb->WrIndex.bits.wrap && - ServiceComplete.bits.val < pMpTcb->WrIndex.bits.val) { - pAdapter->TxRing.nBusySend--; - pAdapter->TxRing.CurrSendHead = pMpTcb->Next; - if (pMpTcb->Next == NULL) { - pAdapter->TxRing.CurrSendTail = NULL; - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); - MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb); - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - /* Goto the next packet */ - pMpTcb = pAdapter->TxRing.CurrSendHead; - } - while (pMpTcb && - ServiceComplete.bits.wrap == pMpTcb->WrIndex.bits.wrap && - ServiceComplete.bits.val > pMpTcb->WrIndex.bits.val) { - pAdapter->TxRing.nBusySend--; - pAdapter->TxRing.CurrSendHead = pMpTcb->Next; - if (pMpTcb->Next == NULL) { - pAdapter->TxRing.CurrSendTail = NULL; - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); - MP_FREE_SEND_PACKET_FUN(pAdapter, pMpTcb); - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - /* Goto the next packet */ - pMpTcb = pAdapter->TxRing.CurrSendHead; - } - - /* Wake up the queue when we hit a low-water mark */ - if (pAdapter->TxRing.nBusySend <= (NUM_TCB / 3)) { - netif_wake_queue(pAdapter->netdev); - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); -} - -/** - * et131x_check_send_wait_list - Helper routine for the interrupt handler - * @pAdapter: pointer to our adapter - * - * Takes packets from the send wait queue and posts them to the device (if - * room available). - */ -static void et131x_check_send_wait_list(struct et131x_adapter *pAdapter) -{ - unsigned long lockflags; - - spin_lock_irqsave(&pAdapter->SendWaitLock, lockflags); - - while (!list_empty(&pAdapter->TxRing.SendWaitQueue) && - MP_TCB_RESOURCES_AVAILABLE(pAdapter)) { - struct list_head *pEntry; - - DBG_VERBOSE(et131x_dbginfo, "Tx packets on the wait queue\n"); - - pEntry = pAdapter->TxRing.SendWaitQueue.next; - - pAdapter->TxRing.nWaitSend--; - - DBG_WARNING(et131x_dbginfo, - "MpHandleSendInterrupt - sent a queued pkt. Waiting %d\n", - pAdapter->TxRing.nWaitSend); - } - - spin_unlock_irqrestore(&pAdapter->SendWaitLock, lockflags); -} diff --git a/src/et131x/et1310_tx.h b/src/et131x/et1310_tx.h deleted file mode 100644 index 2819c78..0000000 --- a/src/et131x/et1310_tx.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et1310_tx.h - Defines, structs, enums, prototypes, etc. pertaining to data - * transmission. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET1310_TX_H__ -#define __ET1310_TX_H__ - - -/* Typedefs for Tx Descriptor Ring */ - -/* - * TXDESC_WORD2_t structure holds part of the control bits in the Tx Descriptor - * ring for the ET-1310 - */ -typedef union _txdesc_word2_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 vlan_prio:3; // bits 29-31(VLAN priority) - u32 vlan_cfi:1; // bit 28(cfi) - u32 vlan_tag:12; // bits 16-27(VLAN tag) - u32 length_in_bytes:16; // bits 0-15(packet length) -#else - u32 length_in_bytes:16; // bits 0-15(packet length) - u32 vlan_tag:12; // bits 16-27(VLAN tag) - u32 vlan_cfi:1; // bit 28(cfi) - u32 vlan_prio:3; // bits 29-31(VLAN priority) -#endif /* _BIT_FIELDS_HTOL */ - } bits; -} TXDESC_WORD2_t, *PTXDESC_WORD2_t; - -/* - * TXDESC_WORD3_t structure holds part of the control bits in the Tx Descriptor - * ring for the ET-1310 - */ -typedef union _txdesc_word3_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:17; // bits 15-31 - u32 udpa:1; // bit 14(UDP checksum assist) - u32 tcpa:1; // bit 13(TCP checksum assist) - u32 ipa:1; // bit 12(IP checksum assist) - u32 vlan:1; // bit 11(append VLAN tag) - u32 hp:1; // bit 10(Packet is a Huge packet) - u32 pp:1; // bit 9(pad packet) - u32 mac:1; // bit 8(MAC override) - u32 crc:1; // bit 7(append CRC) - u32 e:1; // bit 6(Tx frame has error) - u32 pf:1; // bit 5(send pause frame) - u32 bp:1; // bit 4(Issue half-duplex backpressure (XON/XOFF) - u32 cw:1; // bit 3(Control word - no packet data) - u32 ir:1; // bit 2(interrupt the processor when this pkt sent) - u32 f:1; // bit 1(first packet in the sequence) - u32 l:1; // bit 0(last packet in the sequence) -#else - u32 l:1; // bit 0(last packet in the sequence) - u32 f:1; // bit 1(first packet in the sequence) - u32 ir:1; // bit 2(interrupt the processor when this pkt sent) - u32 cw:1; // bit 3(Control word - no packet data) - u32 bp:1; // bit 4(Issue half-duplex backpressure (XON/XOFF) - u32 pf:1; // bit 5(send pause frame) - u32 e:1; // bit 6(Tx frame has error) - u32 crc:1; // bit 7(append CRC) - u32 mac:1; // bit 8(MAC override) - u32 pp:1; // bit 9(pad packet) - u32 hp:1; // bit 10(Packet is a Huge packet) - u32 vlan:1; // bit 11(append VLAN tag) - u32 ipa:1; // bit 12(IP checksum assist) - u32 tcpa:1; // bit 13(TCP checksum assist) - u32 udpa:1; // bit 14(UDP checksum assist) - u32 unused:17; // bits 15-31 -#endif /* _BIT_FIELDS_HTOL */ - } bits; -} TXDESC_WORD3_t, *PTXDESC_WORD3_t; - -/* TX_DESC_ENTRY_t is sructure representing each descriptor on the ring */ -typedef struct _tx_desc_entry_t { - u32 DataBufferPtrHigh; - u32 DataBufferPtrLow; - TXDESC_WORD2_t word2; // control words how to xmit the - TXDESC_WORD3_t word3; // data (detailed above) -} TX_DESC_ENTRY_t, *PTX_DESC_ENTRY_t; - - -/* Typedefs for Tx DMA engine status writeback */ - -/* - * TX_STATUS_BLOCK_t is sructure representing the status of the Tx DMA engine - * it sits in free memory, and is pointed to by 0x101c / 0x1020 - */ -typedef union _tx_status_block_t { - u32 value; - struct { -#ifdef _BIT_FIELDS_HTOL - u32 unused:21; // bits 11-31 - u32 serv_cpl_wrap:1; // bit 10 - u32 serv_cpl:10; // bits 0-9 -#else - u32 serv_cpl:10; // bits 0-9 - u32 serv_cpl_wrap:1; // bit 10 - u32 unused:21; // bits 11-31 -#endif - } bits; -} TX_STATUS_BLOCK_t, *PTX_STATUS_BLOCK_t; - -/* TCB (Transmit Control Block) */ -typedef struct _MP_TCB { - struct _MP_TCB *Next; - u32 Flags; - u32 Count; - u32 PacketStaleCount; - struct sk_buff *Packet; - u32 PacketLength; - DMA10W_t WrIndex; - DMA10W_t WrIndexStart; -} MP_TCB, *PMP_TCB; - -/* Structure to hold the skb's in a list */ -typedef struct tx_skb_list_elem { - struct list_head skb_list_elem; - struct sk_buff *skb; -} TX_SKB_LIST_ELEM, *PTX_SKB_LIST_ELEM; - -/* TX_RING_t is sructure representing our local reference(s) to the ring */ -typedef struct _tx_ring_t { - /* TCB (Transmit Control Block) memory and lists */ - PMP_TCB MpTcbMem; - - /* List of TCBs that are ready to be used */ - PMP_TCB TCBReadyQueueHead; - PMP_TCB TCBReadyQueueTail; - - /* list of TCBs that are currently being sent. NOTE that access to all - * three of these (including nBusySend) are controlled via the - * TCBSendQLock. This lock should be secured prior to incementing / - * decrementing nBusySend, or any queue manipulation on CurrSendHead / - * Tail - */ - PMP_TCB CurrSendHead; - PMP_TCB CurrSendTail; - int32_t nBusySend; - - /* List of packets (not TCBs) that were queued for lack of resources */ - struct list_head SendWaitQueue; - int32_t nWaitSend; - - /* The actual descriptor ring */ - PTX_DESC_ENTRY_t pTxDescRingVa; - dma_addr_t pTxDescRingPa; - uint64_t pTxDescRingAdjustedPa; - uint64_t TxDescOffset; - - /* ReadyToSend indicates where we last wrote to in the descriptor ring. */ - DMA10W_t txDmaReadyToSend; - - /* The location of the write-back status block */ - PTX_STATUS_BLOCK_t pTxStatusVa; - dma_addr_t pTxStatusPa; - - /* A Block of zeroes used to pad packets that are less than 60 bytes */ - void *pTxDummyBlkVa; - dma_addr_t pTxDummyBlkPa; - - TXMAC_ERR_t TxMacErr; - - /* Variables to track the Tx interrupt coalescing features */ - int32_t TxPacketsSinceLastinterrupt; -} TX_RING_t, *PTX_RING_t; - -/* Forward declaration of the frag-list for the following prototypes */ -typedef struct _MP_FRAG_LIST MP_FRAG_LIST, *PMP_FRAG_LIST; - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -/* PROTOTYPES for et1310_tx.c */ -int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter); -void et131x_tx_dma_memory_free(struct et131x_adapter *adapter); -void ConfigTxDmaRegs(struct et131x_adapter *pAdapter); -void et131x_init_send(struct et131x_adapter *adapter); -void et131x_tx_dma_disable(struct et131x_adapter *pAdapter); -void et131x_tx_dma_enable(struct et131x_adapter *pAdapter); -void et131x_handle_send_interrupt(struct et131x_adapter *pAdapter); -void et131x_free_busy_send_packets(struct et131x_adapter *pAdapter); -int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev); - -#endif /* __ET1310_TX_H__ */ diff --git a/src/et131x/et131x_adapter.h b/src/et131x/et131x_adapter.h deleted file mode 100644 index 36e61a4..0000000 --- a/src/et131x/et131x_adapter.h +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_adapter.h - Header which includes the private adapter structure, along - * with related support structures, macros, definitions, etc. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_ADAPTER_H__ -#define __ET131X_ADAPTER_H__ - -#include "et1310_address_map.h" -#include "et1310_tx.h" -#include "et1310_rx.h" - -/* - * Do not change these values: if changed, then change also in respective - * TXdma and Rxdma engines - */ -#define NUM_DESC_PER_RING_TX 512 // TX Do not change these values -#define NUM_TCB 64 - -/* - * These values are all superseded by registry entries to facilitate tuning. - * Once the desired performance has been achieved, the optimal registry values - * should be re-populated to these #defines: - */ -#define NUM_TRAFFIC_CLASSES 1 - -/* - * There are three ways of counting errors - if there are more than X errors - * in Y packets (represented by the "SAMPLE" macros), if there are more than - * N errors in a S mSec time period (the "PERIOD" macros), or if there are - * consecutive packets with errors (CONSEC_ERRORED_THRESH). This last covers - * for "Bursty" errors, and the errored packets may well not be contiguous, - * but several errors where the packet counter has changed by less than a - * small amount will cause this count to increment. - */ -#define TX_PACKETS_IN_SAMPLE 10000 -#define TX_MAX_ERRORS_IN_SAMPLE 50 - -#define TX_ERROR_PERIOD 1000 -#define TX_MAX_ERRORS_IN_PERIOD 10 - -#define LINK_DETECTION_TIMER 5000 - -#define TX_CONSEC_RANGE 5 -#define TX_CONSEC_ERRORED_THRESH 10 - -#define LO_MARK_PERCENT_FOR_PSR 15 -#define LO_MARK_PERCENT_FOR_RX 15 - -/* Macros for flag and ref count operations */ -#define MP_SET_FLAG(_M, _F) ((_M)->Flags |= (_F)) -#define MP_CLEAR_FLAG(_M, _F) ((_M)->Flags &= ~(_F)) -#define MP_CLEAR_FLAGS(_M) ((_M)->Flags = 0) -#define MP_TEST_FLAG(_M, _F) (((_M)->Flags & (_F)) != 0) -#define MP_TEST_FLAGS(_M, _F) (((_M)->Flags & (_F)) == (_F)) -#define MP_IS_FLAG_CLEAR(_M, _F) (((_M)->Flags & (_F)) == 0) - -#define MP_INC_RCV_REF(_A) atomic_inc(&(_A)->RcvRefCount) -#define MP_DEC_RCV_REF(_A) atomic_dec(&(_A)->RcvRefCount) -#define MP_GET_RCV_REF(_A) atomic_read(&(_A)->RcvRefCount) - -/* Macros specific to the private adapter structure */ -#define MP_TCB_RESOURCES_AVAILABLE(_M) ((_M)->TxRing.nBusySend < NUM_TCB) -#define MP_TCB_RESOURCES_NOT_AVAILABLE(_M) ((_M)->TxRing.nBusySend >= NUM_TCB) - -#define MP_SHOULD_FAIL_SEND(_M) ((_M)->Flags & fMP_ADAPTER_FAIL_SEND_MASK) -#define MP_IS_NOT_READY(_M) ((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK) -#define MP_IS_READY(_M) !((_M)->Flags & fMP_ADAPTER_NOT_READY_MASK) - -#define MP_HAS_CABLE(_M) !((_M)->Flags & fMP_ADAPTER_NO_CABLE) -#define MP_LINK_DETECTED(_M) !((_M)->Flags & fMP_ADAPTER_LINK_DETECTION) - -/* Counters for error rate monitoring */ -typedef struct _MP_ERR_COUNTERS { - u32 PktCountTxPackets; - u32 PktCountTxErrors; - u32 TimerBasedTxErrors; - u32 PktCountLastError; - u32 ErredConsecPackets; -} MP_ERR_COUNTERS, *PMP_ERR_COUNTERS; - -/* RFD (Receive Frame Descriptor) */ -typedef struct _MP_RFD { - struct list_head list_node; - struct sk_buff *Packet; - u32 PacketSize; // total size of receive frame - u16 iBufferIndex; - u8 iRingIndex; -} MP_RFD, *PMP_RFD; - -/* Enum for Flow Control */ -typedef enum _eflow_control_t { - Both = 0, - TxOnly = 1, - RxOnly = 2, - None = 3 -} eFLOW_CONTROL_t, *PeFLOW_CONTROL_t; - -/* Struct to define some device statistics */ -typedef struct _ce_stats_t { - /* Link Input/Output stats */ - uint64_t ipackets; // # of in packets - uint64_t opackets; // # of out packets - - /* MIB II variables - * - * NOTE: atomic_t types are only guaranteed to store 24-bits; if we - * MUST have 32, then we'll need another way to perform atomic - * operations - */ - u32 unircv; // # multicast packets received - atomic_t unixmt; // # multicast packets for Tx - u32 multircv; // # multicast packets received - atomic_t multixmt; // # multicast packets for Tx - u32 brdcstrcv; // # broadcast packets received - atomic_t brdcstxmt; // # broadcast packets for Tx - u32 norcvbuf; // # Rx packets discarded - u32 noxmtbuf; // # Tx packets discarded - - /* Transciever state informations. */ - u8 xcvr_addr; - u32 xcvr_id; - - /* Tx Statistics. */ - u32 tx_uflo; // Tx Underruns - - u32 collisions; - u32 excessive_collisions; - u32 first_collision; - u32 late_collisions; - u32 max_pkt_error; - u32 tx_deferred; - - /* Rx Statistics. */ - u32 rx_ov_flow; // Rx Over Flow - - u32 length_err; - u32 alignment_err; - u32 crc_err; - u32 code_violations; - u32 other_errors; - -#ifdef CONFIG_ET131X_DEBUG - u32 UnhandledInterruptsPerSec; - u32 RxDmaInterruptsPerSec; - u32 TxDmaInterruptsPerSec; - u32 WatchDogInterruptsPerSec; -#endif /* CONFIG_ET131X_DEBUG */ - - u32 SynchrounousIterations; - INTERRUPT_t InterruptStatus; -} CE_STATS_t, *PCE_STATS_t; - -/* The private adapter structure */ -struct et131x_adapter { - struct net_device *netdev; - struct pci_dev *pdev; - - struct work_struct task; - - /* Flags that indicate current state of the adapter */ - u32 Flags; - u32 HwErrCount; - - /* Configuration */ - u8 PermanentAddress[ETH_ALEN]; - u8 CurrentAddress[ETH_ALEN]; - bool bOverrideAddress; - bool bEepromPresent; - u8 eepromData[2]; - - /* Spinlocks */ - spinlock_t Lock; - - spinlock_t TCBSendQLock; - spinlock_t TCBReadyQLock; - spinlock_t SendHWLock; - spinlock_t SendWaitLock; - - spinlock_t RcvLock; - spinlock_t RcvPendLock; - spinlock_t FbrLock; - - spinlock_t PHYLock; - - /* Packet Filter and look ahead size */ - u32 PacketFilter; - u32 ulLookAhead; - u32 uiLinkSpeed; - u32 uiDuplexMode; - u32 uiAutoNegStatus; - u8 ucLinkStatus; - - /* multicast list */ - u32 MCAddressCount; - u8 MCList[NIC_MAX_MCAST_LIST][ETH_ALEN]; - - /* MAC test */ - TXMAC_TXTEST_t TxMacTest; - - /* Pointer to the device's PCI register space */ - ADDRESS_MAP_t __iomem *CSRAddress; - - /* PCI config space info, for debug purposes only. */ - u8 RevisionID; - u16 VendorID; - u16 DeviceID; - u16 SubVendorID; - u16 SubSystemID; - u32 CacheFillSize; - u16 PciXDevCtl; - u8 pci_lat_timer; - u8 pci_hdr_type; - u8 pci_bist; - u32 pci_cfg_state[64 / sizeof(u32)]; - - /* Registry parameters */ - u8 SpeedDuplex; // speed/duplex - eFLOW_CONTROL_t RegistryFlowControl; // for 802.3x flow control - u8 RegistryWOLMatch; // Enable WOL pattern-matching - u8 RegistryWOLLink; // Link state change is independant - u8 RegistryPhyComa; // Phy Coma mode enable/disable - - u32 RegistryRxMemEnd; // Size of internal rx memory - u8 RegistryMACStat; // If set, read MACSTAT, else don't - u32 RegistryVlanTag; // 802.1q Vlan TAG - u32 RegistryJumboPacket; // Max supported ethernet packet size - - u32 RegistryTxNumBuffers; - u32 RegistryTxTimeInterval; - - u32 RegistryRxNumBuffers; - u32 RegistryRxTimeInterval; - - /* Validation helpers */ - u8 RegistryPMWOL; - u8 RegistryNMIDisable; - u32 RegistryDMACache; - u32 RegistrySCGain; - u8 RegistryPhyLoopbk; // Enable Phy loopback - - /* Derived from the registry: */ - u8 AiForceDpx; // duplex setting - u16 AiForceSpeed; // 'Speed', user over-ride of line speed - eFLOW_CONTROL_t FlowControl; // flow control validated by the far-end - enum { - NETIF_STATUS_INVALID = 0, - NETIF_STATUS_MEDIA_CONNECT, - NETIF_STATUS_MEDIA_DISCONNECT, - NETIF_STATUS_MAX - } MediaState; - u8 DriverNoPhyAccess; - - /* Minimize init-time */ - bool bQueryPending; - bool bSetPending; - bool bResetPending; - struct timer_list ErrorTimer; - bool bLinkTimerActive; - MP_POWER_MGMT PoMgmt; - INTERRUPT_t CachedMaskValue; - - atomic_t RcvRefCount; // Num packets not yet returned - - /* Xcvr status at last poll */ - MI_BMSR_t Bmsr; - - /* Tx Memory Variables */ - TX_RING_t TxRing; - - /* Rx Memory Variables */ - RX_RING_t RxRing; - - /* ET1310 register Access */ - JAGCORE_ACCESS_REGS JagCoreRegs; - PCI_CFG_SPACE_REGS PciCfgRegs; - - /* Loopback specifics */ - u8 ReplicaPhyLoopbk; // Replica Enable - u8 ReplicaPhyLoopbkPF; // Replica Enable Pass/Fail - - /* Stats */ - CE_STATS_t Stats; - - struct net_device_stats net_stats; - struct net_device_stats net_stats_prev; -}; - -#define MPSendPacketsHandler MPSendPackets -#define MP_FREE_SEND_PACKET_FUN(Adapter, pMpTcb) \ - et131x_free_send_packet(Adapter, pMpTcb) -#define MpSendPacketFun(Adapter, Packet) MpSendPacket(Adapter, Packet) - -#endif /* __ET131X_ADAPTER_H__ */ diff --git a/src/et131x/et131x_config.c b/src/et131x/et131x_config.c deleted file mode 100644 index 0adbaa6..0000000 --- a/src/et131x/et131x_config.c +++ /dev/null @@ -1,325 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_config.c - Handles parsing of configuration data during - * initialization. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_initpci.h" -#include "et131x_config.h" - -#include "et1310_tx.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/* Defines for Parameter Default/Min/Max vaules */ -#define PARM_SPEED_DUPLEX_DEF 0 -#define PARM_SPEED_DUPLEX_MIN 0 -#define PARM_SPEED_DUPLEX_MAX 5 - -#define PARM_VLAN_TAG_DEF 0 -#define PARM_VLAN_TAG_MIN 0 -#define PARM_VLAN_TAG_MAX 4095 - -#define PARM_FLOW_CTL_DEF 0 -#define PARM_FLOW_CTL_MIN 0 -#define PARM_FLOW_CTL_MAX 3 - -#define PARM_WOL_LINK_DEF 3 -#define PARM_WOL_LINK_MIN 0 -#define PARM_WOL_LINK_MAX 3 - -#define PARM_WOL_MATCH_DEF 7 -#define PARM_WOL_MATCH_MIN 0 -#define PARM_WOL_MATCH_MAX 7 - -#define PARM_JUMBO_PKT_DEF 1514 -#define PARM_JUMBO_PKT_MIN 1514 -#define PARM_JUMBO_PKT_MAX 9216 - -#define PARM_PHY_COMA_DEF 0 -#define PARM_PHY_COMA_MIN 0 -#define PARM_PHY_COMA_MAX 1 - -#define PARM_RX_NUM_BUFS_DEF 4 -#define PARM_RX_NUM_BUFS_MIN 1 -#define PARM_RX_NUM_BUFS_MAX 64 - -#define PARM_RX_TIME_INT_DEF 10 -#define PARM_RX_TIME_INT_MIN 2 -#define PARM_RX_TIME_INT_MAX 320 - -#define PARM_TX_NUM_BUFS_DEF 4 -#define PARM_TX_NUM_BUFS_MIN 1 -#define PARM_TX_NUM_BUFS_MAX 40 - -#define PARM_TX_TIME_INT_DEF 40 -#define PARM_TX_TIME_INT_MIN 1 -#define PARM_TX_TIME_INT_MAX 140 - -#define PARM_RX_MEM_END_DEF 0x2bc -#define PARM_RX_MEM_END_MIN 0 -#define PARM_RX_MEM_END_MAX 0x3ff - -#define PARM_MAC_STAT_DEF 1 -#define PARM_MAC_STAT_MIN 0 -#define PARM_MAC_STAT_MAX 1 - -#define PARM_SC_GAIN_DEF 7 -#define PARM_SC_GAIN_MIN 0 -#define PARM_SC_GAIN_MAX 7 - -#define PARM_PM_WOL_DEF 0 -#define PARM_PM_WOL_MIN 0 -#define PARM_PM_WOL_MAX 1 - -#define PARM_NMI_DISABLE_DEF 0 -#define PARM_NMI_DISABLE_MIN 0 -#define PARM_NMI_DISABLE_MAX 2 - -#define PARM_DMA_CACHE_DEF 0 -#define PARM_DMA_CACHE_MIN 0 -#define PARM_DMA_CACHE_MAX 15 - -#define PARM_PHY_LOOPBK_DEF 0 -#define PARM_PHY_LOOPBK_MIN 0 -#define PARM_PHY_LOOPBK_MAX 1 - -#define PARM_MAC_ADDRESS_DEF { 0x00, 0x05, 0x3d, 0x00, 0x02, 0x00 } - -/* Module parameter for disabling NMI - * et131x_speed_set : - * Set Link speed and dublex manually (0-5) [0] - * 1 : 10Mb Half-Duplex - * 2 : 10Mb Full-Duplex - * 3 : 100Mb Half-Duplex - * 4 : 100Mb Full-Duplex - * 5 : 1000Mb Full-Duplex - * 0 : Auto Speed Auto Dublex // default - */ -static u32 et131x_nmi_disable = PARM_NMI_DISABLE_DEF; -module_param(et131x_nmi_disable, uint, 0); -MODULE_PARM_DESC(et131x_nmi_disable, "Disable NMI (0-2) [0]"); - -/* Module parameter for manual speed setting - * et131x_nmi_disable : - * Disable NMI (0-2) [0] - * 0 : - * 1 : - * 2 : - */ -static u32 et131x_speed_set = PARM_SPEED_DUPLEX_DEF; -module_param(et131x_speed_set, uint, 0); -MODULE_PARM_DESC(et131x_speed_set, - "Set Link speed and dublex manually (0-5) [0] \n 1 : 10Mb Half-Duplex \n 2 : 10Mb Full-Duplex \n 3 : 100Mb Half-Duplex \n 4 : 100Mb Full-Duplex \n 5 : 1000Mb Full-Duplex \n 0 : Auto Speed Auto Dublex"); - -/** - * et131x_config_parse - * @pAdapter: pointer to the private adapter struct - * - * Parses a configuration from some location (module parameters, for example) - * into the private adapter struct - */ -void et131x_config_parse(struct et131x_adapter *pAdapter) -{ - uint8_t macAddrDef[] = PARM_MAC_ADDRESS_DEF; - - DBG_ENTER(et131x_dbginfo); - - /* - * The NDIS driver uses the registry to store persistent per-device - * configuration, and reads this configuration into the appropriate - * elements of the private adapter structure on initialization. - * Because Linux has no analog to the registry, use this function to - * initialize the private adapter structure with a default - * configuration. - * - * One other possibility is to use a series of module parameters which - * can be passed in by the caller when the module is initialized. - * However, this implementation does not allow for seperate - * configurations in the event multiple devices are present, and hence - * will not suffice. - * - * If another method is derived which addresses this problem, this is - * where it should be implemented. - */ - - /* Set the private adapter struct with default values for the - * corresponding parameters - */ - if (et131x_speed_set != PARM_SPEED_DUPLEX_DEF) { - DBG_VERBOSE(et131x_dbginfo, "Speed set manually to : %d \n", - et131x_speed_set); - pAdapter->SpeedDuplex = et131x_speed_set; - } else { - pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF; - } - - // pAdapter->SpeedDuplex = PARM_SPEED_DUPLEX_DEF; - - pAdapter->RegistryVlanTag = PARM_VLAN_TAG_DEF; - pAdapter->RegistryFlowControl = PARM_FLOW_CTL_DEF; - pAdapter->RegistryWOLLink = PARM_WOL_LINK_DEF; - pAdapter->RegistryWOLMatch = PARM_WOL_MATCH_DEF; - pAdapter->RegistryJumboPacket = PARM_JUMBO_PKT_DEF; - pAdapter->RegistryPhyComa = PARM_PHY_COMA_DEF; - pAdapter->RegistryRxNumBuffers = PARM_RX_NUM_BUFS_DEF; - pAdapter->RegistryRxTimeInterval = PARM_RX_TIME_INT_DEF; - pAdapter->RegistryTxNumBuffers = PARM_TX_NUM_BUFS_DEF; - pAdapter->RegistryTxTimeInterval = PARM_TX_TIME_INT_DEF; - pAdapter->RegistryRxMemEnd = PARM_RX_MEM_END_DEF; - pAdapter->RegistryMACStat = PARM_MAC_STAT_DEF; - pAdapter->RegistrySCGain = PARM_SC_GAIN_DEF; - pAdapter->RegistryPMWOL = PARM_PM_WOL_DEF; - - if (et131x_nmi_disable != PARM_NMI_DISABLE_DEF) { - pAdapter->RegistryNMIDisable = et131x_nmi_disable; - } else { - pAdapter->RegistryNMIDisable = PARM_NMI_DISABLE_DEF; - } - - pAdapter->RegistryDMACache = PARM_DMA_CACHE_DEF; - pAdapter->RegistryPhyLoopbk = PARM_PHY_LOOPBK_DEF; - - /* Set the MAC address to a default */ - memcpy(pAdapter->CurrentAddress, macAddrDef, ETH_ALEN); - pAdapter->bOverrideAddress = false; - - DBG_TRACE(et131x_dbginfo, - "Default MAC Address : %02x:%02x:%02x:%02x:%02x:%02x\n", - pAdapter->CurrentAddress[0], pAdapter->CurrentAddress[1], - pAdapter->CurrentAddress[2], pAdapter->CurrentAddress[3], - pAdapter->CurrentAddress[4], pAdapter->CurrentAddress[5]); - - /* Decode SpeedDuplex - * - * Set up as if we are auto negotiating always and then change if we - * go into force mode - */ - pAdapter->AiForceSpeed = 0; // Auto speed - pAdapter->AiForceDpx = 0; // Auto FDX - - /* If we are the 10/100 device, and gigabit is somehow requested then - * knock it down to 100 full. - */ - if ((pAdapter->DeviceID == ET131X_PCI_DEVICE_ID_FAST) && - (pAdapter->SpeedDuplex == 5)) { - pAdapter->SpeedDuplex = 4; - } - - switch (pAdapter->SpeedDuplex) { - case 1: // 10Mb Half-Duplex - pAdapter->AiForceSpeed = 10; - pAdapter->AiForceDpx = 1; - break; - - case 2: // 10Mb Full-Duplex - pAdapter->AiForceSpeed = 10; - pAdapter->AiForceDpx = 2; - break; - - case 3: // 100Mb Half-Duplex - pAdapter->AiForceSpeed = 100; - pAdapter->AiForceDpx = 1; - break; - - case 4: // 100Mb Full-Duplex - pAdapter->AiForceSpeed = 100; - pAdapter->AiForceDpx = 2; - break; - - case 5: // 1000Mb Full-Duplex - pAdapter->AiForceSpeed = 1000; - pAdapter->AiForceDpx = 2; - break; - } - - DBG_LEAVE(et131x_dbginfo); -} diff --git a/src/et131x/et131x_config.h b/src/et131x/et131x_config.h deleted file mode 100644 index 642c0f6..0000000 --- a/src/et131x/et131x_config.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_config.h - Defines, structs, enums, prototypes, etc. to support - * et131x_config.c - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_CONFIG_H__ -#define __ET131X_CONFIG_H__ - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -void et131x_config_parse(struct et131x_adapter *adapter); - -#endif /* __ET131X_CONFIG_H__ */ diff --git a/src/et131x/et131x_debug.c b/src/et131x/et131x_debug.c deleted file mode 100644 index 9ee5bce..0000000 --- a/src/et131x/et131x_debug.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_debug.c - Routines used for debugging. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifdef CONFIG_ET131X_DEBUG - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> -#include <linux/random.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_netdev.h" -#include "et131x_config.h" -#include "et131x_isr.h" - -#include "et1310_address_map.h" -#include "et1310_jagcore.h" -#include "et1310_tx.h" -#include "et1310_rx.h" -#include "et1310_mac.h" - -/* Data for debugging facilities */ -extern dbg_info_t *et131x_dbginfo; - -/** - * DumpTxQueueContents - Dump out the tx queue and the shadow pointers - * @pAdapter: pointer to our adapter structure - */ -void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *pAdapter) -{ - MMC_t __iomem *mmc = &pAdapter->CSRAddress->mmc; - uint32_t TxQueueAddr; - - if (DBG_FLAGS(et131x_dbginfo) & dbgLvl) { - for (TxQueueAddr = 0x200; TxQueueAddr < 0x3ff; TxQueueAddr++) { - MMC_SRAM_ACCESS_t sram_access; - - sram_access.value = readl(&mmc->sram_access.value); - sram_access.bits.req_addr = TxQueueAddr; - sram_access.bits.req_access = 1; - writel(sram_access.value, &mmc->sram_access.value); - - DBG_PRINT("Addr 0x%x, Access 0x%08x\t" - "Value 1 0x%08x, Value 2 0x%08x, " - "Value 3 0x%08x, Value 4 0x%08x, \n", - TxQueueAddr, - readl(&mmc->sram_access.value), - readl(&mmc->sram_word1), - readl(&mmc->sram_word2), - readl(&mmc->sram_word3), - readl(&mmc->sram_word4)); - } - - DBG_PRINT("Shadow Pointers 0x%08x\n", - readl(&pAdapter->CSRAddress->txmac.shadow_ptr.value)); - } -} - -/** - * DumpDeviceBlock - * @pAdapter: pointer to our adapter - * - * Dumps the first 64 regs of each block of the et-1310 (each block is - * mapped to a new page, each page is 4096 bytes). - */ -#define NUM_BLOCKS 8 -void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *pAdapter, - uint32_t Block) -{ - uint32_t Address1, Address2; - uint32_t __iomem *BigDevicePointer = - (uint32_t __iomem *) pAdapter->CSRAddress; - const char *BlockNames[NUM_BLOCKS] = { - "Global", "Tx DMA", "Rx DMA", "Tx MAC", - "Rx MAC", "MAC", "MAC Stat", "MMC" - }; - - /* Output the debug counters to the debug terminal */ - if (DBG_FLAGS(et131x_dbginfo) & dbgLvl) { - DBG_PRINT("%s block\n", BlockNames[Block]); - BigDevicePointer += Block * 1024; - for (Address1 = 0; Address1 < 8; Address1++) { - for (Address2 = 0; Address2 < 8; Address2++) { - if (Block == 0 && - (Address1 * 8 + Address2) == 6) { - DBG_PRINT(" ISR , "); - } else { - DBG_PRINT("0x%08x, ", - readl(BigDevicePointer++)); - } - } - DBG_PRINT("\n"); - } - DBG_PRINT("\n"); - } -} - -/** - * DumpDeviceReg - * @pAdapter: pointer to our adapter - * - * Dumps the first 64 regs of each block of the et-1310 (each block is - * mapped to a new page, each page is 4096 bytes). - */ -void DumpDeviceReg(int dbgLvl, struct et131x_adapter *pAdapter) -{ - uint32_t Address1, Address2; - uint32_t Block; - uint32_t __iomem *BigDevicePointer = - (uint32_t __iomem *) pAdapter->CSRAddress; - uint32_t __iomem *Pointer; - const char *BlockNames[NUM_BLOCKS] = { - "Global", "Tx DMA", "Rx DMA", "Tx MAC", - "Rx MAC", "MAC", "MAC Stat", "MMC" - }; - - /* Output the debug counters to the debug terminal */ - if (DBG_FLAGS(et131x_dbginfo) & dbgLvl) { - for (Block = 0; Block < NUM_BLOCKS; Block++) { - DBG_PRINT("%s block\n", BlockNames[Block]); - Pointer = BigDevicePointer + (Block * 1024); - - for (Address1 = 0; Address1 < 8; Address1++) { - for (Address2 = 0; Address2 < 8; Address2++) { - DBG_PRINT("0x%08x, ", - readl(Pointer++)); - } - DBG_PRINT("\n"); - } - DBG_PRINT("\n"); - } - } -} - -#endif // CONFIG_ET131X_DEBUG diff --git a/src/et131x/et131x_debug.h b/src/et131x/et131x_debug.h deleted file mode 100644 index dab6080..0000000 --- a/src/et131x/et131x_debug.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_debug.h - Defines, structs, enums, prototypes, etc. used for - * outputting debug messages to the system logging facility - * (ksyslogd) - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_DBG_H__ -#define __ET131X_DBG_H__ - -/* Define Masks for debugging types/levels */ -#define DBG_ERROR_ON 0x00000001L -#define DBG_WARNING_ON 0x00000002L -#define DBG_NOTICE_ON 0x00000004L -#define DBG_TRACE_ON 0x00000008L -#define DBG_VERBOSE_ON 0x00000010L -#define DBG_PARAM_ON 0x00000020L -#define DBG_BREAK_ON 0x00000040L -#define DBG_RX_ON 0x00000100L -#define DBG_TX_ON 0x00000200L - -#ifdef CONFIG_ET131X_DEBUG - -/* - * Set the level of debugging if not done with a preprocessor define. See - * et131x_main.c, function et131x_init_module() for how the debug level - * translates into the types of messages displayed. - */ -#ifndef DBG_LVL -#define DBG_LVL 3 -#endif /* DBG_LVL */ - -#define DBG_DEFAULTS (DBG_ERROR_ON | DBG_WARNING_ON | DBG_BREAK_ON ) - -#define DBG_FLAGS(A) (A)->dbgFlags -#define DBG_NAME(A) (A)->dbgName -#define DBG_LEVEL(A) (A)->dbgLevel - -#ifndef DBG_PRINT -#define DBG_PRINT(S...) printk(KERN_DEBUG S) -#endif /* DBG_PRINT */ - -#ifndef DBG_PRINTC -#define DBG_PRINTC(S...) printk(S) -#endif /* DBG_PRINTC */ - -#ifndef DBG_TRAP -#define DBG_TRAP {} /* BUG() */ -#endif /* DBG_TRAP */ - -#define _ENTER_STR ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>" -#define _LEAVE_STR "<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<" - -#define _DBG_ENTER(A) printk(KERN_DEBUG "%s:%.*s:%s\n", DBG_NAME(A), \ - ++DBG_LEVEL(A), _ENTER_STR, __func__) -#define _DBG_LEAVE(A) printk(KERN_DEBUG "%s:%.*s:%s\n", DBG_NAME(A), \ - DBG_LEVEL(A)--, _LEAVE_STR, __func__) - -#define DBG_ENTER(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) \ - _DBG_ENTER(A);} - -#define DBG_LEAVE(A) {if (DBG_FLAGS(A) & DBG_TRACE_ON) \ - _DBG_LEAVE(A);} - -#define DBG_PARAM(A,N,F,S...) {if (DBG_FLAGS(A) & DBG_PARAM_ON) \ - DBG_PRINT(" %s -- "F"\n",N,S);} - -#define DBG_ERROR(A,S...) \ - if (DBG_FLAGS(A) & DBG_ERROR_ON) { \ - DBG_PRINT("%s:ERROR:%s ",DBG_NAME(A), __func__); \ - DBG_PRINTC(S); \ - DBG_TRAP; \ - } - -#define DBG_WARNING(A,S...) {if (DBG_FLAGS(A) & DBG_WARNING_ON) \ - {DBG_PRINT("%s:WARNING:%s ",DBG_NAME(A),__func__);DBG_PRINTC(S);}} - -#define DBG_NOTICE(A,S...) {if (DBG_FLAGS(A) & DBG_NOTICE_ON) \ - {DBG_PRINT("%s:NOTICE:%s ",DBG_NAME(A),__func__);DBG_PRINTC(S);}} - -#define DBG_TRACE(A,S...) {if (DBG_FLAGS(A) & DBG_TRACE_ON) \ - {DBG_PRINT("%s:TRACE:%s ",DBG_NAME(A), __func__);DBG_PRINTC(S);}} - -#define DBG_VERBOSE(A,S...) {if (DBG_FLAGS(A) & DBG_VERBOSE_ON) \ - {DBG_PRINT("%s:VERBOSE:%s ",DBG_NAME(A), __func__);DBG_PRINTC(S);}} - -#define DBG_RX(A,S...) {if (DBG_FLAGS(A) & DBG_RX_ON) \ - {DBG_PRINT(S);}} - -#define DBG_RX_ENTER(A) {if (DBG_FLAGS(A) & DBG_RX_ON) \ - _DBG_ENTER(A);} - -#define DBG_RX_LEAVE(A) {if (DBG_FLAGS(A) & DBG_RX_ON) \ - _DBG_LEAVE(A);} - -#define DBG_TX(A,S...) {if (DBG_FLAGS(A) & DBG_TX_ON) \ - {DBG_PRINT(S);}} - -#define DBG_TX_ENTER(A) {if (DBG_FLAGS(A) & DBG_TX_ON) \ - _DBG_ENTER(A);} - -#define DBG_TX_LEAVE(A) {if (DBG_FLAGS(A) & DBG_TX_ON) \ - _DBG_LEAVE(A);} - -#define DBG_ASSERT(C) {if (!(C)) \ - {DBG_PRINT("ASSERT(%s) -- %s#%d (%s)\n", \ - #C,__FILE__,__LINE__,__func__); \ - DBG_TRAP;}} -#define STATIC - -typedef struct { - char *dbgName; - int dbgLevel; - unsigned long dbgFlags; -} dbg_info_t; - -#else /* CONFIG_ET131X_DEBUG */ - -#define DBG_DEFN -#define DBG_TRAP -#define DBG_PRINT(S...) -#define DBG_ENTER(A) -#define DBG_LEAVE(A) -#define DBG_PARAM(A,N,F,S...) -#define DBG_ERROR(A,S...) -#define DBG_WARNING(A,S...) -#define DBG_NOTICE(A,S...) -#define DBG_TRACE(A,S...) -#define DBG_VERBOSE(A,S...) -#define DBG_RX(A,S...) -#define DBG_RX_ENTER(A) -#define DBG_RX_LEAVE(A) -#define DBG_TX(A,S...) -#define DBG_TX_ENTER(A) -#define DBG_TX_LEAVE(A) -#define DBG_ASSERT(C) -#define STATIC static - -#endif /* CONFIG_ET131X_DEBUG */ - -/* Forward declaration of the private adapter structure */ -struct et131x_adapter; - -void DumpTxQueueContents(int dbgLvl, struct et131x_adapter *adapter); -void DumpDeviceBlock(int dbgLvl, struct et131x_adapter *adapter, - unsigned int Block); -void DumpDeviceReg(int dbgLvl, struct et131x_adapter *adapter); - -#endif /* __ET131X_DBG_H__ */ diff --git a/src/et131x/et131x_defs.h b/src/et131x/et131x_defs.h deleted file mode 100644 index 886cb78..0000000 --- a/src/et131x/et131x_defs.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_defs.h - Defines, structs, enums, prototypes, etc. to assist with OS - * compatibility - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_DEFS_H__ -#define __ET131X_DEFS_H__ - -/* Packet and header sizes */ -#define NIC_MIN_PACKET_SIZE 60 -#define NIC_HEADER_SIZE ETH_HLEN /* 14 */ - -/* Multicast list size */ -#define NIC_MAX_MCAST_LIST 128 - -/* Supported Filters */ -#define ET131X_PACKET_TYPE_DIRECTED 0x0001 -#define ET131X_PACKET_TYPE_MULTICAST 0x0002 -#define ET131X_PACKET_TYPE_BROADCAST 0x0004 -#define ET131X_PACKET_TYPE_PROMISCUOUS 0x0008 -#define ET131X_PACKET_TYPE_ALL_MULTICAST 0x0010 - -/* Tx Timeout */ -#define ET131X_TX_TIMEOUT (1 * HZ) -#define NIC_SEND_HANG_THRESHOLD 0 - -/* MP_TCB flags */ -#define fMP_DEST_MULTI 0x00000001 -#define fMP_DEST_BROAD 0x00000002 - -/* MP_ADAPTER flags */ -#define fMP_ADAPTER_RECV_LOOKASIDE 0x00000004 -#define fMP_ADAPTER_INTERRUPT_IN_USE 0x00000008 -#define fMP_ADAPTER_SECONDARY 0x00000010 - -/* MP_SHARED flags */ -#define fMP_ADAPTER_SHUTDOWN 0x00100000 -#define fMP_ADAPTER_LOWER_POWER 0x00200000 - -#define fMP_ADAPTER_NON_RECOVER_ERROR 0x00800000 -#define fMP_ADAPTER_RESET_IN_PROGRESS 0x01000000 -#define fMP_ADAPTER_NO_CABLE 0x02000000 -#define fMP_ADAPTER_HARDWARE_ERROR 0x04000000 -#define fMP_ADAPTER_REMOVE_IN_PROGRESS 0x08000000 -#define fMP_ADAPTER_HALT_IN_PROGRESS 0x10000000 -#define fMP_ADAPTER_LINK_DETECTION 0x20000000 - -#define fMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000 -#define fMP_ADAPTER_NOT_READY_MASK 0x3ff00000 - -/* Some offsets in PCI config space that are actually used. */ -#define ET1310_PCI_PM_CAPABILITY 0x40 -#define ET1310_PCI_PM_CSR 0x44 -#define ET1310_PCI_MAX_PYLD 0x4C -#define ET1310_PCI_DEV_CTRL 0x50 -#define ET1310_PCI_DEV_STAT 0x52 -#define ET1310_NMI_DISABLE 0x61 -#define ET1310_PCI_MAC_ADDRESS 0xA4 -#define ET1310_PCI_EEPROM_STATUS 0xB2 -#define ET1310_PCI_PHY_INDEX_REG 0xB4 -#define ET1310_PCI_ACK_NACK 0xC0 -#define ET1310_PCI_REPLAY 0xC2 -#define ET1310_PCI_L0L1LATENCY 0xCF -#define ET1310_PCI_SEL_PHY_CTRL 0xE4 -#define ET1310_PCI_ADVANCED_ERR 0x100 - -/* PCI Vendor/Product IDs */ -#define ET131X_PCI_VENDOR_ID 0x11C1 // Agere Systems -#define ET131X_PCI_DEVICE_ID_GIG 0xED00 // ET1310 1000 Base-T -#define ET131X_PCI_DEVICE_ID_FAST 0xED01 // ET1310 100 Base-T - -/* Define order of magnitude converter */ -#define NANO_IN_A_MICRO 1000 - -#endif /* __ET131X_DEFS_H__ */ diff --git a/src/et131x/et131x_initpci.c b/src/et131x/et131x_initpci.c deleted file mode 100644 index 4c6f171..0000000 --- a/src/et131x/et131x_initpci.c +++ /dev/null @@ -1,1046 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_initpci.c - Routines and data used to register the driver with the - * PCI (and PCI Express) subsystem, as well as basic driver - * init and startup. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/pci.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> -#include <linux/random.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" - -#include "et131x_adapter.h" -#include "et131x_netdev.h" -#include "et131x_config.h" -#include "et131x_isr.h" - -#include "et1310_address_map.h" -#include "et1310_jagcore.h" -#include "et1310_tx.h" -#include "et1310_rx.h" -#include "et1310_mac.h" -#include "et1310_eeprom.h" - - -int __devinit et131x_pci_setup(struct pci_dev *pdev, - const struct pci_device_id *ent); -void __devexit et131x_pci_remove(struct pci_dev *pdev); - - -/* Modinfo parameters (filled out using defines from et131x_version.h) */ -MODULE_AUTHOR(DRIVER_AUTHOR); -MODULE_DESCRIPTION(DRIVER_INFO); -MODULE_LICENSE(DRIVER_LICENSE); - -/* Module Parameters and related data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -static u32 et131x_debug_level = DBG_LVL; -static u32 et131x_debug_flags = DBG_DEFAULTS; - -/* -et131x_debug_level : - Level of debugging desired (0-7) - 7 : DBG_RX_ON | DBG_TX_ON - 6 : DBG_PARAM_ON - 5 : DBG_VERBOSE_ON - 4 : DBG_TRACE_ON - 3 : DBG_NOTICE_ON - 2 : no debug info - 1 : no debug info - 0 : no debug info -*/ - -module_param(et131x_debug_level, uint, 0); -module_param(et131x_debug_flags, uint, 0); - -MODULE_PARM_DESC(et131x_debug_level, "Level of debugging desired (0-7)"); - -static dbg_info_t et131x_info = { DRIVER_NAME_EXT, 0, 0 }; -dbg_info_t *et131x_dbginfo = &et131x_info; -#endif /* CONFIG_ET131X_DEBUG */ - -static struct pci_device_id et131x_pci_table[] __devinitdata = { - {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID, - PCI_ANY_ID, 0, 0, 0UL}, - {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID, - PCI_ANY_ID, 0, 0, 0UL}, - {0,} -}; - -MODULE_DEVICE_TABLE(pci, et131x_pci_table); - -static struct pci_driver et131x_driver = { - .name = DRIVER_NAME, - .id_table = et131x_pci_table, - .probe = et131x_pci_setup, - .remove = __devexit_p(et131x_pci_remove), - .suspend = NULL, //et131x_pci_suspend, - .resume = NULL, //et131x_pci_resume, -}; - - -/** - * et131x_init_module - The "main" entry point called on driver initialization - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_init_module(void) -{ - int result; - -#ifdef CONFIG_ET131X_DEBUG - /* Set the level of debug messages displayed using the module - * parameter - */ - et131x_dbginfo->dbgFlags = et131x_debug_flags; - - switch (et131x_debug_level) { - case 7: - et131x_dbginfo->dbgFlags |= (DBG_RX_ON | DBG_TX_ON); - - case 6: - et131x_dbginfo->dbgFlags |= DBG_PARAM_ON; - - case 5: - et131x_dbginfo->dbgFlags |= DBG_VERBOSE_ON; - - case 4: - et131x_dbginfo->dbgFlags |= DBG_TRACE_ON; - - case 3: - et131x_dbginfo->dbgFlags |= DBG_NOTICE_ON; - - case 2: - case 1: - case 0: - default: - break; - } -#endif /* CONFIG_ET131X_DEBUG */ - - DBG_ENTER(et131x_dbginfo); - DBG_PRINT("%s\n", DRIVER_INFO); - - result = pci_register_driver(&et131x_driver); - - DBG_LEAVE(et131x_dbginfo); - return result; -} - -/** - * et131x_cleanup_module - The entry point called on driver cleanup - */ -void et131x_cleanup_module(void) -{ - DBG_ENTER(et131x_dbginfo); - - pci_unregister_driver(&et131x_driver); - - DBG_LEAVE(et131x_dbginfo); -} - -/* - * These macros map the driver-specific init_module() and cleanup_module() - * routines so they can be called by the kernel. - */ -module_init(et131x_init_module); -module_exit(et131x_cleanup_module); - - -/** - * et131x_find_adapter - Find the adapter and get all the assigned resources - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev) -{ - int result; - uint8_t eepromStat; - uint8_t maxPayload = 0; - uint8_t read_size_reg; - - DBG_ENTER(et131x_dbginfo); - - /* Allow disabling of Non-Maskable Interrupts in I/O space, to - * support validation. - */ - if (adapter->RegistryNMIDisable) { - uint8_t RegisterVal; - - RegisterVal = inb(ET1310_NMI_DISABLE); - RegisterVal &= 0xf3; - - if (adapter->RegistryNMIDisable == 2) { - RegisterVal |= 0xc; - } - - outb(ET1310_NMI_DISABLE, RegisterVal); - } - - /* We first need to check the EEPROM Status code located at offset - * 0xB2 of config space - */ - result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, - &eepromStat); - - /* THIS IS A WORKAROUND: - * I need to call this function twice to get my card in a - * LG M1 Express Dual running. I tried also a msleep before this - * function, because I thougth there could be some time condidions - * but it didn't work. Call the whole function twice also work. - */ - result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, - &eepromStat); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for " - "EEPROM Status\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* Determine if the error(s) we care about are present. If they are - * present, we need to fail. - */ - if (eepromStat & 0x4C) { - result = pci_read_config_byte(pdev, PCI_REVISION_ID, - &adapter->RevisionID); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not read PCI config space for " - "Revision ID\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } else if (adapter->RevisionID == 0x01) { - int32_t nLoop; - uint8_t ucTemp[4] = { 0xFE, 0x13, 0x10, 0xFF }; - - /* Re-write the first 4 bytes if we have an eeprom - * present and the revision id is 1, this fixes the - * corruption seen with 1310 B Silicon - */ - for (nLoop = 0; nLoop < 3; nLoop++) { - EepromWriteByte(adapter, nLoop, ucTemp[nLoop], - 0, SINGLE_BYTE); - } - } - - DBG_ERROR(et131x_dbginfo, - "Fatal EEPROM Status Error - 0x%04x\n", eepromStat); - - /* This error could mean that there was an error reading the - * eeprom or that the eeprom doesn't exist. We will treat - * each case the same and not try to gather additional - * information that normally would come from the eeprom, like - * MAC Address - */ - adapter->bEepromPresent = false; - - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } else { - DBG_TRACE(et131x_dbginfo, "EEPROM Status Code - 0x%04x\n", - eepromStat); - adapter->bEepromPresent = true; - } - - /* Read the EEPROM for information regarding LED behavior. Refer to - * ET1310_phy.c, et131x_xcvr_init(), for its use. - */ - EepromReadByte(adapter, 0x70, &adapter->eepromData[0], 0, SINGLE_BYTE); - EepromReadByte(adapter, 0x71, &adapter->eepromData[1], 0, SINGLE_BYTE); - - if (adapter->eepromData[0] != 0xcd) { - adapter->eepromData[1] = 0x00; // Disable all optional features - } - - /* Let's set up the PORT LOGIC Register. First we need to know what - * the max_payload_size is - */ - result = pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &maxPayload); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for " - "Max Payload Size\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* Program the Ack/Nak latency and replay timers */ - maxPayload &= 0x07; // Only the lower 3 bits are valid - - if (maxPayload < 2) { - const uint16_t AckNak[2] = { 0x76, 0xD0 }; - const uint16_t Replay[2] = { 0x1E0, 0x2ED }; - - result = pci_write_config_word(pdev, ET1310_PCI_ACK_NACK, - AckNak[maxPayload]); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not write PCI config space " - "for ACK/NAK\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - result = pci_write_config_word(pdev, ET1310_PCI_REPLAY, - Replay[maxPayload]); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not write PCI config space " - "for Replay Timer\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - } - - /* l0s and l1 latency timers. We are using default values. - * Representing 001 for L0s and 010 for L1 - */ - result = pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not write PCI config space for " - "Latency Timers\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* Change the max read size to 2k */ - result = pci_read_config_byte(pdev, 0x51, &read_size_reg); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not read PCI config space for Max read size\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - read_size_reg &= 0x8f; - read_size_reg |= 0x40; - - result = pci_write_config_byte(pdev, 0x51, read_size_reg); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not write PCI config space for Max read size\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* PCI Express Configuration registers 0x48-0x5B (Device Control) */ - result = pci_read_config_word(pdev, ET1310_PCI_DEV_CTRL, - &adapter->PciXDevCtl); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not read PCI config space for PCI Express Dev Ctl\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - - /* Get MAC address from config space if an eeprom exists, otherwise - * the MAC address there will not be valid - */ - if (adapter->bEepromPresent) { - int i; - - for (i = 0; i < ETH_ALEN; i++) { - result = pci_read_config_byte( - pdev, ET1310_PCI_MAC_ADDRESS + i, - adapter->PermanentAddress + i); - if (result != PCIBIOS_SUCCESSFUL) { - DBG_ERROR(et131x_dbginfo, - "Could not read PCI config space for MAC address\n"); - DBG_LEAVE(et131x_dbginfo); - return -EIO; - } - } - } - - DBG_LEAVE(et131x_dbginfo); - return 0; -} - -/** - * et131x_error_timer_handler - * @data: timer-specific variable; here a pointer to our adapter structure - * - * The routine called when the error timer expires, to track the number of - * recurring errors. - */ -void et131x_error_timer_handler(unsigned long data) -{ - struct et131x_adapter *pAdapter = (struct et131x_adapter *) data; - PM_CSR_t pm_csr; - - pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value); - - if (pm_csr.bits.pm_phy_sw_coma == 0) { - if (pAdapter->RegistryMACStat) { - UpdateMacStatHostCounters(pAdapter); - } - } else { - DBG_VERBOSE(et131x_dbginfo, - "No interrupts, in PHY coma, pm_csr = 0x%x\n", - pm_csr.value); - } - - if (!pAdapter->Bmsr.bits.link_status && - pAdapter->RegistryPhyComa && - pAdapter->PoMgmt.TransPhyComaModeOnBoot < 11) { - pAdapter->PoMgmt.TransPhyComaModeOnBoot++; - } - - if (pAdapter->PoMgmt.TransPhyComaModeOnBoot == 10) { - if (!pAdapter->Bmsr.bits.link_status - && pAdapter->RegistryPhyComa) { - if (pm_csr.bits.pm_phy_sw_coma == 0) { - // NOTE - This was originally a 'sync with interrupt'. How - // to do that under Linux? - et131x_enable_interrupts(pAdapter); - EnablePhyComa(pAdapter); - } - } - } - - /* This is a periodic timer, so reschedule */ - mod_timer(&pAdapter->ErrorTimer, jiffies + - TX_ERROR_PERIOD * HZ / 1000); -} - -/** - * et131x_link_detection_handler - * - * Timer function for link up at driver load time - */ -void et131x_link_detection_handler(unsigned long data) -{ - struct et131x_adapter *pAdapter = (struct et131x_adapter *) data; - unsigned long lockflags; - - /* Let everyone know that we have run */ - pAdapter->bLinkTimerActive = false; - - if (pAdapter->MediaState == 0) { - spin_lock_irqsave(&pAdapter->Lock, lockflags); - - pAdapter->MediaState = NETIF_STATUS_MEDIA_DISCONNECT; - MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION); - - spin_unlock_irqrestore(&pAdapter->Lock, lockflags); - - netif_carrier_off(pAdapter->netdev); - - pAdapter->bSetPending = false; - } -} - -/** - * et131x_adapter_setup - Set the adapter up as per cassini+ documentation - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_adapter_setup(struct et131x_adapter *pAdapter) -{ - int status = 0; - - DBG_ENTER(et131x_dbginfo); - - /* Configure the JAGCore */ - ConfigGlobalRegs(pAdapter); - - ConfigMACRegs1(pAdapter); - ConfigMMCRegs(pAdapter); - - ConfigRxMacRegs(pAdapter); - ConfigTxMacRegs(pAdapter); - - ConfigRxDmaRegs(pAdapter); - ConfigTxDmaRegs(pAdapter); - - ConfigMacStatRegs(pAdapter); - - /* Move the following code to Timer function?? */ - status = et131x_xcvr_find(pAdapter); - - if (status != 0) { - DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n"); - } - - /* Prepare the TRUEPHY library. */ - ET1310_PhyInit(pAdapter); - - /* Reset the phy now so changes take place */ - ET1310_PhyReset(pAdapter); - - /* Power down PHY */ - ET1310_PhyPowerDown(pAdapter, 1); - - /* - * We need to turn off 1000 base half dulplex, the mac does not - * support it. For the 10/100 part, turn off all gig advertisement - */ - if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST) { - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL); - } else { - ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE); - } - - /* Power up PHY */ - ET1310_PhyPowerDown(pAdapter, 0); - - et131x_setphy_normal(pAdapter); - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_setup_hardware_properties - set up the MAC Address on the ET1310 - * @adapter: pointer to our private adapter structure - */ -void et131x_setup_hardware_properties(struct et131x_adapter *adapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* If have our default mac from registry and no mac address from - * EEPROM then we need to generate the last octet and set it on the - * device - */ - if (!adapter->bOverrideAddress) { - if (adapter->PermanentAddress[0] == 0x00 && - adapter->PermanentAddress[1] == 0x00 && - adapter->PermanentAddress[2] == 0x00 && - adapter->PermanentAddress[3] == 0x00 && - adapter->PermanentAddress[4] == 0x00 && - adapter->PermanentAddress[5] == 0x00) { - /* - * We need to randomly generate the last octet so we - * decrease our chances of setting the mac address to - * same as another one of our cards in the system - */ - get_random_bytes(&adapter->CurrentAddress[5], 1); - - /* - * We have the default value in the register we are - * working with so we need to copy the current - * address into the permanent address - */ - memcpy(adapter->PermanentAddress, - adapter->CurrentAddress, ETH_ALEN); - } else { - /* We do not have an override address, so set the - * current address to the permanent address and add - * it to the device - */ - memcpy(adapter->CurrentAddress, - adapter->PermanentAddress, ETH_ALEN); - } - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310 - * @adapter: pointer to our private adapter structure - */ -void et131x_soft_reset(struct et131x_adapter *adapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Disable MAC Core */ - writel(0xc00f0000, &adapter->CSRAddress->mac.cfg1.value); - - /* Set everything to a reset value */ - writel(0x7F, &adapter->CSRAddress->global.sw_reset.value); - writel(0x000f0000, &adapter->CSRAddress->mac.cfg1.value); - writel(0x00000000, &adapter->CSRAddress->mac.cfg1.value); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_align_allocated_memory - Align allocated memory on a given boundary - * @adapter: pointer to our adapter structure - * @phys_addr: pointer to Physical address - * @offset: pointer to the offset variable - * @mask: correct mask - */ -void et131x_align_allocated_memory(struct et131x_adapter *adapter, - uint64_t *phys_addr, - uint64_t *offset, uint64_t mask) -{ - uint64_t new_addr; - - DBG_ENTER(et131x_dbginfo); - - *offset = 0; - - new_addr = *phys_addr & ~mask; - - if (new_addr != *phys_addr) { - /* Move to next aligned block */ - new_addr += mask + 1; - /* Return offset for adjusting virt addr */ - *offset = new_addr - *phys_addr; - /* Return new physical address */ - *phys_addr = new_addr; - } - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_adapter_memory_alloc - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure (as defined in errno.h). - * - * Allocate all the memory blocks for send, receive and others. - */ -int et131x_adapter_memory_alloc(struct et131x_adapter *adapter) -{ - int status = 0; - - DBG_ENTER(et131x_dbginfo); - - do { - /* Allocate memory for the Tx Ring */ - status = et131x_tx_dma_memory_alloc(adapter); - if (status != 0) { - DBG_ERROR(et131x_dbginfo, - "et131x_tx_dma_memory_alloc FAILED\n"); - break; - } - - /* Receive buffer memory allocation */ - status = et131x_rx_dma_memory_alloc(adapter); - if (status != 0) { - DBG_ERROR(et131x_dbginfo, - "et131x_rx_dma_memory_alloc FAILED\n"); - et131x_tx_dma_memory_free(adapter); - break; - } - - /* Init receive data structures */ - status = et131x_init_recv(adapter); - if (status != 0) { - DBG_ERROR(et131x_dbginfo, "et131x_init_recv FAILED\n"); - et131x_tx_dma_memory_free(adapter); - et131x_rx_dma_memory_free(adapter); - break; - } - } while (0); - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx - * @adapter: pointer to our private adapter structure - */ -void et131x_adapter_memory_free(struct et131x_adapter *adapter) -{ - DBG_ENTER(et131x_dbginfo); - - /* Free DMA memory */ - et131x_tx_dma_memory_free(adapter); - et131x_rx_dma_memory_free(adapter); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_pci_remove - * @pdev: a pointer to the device's pci_dev structure - * - * Registered in the pci_driver structure, this function is called when the - * PCI subsystem detects that a PCI device which matches the information - * contained in the pci_device_id table has been removed. - */ -void __devexit et131x_pci_remove(struct pci_dev *pdev) -{ - struct net_device *netdev; - struct et131x_adapter *adapter; - - DBG_ENTER(et131x_dbginfo); - - /* Retrieve the net_device pointer from the pci_dev struct, as well - * as the private adapter struct - */ - netdev = (struct net_device *) pci_get_drvdata(pdev); - adapter = netdev_priv(netdev); - - /* Perform device cleanup */ - unregister_netdev(netdev); - et131x_adapter_memory_free(adapter); - iounmap(adapter->CSRAddress); - free_netdev(netdev); - pci_release_regions(pdev); - pci_disable_device(pdev); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_pci_setup - Perform device initialization - * @pdev: a pointer to the device's pci_dev structure - * @ent: this device's entry in the pci_device_id table - * - * Returns 0 on success, errno on failure (as defined in errno.h) - * - * Registered in the pci_driver structure, this function is called when the - * PCI subsystem finds a new PCI device which matches the information - * contained in the pci_device_id table. This routine is the equivalent to - * a device insertion routine. - */ -int __devinit et131x_pci_setup(struct pci_dev *pdev, - const struct pci_device_id *ent) -{ - int result = 0; - int pm_cap; - bool pci_using_dac; - struct net_device *netdev = NULL; - struct et131x_adapter *adapter = NULL; - - DBG_ENTER(et131x_dbginfo); - - /* Enable the device via the PCI subsystem */ - result = pci_enable_device(pdev); - if (result != 0) { - DBG_ERROR(et131x_dbginfo, "pci_enable_device() failed\n"); - goto out; - } - - /* Perform some basic PCI checks */ - if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { - DBG_ERROR(et131x_dbginfo, - "Can't find PCI device's base address\n"); - result = -ENODEV; - goto out; - } - - result = pci_request_regions(pdev, DRIVER_NAME); - if (result != 0) { - DBG_ERROR(et131x_dbginfo, "Can't get PCI resources\n"); - goto err_disable; - } - - /* Enable PCI bus mastering */ - DBG_TRACE(et131x_dbginfo, "Setting PCI Bus Mastering...\n"); - pci_set_master(pdev); - - /* Query PCI for Power Mgmt Capabilities - * - * NOTE: Now reading PowerMgmt in another location; is this still - * needed? - */ - pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); - if (pm_cap == 0) { - DBG_ERROR(et131x_dbginfo, - "Cannot find Power Management capabilities\n"); - result = -EIO; - goto err_release_res; - } - - /* Check the DMA addressing support of this device */ - if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) { - DBG_TRACE(et131x_dbginfo, "64-bit DMA addressing supported\n"); - pci_using_dac = true; - - result = - pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL); - if (result != 0) { - DBG_ERROR(et131x_dbginfo, - "Unable to obtain 64 bit DMA for consistent allocations\n"); - goto err_release_res; - } - } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) { - DBG_TRACE(et131x_dbginfo, - "64-bit DMA addressing NOT supported\n"); - DBG_TRACE(et131x_dbginfo, - "32-bit DMA addressing will be used\n"); - pci_using_dac = false; - } else { - DBG_ERROR(et131x_dbginfo, "No usable DMA addressing method\n"); - result = -EIO; - goto err_release_res; - } - - /* Allocate netdev and private adapter structs */ - DBG_TRACE(et131x_dbginfo, - "Allocate netdev and private adapter structs...\n"); - netdev = et131x_device_alloc(); - if (netdev == NULL) { - DBG_ERROR(et131x_dbginfo, "Couldn't alloc netdev struct\n"); - result = -ENOMEM; - goto err_release_res; - } - - /* Setup the fundamental net_device and private adapter structure elements */ - DBG_TRACE(et131x_dbginfo, "Setting fundamental net_device info...\n"); - SET_NETDEV_DEV(netdev, &pdev->dev); - if (pci_using_dac) { - //netdev->features |= NETIF_F_HIGHDMA; - } - - /* - * NOTE - Turn this on when we're ready to deal with SG-DMA - * - * NOTE: According to "Linux Device Drivers", 3rd ed, Rubini et al, - * if checksumming is not performed in HW, then the kernel will not - * use SG. - * From pp 510-511: - * - * "Note that the kernel does not perform scatter/gather I/O to your - * device if it does not also provide some form of checksumming as - * well. The reason is that, if the kernel has to make a pass over a - * fragmented ("nonlinear") packet to calculate the checksum, it - * might as well copy the data and coalesce the packet at the same - * time." - * - * This has been verified by setting the flags below and still not - * receiving a scattered buffer from the network stack, so leave it - * off until checksums are calculated in HW. - */ - //netdev->features |= NETIF_F_SG; - //netdev->features |= NETIF_F_NO_CSUM; - //netdev->features |= NETIF_F_LLTX; - - /* Allocate private adapter struct and copy in relevant information */ - adapter = netdev_priv(netdev); - adapter->pdev = pdev; - adapter->netdev = netdev; - adapter->VendorID = pdev->vendor; - adapter->DeviceID = pdev->device; - - /* Do the same for the netdev struct */ - netdev->irq = pdev->irq; - netdev->base_addr = pdev->resource[0].start; - - /* Initialize spinlocks here */ - DBG_TRACE(et131x_dbginfo, "Initialize spinlocks...\n"); - - spin_lock_init(&adapter->Lock); - spin_lock_init(&adapter->TCBSendQLock); - spin_lock_init(&adapter->TCBReadyQLock); - spin_lock_init(&adapter->SendHWLock); - spin_lock_init(&adapter->SendWaitLock); - spin_lock_init(&adapter->RcvLock); - spin_lock_init(&adapter->RcvPendLock); - spin_lock_init(&adapter->FbrLock); - spin_lock_init(&adapter->PHYLock); - - /* Parse configuration parameters into the private adapter struct */ - et131x_config_parse(adapter); - - /* Find the physical adapter - * - * NOTE: This is the equivalent of the MpFindAdapter() routine; can we - * lump it's init with the device specific init below into a - * single init function? - */ - //while (et131x_find_adapter(adapter, pdev) != 0); - et131x_find_adapter(adapter, pdev); - - /* Map the bus-relative registers to system virtual memory */ - DBG_TRACE(et131x_dbginfo, - "Mapping bus-relative registers to virtual memory...\n"); - - adapter->CSRAddress = ioremap_nocache(pci_resource_start(pdev, 0), - pci_resource_len(pdev, 0)); - if (adapter->CSRAddress == NULL) { - DBG_ERROR(et131x_dbginfo, "Cannot map device registers\n"); - result = -ENOMEM; - goto err_free_dev; - } - - /* Perform device-specific initialization here (See code below) */ - - /* If Phy COMA mode was enabled when we went down, disable it here. */ - { - PM_CSR_t GlobalPmCSR = { 0 }; - - GlobalPmCSR.bits.pm_sysclk_gate = 1; - GlobalPmCSR.bits.pm_txclk_gate = 1; - GlobalPmCSR.bits.pm_rxclk_gate = 1; - writel(GlobalPmCSR.value, - &adapter->CSRAddress->global.pm_csr.value); - } - - /* Issue a global reset to the et1310 */ - DBG_TRACE(et131x_dbginfo, "Issuing soft reset...\n"); - et131x_soft_reset(adapter); - - /* Disable all interrupts (paranoid) */ - DBG_TRACE(et131x_dbginfo, "Disable device interrupts...\n"); - et131x_disable_interrupts(adapter); - - /* Allocate DMA memory */ - result = et131x_adapter_memory_alloc(adapter); - if (result != 0) { - DBG_ERROR(et131x_dbginfo, - "Could not alloc adapater memory (DMA)\n"); - goto err_iounmap; - } - - /* Init send data structures */ - DBG_TRACE(et131x_dbginfo, "Init send data structures...\n"); - et131x_init_send(adapter); - - adapter->PoMgmt.PowerState = NdisDeviceStateD0; - - /* Register the interrupt - * - * NOTE - This is being done in the open routine, where most other - * Linux drivers setup IRQ handlers. Make sure device - * interrupts are not turned on before the IRQ is registered!! - * - * What we will do here is setup the task structure for the - * ISR's deferred handler - */ - INIT_WORK(&adapter->task, et131x_isr_handler); - - /* Determine MAC Address, and copy into the net_device struct */ - DBG_TRACE(et131x_dbginfo, "Retrieve MAC address...\n"); - et131x_setup_hardware_properties(adapter); - - memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN); - - /* Setup et1310 as per the documentation */ - DBG_TRACE(et131x_dbginfo, "Setup the adapter...\n"); - et131x_adapter_setup(adapter); - - /* Create a timer to count errors received by the NIC */ - init_timer(&adapter->ErrorTimer); - - adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000; - adapter->ErrorTimer.function = et131x_error_timer_handler; - adapter->ErrorTimer.data = (unsigned long)adapter; - - /* Initialize link state */ - et131x_link_detection_handler((unsigned long)adapter); - - /* Intialize variable for counting how long we do not have link status */ - adapter->PoMgmt.TransPhyComaModeOnBoot = 0; - - /* We can enable interrupts now - * - * NOTE - Because registration of interrupt handler is done in the - * device's open(), defer enabling device interrupts to that - * point - */ - - /* Register the net_device struct with the Linux network layer */ - DBG_TRACE(et131x_dbginfo, "Registering net_device...\n"); - if ((result = register_netdev(netdev)) != 0) { - DBG_ERROR(et131x_dbginfo, "register_netdev() failed\n"); - goto err_mem_free; - } - - /* Register the net_device struct with the PCI subsystem. Save a copy - * of the PCI config space for this device now that the device has - * been initialized, just in case it needs to be quickly restored. - */ - pci_set_drvdata(pdev, netdev); - - pci_save_state(adapter->pdev); - -out: - DBG_LEAVE(et131x_dbginfo); - return result; - -err_mem_free: - et131x_adapter_memory_free(adapter); -err_iounmap: - iounmap(adapter->CSRAddress); -err_free_dev: - free_netdev(netdev); -err_release_res: - pci_release_regions(pdev); -err_disable: - pci_disable_device(pdev); - goto out; -} diff --git a/src/et131x/et131x_initpci.h b/src/et131x/et131x_initpci.h deleted file mode 100644 index bbacb62..0000000 --- a/src/et131x/et131x_initpci.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_initpci.h - Header which includes common data and function prototypes - * related to the driver's PCI (and PCI Express) information. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_INITPCI_H__ -#define __ET131X_INITPCI_H__ - -/* Function Prototypes */ -void et131x_align_allocated_memory(struct et131x_adapter *adapter, - u64 *phys_addr, - u64 *offset, u64 mask); - -int et131x_adapter_setup(struct et131x_adapter *adapter); -int et131x_adapter_memory_alloc(struct et131x_adapter *adapter); -void et131x_adapter_memory_free(struct et131x_adapter *adapter); -void et131x_setup_hardware_properties(struct et131x_adapter *adapter); -void et131x_soft_reset(struct et131x_adapter *adapter); - -#endif /* __ET131X_INITPCI_H__ */ diff --git a/src/et131x/et131x_isr.c b/src/et131x/et131x_isr.c deleted file mode 100644 index 00afad1..0000000 --- a/src/et131x/et131x_isr.c +++ /dev/null @@ -1,488 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_isr.c - File which contains the ISR, ISR handler, and related routines - * for processing interrupts from the device. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" -#include "et1310_mac.h" - -#include "et131x_adapter.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -/** - * et131x_isr - The Interrupt Service Routine for the driver. - * @irq: the IRQ on which the interrupt was received. - * @dev_id: device-specific info (here a pointer to a net_device struct) - * - * Returns a value indicating if the interrupt was handled. - */ -irqreturn_t et131x_isr(int irq, void *dev_id) -{ - bool handled = true; - struct net_device *netdev = (struct net_device *)dev_id; - struct et131x_adapter *adapter = NULL; - INTERRUPT_t status; - - if (netdev == NULL || !netif_device_present(netdev)) { - DBG_WARNING(et131x_dbginfo, - "No net_device struct or device not present\n"); - handled = false; - goto out; - } - - adapter = netdev_priv(netdev); - - /* If the adapter is in low power state, then it should not - * recognize any interrupt - */ - - /* Disable Device Interrupts */ - et131x_disable_interrupts(adapter); - - /* Get a copy of the value in the interrupt status register - * so we can process the interrupting section - */ - status.value = readl(&adapter->CSRAddress->global.int_status.value); - - if (adapter->FlowControl == TxOnly || - adapter->FlowControl == Both) { - status.value &= ~INT_MASK_ENABLE; - } else { - status.value &= ~INT_MASK_ENABLE_NO_FLOW; - } - - /* Make sure this is our interrupt */ - if (!status.value) { -#ifdef CONFIG_ET131X_DEBUG - adapter->Stats.UnhandledInterruptsPerSec++; -#endif - handled = false; - DBG_VERBOSE(et131x_dbginfo, "NOT OUR INTERRUPT\n"); - et131x_enable_interrupts(adapter); - goto out; - } - - /* This is our interrupt, so process accordingly */ -#ifdef CONFIG_ET131X_DEBUG - if (status.bits.rxdma_xfr_done) { - adapter->Stats.RxDmaInterruptsPerSec++; - } - - if (status.bits.txdma_isr) { - adapter->Stats.TxDmaInterruptsPerSec++; - } -#endif - - if (status.bits.watchdog_interrupt) { - PMP_TCB pMpTcb = adapter->TxRing.CurrSendHead; - - if (pMpTcb) { - if (++pMpTcb->PacketStaleCount > 1) { - status.bits.txdma_isr = 1; - } - } - - if (adapter->RxRing.UnfinishedReceives) { - status.bits.rxdma_xfr_done = 1; - } else if (pMpTcb == NULL) { - writel(0, &adapter->CSRAddress->global.watchdog_timer); - } - - status.bits.watchdog_interrupt = 0; -#ifdef CONFIG_ET131X_DEBUG - adapter->Stats.WatchDogInterruptsPerSec++; -#endif - } - - if (status.value == 0) { - /* This interrupt has in some way been "handled" by - * the ISR. Either it was a spurious Rx interrupt, or - * it was a Tx interrupt that has been filtered by - * the ISR. - */ - et131x_enable_interrupts(adapter); - goto out; - } - - /* We need to save the interrupt status value for use in our - * DPC. We will clear the software copy of that in that - * routine. - */ - adapter->Stats.InterruptStatus = status; - - /* Schedule the ISR handler as a bottom-half task in the - * kernel's tq_immediate queue, and mark the queue for - * execution - */ - schedule_work(&adapter->task); - -out: - return IRQ_RETVAL(handled); -} - -/** - * et131x_isr_handler - The ISR handler - * @p_adapter, a pointer to the device's private adapter structure - * - * scheduled to run in a deferred context by the ISR. This is where the ISR's - * work actually gets done. - */ -void et131x_isr_handler(struct work_struct *work) -{ - struct et131x_adapter *pAdapter = - container_of(work, struct et131x_adapter, task); - INTERRUPT_t GlobStatus = pAdapter->Stats.InterruptStatus; - ADDRESS_MAP_t __iomem *iomem = pAdapter->CSRAddress; - - /* - * These first two are by far the most common. Once handled, we clear - * their two bits in the status word. If the word is now zero, we - * exit. - */ - /* Handle all the completed Transmit interrupts */ - if (GlobStatus.bits.txdma_isr) { - DBG_TX(et131x_dbginfo, "TXDMA_ISR interrupt\n"); - et131x_handle_send_interrupt(pAdapter); - } - - /* Handle all the completed Receives interrupts */ - if (GlobStatus.bits.rxdma_xfr_done) { - DBG_RX(et131x_dbginfo, "RXDMA_XFR_DONE interrupt\n"); - et131x_handle_recv_interrupt(pAdapter); - } - - GlobStatus.value &= 0xffffffd7; - - if (GlobStatus.value) { - /* Handle the TXDMA Error interrupt */ - if (GlobStatus.bits.txdma_err) { - TXDMA_ERROR_t TxDmaErr; - - /* Following read also clears the register (COR) */ - TxDmaErr.value = readl(&iomem->txdma.TxDmaError.value); - - DBG_WARNING(et131x_dbginfo, - "TXDMA_ERR interrupt, error = %d\n", - TxDmaErr.value); - } - - /* Handle Free Buffer Ring 0 and 1 Low interrupt */ - if (GlobStatus.bits.rxdma_fb_ring0_low || - GlobStatus.bits.rxdma_fb_ring1_low) { - /* - * This indicates the number of unused buffers in - * RXDMA free buffer ring 0 is <= the limit you - * programmed. Free buffer resources need to be - * returned. Free buffers are consumed as packets - * are passed from the network to the host. The host - * becomes aware of the packets from the contents of - * the packet status ring. This ring is queried when - * the packet done interrupt occurs. Packets are then - * passed to the OS. When the OS is done with the - * packets the resources can be returned to the - * ET1310 for re-use. This interrupt is one method of - * returning resources. - */ - DBG_WARNING(et131x_dbginfo, - "RXDMA_FB_RING0_LOW or " - "RXDMA_FB_RING1_LOW interrupt\n"); - - /* If the user has flow control on, then we will - * send a pause packet, otherwise just exit - */ - if (pAdapter->FlowControl == TxOnly || - pAdapter->FlowControl == Both) { - PM_CSR_t pm_csr; - - /* Tell the device to send a pause packet via - * the back pressure register - */ - pm_csr.value = readl(&iomem->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 0) { - TXMAC_BP_CTRL_t bp_ctrl = { 0 }; - - bp_ctrl.bits.bp_req = 1; - bp_ctrl.bits.bp_xonxoff = 1; - writel(bp_ctrl.value, - &iomem->txmac.bp_ctrl.value); - } - } - } - - /* Handle Packet Status Ring Low Interrupt */ - if (GlobStatus.bits.rxdma_pkt_stat_ring_low) { - DBG_WARNING(et131x_dbginfo, - "RXDMA_PKT_STAT_RING_LOW interrupt\n"); - - /* - * Same idea as with the two Free Buffer Rings. - * Packets going from the network to the host each - * consume a free buffer resource and a packet status - * resource. These resoures are passed to the OS. - * When the OS is done with the resources, they need - * to be returned to the ET1310. This is one method - * of returning the resources. - */ - } - - /* Handle RXDMA Error Interrupt */ - if (GlobStatus.bits.rxdma_err) { - /* - * The rxdma_error interrupt is sent when a time-out - * on a request issued by the JAGCore has occurred or - * a completion is returned with an un-successful - * status. In both cases the request is considered - * complete. The JAGCore will automatically re-try the - * request in question. Normally information on events - * like these are sent to the host using the "Advanced - * Error Reporting" capability. This interrupt is - * another way of getting similar information. The - * only thing required is to clear the interrupt by - * reading the ISR in the global resources. The - * JAGCore will do a re-try on the request. Normally - * you should never see this interrupt. If you start - * to see this interrupt occurring frequently then - * something bad has occurred. A reset might be the - * thing to do. - */ - // TRAP(); - - pAdapter->TxMacTest.value = - readl(&iomem->txmac.tx_test.value); - DBG_WARNING(et131x_dbginfo, - "RxDMA_ERR interrupt, error %x\n", - pAdapter->TxMacTest.value); - } - - /* Handle the Wake on LAN Event */ - if (GlobStatus.bits.wake_on_lan) { - /* - * This is a secondary interrupt for wake on LAN. - * The driver should never see this, if it does, - * something serious is wrong. We will TRAP the - * message when we are in DBG mode, otherwise we - * will ignore it. - */ - DBG_ERROR(et131x_dbginfo, "WAKE_ON_LAN interrupt\n"); - } - - /* Handle the PHY interrupt */ - if (GlobStatus.bits.phy_interrupt) { - PM_CSR_t pm_csr; - MI_BMSR_t BmsrInts, BmsrData; - MI_ISR_t myIsr; - - DBG_VERBOSE(et131x_dbginfo, "PHY interrupt\n"); - - /* If we are in coma mode when we get this interrupt, - * we need to disable it. - */ - pm_csr.value = readl(&iomem->global.pm_csr.value); - if (pm_csr.bits.pm_phy_sw_coma == 1) { - /* - * Check to see if we are in coma mode and if - * so, disable it because we will not be able - * to read PHY values until we are out. - */ - DBG_VERBOSE(et131x_dbginfo, - "Device is in COMA mode, " - "need to wake up\n"); - DisablePhyComa(pAdapter); - } - - /* Read the PHY ISR to clear the reason for the - * interrupt. - */ - MiRead(pAdapter, (uint8_t) offsetof(MI_REGS_t, isr), - &myIsr.value); - - if (!pAdapter->ReplicaPhyLoopbk) { - MiRead(pAdapter, - (uint8_t) offsetof(MI_REGS_t, bmsr), - &BmsrData.value); - - BmsrInts.value = - pAdapter->Bmsr.value ^ BmsrData.value; - pAdapter->Bmsr.value = BmsrData.value; - - DBG_VERBOSE(et131x_dbginfo, - "Bmsr.value = 0x%04x," - "Bmsr_ints.value = 0x%04x\n", - BmsrData.value, BmsrInts.value); - - /* Do all the cable in / cable out stuff */ - et131x_Mii_check(pAdapter, BmsrData, BmsrInts); - } - } - - /* Let's move on to the TxMac */ - if (GlobStatus.bits.txmac_interrupt) { - pAdapter->TxRing.TxMacErr.value = - readl(&iomem->txmac.err.value); - - /* - * When any of the errors occur and TXMAC generates - * an interrupt to report these errors, it usually - * means that TXMAC has detected an error in the data - * stream retrieved from the on-chip Tx Q. All of - * these errors are catastrophic and TXMAC won't be - * able to recover data when these errors occur. In - * a nutshell, the whole Tx path will have to be reset - * and re-configured afterwards. - */ - DBG_WARNING(et131x_dbginfo, - "TXMAC interrupt, error 0x%08x\n", - pAdapter->TxRing.TxMacErr.value); - - /* If we are debugging, we want to see this error, - * otherwise we just want the device to be reset and - * continue - */ - //DBG_TRAP(); - } - - /* Handle RXMAC Interrupt */ - if (GlobStatus.bits.rxmac_interrupt) { - /* - * These interrupts are catastrophic to the device, - * what we need to do is disable the interrupts and - * set the flag to cause us to reset so we can solve - * this issue. - */ - // MP_SET_FLAG( pAdapter, fMP_ADAPTER_HARDWARE_ERROR ); - - DBG_WARNING(et131x_dbginfo, - "RXMAC interrupt, error 0x%08x. Requesting reset\n", - readl(&iomem->rxmac.err_reg.value)); - - DBG_WARNING(et131x_dbginfo, - "Enable 0x%08x, Diag 0x%08x\n", - readl(&iomem->rxmac.ctrl.value), - readl(&iomem->rxmac.rxq_diag.value)); - - /* - * If we are debugging, we want to see this error, - * otherwise we just want the device to be reset and - * continue - */ - // TRAP(); - } - - /* Handle MAC_STAT Interrupt */ - if (GlobStatus.bits.mac_stat_interrupt) { - /* - * This means at least one of the un-masked counters - * in the MAC_STAT block has rolled over. Use this - * to maintain the top, software managed bits of the - * counter(s). - */ - DBG_VERBOSE(et131x_dbginfo, "MAC_STAT interrupt\n"); - HandleMacStatInterrupt(pAdapter); - } - - /* Handle SLV Timeout Interrupt */ - if (GlobStatus.bits.slv_timeout) { - /* - * This means a timeout has occured on a read or - * write request to one of the JAGCore registers. The - * Global Resources block has terminated the request - * and on a read request, returned a "fake" value. - * The most likely reasons are: Bad Address or the - * addressed module is in a power-down state and - * can't respond. - */ - DBG_VERBOSE(et131x_dbginfo, "SLV_TIMEOUT interrupt\n"); - } - } - - if (pAdapter->PoMgmt.PowerState == NdisDeviceStateD0) { - et131x_enable_interrupts(pAdapter); - } -} diff --git a/src/et131x/et131x_isr.h b/src/et131x/et131x_isr.h deleted file mode 100644 index 76a51d5..0000000 --- a/src/et131x/et131x_isr.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_isr.h - Defines, structs, enums, prototypes, etc. pertaining to the - * ISR processing code. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_ISR_H__ -#define __ET131X_ISR_H__ - -irqreturn_t et131x_isr(int irq, void *dev_id); -void et131x_isr_handler(struct work_struct *work); - -#endif /* __ET131X_ISR_H__ */ diff --git a/src/et131x/et131x_netdev.c b/src/et131x/et131x_netdev.c deleted file mode 100644 index de65972..0000000 --- a/src/et131x/et131x_netdev.c +++ /dev/null @@ -1,856 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_netdev.c - Routines and data required by all Linux network devices. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#include "et131x_version.h" -#include "et131x_debug.h" -#include "et131x_defs.h" - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/kernel.h> - -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/ctype.h> -#include <linux/string.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/in.h> -#include <linux/delay.h> -#include <asm/io.h> -#include <asm/system.h> -#include <asm/bitops.h> - -#include <linux/mii.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/skbuff.h> -#include <linux/if_arp.h> -#include <linux/ioport.h> - -#include "et1310_phy.h" -#include "et1310_pm.h" -#include "et1310_jagcore.h" -#include "et1310_mac.h" -#include "et1310_tx.h" - -#include "et131x_adapter.h" -#include "et131x_isr.h" -#include "et131x_initpci.h" - -/* Data for debugging facilities */ -#ifdef CONFIG_ET131X_DEBUG -extern dbg_info_t *et131x_dbginfo; -#endif /* CONFIG_ET131X_DEBUG */ - -struct net_device_stats *et131x_stats(struct net_device *netdev); -int et131x_open(struct net_device *netdev); -int et131x_close(struct net_device *netdev); -int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd); -void et131x_multicast(struct net_device *netdev); -int et131x_tx(struct sk_buff *skb, struct net_device *netdev); -void et131x_tx_timeout(struct net_device *netdev); -int et131x_change_mtu(struct net_device *netdev, int new_mtu); -int et131x_set_mac_addr(struct net_device *netdev, void *new_mac); -void et131x_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); -void et131x_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); -void et131x_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); - -/** - * et131x_device_alloc - * - * Returns pointer to the allocated and initialized net_device struct for - * this device. - * - * Create instances of net_device and wl_private for the new adapter and - * register the device's entry points in the net_device structure. - */ -struct net_device *et131x_device_alloc(void) -{ - struct net_device *netdev; - - DBG_ENTER(et131x_dbginfo); - - /* Alloc net_device and adapter structs */ - netdev = alloc_etherdev(sizeof(struct et131x_adapter)); - - if (netdev == NULL) { - DBG_ERROR(et131x_dbginfo, - "Alloc of net_device struct failed\n"); - DBG_LEAVE(et131x_dbginfo); - return NULL; - } - - /* Setup the function registration table (and other data) for a - * net_device - */ - //netdev->init = &et131x_init; - //netdev->set_config = &et131x_config; - netdev->get_stats = &et131x_stats; - netdev->open = &et131x_open; - netdev->stop = &et131x_close; - netdev->do_ioctl = &et131x_ioctl; - netdev->set_multicast_list = &et131x_multicast; - netdev->hard_start_xmit = &et131x_tx; - netdev->tx_timeout = &et131x_tx_timeout; - netdev->watchdog_timeo = ET131X_TX_TIMEOUT; - netdev->change_mtu = &et131x_change_mtu; - netdev->set_mac_address = &et131x_set_mac_addr; - - //netdev->ethtool_ops = &et131x_ethtool_ops; - - // Poll? - //netdev->poll = &et131x_poll; - //netdev->poll_controller = &et131x_poll_controller; - - DBG_LEAVE(et131x_dbginfo); - return netdev; -} - -/** - * et131x_stats - Return the current device statistics. - * @netdev: device whose stats are being queried - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -struct net_device_stats *et131x_stats(struct net_device *netdev) -{ - struct et131x_adapter *adapter = netdev_priv(netdev); - struct net_device_stats *stats = &adapter->net_stats; - CE_STATS_t *devstat = &adapter->Stats; - - DBG_ENTER(et131x_dbginfo); - - stats->rx_packets = devstat->ipackets; - stats->tx_packets = devstat->opackets; - stats->rx_errors = devstat->length_err + devstat->alignment_err + - devstat->crc_err + devstat->code_violations + devstat->other_errors; - stats->tx_errors = devstat->max_pkt_error; - stats->multicast = devstat->multircv; - stats->collisions = devstat->collisions; - - stats->rx_length_errors = devstat->length_err; - stats->rx_over_errors = devstat->rx_ov_flow; - stats->rx_crc_errors = devstat->crc_err; - - // NOTE: These stats don't have corresponding values in CE_STATS, so we're - // going to have to update these directly from within the TX/RX code - //stats->rx_bytes = 20; //devstat->; - //stats->tx_bytes = 20; //devstat->; - //stats->rx_dropped = devstat->; - //stats->tx_dropped = devstat->; - - // NOTE: Not used, can't find analogous statistics - //stats->rx_frame_errors = devstat->; - //stats->rx_fifo_errors = devstat->; - //stats->rx_missed_errors = devstat->; - - //stats->tx_aborted_errors = devstat->; - //stats->tx_carrier_errors = devstat->; - //stats->tx_fifo_errors = devstat->; - //stats->tx_heartbeat_errors = devstat->; - //stats->tx_window_errors = devstat->; - - DBG_LEAVE(et131x_dbginfo); - return stats; -} - -/** - * et131x_open - Open the device for use. - * @netdev: device to be opened - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_open(struct net_device *netdev) -{ - int result = 0; - struct et131x_adapter *adapter = netdev_priv(netdev); - - DBG_ENTER(et131x_dbginfo); - - /* Start the timer to track NIC errors */ - add_timer(&adapter->ErrorTimer); - - /* Register our ISR */ - DBG_TRACE(et131x_dbginfo, "Registering ISR...\n"); - - result = - request_irq(netdev->irq, et131x_isr, IRQF_SHARED, netdev->name, - netdev); - if (result) { - DBG_ERROR(et131x_dbginfo, "Could not register ISR\n"); - DBG_LEAVE(et131x_dbginfo); - return result; - } - - /* Enable the Tx and Rx DMA engines (if not already enabled) */ - et131x_rx_dma_enable(adapter); - et131x_tx_dma_enable(adapter); - - /* Enable device interrupts */ - et131x_enable_interrupts(adapter); - - MP_SET_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE); - - /* We're ready to move some data, so start the queue */ - netif_start_queue(netdev); - - DBG_LEAVE(et131x_dbginfo); - return result; -} - -/** - * et131x_close - Close the device - * @netdev: device to be closed - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_close(struct net_device *netdev) -{ - struct et131x_adapter *adapter = netdev_priv(netdev); - - DBG_ENTER(et131x_dbginfo); - - /* First thing is to stop the queue */ - netif_stop_queue(netdev); - - /* Stop the Tx and Rx DMA engines */ - et131x_rx_dma_disable(adapter); - et131x_tx_dma_disable(adapter); - - /* Disable device interrupts */ - et131x_disable_interrupts(adapter); - - /* Deregistering ISR */ - MP_CLEAR_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE); - - DBG_TRACE(et131x_dbginfo, "Deregistering ISR...\n"); - free_irq(netdev->irq, netdev); - - /* Stop the error timer */ - del_timer_sync(&adapter->ErrorTimer); - - DBG_LEAVE(et131x_dbginfo); - return 0; -} - -/** - * et131x_ioctl_mii - The function which handles MII IOCTLs - * @netdev: device on which the query is being made - * @reqbuf: the request-specific data buffer - * @cmd: the command request code - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_ioctl_mii(struct net_device *netdev, struct ifreq *reqbuf, int cmd) -{ - int status = 0; - struct et131x_adapter *pAdapter = netdev_priv(netdev); - struct mii_ioctl_data *data = if_mii(reqbuf); - - DBG_ENTER(et131x_dbginfo); - - switch (cmd) { - case SIOCGMIIPHY: - DBG_VERBOSE(et131x_dbginfo, "SIOCGMIIPHY\n"); - data->phy_id = pAdapter->Stats.xcvr_addr; - break; - - case SIOCGMIIREG: - DBG_VERBOSE(et131x_dbginfo, "SIOCGMIIREG\n"); - if (!capable(CAP_NET_ADMIN)) { - status = -EPERM; - } else { - status = MiRead(pAdapter, - data->reg_num, &data->val_out); - } - break; - - case SIOCSMIIREG: - DBG_VERBOSE(et131x_dbginfo, "SIOCSMIIREG\n"); - if (!capable(CAP_NET_ADMIN)) { - status = -EPERM; - } else { - status = MiWrite(pAdapter, data->reg_num, - data->val_in); - } - break; - - default: - status = -EOPNOTSUPP; - } - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_ioctl - The I/O Control handler for the driver - * @netdev: device on which the control request is being made - * @reqbuf: a pointer to the IOCTL request buffer - * @cmd: the IOCTL command code - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd) -{ - int status = 0; - - DBG_ENTER(et131x_dbginfo); - - switch (cmd) { - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - status = et131x_ioctl_mii(netdev, reqbuf, cmd); - break; - - default: - DBG_WARNING(et131x_dbginfo, "Unhandled IOCTL Code: 0x%04x\n", - cmd); - status = -EOPNOTSUPP; - } - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_set_packet_filter - Configures the Rx Packet filtering on the device - * @adapter: pointer to our private adapter structure - * - * Returns 0 on success, errno on failure - */ -int et131x_set_packet_filter(struct et131x_adapter *adapter) -{ - int status = 0; - uint32_t filter = adapter->PacketFilter; - RXMAC_CTRL_t ctrl; - RXMAC_PF_CTRL_t pf_ctrl; - - DBG_ENTER(et131x_dbginfo); - - ctrl.value = readl(&adapter->CSRAddress->rxmac.ctrl.value); - pf_ctrl.value = readl(&adapter->CSRAddress->rxmac.pf_ctrl.value); - - /* Default to disabled packet filtering. Enable it in the individual - * case statements that require the device to filter something - */ - ctrl.bits.pkt_filter_disable = 1; - - /* Set us to be in promiscuous mode so we receive everything, this - * is also true when we get a packet filter of 0 - */ - if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) { - pf_ctrl.bits.filter_broad_en = 0; - pf_ctrl.bits.filter_multi_en = 0; - pf_ctrl.bits.filter_uni_en = 0; - } else { - /* - * Set us up with Multicast packet filtering. Three cases are - * possible - (1) we have a multi-cast list, (2) we receive ALL - * multicast entries or (3) we receive none. - */ - if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) { - DBG_VERBOSE(et131x_dbginfo, - "Multicast filtering OFF (Rx ALL MULTICAST)\n"); - pf_ctrl.bits.filter_multi_en = 0; - } else { - DBG_VERBOSE(et131x_dbginfo, "Multicast filtering ON\n"); - SetupDeviceForMulticast(adapter); - pf_ctrl.bits.filter_multi_en = 1; - ctrl.bits.pkt_filter_disable = 0; - } - - /* Set us up with Unicast packet filtering */ - if (filter & ET131X_PACKET_TYPE_DIRECTED) { - DBG_VERBOSE(et131x_dbginfo, "Unicast Filtering ON\n"); - SetupDeviceForUnicast(adapter); - pf_ctrl.bits.filter_uni_en = 1; - ctrl.bits.pkt_filter_disable = 0; - } - - /* Set us up with Broadcast packet filtering */ - if (filter & ET131X_PACKET_TYPE_BROADCAST) { - DBG_VERBOSE(et131x_dbginfo, "Broadcast Filtering ON\n"); - pf_ctrl.bits.filter_broad_en = 1; - ctrl.bits.pkt_filter_disable = 0; - } else { - DBG_VERBOSE(et131x_dbginfo, - "Broadcast Filtering OFF\n"); - pf_ctrl.bits.filter_broad_en = 0; - } - - /* Setup the receive mac configuration registers - Packet - * Filter control + the enable / disable for packet filter - * in the control reg. - */ - writel(pf_ctrl.value, - &adapter->CSRAddress->rxmac.pf_ctrl.value); - writel(ctrl.value, &adapter->CSRAddress->rxmac.ctrl.value); - } - - DBG_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_multicast - The handler to configure multicasting on the interface - * @netdev: a pointer to a net_device struct representing the device - */ -void et131x_multicast(struct net_device *netdev) -{ - struct et131x_adapter *adapter = netdev_priv(netdev); - uint32_t PacketFilter = 0; - uint32_t count; - unsigned long lockflags; - struct dev_mc_list *mclist = netdev->mc_list; - - DBG_ENTER(et131x_dbginfo); - - spin_lock_irqsave(&adapter->Lock, lockflags); - - /* Before we modify the platform-independent filter flags, store them - * locally. This allows us to determine if anything's changed and if - * we even need to bother the hardware - */ - PacketFilter = adapter->PacketFilter; - - /* Clear the 'multicast' flag locally; becuase we only have a single - * flag to check multicast, and multiple multicast addresses can be - * set, this is the easiest way to determine if more than one - * multicast address is being set. - */ - PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST; - - /* Check the net_device flags and set the device independent flags - * accordingly - */ - DBG_VERBOSE(et131x_dbginfo, - "MULTICAST ADDR COUNT: %d\n", netdev->mc_count); - - if (netdev->flags & IFF_PROMISC) { - DBG_VERBOSE(et131x_dbginfo, "Request: PROMISCUOUS MODE ON\n"); - adapter->PacketFilter |= ET131X_PACKET_TYPE_PROMISCUOUS; - } else { - DBG_VERBOSE(et131x_dbginfo, "Request: PROMISCUOUS MODE OFF\n"); - adapter->PacketFilter &= ~ET131X_PACKET_TYPE_PROMISCUOUS; - } - - if (netdev->flags & IFF_ALLMULTI) { - DBG_VERBOSE(et131x_dbginfo, "Request: ACCEPT ALL MULTICAST\n"); - adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; - } - - if (netdev->mc_count > NIC_MAX_MCAST_LIST) { - DBG_WARNING(et131x_dbginfo, - "ACCEPT ALL MULTICAST for now, as there's more Multicast " - "addresses than the HW supports\n"); - - adapter->PacketFilter |= ET131X_PACKET_TYPE_ALL_MULTICAST; - } - - if (netdev->mc_count < 1) { - DBG_VERBOSE(et131x_dbginfo, "Request: REJECT ALL MULTICAST\n"); - adapter->PacketFilter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST; - adapter->PacketFilter &= ~ET131X_PACKET_TYPE_MULTICAST; - } else { - DBG_VERBOSE(et131x_dbginfo, - "Request: SET MULTICAST FILTER(S)\n"); - adapter->PacketFilter |= ET131X_PACKET_TYPE_MULTICAST; - } - - /* Set values in the private adapter struct */ - adapter->MCAddressCount = netdev->mc_count; - - if (netdev->mc_count) { - if (mclist->dmi_addrlen != ETH_ALEN) { - DBG_WARNING(et131x_dbginfo, - "Multicast addrs are not ETH_ALEN in size\n"); - } else { - count = netdev->mc_count - 1; - memcpy(adapter->MCList[count], mclist->dmi_addr, - ETH_ALEN); - } - } - - /* Are the new flags different from the previous ones? If not, then no - * action is required - * - * NOTE - This block will always update the MCList with the hardware, - * even if the addresses aren't the same. - */ - if (PacketFilter != adapter->PacketFilter) { - /* Call the device's filter function */ - DBG_VERBOSE(et131x_dbginfo, "UPDATE REQUIRED, FLAGS changed\n"); - - et131x_set_packet_filter(adapter); - } else { - DBG_VERBOSE(et131x_dbginfo, - "NO UPDATE REQUIRED, FLAGS didn't change\n"); - } - - spin_unlock_irqrestore(&adapter->Lock, lockflags); - - DBG_LEAVE(et131x_dbginfo); -} - -/** - * et131x_tx - The handler to tx a packet on the device - * @skb: data to be Tx'd - * @netdev: device on which data is to be Tx'd - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_tx(struct sk_buff *skb, struct net_device *netdev) -{ - int status = 0; - - DBG_TX_ENTER(et131x_dbginfo); - - /* Save the timestamp for the TX timeout watchdog */ - netdev->trans_start = jiffies; - - /* Call the device-specific data Tx routine */ - status = et131x_send_packets(skb, netdev); - - /* Check status and manage the netif queue if necessary */ - if (status != 0) { - if (status == -ENOMEM) { - DBG_VERBOSE(et131x_dbginfo, - "OUT OF TCBs; STOP NETIF QUEUE\n"); - - /* Put the queue to sleep until resources are - * available - */ - netif_stop_queue(netdev); - status = 1; - } else { - DBG_WARNING(et131x_dbginfo, - "Misc error; drop packet\n"); - status = 0; - } - } - - DBG_TX_LEAVE(et131x_dbginfo); - return status; -} - -/** - * et131x_tx_timeout - Timeout handler - * @netdev: a pointer to a net_device struct representing the device - * - * The handler called when a Tx request times out. The timeout period is - * specified by the 'tx_timeo" element in the net_device structure (see - * et131x_alloc_device() to see how this value is set). - */ -void et131x_tx_timeout(struct net_device *netdev) -{ - struct et131x_adapter *pAdapter = netdev_priv(netdev); - PMP_TCB pMpTcb; - unsigned long lockflags; - - DBG_WARNING(et131x_dbginfo, "TX TIMEOUT\n"); - - /* Just skip this part if the adapter is doing link detection */ - if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION)) { - DBG_ERROR(et131x_dbginfo, "Still doing link detection\n"); - return; - } - - /* Any nonrecoverable hardware error? - * Checks adapter->flags for any failure in phy reading - */ - if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_NON_RECOVER_ERROR)) { - DBG_WARNING(et131x_dbginfo, "Non recoverable error - remove\n"); - return; - } - - /* Hardware failure? */ - if (MP_TEST_FLAG(pAdapter, fMP_ADAPTER_HARDWARE_ERROR)) { - DBG_WARNING(et131x_dbginfo, "hardware error - reset\n"); - return; - } - - /* Is send stuck? */ - spin_lock_irqsave(&pAdapter->TCBSendQLock, lockflags); - - pMpTcb = pAdapter->TxRing.CurrSendHead; - - if (pMpTcb != NULL) { - pMpTcb->Count++; - - if (pMpTcb->Count > NIC_SEND_HANG_THRESHOLD) { -#ifdef CONFIG_ET131X_DEBUG - TX_STATUS_BLOCK_t txDmaComplete = - *(pAdapter->TxRing.pTxStatusVa); - PTX_DESC_ENTRY_t pDesc = - pAdapter->TxRing.pTxDescRingVa + - pMpTcb->WrIndex.bits.val; -#endif - TX_DESC_ENTRY_t StuckDescriptors[10]; - - if (pMpTcb->WrIndex.bits.val > 7) { - memcpy(StuckDescriptors, - pAdapter->TxRing.pTxDescRingVa + - pMpTcb->WrIndex.bits.val - 6, - sizeof(TX_DESC_ENTRY_t) * 10); - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, - lockflags); - - DBG_WARNING(et131x_dbginfo, - "Send stuck - reset. pMpTcb->WrIndex %x, Flags 0x%08x\n", - pMpTcb->WrIndex.bits.val, - pMpTcb->Flags); - - DBG_WARNING(et131x_dbginfo, - "pDesc 0x%08x, 0x%08x, 0x%08x, 0x%08x\n", - pDesc->DataBufferPtrHigh, - pDesc->DataBufferPtrLow, pDesc->word2.value, - pDesc->word3.value); - - DBG_WARNING(et131x_dbginfo, - "WbStatus 0x%08x\n", txDmaComplete.value); - -#ifdef CONFIG_ET131X_DEBUG - DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 0); - DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 1); - DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 3); - DumpDeviceBlock(DBG_WARNING_ON, pAdapter, 5); -#endif - et131x_close(netdev); - et131x_open(netdev); - - return; - } - } - - spin_unlock_irqrestore(&pAdapter->TCBSendQLock, lockflags); -} - -/** - * et131x_change_mtu - The handler called to change the MTU for the device - * @netdev: device whose MTU is to be changed - * @new_mtu: the desired MTU - * - * Returns 0 on success, errno on failure (as defined in errno.h) - */ -int et131x_change_mtu(struct net_device *netdev, int new_mtu) -{ - int result = 0; - struct et131x_adapter *adapter = netdev_priv(netdev); - - DBG_ENTER(et131x_dbginfo); - - /* Make sure the requested MTU is valid */ - if (new_mtu == 0 || new_mtu > 9216) { - DBG_LEAVE(et131x_dbginfo); - return -EINVAL; - } - - /* Stop the netif queue */ - netif_stop_queue(netdev); - - /* Stop the Tx and Rx DMA engines */ - et131x_rx_dma_disable(adapter); - et131x_tx_dma_disable(adapter); - - /* Disable device interrupts */ - et131x_disable_interrupts(adapter); - et131x_handle_send_interrupt(adapter); - et131x_handle_recv_interrupt(adapter); - - /* Set the new MTU */ - netdev->mtu = new_mtu; - - /* Free Rx DMA memory */ - et131x_adapter_memory_free(adapter); - - /* Set the config parameter for Jumbo Packet support */ - adapter->RegistryJumboPacket = new_mtu + 14; - et131x_soft_reset(adapter); - - /* Alloc and init Rx DMA memory */ - result = et131x_adapter_memory_alloc(adapter); - if (result != 0) { - DBG_WARNING(et131x_dbginfo, - "Change MTU failed; couldn't re-alloc DMA memory\n"); - return result; - } - - et131x_init_send(adapter); - - et131x_setup_hardware_properties(adapter); - memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN); - - /* Init the device with the new settings */ - et131x_adapter_setup(adapter); - - /* Enable interrupts */ - if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE)) { - et131x_enable_interrupts(adapter); - } - - /* Restart the Tx and Rx DMA engines */ - et131x_rx_dma_enable(adapter); - et131x_tx_dma_enable(adapter); - - /* Restart the netif queue */ - netif_wake_queue(netdev); - - DBG_LEAVE(et131x_dbginfo); - return result; -} - -/** - * et131x_set_mac_addr - handler to change the MAC address for the device - * @netdev: device whose MAC is to be changed - * @new_mac: the desired MAC address - * - * Returns 0 on success, errno on failure (as defined in errno.h) - * - * IMPLEMENTED BY : blux http://berndlux.de 22.01.2007 21:14 - */ -int et131x_set_mac_addr(struct net_device *netdev, void *new_mac) -{ - int result = 0; - struct et131x_adapter *adapter = netdev_priv(netdev); - struct sockaddr *address = new_mac; - - DBG_ENTER(et131x_dbginfo); - // begin blux - // DBG_VERBOSE( et131x_dbginfo, "Function not implemented!!\n" ); - - if (adapter == NULL) { - DBG_LEAVE(et131x_dbginfo); - return -ENODEV; - } - - /* Make sure the requested MAC is valid */ - if (!is_valid_ether_addr(address->sa_data)) { - DBG_LEAVE(et131x_dbginfo); - return -EINVAL; - } - - /* Stop the netif queue */ - netif_stop_queue(netdev); - - /* Stop the Tx and Rx DMA engines */ - et131x_rx_dma_disable(adapter); - et131x_tx_dma_disable(adapter); - - /* Disable device interrupts */ - et131x_disable_interrupts(adapter); - et131x_handle_send_interrupt(adapter); - et131x_handle_recv_interrupt(adapter); - - /* Set the new MAC */ - // netdev->set_mac_address = &new_mac; - // netdev->mtu = new_mtu; - - memcpy(netdev->dev_addr, address->sa_data, netdev->addr_len); - - printk("%s: Setting MAC address to %02x:%02x:%02x:%02x:%02x:%02x\n", - netdev->name, netdev->dev_addr[0], netdev->dev_addr[1], - netdev->dev_addr[2], netdev->dev_addr[3], netdev->dev_addr[4], - netdev->dev_addr[5]); - - /* Free Rx DMA memory */ - et131x_adapter_memory_free(adapter); - - /* Set the config parameter for Jumbo Packet support */ - // adapter->RegistryJumboPacket = new_mtu + 14; - // blux: not needet here, w'll change the MAC - - et131x_soft_reset(adapter); - - /* Alloc and init Rx DMA memory */ - result = et131x_adapter_memory_alloc(adapter); - if (result != 0) { - DBG_WARNING(et131x_dbginfo, - "Change MAC failed; couldn't re-alloc DMA memory\n"); - return result; - } - - et131x_init_send(adapter); - - et131x_setup_hardware_properties(adapter); - // memcpy( netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN ); - // blux: no, do not override our nice address - - /* Init the device with the new settings */ - et131x_adapter_setup(adapter); - - /* Enable interrupts */ - if (MP_TEST_FLAG(adapter, fMP_ADAPTER_INTERRUPT_IN_USE)) { - et131x_enable_interrupts(adapter); - } - - /* Restart the Tx and Rx DMA engines */ - et131x_rx_dma_enable(adapter); - et131x_tx_dma_enable(adapter); - - /* Restart the netif queue */ - netif_wake_queue(netdev); - - DBG_LEAVE(et131x_dbginfo); - return result; -} diff --git a/src/et131x/et131x_netdev.h b/src/et131x/et131x_netdev.h deleted file mode 100644 index b8acd14..0000000 --- a/src/et131x/et131x_netdev.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_netdev.h - Defines, structs, enums, prototypes, etc. related to the - * driver's net_device support. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_NETDEV_H__ -#define __ET131X_NETDEV_H__ - -struct net_device *et131x_device_alloc(void); - -#endif /* __ET131X_NETDEV_H__ */ diff --git a/src/et131x/et131x_version.h b/src/et131x/et131x_version.h deleted file mode 100644 index 2ea645e..0000000 --- a/src/et131x/et131x_version.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Agere Systems Inc. - * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * http://www.agere.com - * - *------------------------------------------------------------------------------ - * - * et131x_version.h - This file provides system and device version information. - * - *------------------------------------------------------------------------------ - * - * SOFTWARE LICENSE - * - * This software is provided subject to the following terms and conditions, - * which you should read carefully before using the software. Using this - * software indicates your acceptance of these terms and conditions. If you do - * not agree with these terms and conditions, do not use the software. - * - * Copyright © 2005 Agere Systems Inc. - * All rights reserved. - * - * Redistribution and use in source or binary forms, with or without - * modifications, are permitted provided that the following conditions are met: - * - * . Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following Disclaimer as comments in the code as - * well as in the documentation and/or other materials provided with the - * distribution. - * - * . Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following Disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * . Neither the name of Agere Systems Inc. nor the names of the contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Disclaimer - * - * THIS SOFTWARE IS PROVIDED “AS IS” AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY - * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN - * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - * - */ - -#ifndef __ET131X_VERSION_H__ -#define __ET131X_VERSION_H__ - -#define DRIVER_AUTHOR "Victor Soriano (vjsoriano@agere.com)" -#define DRIVER_LICENSE "Dual BSD/GPL" -#define DRIVER_DEVICE_STRING "ET1310" -#define DRIVER_NAME "et131x" -#define DRIVER_MAJOR_VERSION 1 -#define DRIVER_MINOR_VERSION 2 -#define DRIVER_PATCH_VERSION 3 -#define DRIVER_VERSION_STRING "1.2.3" -#define DRIVER_VENDOR "Agere Systems, http://www.agere.com" -#define DRIVER_DESC "10/100/1000 Base-T Ethernet Driver" - -#define STRUCT_MODULE "net" /* blux: missed by the kernel */ - -#define DRIVER_INFO DRIVER_DESC " for the "\ - DRIVER_DEVICE_STRING ", v" \ - DRIVER_VERSION_STRING " by " \ - DRIVER_VENDOR - -#define DRIVER_NAME_EXT "et131x.ko" - -#endif /* __ET131X_VERSION_H__ */ diff --git a/src/r8101/Makefile b/src/r8101/Makefile deleted file mode 100644 index ed8e97e..0000000 --- a/src/r8101/Makefile +++ /dev/null @@ -1,12 +0,0 @@ -KSRC ?= /lib/modules/$(shell uname -r)/build - -obj-m += r8101.o - -all: - $(MAKE) -C $(KSRC) SUBDIRS=$(PWD) modules - -clean: - rm -rf *.ko *.mod.* *.o .*.cmd .tmp_versions Module.symvers - -distclean: clean - rm -rf cscope.* *~ diff --git a/src/r8101/r8101.c b/src/r8101/r8101.c deleted file mode 100644 index 57cda49..0000000 --- a/src/r8101/r8101.c +++ /dev/null @@ -1,3464 +0,0 @@ -/* - * r8101.c: RealTek 8101 ethernet driver. - * - * This driver based on r8169 from Kernel 2.6.27.39 with SuSE patches - * All pciids except for 8101 are removed becaue we want use - * original realtek drivers except for 8101 because the - * vendors r8101 produce a kernel panic. - * - * Copyright (c) 2002 ShuChen shuchen@realtek.com.tw - * Copyright (c) 2003 - 2007 Francois Romieu romieu@fr.zoreil.com - * Copyright (c) 2009 Arne Fitzenreiter arne_f@ipfire.org - * Copyright (c) a lot of people too. Please respect their work. - * - * See MAINTAINERS file for support contact information. - */ - -#include <linux/module.h> -#include <linux/moduleparam.h> -#include <linux/pci.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/delay.h> -#include <linux/ethtool.h> -#include <linux/mii.h> -#include <linux/if_vlan.h> -#include <linux/crc32.h> -#include <linux/in.h> -#include <linux/ip.h> -#include <linux/tcp.h> -#include <linux/init.h> -#include <linux/dma-mapping.h> - -#include <asm/system.h> -#include <asm/io.h> -#include <asm/irq.h> - -#define RTL8101_VERSION "2.3LK-NAPI" -#define MODULENAME "r8101" -#define PFX MODULENAME ": " - -#ifdef RTL8101_DEBUG -#define assert(expr) \ - if (!(expr)) { \ - printk( "Assertion failed! %s,%s,%s,line=%d\n", \ - #expr,__FILE__,__FUNCTION__,__LINE__); \ - } -#define dprintk(fmt, args...) \ - do { printk(KERN_DEBUG PFX fmt, ## args); } while (0) -#else -#define assert(expr) do {} while (0) -#define dprintk(fmt, args...) do {} while (0) -#endif /* RTL8101_DEBUG */ - -#define R8101_MSG_DEFAULT \ - (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) - -#define TX_BUFFS_AVAIL(tp) \ - (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) - -/* Maximum events (Rx packets, etc.) to handle at each interrupt. */ -static const int max_interrupt_work = 20; - -/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). - The RTL chips use a 64 element hash table based on the Ethernet CRC. */ -static const int multicast_filter_limit = 32; - -/* MAC address length */ -#define MAC_ADDR_LEN 6 - -#define MAX_READ_REQUEST_SHIFT 12 -#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ -#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ -#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ -#define EarlyTxThld 0x3F /* 0x3F means NO early transmit */ -#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */ -#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ - -#define R8101_REGS_SIZE 256 -#define R8101_NAPI_WEIGHT 64 -#define NUM_TX_DESC 64 /* Number of Tx descriptor registers */ -#define NUM_RX_DESC 256 /* Number of Rx descriptor registers */ -#define RX_BUF_SIZE 1536 /* Rx Buffer size */ -#define R8101_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) -#define R8101_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) - -#define RTL8101_TX_TIMEOUT (6*HZ) -#define RTL8101_PHY_TIMEOUT (10*HZ) - -/* write/read MMIO register */ -#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) -#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) -#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) -#define RTL_R8(reg) readb (ioaddr + (reg)) -#define RTL_R16(reg) readw (ioaddr + (reg)) -#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) - -enum mac_version { - RTL_GIGA_MAC_VER_01 = 0x01, // 8169 - RTL_GIGA_MAC_VER_02 = 0x02, // 8169S - RTL_GIGA_MAC_VER_03 = 0x03, // 8110S - RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB - RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd - RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe - RTL_GIGA_MAC_VER_07 = 0x07, // 8102e - RTL_GIGA_MAC_VER_08 = 0x08, // 8102e - RTL_GIGA_MAC_VER_09 = 0x09, // 8102e - RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e - RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb - RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be - RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb - RTL_GIGA_MAC_VER_14 = 0x0e, // 8101 ? - RTL_GIGA_MAC_VER_15 = 0x0f, // 8101 ? - RTL_GIGA_MAC_VER_16 = 0x11, // 8101Ec - RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf - RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP - RTL_GIGA_MAC_VER_19 = 0x13, // 8168C - RTL_GIGA_MAC_VER_20 = 0x14 // 8168C -}; - -#define _R(NAME,MAC,MASK) \ - { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK } - -static const struct { - const char *name; - u8 mac_version; - u32 RxConfigMask; /* Clears the bits supported by this chip */ -} rtl_chip_info[] = { - _R("RTL8169", RTL_GIGA_MAC_VER_01, 0xff7e1880), // 8169 - _R("RTL8169s", RTL_GIGA_MAC_VER_02, 0xff7e1880), // 8169S - _R("RTL8110s", RTL_GIGA_MAC_VER_03, 0xff7e1880), // 8110S - _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB - _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd - _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe - _R("RTL8102e", RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E - _R("RTL8102e", RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E - _R("RTL8102e", RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E - _R("RTL8101e", RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E - _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E - _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E - _R("RTL8101e", RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139 - _R("RTL8100e", RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139 - _R("RTL8100e", RTL_GIGA_MAC_VER_15, 0xff7e1880), // PCI-E 8139 - _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_17, 0xff7e1880), // PCI-E - _R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E - _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E - _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E - _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880) // PCI-E -}; -#undef _R - -enum cfg_version { - RTL_CFG_0 = 0x00, - RTL_CFG_1, - RTL_CFG_2 -}; - -static void rtl_hw_start_8169(struct net_device *); -static void rtl_hw_start_8168(struct net_device *); -static void rtl_hw_start_8101(struct net_device *); - -static struct pci_device_id rtl8101_pci_tbl[] = { -// { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 }, - { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 }, -// { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167), 0, 0, RTL_CFG_0 }, -// { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_1 }, -// { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 }, -// { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 }, -// { PCI_DEVICE(PCI_VENDOR_ID_AT, 0xc107), 0, 0, RTL_CFG_0 }, -// { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0 }, -// { PCI_VENDOR_ID_LINKSYS, 0x1032, -// PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 }, - { 0x0001, 0x8168, - PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 }, - {0,}, -}; - -MODULE_DEVICE_TABLE(pci, rtl8101_pci_tbl); - -static int rx_copybreak = 200; -static int use_dac; -static struct { - u32 msg_enable; -} debug = { -1 }; - -enum rtl_registers { - MAC0 = 0, /* Ethernet hardware address. */ - MAC4 = 4, - MAR0 = 8, /* Multicast filter. */ - CounterAddrLow = 0x10, - CounterAddrHigh = 0x14, - TxDescStartAddrLow = 0x20, - TxDescStartAddrHigh = 0x24, - TxHDescStartAddrLow = 0x28, - TxHDescStartAddrHigh = 0x2c, - FLASH = 0x30, - ERSR = 0x36, - ChipCmd = 0x37, - TxPoll = 0x38, - IntrMask = 0x3c, - IntrStatus = 0x3e, - TxConfig = 0x40, - RxConfig = 0x44, - RxMissed = 0x4c, - Cfg9346 = 0x50, - Config0 = 0x51, - Config1 = 0x52, - Config2 = 0x53, - Config3 = 0x54, - Config4 = 0x55, - Config5 = 0x56, - MultiIntr = 0x5c, - PHYAR = 0x60, - PHYstatus = 0x6c, - RxMaxSize = 0xda, - CPlusCmd = 0xe0, - IntrMitigate = 0xe2, - RxDescAddrLow = 0xe4, - RxDescAddrHigh = 0xe8, - EarlyTxThres = 0xec, - FuncEvent = 0xf0, - FuncEventMask = 0xf4, - FuncPresetState = 0xf8, - FuncForceEvent = 0xfc, -}; - -enum rtl8110_registers { - TBICSR = 0x64, - TBI_ANAR = 0x68, - TBI_LPAR = 0x6a, -}; - -enum rtl8168_8101_registers { - CSIDR = 0x64, - CSIAR = 0x68, -#define CSIAR_FLAG 0x80000000 -#define CSIAR_WRITE_CMD 0x80000000 -#define CSIAR_BYTE_ENABLE 0x0f -#define CSIAR_BYTE_ENABLE_SHIFT 12 -#define CSIAR_ADDR_MASK 0x0fff - - EPHYAR = 0x80, -#define EPHYAR_FLAG 0x80000000 -#define EPHYAR_WRITE_CMD 0x80000000 -#define EPHYAR_REG_MASK 0x1f -#define EPHYAR_REG_SHIFT 16 -#define EPHYAR_DATA_MASK 0xffff - DBG_REG = 0xd1, -#define FIX_NAK_1 (1 << 4) -#define FIX_NAK_2 (1 << 3) -}; - -enum rtl_register_content { - /* InterruptStatusBits */ - SYSErr = 0x8000, - PCSTimeout = 0x4000, - SWInt = 0x0100, - TxDescUnavail = 0x0080, - RxFIFOOver = 0x0040, - LinkChg = 0x0020, - RxOverflow = 0x0010, - TxErr = 0x0008, - TxOK = 0x0004, - RxErr = 0x0002, - RxOK = 0x0001, - - /* RxStatusDesc */ - RxFOVF = (1 << 23), - RxRWT = (1 << 22), - RxRES = (1 << 21), - RxRUNT = (1 << 20), - RxCRC = (1 << 19), - - /* ChipCmdBits */ - CmdReset = 0x10, - CmdRxEnb = 0x08, - CmdTxEnb = 0x04, - RxBufEmpty = 0x01, - - /* TXPoll register p.5 */ - HPQ = 0x80, /* Poll cmd on the high prio queue */ - NPQ = 0x40, /* Poll cmd on the low prio queue */ - FSWInt = 0x01, /* Forced software interrupt */ - - /* Cfg9346Bits */ - Cfg9346_Lock = 0x00, - Cfg9346_Unlock = 0xc0, - - /* rx_mode_bits */ - AcceptErr = 0x20, - AcceptRunt = 0x10, - AcceptBroadcast = 0x08, - AcceptMulticast = 0x04, - AcceptMyPhys = 0x02, - AcceptAllPhys = 0x01, - - /* RxConfigBits */ - RxCfgFIFOShift = 13, - RxCfgDMAShift = 8, - - /* TxConfigBits */ - TxInterFrameGapShift = 24, - TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ - - /* Config1 register p.24 */ - LEDS1 = (1 << 7), - LEDS0 = (1 << 6), - MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ - Speed_down = (1 << 4), - MEMMAP = (1 << 3), - IOMAP = (1 << 2), - VPD = (1 << 1), - PMEnable = (1 << 0), /* Power Management Enable */ - - /* Config2 register p. 25 */ - PCI_Clock_66MHz = 0x01, - PCI_Clock_33MHz = 0x00, - - /* Config3 register p.25 */ - MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */ - LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */ - Beacon_en = (1 << 0), /* 8168 only. Reserved in the 8168b */ - - /* Config5 register p.27 */ - BWF = (1 << 6), /* Accept Broadcast wakeup frame */ - MWF = (1 << 5), /* Accept Multicast wakeup frame */ - UWF = (1 << 4), /* Accept Unicast wakeup frame */ - LanWake = (1 << 1), /* LanWake enable/disable */ - PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */ - - /* TBICSR p.28 */ - TBIReset = 0x80000000, - TBILoopback = 0x40000000, - TBINwEnable = 0x20000000, - TBINwRestart = 0x10000000, - TBILinkOk = 0x02000000, - TBINwComplete = 0x01000000, - - /* CPlusCmd p.31 */ - EnableBist = (1 << 15), // 8168 8101 - Mac_dbgo_oe = (1 << 14), // 8168 8101 - Normal_mode = (1 << 13), // unused - Force_half_dup = (1 << 12), // 8168 8101 - Force_rxflow_en = (1 << 11), // 8168 8101 - Force_txflow_en = (1 << 10), // 8168 8101 - Cxpl_dbg_sel = (1 << 9), // 8168 8101 - ASF = (1 << 8), // 8168 8101 - PktCntrDisable = (1 << 7), // 8168 8101 - Mac_dbgo_sel = 0x001c, // 8168 - RxVlan = (1 << 6), - RxChkSum = (1 << 5), - PCIDAC = (1 << 4), - PCIMulRW = (1 << 3), - INTT_0 = 0x0000, // 8168 - INTT_1 = 0x0001, // 8168 - INTT_2 = 0x0002, // 8168 - INTT_3 = 0x0003, // 8168 - - /* rtl8101_PHYstatus */ - TBI_Enable = 0x80, - TxFlowCtrl = 0x40, - RxFlowCtrl = 0x20, - _1000bpsF = 0x10, - _100bps = 0x08, - _10bps = 0x04, - LinkStatus = 0x02, - FullDup = 0x01, - - /* _TBICSRBit */ - TBILinkOK = 0x02000000, - - /* DumpCounterCommand */ - CounterDump = 0x8, -}; - -enum desc_status_bit { - DescOwn = (1 << 31), /* Descriptor is owned by NIC */ - RingEnd = (1 << 30), /* End of descriptor ring */ - FirstFrag = (1 << 29), /* First segment of a packet */ - LastFrag = (1 << 28), /* Final segment of a packet */ - - /* Tx private */ - LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */ - MSSShift = 16, /* MSS value position */ - MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */ - IPCS = (1 << 18), /* Calculate IP checksum */ - UDPCS = (1 << 17), /* Calculate UDP/IP checksum */ - TCPCS = (1 << 16), /* Calculate TCP/IP checksum */ - TxVlanTag = (1 << 17), /* Add VLAN tag */ - - /* Rx private */ - PID1 = (1 << 18), /* Protocol ID bit 1/2 */ - PID0 = (1 << 17), /* Protocol ID bit 2/2 */ - -#define RxProtoUDP (PID1) -#define RxProtoTCP (PID0) -#define RxProtoIP (PID1 | PID0) -#define RxProtoMask RxProtoIP - - IPFail = (1 << 16), /* IP checksum failed */ - UDPFail = (1 << 15), /* UDP/IP checksum failed */ - TCPFail = (1 << 14), /* TCP/IP checksum failed */ - RxVlanTag = (1 << 16), /* VLAN tag available */ -}; - -#define RsvdMask 0x3fffc000 - -struct TxDesc { - __le32 opts1; - __le32 opts2; - __le64 addr; -}; - -struct RxDesc { - __le32 opts1; - __le32 opts2; - __le64 addr; -}; - -struct ring_info { - struct sk_buff *skb; - u32 len; - u8 __pad[sizeof(void *) - sizeof(u32)]; -}; - -enum features { - RTL_FEATURE_WOL = (1 << 0), - RTL_FEATURE_MSI = (1 << 1), - RTL_FEATURE_GMII = (1 << 2), -}; - -struct rtl8101_counters { - __le64 tx_packets; - __le64 rx_packets; - __le64 tx_errors; - __le32 rx_errors; - __le16 rx_missed; - __le16 align_errors; - __le32 tx_one_collision; - __le32 tx_multi_collision; - __le64 rx_unicast; - __le64 rx_broadcast; - __le32 rx_multicast; - __le16 tx_aborted; - __le16 tx_underun; -}; - -struct rtl8101_private { - void __iomem *mmio_addr; /* memory map physical address */ - struct pci_dev *pci_dev; /* Index of PCI device */ - struct net_device *dev; - struct napi_struct napi; - spinlock_t lock; /* spin lock flag */ - u32 msg_enable; - int chipset; - int mac_version; - u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ - u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ - u32 dirty_rx; - u32 dirty_tx; - struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ - struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ - dma_addr_t TxPhyAddr; - dma_addr_t RxPhyAddr; - struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */ - struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */ - unsigned align; - unsigned rx_buf_sz; - struct timer_list timer; - u16 cp_cmd; - u16 intr_event; - u16 napi_event; - u16 intr_mask; - int phy_auto_nego_reg; - int phy_1000_ctrl_reg; -#ifdef CONFIG_R8101_VLAN - struct vlan_group *vlgrp; -#endif - int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); - int (*get_settings)(struct net_device *, struct ethtool_cmd *); - void (*phy_reset_enable)(void __iomem *); - void (*hw_start)(struct net_device *); - unsigned int (*phy_reset_pending)(void __iomem *); - unsigned int (*link_ok)(void __iomem *); - int pcie_cap; - struct delayed_work task; - unsigned features; - - struct mii_if_info mii; - struct rtl8101_counters counters; -}; - -MODULE_AUTHOR("Realtek,the Linux r8169 crew & Arne Fitzenreiter arne_f@ipfire.org"); -MODULE_DESCRIPTION("RealTek RTL-8101 Fast Ethernet driver"); -module_param(rx_copybreak, int, 0); -MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); -module_param(use_dac, int, 0); -MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); -module_param_named(debug, debug.msg_enable, int, 0); -MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); -MODULE_LICENSE("GPL"); -MODULE_VERSION(RTL8101_VERSION); - -static int rtl8101_open(struct net_device *dev); -static int rtl8101_start_xmit(struct sk_buff *skb, struct net_device *dev); -static irqreturn_t rtl8101_interrupt(int irq, void *dev_instance); -static int rtl8101_init_ring(struct net_device *dev); -static void rtl_hw_start(struct net_device *dev); -static int rtl8101_close(struct net_device *dev); -static void rtl_set_rx_mode(struct net_device *dev); -static void rtl8101_tx_timeout(struct net_device *dev); -static struct net_device_stats *rtl8101_get_stats(struct net_device *dev); -static int rtl8101_rx_interrupt(struct net_device *, struct rtl8101_private *, - void __iomem *, u32 budget); -static int rtl8101_change_mtu(struct net_device *dev, int new_mtu); -static void rtl8101_down(struct net_device *dev); -static void rtl8101_rx_clear(struct rtl8101_private *tp); -static int rtl8101_poll(struct napi_struct *napi, int budget); - -static const unsigned int rtl8101_rx_config = - (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); - -static void mdio_write(void __iomem *ioaddr, int reg_addr, int value) -{ - int i; - - RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff)); - - for (i = 20; i > 0; i--) { - /* - * Check if the RTL8101 has completed writing to the specified - * MII register. - */ - if (!(RTL_R32(PHYAR) & 0x80000000)) - break; - udelay(25); - } -} - -static int mdio_read(void __iomem *ioaddr, int reg_addr) -{ - int i, value = -1; - - RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16); - - for (i = 20; i > 0; i--) { - /* - * Check if the RTL8101 has completed retrieving data from - * the specified MII register. - */ - if (RTL_R32(PHYAR) & 0x80000000) { - value = RTL_R32(PHYAR) & 0xffff; - break; - } - udelay(25); - } - return value; -} - -static void mdio_patch(void __iomem *ioaddr, int reg_addr, int value) -{ - mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value); -} - -static void rtl_mdio_write(struct net_device *dev, int phy_id, int location, - int val) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - - mdio_write(ioaddr, location, val); -} - -static int rtl_mdio_read(struct net_device *dev, int phy_id, int location) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - - return mdio_read(ioaddr, location); -} - -static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value) -{ - unsigned int i; - - RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) | - (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); - - for (i = 0; i < 100; i++) { - if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG)) - break; - udelay(10); - } -} - -static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr) -{ - u16 value = 0xffff; - unsigned int i; - - RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); - - for (i = 0; i < 100; i++) { - if (RTL_R32(EPHYAR) & EPHYAR_FLAG) { - value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK; - break; - } - udelay(10); - } - - return value; -} - -static void rtl_csi_write(void __iomem *ioaddr, int addr, int value) -{ - unsigned int i; - - RTL_W32(CSIDR, value); - RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) | - CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); - - for (i = 0; i < 100; i++) { - if (!(RTL_R32(CSIAR) & CSIAR_FLAG)) - break; - udelay(10); - } -} - -static u32 rtl_csi_read(void __iomem *ioaddr, int addr) -{ - u32 value = ~0x00; - unsigned int i; - - RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | - CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); - - for (i = 0; i < 100; i++) { - if (RTL_R32(CSIAR) & CSIAR_FLAG) { - value = RTL_R32(CSIDR); - break; - } - udelay(10); - } - - return value; -} - -static void rtl8101_irq_mask_and_ack(void __iomem *ioaddr) -{ - RTL_W16(IntrMask, 0x0000); - - RTL_W16(IntrStatus, 0xffff); -} - -static void rtl8101_asic_down(void __iomem *ioaddr) -{ - RTL_W8(ChipCmd, 0x00); - rtl8101_irq_mask_and_ack(ioaddr); - RTL_R16(CPlusCmd); -} - -static unsigned int rtl8101_tbi_reset_pending(void __iomem *ioaddr) -{ - return RTL_R32(TBICSR) & TBIReset; -} - -static unsigned int rtl8101_xmii_reset_pending(void __iomem *ioaddr) -{ - return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET; -} - -static unsigned int rtl8101_tbi_link_ok(void __iomem *ioaddr) -{ - return RTL_R32(TBICSR) & TBILinkOk; -} - -static unsigned int rtl8101_xmii_link_ok(void __iomem *ioaddr) -{ - return RTL_R8(PHYstatus) & LinkStatus; -} - -static void rtl8101_tbi_reset_enable(void __iomem *ioaddr) -{ - RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset); -} - -static void rtl8101_xmii_reset_enable(void __iomem *ioaddr) -{ - unsigned int val; - - val = mdio_read(ioaddr, MII_BMCR) | BMCR_RESET; - mdio_write(ioaddr, MII_BMCR, val & 0xffff); -} - -static void rtl8101_check_link_status(struct net_device *dev, - struct rtl8101_private *tp, - void __iomem *ioaddr) -{ - unsigned long flags; - - spin_lock_irqsave(&tp->lock, flags); - if (tp->link_ok(ioaddr)) { - netif_carrier_on(dev); - if (netif_msg_ifup(tp)) - printk(KERN_INFO PFX "%s: link up\n", dev->name); - } else { - if (netif_msg_ifdown(tp)) - printk(KERN_INFO PFX "%s: link down\n", dev->name); - netif_carrier_off(dev); - } - spin_unlock_irqrestore(&tp->lock, flags); -} - -static void rtl8101_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - u8 options; - - wol->wolopts = 0; - -#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST) - wol->supported = WAKE_ANY; - - spin_lock_irq(&tp->lock); - - options = RTL_R8(Config1); - if (!(options & PMEnable)) - goto out_unlock; - - options = RTL_R8(Config3); - if (options & LinkUp) - wol->wolopts |= WAKE_PHY; - if (options & MagicPacket) - wol->wolopts |= WAKE_MAGIC; - - options = RTL_R8(Config5); - if (options & UWF) - wol->wolopts |= WAKE_UCAST; - if (options & BWF) - wol->wolopts |= WAKE_BCAST; - if (options & MWF) - wol->wolopts |= WAKE_MCAST; - -out_unlock: - spin_unlock_irq(&tp->lock); -} - -static int rtl8101_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned int i; - static struct { - u32 opt; - u16 reg; - u8 mask; - } cfg[] = { - { WAKE_ANY, Config1, PMEnable }, - { WAKE_PHY, Config3, LinkUp }, - { WAKE_MAGIC, Config3, MagicPacket }, - { WAKE_UCAST, Config5, UWF }, - { WAKE_BCAST, Config5, BWF }, - { WAKE_MCAST, Config5, MWF }, - { WAKE_ANY, Config5, LanWake } - }; - - spin_lock_irq(&tp->lock); - - RTL_W8(Cfg9346, Cfg9346_Unlock); - - for (i = 0; i < ARRAY_SIZE(cfg); i++) { - u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask; - if (wol->wolopts & cfg[i].opt) - options |= cfg[i].mask; - RTL_W8(cfg[i].reg, options); - } - - RTL_W8(Cfg9346, Cfg9346_Lock); - - if (wol->wolopts) - tp->features |= RTL_FEATURE_WOL; - else - tp->features &= ~RTL_FEATURE_WOL; - - spin_unlock_irq(&tp->lock); - - return 0; -} - -static void rtl8101_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - strcpy(info->driver, MODULENAME); - strcpy(info->version, RTL8101_VERSION); - strcpy(info->bus_info, pci_name(tp->pci_dev)); -} - -static int rtl8101_get_regs_len(struct net_device *dev) -{ - return R8101_REGS_SIZE; -} - -static int rtl8101_set_speed_tbi(struct net_device *dev, - u8 autoneg, u16 speed, u8 duplex) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - int ret = 0; - u32 reg; - - reg = RTL_R32(TBICSR); - if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) && - (duplex == DUPLEX_FULL)) { - RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart)); - } else if (autoneg == AUTONEG_ENABLE) - RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart); - else { - if (netif_msg_link(tp)) { - printk(KERN_WARNING "%s: " - "incorrect speed setting refused in TBI mode\n", - dev->name); - } - ret = -EOPNOTSUPP; - } - - return ret; -} - -static int rtl8101_set_speed_xmii(struct net_device *dev, - u8 autoneg, u16 speed, u8 duplex) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - int giga_ctrl, bmcr; - - if (autoneg == AUTONEG_ENABLE) { - int auto_nego; - - auto_nego = mdio_read(ioaddr, MII_ADVERTISE); - auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | - ADVERTISE_100HALF | ADVERTISE_100FULL); - auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; - - giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); - giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); - - /* The 8100e/8101e/8102e do Fast Ethernet only. */ - if ((tp->mac_version != RTL_GIGA_MAC_VER_07) && - (tp->mac_version != RTL_GIGA_MAC_VER_08) && - (tp->mac_version != RTL_GIGA_MAC_VER_09) && - (tp->mac_version != RTL_GIGA_MAC_VER_10) && - (tp->mac_version != RTL_GIGA_MAC_VER_13) && - (tp->mac_version != RTL_GIGA_MAC_VER_14) && - (tp->mac_version != RTL_GIGA_MAC_VER_15) && - (tp->mac_version != RTL_GIGA_MAC_VER_16)) { - giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; - } else if (netif_msg_link(tp)) { - printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", - dev->name); - } - - bmcr = BMCR_ANENABLE | BMCR_ANRESTART; - - if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || - (tp->mac_version == RTL_GIGA_MAC_VER_12) || - (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { - /* - * Wake up the PHY. - * Vendor specific (0x1f) and reserved (0x0e) MII - * registers. - */ - mdio_write(ioaddr, 0x1f, 0x0000); - mdio_write(ioaddr, 0x0e, 0x0000); - } - - tp->phy_auto_nego_reg = auto_nego; - - mdio_write(ioaddr, MII_ADVERTISE, auto_nego); - mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); - } else { - giga_ctrl = 0; - - if (speed == SPEED_10) - bmcr = 0; - else if (speed == SPEED_100) - bmcr = BMCR_SPEED100; - else - return -EINVAL; - - if (duplex == DUPLEX_FULL) - bmcr |= BMCR_FULLDPLX; - - mdio_write(ioaddr, 0x1f, 0x0000); - } - - tp->phy_1000_ctrl_reg = giga_ctrl; - - mdio_write(ioaddr, MII_BMCR, bmcr); - - if ((tp->mac_version == RTL_GIGA_MAC_VER_02) || - (tp->mac_version == RTL_GIGA_MAC_VER_03)) { - if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) { - mdio_write(ioaddr, 0x17, 0x2138); - mdio_write(ioaddr, 0x0e, 0x0260); - } else { - mdio_write(ioaddr, 0x17, 0x2108); - mdio_write(ioaddr, 0x0e, 0x0000); - } - } - - return 0; -} - -static int rtl8101_set_speed(struct net_device *dev, - u8 autoneg, u16 speed, u8 duplex) -{ - struct rtl8101_private *tp = netdev_priv(dev); - int ret; - - ret = tp->set_speed(dev, autoneg, speed, duplex); - - if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) - mod_timer(&tp->timer, jiffies + RTL8101_PHY_TIMEOUT); - - return ret; -} - -static int rtl8101_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct rtl8101_private *tp = netdev_priv(dev); - unsigned long flags; - int ret; - - spin_lock_irqsave(&tp->lock, flags); - ret = rtl8101_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex); - spin_unlock_irqrestore(&tp->lock, flags); - - return ret; -} - -static u32 rtl8101_get_rx_csum(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - return tp->cp_cmd & RxChkSum; -} - -static int rtl8101_set_rx_csum(struct net_device *dev, u32 data) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned long flags; - - spin_lock_irqsave(&tp->lock, flags); - - if (data) - tp->cp_cmd |= RxChkSum; - else - tp->cp_cmd &= ~RxChkSum; - - RTL_W16(CPlusCmd, tp->cp_cmd); - RTL_R16(CPlusCmd); - - spin_unlock_irqrestore(&tp->lock, flags); - - return 0; -} - -#ifdef CONFIG_R8101_VLAN - -static inline u32 rtl8101_tx_vlan_tag(struct rtl8101_private *tp, - struct sk_buff *skb) -{ - return (tp->vlgrp && vlan_tx_tag_present(skb)) ? - TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; -} - -static void rtl8101_vlan_rx_register(struct net_device *dev, - struct vlan_group *grp) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned long flags; - - spin_lock_irqsave(&tp->lock, flags); - tp->vlgrp = grp; - if (tp->vlgrp) - tp->cp_cmd |= RxVlan; - else - tp->cp_cmd &= ~RxVlan; - RTL_W16(CPlusCmd, tp->cp_cmd); - RTL_R16(CPlusCmd); - spin_unlock_irqrestore(&tp->lock, flags); -} - -static int rtl8101_rx_vlan_skb(struct rtl8101_private *tp, struct RxDesc *desc, - struct sk_buff *skb) -{ - u32 opts2 = le32_to_cpu(desc->opts2); - struct vlan_group *vlgrp = tp->vlgrp; - int ret; - - if (vlgrp && (opts2 & RxVlanTag)) { - vlan_hwaccel_receive_skb(skb, vlgrp, swab16(opts2 & 0xffff)); - ret = 0; - } else - ret = -1; - desc->opts2 = 0; - return ret; -} - -#else /* !CONFIG_R8101_VLAN */ - -static inline u32 rtl8101_tx_vlan_tag(struct rtl8101_private *tp, - struct sk_buff *skb) -{ - return 0; -} - -static int rtl8101_rx_vlan_skb(struct rtl8101_private *tp, struct RxDesc *desc, - struct sk_buff *skb) -{ - return -1; -} - -#endif - -static int rtl8101_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - u32 status; - - cmd->supported = - SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE; - cmd->port = PORT_FIBRE; - cmd->transceiver = XCVR_INTERNAL; - - status = RTL_R32(TBICSR); - cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0; - cmd->autoneg = !!(status & TBINwEnable); - - cmd->speed = SPEED_1000; - cmd->duplex = DUPLEX_FULL; /* Always set */ - - return 0; -} - -static int rtl8101_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - return mii_ethtool_gset(&tp->mii, cmd); -} - -static int rtl8101_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct rtl8101_private *tp = netdev_priv(dev); - unsigned long flags; - int rc; - - spin_lock_irqsave(&tp->lock, flags); - - rc = tp->get_settings(dev, cmd); - - spin_unlock_irqrestore(&tp->lock, flags); - return rc; -} - -static void rtl8101_get_regs(struct net_device *dev, struct ethtool_regs *regs, - void *p) -{ - struct rtl8101_private *tp = netdev_priv(dev); - unsigned long flags; - - if (regs->len > R8101_REGS_SIZE) - regs->len = R8101_REGS_SIZE; - - spin_lock_irqsave(&tp->lock, flags); - memcpy_fromio(p, tp->mmio_addr, regs->len); - spin_unlock_irqrestore(&tp->lock, flags); -} - -static u32 rtl8101_get_msglevel(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - return tp->msg_enable; -} - -static void rtl8101_set_msglevel(struct net_device *dev, u32 value) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - tp->msg_enable = value; -} - -static const char rtl8101_gstrings[][ETH_GSTRING_LEN] = { - "tx_packets", - "rx_packets", - "tx_errors", - "rx_errors", - "rx_missed", - "align_errors", - "tx_single_collisions", - "tx_multi_collisions", - "unicast", - "broadcast", - "multicast", - "tx_aborted", - "tx_underrun", -}; - -static int rtl8101_get_sset_count(struct net_device *dev, int sset) -{ - switch (sset) { - case ETH_SS_STATS: - return ARRAY_SIZE(rtl8101_gstrings); - default: - return -EOPNOTSUPP; - } -} - -static void rtl8101_update_counters(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - struct rtl8101_counters *counters; - dma_addr_t paddr; - u32 cmd; - int wait = 1000; - - /* - * Some chips are unable to dump tally counters when the receiver - * is disabled. - */ - if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) - return; - - counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); - if (!counters) - return; - - RTL_W32(CounterAddrHigh, (u64)paddr >> 32); - cmd = (u64)paddr & DMA_32BIT_MASK; - RTL_W32(CounterAddrLow, cmd); - RTL_W32(CounterAddrLow, cmd | CounterDump); - - while (wait--) { - if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) { - /* copy updated counters */ - memcpy(&tp->counters, counters, sizeof(*counters)); - break; - } - udelay(10); - } - - RTL_W32(CounterAddrLow, 0); - RTL_W32(CounterAddrHigh, 0); - - pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); -} - -static void rtl8101_get_ethtool_stats(struct net_device *dev, - struct ethtool_stats *stats, u64 *data) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - ASSERT_RTNL(); - - rtl8101_update_counters(dev); - - data[0] = le64_to_cpu(tp->counters.tx_packets); - data[1] = le64_to_cpu(tp->counters.rx_packets); - data[2] = le64_to_cpu(tp->counters.tx_errors); - data[3] = le32_to_cpu(tp->counters.rx_errors); - data[4] = le16_to_cpu(tp->counters.rx_missed); - data[5] = le16_to_cpu(tp->counters.align_errors); - data[6] = le32_to_cpu(tp->counters.tx_one_collision); - data[7] = le32_to_cpu(tp->counters.tx_multi_collision); - data[8] = le64_to_cpu(tp->counters.rx_unicast); - data[9] = le64_to_cpu(tp->counters.rx_broadcast); - data[10] = le32_to_cpu(tp->counters.rx_multicast); - data[11] = le16_to_cpu(tp->counters.tx_aborted); - data[12] = le16_to_cpu(tp->counters.tx_underun); -} - -static void rtl8101_get_strings(struct net_device *dev, u32 stringset, u8 *data) -{ - switch(stringset) { - case ETH_SS_STATS: - memcpy(data, *rtl8101_gstrings, sizeof(rtl8101_gstrings)); - break; - } -} - -static const struct ethtool_ops rtl8101_ethtool_ops = { - .get_drvinfo = rtl8101_get_drvinfo, - .get_regs_len = rtl8101_get_regs_len, - .get_link = ethtool_op_get_link, - .get_settings = rtl8101_get_settings, - .set_settings = rtl8101_set_settings, - .get_msglevel = rtl8101_get_msglevel, - .set_msglevel = rtl8101_set_msglevel, - .get_rx_csum = rtl8101_get_rx_csum, - .set_rx_csum = rtl8101_set_rx_csum, - .set_tx_csum = ethtool_op_set_tx_csum, - .set_sg = ethtool_op_set_sg, - .set_tso = ethtool_op_set_tso, - .get_regs = rtl8101_get_regs, - .get_wol = rtl8101_get_wol, - .set_wol = rtl8101_set_wol, - .get_strings = rtl8101_get_strings, - .get_sset_count = rtl8101_get_sset_count, - .get_ethtool_stats = rtl8101_get_ethtool_stats, -}; - -static void rtl8101_write_gmii_reg_bit(void __iomem *ioaddr, int reg, - int bitnum, int bitval) -{ - int val; - - val = mdio_read(ioaddr, reg); - val = (bitval == 1) ? - val | (bitval << bitnum) : val & ~(0x0001 << bitnum); - mdio_write(ioaddr, reg, val & 0xffff); -} - -static void rtl8101_get_mac_version(struct rtl8101_private *tp, - void __iomem *ioaddr) -{ - /* - * The driver currently handles the 8168Bf and the 8168Be identically - * but they can be identified more specifically through the test below - * if needed: - * - * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be - * - * Same thing for the 8101Eb and the 8101Ec: - * - * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec - */ - const struct { - u32 mask; - u32 val; - int mac_version; - } mac_info[] = { - /* 8168B family. */ - { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, - { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, - { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, - { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_20 }, - - /* 8168B family. */ - { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12 }, - { 0x7cf00000, 0x38500000, RTL_GIGA_MAC_VER_17 }, - { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17 }, - { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, - - /* 8101 family. */ - { 0x7cf00000, 0x34a00000, RTL_GIGA_MAC_VER_09 }, - { 0x7cf00000, 0x24a00000, RTL_GIGA_MAC_VER_09 }, - { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 }, - { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 }, - { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 }, - { 0x7cf00000, 0x24800000, RTL_GIGA_MAC_VER_07 }, - { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13 }, - { 0x7cf00000, 0x34300000, RTL_GIGA_MAC_VER_10 }, - { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16 }, - { 0x7c800000, 0x34800000, RTL_GIGA_MAC_VER_09 }, - { 0x7c800000, 0x24800000, RTL_GIGA_MAC_VER_09 }, - { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16 }, - /* FIXME: where did these entries come from ? -- FR */ - { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15 }, - { 0xfc800000, 0x30800000, RTL_GIGA_MAC_VER_14 }, - - /* 8110 family. */ - { 0xfc800000, 0x98000000, RTL_GIGA_MAC_VER_06 }, - { 0xfc800000, 0x18000000, RTL_GIGA_MAC_VER_05 }, - { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, - { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, - { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, - { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, - - { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01 } /* Catch-all */ - }, *p = mac_info; - u32 reg; - - reg = RTL_R32(TxConfig); - while ((reg & p->mask) != p->val) - p++; - tp->mac_version = p->mac_version; - - if (p->mask == 0x00000000) { - struct pci_dev *pdev = tp->pci_dev; - - dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg); - } -} - -static void rtl8101_print_mac_version(struct rtl8101_private *tp) -{ - dprintk("mac_version = 0x%02x\n", tp->mac_version); -} - -struct phy_reg { - u16 reg; - u16 val; -}; - -static void rtl_phy_write(void __iomem *ioaddr, struct phy_reg *regs, int len) -{ - while (len-- > 0) { - mdio_write(ioaddr, regs->reg, regs->val); - regs++; - } -} - -static void rtl8101s_hw_phy_config(void __iomem *ioaddr) -{ - struct { - u16 regs[5]; /* Beware of bit-sign propagation */ - } phy_magic[5] = { { - { 0x0000, //w 4 15 12 0 - 0x00a1, //w 3 15 0 00a1 - 0x0008, //w 2 15 0 0008 - 0x1020, //w 1 15 0 1020 - 0x1000 } },{ //w 0 15 0 1000 - { 0x7000, //w 4 15 12 7 - 0xff41, //w 3 15 0 ff41 - 0xde60, //w 2 15 0 de60 - 0x0140, //w 1 15 0 0140 - 0x0077 } },{ //w 0 15 0 0077 - { 0xa000, //w 4 15 12 a - 0xdf01, //w 3 15 0 df01 - 0xdf20, //w 2 15 0 df20 - 0xff95, //w 1 15 0 ff95 - 0xfa00 } },{ //w 0 15 0 fa00 - { 0xb000, //w 4 15 12 b - 0xff41, //w 3 15 0 ff41 - 0xde20, //w 2 15 0 de20 - 0x0140, //w 1 15 0 0140 - 0x00bb } },{ //w 0 15 0 00bb - { 0xf000, //w 4 15 12 f - 0xdf01, //w 3 15 0 df01 - 0xdf20, //w 2 15 0 df20 - 0xff95, //w 1 15 0 ff95 - 0xbf00 } //w 0 15 0 bf00 - } - }, *p = phy_magic; - unsigned int i; - - mdio_write(ioaddr, 0x1f, 0x0001); //w 31 2 0 1 - mdio_write(ioaddr, 0x15, 0x1000); //w 21 15 0 1000 - mdio_write(ioaddr, 0x18, 0x65c7); //w 24 15 0 65c7 - rtl8101_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0 - - for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) { - int val, pos = 4; - - val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff); - mdio_write(ioaddr, pos, val); - while (--pos >= 0) - mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff); - rtl8101_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1 - rtl8101_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0 - } - mdio_write(ioaddr, 0x1f, 0x0000); //w 31 2 0 0 -} - -static void rtl8101sb_hw_phy_config(void __iomem *ioaddr) -{ - struct phy_reg phy_reg_init[] = { - { 0x1f, 0x0002 }, - { 0x01, 0x90d0 }, - { 0x1f, 0x0000 } - }; - - rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); -} - -static void rtl8168cp_hw_phy_config(void __iomem *ioaddr) -{ - struct phy_reg phy_reg_init[] = { - { 0x1f, 0x0000 }, - { 0x1d, 0x0f00 }, - { 0x1f, 0x0002 }, - { 0x0c, 0x1ec8 }, - { 0x1f, 0x0000 } - }; - - rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); -} - -static void rtl8168c_hw_phy_config(void __iomem *ioaddr) -{ - struct phy_reg phy_reg_init[] = { - { 0x1f, 0x0001 }, - { 0x12, 0x2300 }, - { 0x1f, 0x0002 }, - { 0x00, 0x88d4 }, - { 0x01, 0x82b1 }, - { 0x03, 0x7002 }, - { 0x08, 0x9e30 }, - { 0x09, 0x01f0 }, - { 0x0a, 0x5500 }, - { 0x0c, 0x00c8 }, - { 0x1f, 0x0003 }, - { 0x12, 0xc096 }, - { 0x16, 0x000a }, - { 0x1f, 0x0000 } - }; - - rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); -} - -static void rtl8168cx_hw_phy_config(void __iomem *ioaddr) -{ - struct phy_reg phy_reg_init[] = { - { 0x1f, 0x0000 }, - { 0x12, 0x2300 }, - { 0x1f, 0x0003 }, - { 0x16, 0x0f0a }, - { 0x1f, 0x0000 }, - { 0x1f, 0x0002 }, - { 0x0c, 0x7eb8 }, - { 0x1f, 0x0000 } - }; - - rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); -} - -static void rtl8102e_hw_phy_config(void __iomem *ioaddr) -{ - struct phy_reg phy_reg_init[] = { - { 0x1f, 0x0003 }, - { 0x08, 0x441d }, - { 0x01, 0x9100 }, - { 0x1f, 0x0000 } - }; - - mdio_write(ioaddr, 0x1f, 0x0000); - mdio_patch(ioaddr, 0x11, 1 << 12); - mdio_patch(ioaddr, 0x19, 1 << 13); - - rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); -} - -static void rtl_hw_phy_config(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - - rtl8101_print_mac_version(tp); - - switch (tp->mac_version) { - case RTL_GIGA_MAC_VER_01: - break; - case RTL_GIGA_MAC_VER_02: - case RTL_GIGA_MAC_VER_03: - rtl8101s_hw_phy_config(ioaddr); - break; - case RTL_GIGA_MAC_VER_04: - rtl8101sb_hw_phy_config(ioaddr); - break; - case RTL_GIGA_MAC_VER_07: - case RTL_GIGA_MAC_VER_08: - case RTL_GIGA_MAC_VER_09: - rtl8102e_hw_phy_config(ioaddr); - break; - case RTL_GIGA_MAC_VER_18: - rtl8168cp_hw_phy_config(ioaddr); - break; - case RTL_GIGA_MAC_VER_19: - rtl8168c_hw_phy_config(ioaddr); - break; - case RTL_GIGA_MAC_VER_20: - rtl8168cx_hw_phy_config(ioaddr); - break; - default: - break; - } -} - -static void rtl8101_phy_timer(unsigned long __opaque) -{ - struct net_device *dev = (struct net_device *)__opaque; - struct rtl8101_private *tp = netdev_priv(dev); - struct timer_list *timer = &tp->timer; - void __iomem *ioaddr = tp->mmio_addr; - unsigned long timeout = RTL8101_PHY_TIMEOUT; - - assert(tp->mac_version > RTL_GIGA_MAC_VER_01); - - if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) - return; - - spin_lock_irq(&tp->lock); - - if (tp->phy_reset_pending(ioaddr)) { - /* - * A busy loop could burn quite a few cycles on nowadays CPU. - * Let's delay the execution of the timer for a few ticks. - */ - timeout = HZ/10; - goto out_mod_timer; - } - - if (tp->link_ok(ioaddr)) - goto out_unlock; - - if (netif_msg_link(tp)) - printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name); - - tp->phy_reset_enable(ioaddr); - -out_mod_timer: - mod_timer(timer, jiffies + timeout); -out_unlock: - spin_unlock_irq(&tp->lock); -} - -static inline void rtl8101_delete_timer(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct timer_list *timer = &tp->timer; - - if (tp->mac_version <= RTL_GIGA_MAC_VER_01) - return; - - del_timer_sync(timer); -} - -static inline void rtl8101_request_timer(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct timer_list *timer = &tp->timer; - - if (tp->mac_version <= RTL_GIGA_MAC_VER_01) - return; - - mod_timer(timer, jiffies + RTL8101_PHY_TIMEOUT); -} - -#ifdef CONFIG_NET_POLL_CONTROLLER -/* - * Polling 'interrupt' - used by things like netconsole to send skbs - * without having to re-enable interrupts. It's not called while - * the interrupt routine is executing. - */ -static void rtl8101_netpoll(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct pci_dev *pdev = tp->pci_dev; - - disable_irq(pdev->irq); - rtl8101_interrupt(pdev->irq, dev); - enable_irq(pdev->irq); -} -#endif - -static void rtl8101_release_board(struct pci_dev *pdev, struct net_device *dev, - void __iomem *ioaddr) -{ - iounmap(ioaddr); - pci_release_regions(pdev); - pci_disable_device(pdev); - free_netdev(dev); -} - -static void rtl8101_phy_reset(struct net_device *dev, - struct rtl8101_private *tp) -{ - void __iomem *ioaddr = tp->mmio_addr; - unsigned int i; - - tp->phy_reset_enable(ioaddr); - for (i = 0; i < 100; i++) { - if (!tp->phy_reset_pending(ioaddr)) - return; - msleep(1); - } - if (netif_msg_link(tp)) - printk(KERN_ERR "%s: PHY reset failed.\n", dev->name); -} - -static void rtl8101_init_phy(struct net_device *dev, struct rtl8101_private *tp) -{ - void __iomem *ioaddr = tp->mmio_addr; - - rtl_hw_phy_config(dev); - - if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { - dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); - RTL_W8(0x82, 0x01); - } - - pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); - - if (tp->mac_version <= RTL_GIGA_MAC_VER_06) - pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); - - if (tp->mac_version == RTL_GIGA_MAC_VER_02) { - dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); - RTL_W8(0x82, 0x01); - dprintk("Set PHY Reg 0x0bh = 0x00h\n"); - mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0 - } - - rtl8101_phy_reset(dev, tp); - - /* - * rtl8101_set_speed_xmii takes good care of the Fast Ethernet - * only 8101. Don't panic. - */ - rtl8101_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL); - - if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp)) - printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name); -} - -static void rtl_rar_set(struct rtl8101_private *tp, u8 *addr) -{ - void __iomem *ioaddr = tp->mmio_addr; - u32 high; - u32 low; - - low = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24); - high = addr[4] | (addr[5] << 8); - - spin_lock_irq(&tp->lock); - - RTL_W8(Cfg9346, Cfg9346_Unlock); - RTL_W32(MAC0, low); - RTL_W32(MAC4, high); - RTL_W8(Cfg9346, Cfg9346_Lock); - - spin_unlock_irq(&tp->lock); -} - -static int rtl_set_mac_address(struct net_device *dev, void *p) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct sockaddr *addr = p; - - if (!is_valid_ether_addr(addr->sa_data)) - return -EADDRNOTAVAIL; - - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); - - rtl_rar_set(tp, dev->dev_addr); - - return 0; -} - -static int rtl8101_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct mii_ioctl_data *data = if_mii(ifr); - - if (!netif_running(dev)) - return -ENODEV; - - switch (cmd) { - case SIOCGMIIPHY: - data->phy_id = 32; /* Internal PHY */ - return 0; - - case SIOCGMIIREG: - data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f); - return 0; - - case SIOCSMIIREG: - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); - return 0; - } - return -EOPNOTSUPP; -} - -static const struct rtl_cfg_info { - void (*hw_start)(struct net_device *); - unsigned int region; - unsigned int align; - u16 intr_event; - u16 napi_event; - unsigned features; -} rtl_cfg_infos [] = { - [RTL_CFG_0] = { - .hw_start = rtl_hw_start_8169, - .region = 1, - .align = 0, - .intr_event = SYSErr | LinkChg | RxOverflow | - RxFIFOOver | TxErr | TxOK | RxOK | RxErr, - .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, - .features = RTL_FEATURE_GMII - }, - [RTL_CFG_1] = { - .hw_start = rtl_hw_start_8168, - .region = 2, - .align = 8, - .intr_event = SYSErr | LinkChg | RxOverflow | - TxErr | TxOK | RxOK | RxErr, - .napi_event = TxErr | TxOK | RxOK | RxOverflow, - .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI - }, - [RTL_CFG_2] = { - .hw_start = rtl_hw_start_8101, - .region = 2, - .align = 8, - .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | - RxFIFOOver | TxErr | TxOK | RxOK | RxErr, - .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, - .features = RTL_FEATURE_MSI - } -}; - -/* Cfg9346_Unlock assumed. */ -static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, - const struct rtl_cfg_info *cfg) -{ - unsigned msi = 0; - u8 cfg2; - - cfg2 = RTL_R8(Config2) & ~MSIEnable; - if (cfg->features & RTL_FEATURE_MSI) { - if (pci_enable_msi(pdev)) { - dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); - } else { - cfg2 |= MSIEnable; - msi = RTL_FEATURE_MSI; - } - } - RTL_W8(Config2, cfg2); - return msi; -} - -static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8101_private *tp) -{ - if (tp->features & RTL_FEATURE_MSI) { - pci_disable_msi(pdev); - tp->features &= ~RTL_FEATURE_MSI; - } -} - -static int __devinit -rtl8101_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) -{ - const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; - const unsigned int region = cfg->region; - struct rtl8101_private *tp; - struct mii_if_info *mii; - struct net_device *dev; - void __iomem *ioaddr; - unsigned int i; - int rc; - - if (netif_msg_drv(&debug)) { - printk(KERN_INFO "%s Fast Ethernet driver %s loaded\n", - MODULENAME, RTL8101_VERSION); - } - - dev = alloc_etherdev(sizeof (*tp)); - if (!dev) { - if (netif_msg_drv(&debug)) - dev_err(&pdev->dev, "unable to alloc new ethernet\n"); - rc = -ENOMEM; - goto out; - } - - SET_NETDEV_DEV(dev, &pdev->dev); - tp = netdev_priv(dev); - tp->dev = dev; - tp->pci_dev = pdev; - tp->msg_enable = netif_msg_init(debug.msg_enable, R8101_MSG_DEFAULT); - - mii = &tp->mii; - mii->dev = dev; - mii->mdio_read = rtl_mdio_read; - mii->mdio_write = rtl_mdio_write; - mii->phy_id_mask = 0x1f; - mii->reg_num_mask = 0x1f; - mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); - - /* enable device (incl. PCI PM wakeup and hotplug setup) */ - rc = pci_enable_device(pdev); - if (rc < 0) { - if (netif_msg_probe(tp)) - dev_err(&pdev->dev, "enable failure\n"); - goto err_out_free_dev_1; - } - - rc = pci_set_mwi(pdev); - if (rc < 0) - goto err_out_disable_2; - - /* make sure PCI base addr 1 is MMIO */ - if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) { - if (netif_msg_probe(tp)) { - dev_err(&pdev->dev, - "region #%d not an MMIO resource, aborting\n", - region); - } - rc = -ENODEV; - goto err_out_mwi_3; - } - - /* check for weird/broken PCI region reporting */ - if (pci_resource_len(pdev, region) < R8101_REGS_SIZE) { - if (netif_msg_probe(tp)) { - dev_err(&pdev->dev, - "Invalid PCI region size(s), aborting\n"); - } - rc = -ENODEV; - goto err_out_mwi_3; - } - - rc = pci_request_regions(pdev, MODULENAME); - if (rc < 0) { - if (netif_msg_probe(tp)) - dev_err(&pdev->dev, "could not request regions.\n"); - goto err_out_mwi_3; - } - - tp->cp_cmd = PCIMulRW | RxChkSum; - - if ((sizeof(dma_addr_t) > 4) && - !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) { - tp->cp_cmd |= PCIDAC; - dev->features |= NETIF_F_HIGHDMA; - } else { - rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); - if (rc < 0) { - if (netif_msg_probe(tp)) { - dev_err(&pdev->dev, - "DMA configuration failed.\n"); - } - goto err_out_free_res_4; - } - } - - pci_set_master(pdev); - - /* ioremap MMIO region */ - ioaddr = ioremap(pci_resource_start(pdev, region), R8101_REGS_SIZE); - if (!ioaddr) { - if (netif_msg_probe(tp)) - dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); - rc = -EIO; - goto err_out_free_res_4; - } - - tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); - if (!tp->pcie_cap && netif_msg_probe(tp)) - dev_info(&pdev->dev, "no PCI Express capability\n"); - - RTL_W16(IntrMask, 0x0000); - - /* Soft reset the chip. */ - RTL_W8(ChipCmd, CmdReset); - - /* Check that the chip has finished the reset. */ - for (i = 0; i < 100; i++) { - if ((RTL_R8(ChipCmd) & CmdReset) == 0) - break; - msleep_interruptible(1); - } - - RTL_W16(IntrStatus, 0xffff); - - /* Identify chip attached to board */ - rtl8101_get_mac_version(tp, ioaddr); - - rtl8101_print_mac_version(tp); - - for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { - if (tp->mac_version == rtl_chip_info[i].mac_version) - break; - } - if (i == ARRAY_SIZE(rtl_chip_info)) { - /* Unknown chip: assume array element #0, original RTL-8101 */ - if (netif_msg_probe(tp)) { - dev_printk(KERN_DEBUG, &pdev->dev, - "unknown chip version, assuming %s\n", - rtl_chip_info[0].name); - } - i = 0; - } - tp->chipset = i; - - RTL_W8(Cfg9346, Cfg9346_Unlock); - RTL_W8(Config1, RTL_R8(Config1) | PMEnable); - RTL_W8(Config5, RTL_R8(Config5) & PMEStatus); - tp->features |= rtl_try_msi(pdev, ioaddr, cfg); - RTL_W8(Cfg9346, Cfg9346_Lock); - - if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) && - (RTL_R8(PHYstatus) & TBI_Enable)) { - tp->set_speed = rtl8101_set_speed_tbi; - tp->get_settings = rtl8101_gset_tbi; - tp->phy_reset_enable = rtl8101_tbi_reset_enable; - tp->phy_reset_pending = rtl8101_tbi_reset_pending; - tp->link_ok = rtl8101_tbi_link_ok; - - tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ - } else { - tp->set_speed = rtl8101_set_speed_xmii; - tp->get_settings = rtl8101_gset_xmii; - tp->phy_reset_enable = rtl8101_xmii_reset_enable; - tp->phy_reset_pending = rtl8101_xmii_reset_pending; - tp->link_ok = rtl8101_xmii_link_ok; - - dev->do_ioctl = rtl8101_ioctl; - } - - /* Get MAC address. FIXME: read EEPROM */ - for (i = 0; i < MAC_ADDR_LEN; i++) - dev->dev_addr[i] = RTL_R8(MAC0 + i); - memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); - - dev->open = rtl8101_open; - dev->hard_start_xmit = rtl8101_start_xmit; - dev->get_stats = rtl8101_get_stats; - SET_ETHTOOL_OPS(dev, &rtl8101_ethtool_ops); - dev->stop = rtl8101_close; - dev->tx_timeout = rtl8101_tx_timeout; - dev->set_multicast_list = rtl_set_rx_mode; - dev->watchdog_timeo = RTL8101_TX_TIMEOUT; - dev->irq = pdev->irq; - dev->base_addr = (unsigned long) ioaddr; - dev->change_mtu = rtl8101_change_mtu; - dev->set_mac_address = rtl_set_mac_address; - - netif_napi_add(dev, &tp->napi, rtl8101_poll, R8101_NAPI_WEIGHT); - -#ifdef CONFIG_R8101_VLAN - dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; - dev->vlan_rx_register = rtl8101_vlan_rx_register; -#endif - -#ifdef CONFIG_NET_POLL_CONTROLLER - dev->poll_controller = rtl8101_netpoll; -#endif - - tp->intr_mask = 0xffff; - tp->mmio_addr = ioaddr; - tp->align = cfg->align; - tp->hw_start = cfg->hw_start; - tp->intr_event = cfg->intr_event; - tp->napi_event = cfg->napi_event; - - init_timer(&tp->timer); - tp->timer.data = (unsigned long) dev; - tp->timer.function = rtl8101_phy_timer; - - spin_lock_init(&tp->lock); - - rc = register_netdev(dev); - if (rc < 0) - goto err_out_msi_5; - - pci_set_drvdata(pdev, dev); - - if (netif_msg_probe(tp)) { - u32 xid = RTL_R32(TxConfig) & 0x7cf0f8ff; - - printk(KERN_INFO "%s: %s at 0x%lx, " - "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " - "XID %08x IRQ %d\n", - dev->name, - rtl_chip_info[tp->chipset].name, - dev->base_addr, - dev->dev_addr[0], dev->dev_addr[1], - dev->dev_addr[2], dev->dev_addr[3], - dev->dev_addr[4], dev->dev_addr[5], xid, dev->irq); - } - - rtl8101_init_phy(dev, tp); - -out: - return rc; - -err_out_msi_5: - rtl_disable_msi(pdev, tp); - iounmap(ioaddr); -err_out_free_res_4: - pci_release_regions(pdev); -err_out_mwi_3: - pci_clear_mwi(pdev); -err_out_disable_2: - pci_disable_device(pdev); -err_out_free_dev_1: - free_netdev(dev); - goto out; -} - -static void __devexit rtl8101_remove_one(struct pci_dev *pdev) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct rtl8101_private *tp = netdev_priv(dev); - - flush_scheduled_work(); - - unregister_netdev(dev); - rtl_disable_msi(pdev, tp); - rtl8101_release_board(pdev, dev, tp->mmio_addr); - pci_set_drvdata(pdev, NULL); -} - -static void rtl8101_set_rxbufsize(struct rtl8101_private *tp, - struct net_device *dev) -{ - unsigned int mtu = dev->mtu; - - tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; -} - -static int rtl8101_open(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct pci_dev *pdev = tp->pci_dev; - int retval = -ENOMEM; - - - rtl8101_set_rxbufsize(tp, dev); - - /* - * Rx and Tx desscriptors needs 256 bytes alignment. - * pci_alloc_consistent provides more. - */ - tp->TxDescArray = pci_alloc_consistent(pdev, R8101_TX_RING_BYTES, - &tp->TxPhyAddr); - if (!tp->TxDescArray) - goto out; - - tp->RxDescArray = pci_alloc_consistent(pdev, R8101_RX_RING_BYTES, - &tp->RxPhyAddr); - if (!tp->RxDescArray) - goto err_free_tx_0; - - retval = rtl8101_init_ring(dev); - if (retval < 0) - goto err_free_rx_1; - - INIT_DELAYED_WORK(&tp->task, NULL); - - smp_mb(); - - retval = request_irq(dev->irq, rtl8101_interrupt, - (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED, - dev->name, dev); - if (retval < 0) - goto err_release_ring_2; - - napi_enable(&tp->napi); - - rtl_hw_start(dev); - - rtl8101_request_timer(dev); - - rtl8101_check_link_status(dev, tp, tp->mmio_addr); -out: - return retval; - -err_release_ring_2: - rtl8101_rx_clear(tp); -err_free_rx_1: - pci_free_consistent(pdev, R8101_RX_RING_BYTES, tp->RxDescArray, - tp->RxPhyAddr); -err_free_tx_0: - pci_free_consistent(pdev, R8101_TX_RING_BYTES, tp->TxDescArray, - tp->TxPhyAddr); - goto out; -} - -static void rtl8101_hw_reset(void __iomem *ioaddr) -{ - /* Disable interrupts */ - rtl8101_irq_mask_and_ack(ioaddr); - - /* Reset the chipset */ - RTL_W8(ChipCmd, CmdReset); - - /* PCI commit */ - RTL_R8(ChipCmd); -} - -static void rtl_set_rx_tx_config_registers(struct rtl8101_private *tp) -{ - void __iomem *ioaddr = tp->mmio_addr; - u32 cfg = rtl8101_rx_config; - - cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); - RTL_W32(RxConfig, cfg); - - /* Set DMA burst size and Interframe Gap Time */ - RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | - (InterFrameGap << TxInterFrameGapShift)); -} - -static void rtl_hw_start(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned int i; - - /* Soft reset the chip. */ - RTL_W8(ChipCmd, CmdReset); - - /* Check that the chip has finished the reset. */ - for (i = 0; i < 100; i++) { - if ((RTL_R8(ChipCmd) & CmdReset) == 0) - break; - msleep_interruptible(1); - } - - tp->hw_start(dev); - - netif_start_queue(dev); -} - - -static void rtl_set_rx_tx_desc_registers(struct rtl8101_private *tp, - void __iomem *ioaddr) -{ - /* - * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh - * register to be written before TxDescAddrLow to work. - * Switching from MMIO to I/O access fixes the issue as well. - */ - RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); - RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_32BIT_MASK); - RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); - RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_32BIT_MASK); -} - -static u16 rtl_rw_cpluscmd(void __iomem *ioaddr) -{ - u16 cmd; - - cmd = RTL_R16(CPlusCmd); - RTL_W16(CPlusCmd, cmd); - return cmd; -} - -static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) -{ - /* Low hurts. Let's disable the filtering. */ - RTL_W16(RxMaxSize, rx_buf_sz); -} - -static void rtl8101_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) -{ - struct { - u32 mac_version; - u32 clk; - u32 val; - } cfg2_info [] = { - { RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd - { RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff }, - { RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe - { RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff } - }, *p = cfg2_info; - unsigned int i; - u32 clk; - - clk = RTL_R8(Config2) & PCI_Clock_66MHz; - for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) { - if ((p->mac_version == mac_version) && (p->clk == clk)) { - RTL_W32(0x7c, p->val); - break; - } - } -} - -static void rtl_hw_start_8169(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - struct pci_dev *pdev = tp->pci_dev; - - if (tp->mac_version == RTL_GIGA_MAC_VER_05) { - RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW); - pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08); - } - - RTL_W8(Cfg9346, Cfg9346_Unlock); - if ((tp->mac_version == RTL_GIGA_MAC_VER_01) || - (tp->mac_version == RTL_GIGA_MAC_VER_02) || - (tp->mac_version == RTL_GIGA_MAC_VER_03) || - (tp->mac_version == RTL_GIGA_MAC_VER_04)) - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); - - RTL_W8(EarlyTxThres, EarlyTxThld); - - rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz); - - if ((tp->mac_version == RTL_GIGA_MAC_VER_01) || - (tp->mac_version == RTL_GIGA_MAC_VER_02) || - (tp->mac_version == RTL_GIGA_MAC_VER_03) || - (tp->mac_version == RTL_GIGA_MAC_VER_04)) - rtl_set_rx_tx_config_registers(tp); - - tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; - - if ((tp->mac_version == RTL_GIGA_MAC_VER_02) || - (tp->mac_version == RTL_GIGA_MAC_VER_03)) { - dprintk("Set MAC Reg C+CR Offset 0xE0. " - "Bit-3 and bit-14 MUST be 1\n"); - tp->cp_cmd |= (1 << 14); - } - - RTL_W16(CPlusCmd, tp->cp_cmd); - - rtl8101_set_magic_reg(ioaddr, tp->mac_version); - - /* - * Undocumented corner. Supposedly: - * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets - */ - RTL_W16(IntrMitigate, 0x0000); - - rtl_set_rx_tx_desc_registers(tp, ioaddr); - - if ((tp->mac_version != RTL_GIGA_MAC_VER_01) && - (tp->mac_version != RTL_GIGA_MAC_VER_02) && - (tp->mac_version != RTL_GIGA_MAC_VER_03) && - (tp->mac_version != RTL_GIGA_MAC_VER_04)) { - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); - rtl_set_rx_tx_config_registers(tp); - } - - RTL_W8(Cfg9346, Cfg9346_Lock); - - /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ - RTL_R8(IntrMask); - - RTL_W32(RxMissed, 0); - - rtl_set_rx_mode(dev); - - /* no early-rx interrupts */ - RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); - - /* Enable all known interrupts by setting the interrupt mask. */ - RTL_W16(IntrMask, tp->intr_event); -} - -static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct rtl8101_private *tp = netdev_priv(dev); - int cap = tp->pcie_cap; - - if (cap) { - u16 ctl; - - pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); - ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force; - pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); - } -} - -static void rtl_csi_access_enable(void __iomem *ioaddr) -{ - u32 csi; - - csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff; - rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000); -} - -struct ephy_info { - unsigned int offset; - u16 mask; - u16 bits; -}; - -static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len) -{ - u16 w; - - while (len-- > 0) { - w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits; - rtl_ephy_write(ioaddr, e->offset, w); - e++; - } -} - -static void rtl_hw_start_8168(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - struct pci_dev *pdev = tp->pci_dev; - - RTL_W8(Cfg9346, Cfg9346_Unlock); - - RTL_W8(EarlyTxThres, EarlyTxThld); - - rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz); - - rtl_set_rx_tx_config_registers(tp); - - tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1; - - RTL_W16(CPlusCmd, tp->cp_cmd); - - rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); - - RTL_W16(IntrMitigate, 0x5151); - - /* Work around for RxFIFO overflow. */ - if (tp->mac_version == RTL_GIGA_MAC_VER_11) { - tp->intr_event |= RxFIFOOver | PCSTimeout; - tp->intr_event &= ~RxOverflow; - } - - rtl_set_rx_tx_desc_registers(tp, ioaddr); - - RTL_W8(Cfg9346, Cfg9346_Lock); - - RTL_R8(IntrMask); - - rtl_set_rx_mode(dev); - - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); - - RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); - - RTL_W16(IntrMask, tp->intr_event); -} - -#define R810X_CPCMD_QUIRK_MASK (\ - EnableBist | \ - Mac_dbgo_oe | \ - Force_half_dup | \ - Force_half_dup | \ - Force_txflow_en | \ - Cxpl_dbg_sel | \ - ASF | \ - PktCntrDisable | \ - PCIDAC | \ - PCIMulRW) - -static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) -{ - static struct ephy_info e_info_8102e_1[] = { - { 0x01, 0, 0x6e65 }, - { 0x02, 0, 0x091f }, - { 0x03, 0, 0xc2f9 }, - { 0x06, 0, 0xafb5 }, - { 0x07, 0, 0x0e00 }, - { 0x19, 0, 0xec80 }, - { 0x01, 0, 0x2e65 }, - { 0x01, 0, 0x6e65 } - }; - u8 cfg1; - - rtl_csi_access_enable(ioaddr); - - RTL_W8(DBG_REG, FIX_NAK_1); - - rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); - - RTL_W8(Config1, - LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable); - RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); - - cfg1 = RTL_R8(Config1); - if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) - RTL_W8(Config1, cfg1 & ~LEDS0); - - RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); - - rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); -} - -static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) -{ - rtl_csi_access_enable(ioaddr); - - rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); - - RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); - RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); - - RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); -} - -static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) -{ - rtl_hw_start_8102e_2(ioaddr, pdev); - - rtl_ephy_write(ioaddr, 0x03, 0xc2f9); -} - -static void rtl_hw_start_8101(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - struct pci_dev *pdev = tp->pci_dev; - - if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || - (tp->mac_version == RTL_GIGA_MAC_VER_16)) { - int cap = tp->pcie_cap; - - if (cap) { - pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, - PCI_EXP_DEVCTL_NOSNOOP_EN); - } - } - - switch (tp->mac_version) { - case RTL_GIGA_MAC_VER_07: - rtl_hw_start_8102e_1(ioaddr, pdev); - break; - - case RTL_GIGA_MAC_VER_08: - rtl_hw_start_8102e_3(ioaddr, pdev); - break; - - case RTL_GIGA_MAC_VER_09: - rtl_hw_start_8102e_2(ioaddr, pdev); - break; - } - - RTL_W8(Cfg9346, Cfg9346_Unlock); - - RTL_W8(EarlyTxThres, EarlyTxThld); - - rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz); - - tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; - - RTL_W16(CPlusCmd, tp->cp_cmd); - - RTL_W16(IntrMitigate, 0x0000); - - rtl_set_rx_tx_desc_registers(tp, ioaddr); - - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); - rtl_set_rx_tx_config_registers(tp); - - RTL_W8(Cfg9346, Cfg9346_Lock); - - RTL_R8(IntrMask); - - rtl_set_rx_mode(dev); - - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); - - RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); - - RTL_W16(IntrMask, tp->intr_event); -} - -static int rtl8101_change_mtu(struct net_device *dev, int new_mtu) -{ - struct rtl8101_private *tp = netdev_priv(dev); - int ret = 0; - - if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu) - return -EINVAL; - - dev->mtu = new_mtu; - - if (!netif_running(dev)) - goto out; - - rtl8101_down(dev); - - rtl8101_set_rxbufsize(tp, dev); - - ret = rtl8101_init_ring(dev); - if (ret < 0) - goto out; - - napi_enable(&tp->napi); - - rtl_hw_start(dev); - - rtl8101_request_timer(dev); - -out: - return ret; -} - -static inline void rtl8101_make_unusable_by_asic(struct RxDesc *desc) -{ - desc->addr = cpu_to_le64(0x0badbadbadbadbadull); - desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask); -} - -static void rtl8101_free_rx_skb(struct rtl8101_private *tp, - struct sk_buff **sk_buff, struct RxDesc *desc) -{ - struct pci_dev *pdev = tp->pci_dev; - - pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz, - PCI_DMA_FROMDEVICE); - dev_kfree_skb(*sk_buff); - *sk_buff = NULL; - rtl8101_make_unusable_by_asic(desc); -} - -static inline void rtl8101_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz) -{ - u32 eor = le32_to_cpu(desc->opts1) & RingEnd; - - desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz); -} - -static inline void rtl8101_map_to_asic(struct RxDesc *desc, dma_addr_t mapping, - u32 rx_buf_sz) -{ - desc->addr = cpu_to_le64(mapping); - wmb(); - rtl8101_mark_to_asic(desc, rx_buf_sz); -} - -static struct sk_buff *rtl8101_alloc_rx_skb(struct pci_dev *pdev, - struct net_device *dev, - struct RxDesc *desc, int rx_buf_sz, - unsigned int align) -{ - struct sk_buff *skb; - dma_addr_t mapping; - unsigned int pad; - - pad = align ? align : NET_IP_ALIGN; - - skb = netdev_alloc_skb(dev, rx_buf_sz + pad); - if (!skb) - goto err_out; - - skb_reserve(skb, align ? ((pad - 1) & (unsigned long)skb->data) : pad); - - mapping = pci_map_single(pdev, skb->data, rx_buf_sz, - PCI_DMA_FROMDEVICE); - - rtl8101_map_to_asic(desc, mapping, rx_buf_sz); -out: - return skb; - -err_out: - rtl8101_make_unusable_by_asic(desc); - goto out; -} - -static void rtl8101_rx_clear(struct rtl8101_private *tp) -{ - unsigned int i; - - for (i = 0; i < NUM_RX_DESC; i++) { - if (tp->Rx_skbuff[i]) { - rtl8101_free_rx_skb(tp, tp->Rx_skbuff + i, - tp->RxDescArray + i); - } - } -} - -static u32 rtl8101_rx_fill(struct rtl8101_private *tp, struct net_device *dev, - u32 start, u32 end) -{ - u32 cur; - - for (cur = start; end - cur != 0; cur++) { - struct sk_buff *skb; - unsigned int i = cur % NUM_RX_DESC; - - WARN_ON((s32)(end - cur) < 0); - - if (tp->Rx_skbuff[i]) - continue; - - skb = rtl8101_alloc_rx_skb(tp->pci_dev, dev, - tp->RxDescArray + i, - tp->rx_buf_sz, tp->align); - if (!skb) - break; - - tp->Rx_skbuff[i] = skb; - } - return cur - start; -} - -static inline void rtl8101_mark_as_last_descriptor(struct RxDesc *desc) -{ - desc->opts1 |= cpu_to_le32(RingEnd); -} - -static void rtl8101_init_ring_indexes(struct rtl8101_private *tp) -{ - tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0; -} - -static int rtl8101_init_ring(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - rtl8101_init_ring_indexes(tp); - - memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); - memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *)); - - if (rtl8101_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC) - goto err_out; - - rtl8101_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); - - return 0; - -err_out: - rtl8101_rx_clear(tp); - return -ENOMEM; -} - -static void rtl8101_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb, - struct TxDesc *desc) -{ - unsigned int len = tx_skb->len; - - pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE); - desc->opts1 = 0x00; - desc->opts2 = 0x00; - desc->addr = 0x00; - tx_skb->len = 0; -} - -static void rtl8101_tx_clear(struct rtl8101_private *tp) -{ - unsigned int i; - - for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) { - unsigned int entry = i % NUM_TX_DESC; - struct ring_info *tx_skb = tp->tx_skb + entry; - unsigned int len = tx_skb->len; - - if (len) { - struct sk_buff *skb = tx_skb->skb; - - rtl8101_unmap_tx_skb(tp->pci_dev, tx_skb, - tp->TxDescArray + entry); - if (skb) { - dev_kfree_skb(skb); - tx_skb->skb = NULL; - } - tp->dev->stats.tx_dropped++; - } - } - tp->cur_tx = tp->dirty_tx = 0; -} - -static void rtl8101_schedule_work(struct net_device *dev, work_func_t task) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - PREPARE_DELAYED_WORK(&tp->task, task); - schedule_delayed_work(&tp->task, 4); -} - -static void rtl8101_wait_for_quiescence(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - - synchronize_irq(dev->irq); - - /* Wait for any pending NAPI task to complete */ - napi_disable(&tp->napi); - - rtl8101_irq_mask_and_ack(ioaddr); - - tp->intr_mask = 0xffff; - RTL_W16(IntrMask, tp->intr_event); - napi_enable(&tp->napi); -} - -static void rtl8101_reinit_task(struct work_struct *work) -{ - struct rtl8101_private *tp = - container_of(work, struct rtl8101_private, task.work); - struct net_device *dev = tp->dev; - int ret; - - rtnl_lock(); - - if (!netif_running(dev)) - goto out_unlock; - - rtl8101_wait_for_quiescence(dev); - rtl8101_close(dev); - - ret = rtl8101_open(dev); - if (unlikely(ret < 0)) { - if (net_ratelimit() && netif_msg_drv(tp)) { - printk(KERN_ERR PFX "%s: reinit failure (status = %d)." - " Rescheduling.\n", dev->name, ret); - } - rtl8101_schedule_work(dev, rtl8101_reinit_task); - } - -out_unlock: - rtnl_unlock(); -} - -static void rtl8101_reset_task(struct work_struct *work) -{ - struct rtl8101_private *tp = - container_of(work, struct rtl8101_private, task.work); - struct net_device *dev = tp->dev; - - rtnl_lock(); - - if (!netif_running(dev)) - goto out_unlock; - - rtl8101_wait_for_quiescence(dev); - - rtl8101_rx_interrupt(dev, tp, tp->mmio_addr, ~(u32)0); - rtl8101_tx_clear(tp); - - if (tp->dirty_rx == tp->cur_rx) { - rtl8101_init_ring_indexes(tp); - rtl_hw_start(dev); - netif_wake_queue(dev); - rtl8101_check_link_status(dev, tp, tp->mmio_addr); - } else { - if (net_ratelimit() && netif_msg_intr(tp)) { - printk(KERN_EMERG PFX "%s: Rx buffers shortage\n", - dev->name); - } - rtl8101_schedule_work(dev, rtl8101_reset_task); - } - -out_unlock: - rtnl_unlock(); -} - -static void rtl8101_tx_timeout(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - rtl8101_hw_reset(tp->mmio_addr); - - /* Let's wait a bit while any (async) irq lands on */ - rtl8101_schedule_work(dev, rtl8101_reset_task); -} - -static int rtl8101_xmit_frags(struct rtl8101_private *tp, struct sk_buff *skb, - u32 opts1) -{ - struct skb_shared_info *info = skb_shinfo(skb); - unsigned int cur_frag, entry; - struct TxDesc * uninitialized_var(txd); - - entry = tp->cur_tx; - for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { - skb_frag_t *frag = info->frags + cur_frag; - dma_addr_t mapping; - u32 status, len; - void *addr; - - entry = (entry + 1) % NUM_TX_DESC; - - txd = tp->TxDescArray + entry; - len = frag->size; - addr = ((void *) page_address(frag->page)) + frag->page_offset; - mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); - - /* anti gcc 2.95.3 bugware (sic) */ - status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); - - txd->opts1 = cpu_to_le32(status); - txd->addr = cpu_to_le64(mapping); - - tp->tx_skb[entry].len = len; - } - - if (cur_frag) { - tp->tx_skb[entry].skb = skb; - txd->opts1 |= cpu_to_le32(LastFrag); - } - - return cur_frag; -} - -static inline u32 rtl8101_tso_csum(struct sk_buff *skb, struct net_device *dev) -{ - if (dev->features & NETIF_F_TSO) { - u32 mss = skb_shinfo(skb)->gso_size; - - if (mss) - return LargeSend | ((mss & MSSMask) << MSSShift); - } - if (skb->ip_summed == CHECKSUM_PARTIAL) { - const struct iphdr *ip = ip_hdr(skb); - - if (ip->protocol == IPPROTO_TCP) - return IPCS | TCPCS; - else if (ip->protocol == IPPROTO_UDP) - return IPCS | UDPCS; - WARN_ON(1); /* we need a WARN() */ - } - return 0; -} - -static int rtl8101_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC; - struct TxDesc *txd = tp->TxDescArray + entry; - void __iomem *ioaddr = tp->mmio_addr; - dma_addr_t mapping; - u32 status, len; - u32 opts1; - int ret = NETDEV_TX_OK; - - if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { - if (netif_msg_drv(tp)) { - printk(KERN_ERR - "%s: BUG! Tx Ring full when queue awake!\n", - dev->name); - } - goto err_stop; - } - - if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) - goto err_stop; - - opts1 = DescOwn | rtl8101_tso_csum(skb, dev); - - frags = rtl8101_xmit_frags(tp, skb, opts1); - if (frags) { - len = skb_headlen(skb); - opts1 |= FirstFrag; - } else { - len = skb->len; - opts1 |= FirstFrag | LastFrag; - tp->tx_skb[entry].skb = skb; - } - - mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE); - - tp->tx_skb[entry].len = len; - txd->addr = cpu_to_le64(mapping); - txd->opts2 = cpu_to_le32(rtl8101_tx_vlan_tag(tp, skb)); - - wmb(); - - /* anti gcc 2.95.3 bugware (sic) */ - status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); - txd->opts1 = cpu_to_le32(status); - - dev->trans_start = jiffies; - - tp->cur_tx += frags + 1; - - smp_wmb(); - - RTL_W8(TxPoll, NPQ); /* set polling bit */ - - if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) { - netif_stop_queue(dev); - smp_rmb(); - if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS) - netif_wake_queue(dev); - } - -out: - return ret; - -err_stop: - netif_stop_queue(dev); - ret = NETDEV_TX_BUSY; - dev->stats.tx_dropped++; - goto out; -} - -static void rtl8101_pcierr_interrupt(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct pci_dev *pdev = tp->pci_dev; - void __iomem *ioaddr = tp->mmio_addr; - u16 pci_status, pci_cmd; - - pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); - pci_read_config_word(pdev, PCI_STATUS, &pci_status); - - if (netif_msg_intr(tp)) { - printk(KERN_ERR - "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n", - dev->name, pci_cmd, pci_status); - } - - /* - * The recovery sequence below admits a very elaborated explanation: - * - it seems to work; - * - I did not see what else could be done; - * - it makes iop3xx happy. - * - * Feel free to adjust to your needs. - */ - if (pdev->broken_parity_status) - pci_cmd &= ~PCI_COMMAND_PARITY; - else - pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY; - - pci_write_config_word(pdev, PCI_COMMAND, pci_cmd); - - pci_write_config_word(pdev, PCI_STATUS, - pci_status & (PCI_STATUS_DETECTED_PARITY | - PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT | - PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT)); - - /* The infamous DAC f*ckup only happens at boot time */ - if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) { - if (netif_msg_intr(tp)) - printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name); - tp->cp_cmd &= ~PCIDAC; - RTL_W16(CPlusCmd, tp->cp_cmd); - dev->features &= ~NETIF_F_HIGHDMA; - } - - rtl8101_hw_reset(ioaddr); - - rtl8101_schedule_work(dev, rtl8101_reinit_task); -} - -static void rtl8101_tx_interrupt(struct net_device *dev, - struct rtl8101_private *tp, - void __iomem *ioaddr) -{ - unsigned int dirty_tx, tx_left; - - dirty_tx = tp->dirty_tx; - smp_rmb(); - tx_left = tp->cur_tx - dirty_tx; - - while (tx_left > 0) { - unsigned int entry = dirty_tx % NUM_TX_DESC; - struct ring_info *tx_skb = tp->tx_skb + entry; - u32 len = tx_skb->len; - u32 status; - - rmb(); - status = le32_to_cpu(tp->TxDescArray[entry].opts1); - if (status & DescOwn) - break; - - dev->stats.tx_bytes += len; - dev->stats.tx_packets++; - - rtl8101_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry); - - if (status & LastFrag) { - dev_kfree_skb_irq(tx_skb->skb); - tx_skb->skb = NULL; - } - dirty_tx++; - tx_left--; - } - - if (tp->dirty_tx != dirty_tx) { - tp->dirty_tx = dirty_tx; - smp_wmb(); - if (netif_queue_stopped(dev) && - (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) { - netif_wake_queue(dev); - } - /* - * 8168 hack: TxPoll requests are lost when the Tx packets are - * too close. Let's kick an extra TxPoll request when a burst - * of start_xmit activity is detected (if it is not detected, - * it is slow enough). -- FR - */ - smp_rmb(); - if (tp->cur_tx != dirty_tx) - RTL_W8(TxPoll, NPQ); - } -} - -static inline int rtl8101_fragmented_frame(u32 status) -{ - return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag); -} - -static inline void rtl8101_rx_csum(struct sk_buff *skb, struct RxDesc *desc) -{ - u32 opts1 = le32_to_cpu(desc->opts1); - u32 status = opts1 & RxProtoMask; - - if (((status == RxProtoTCP) && !(opts1 & TCPFail)) || - ((status == RxProtoUDP) && !(opts1 & UDPFail)) || - ((status == RxProtoIP) && !(opts1 & IPFail))) - skb->ip_summed = CHECKSUM_UNNECESSARY; - else - skb->ip_summed = CHECKSUM_NONE; -} - -static inline bool rtl8101_try_rx_copy(struct sk_buff **sk_buff, - struct rtl8101_private *tp, int pkt_size, - dma_addr_t addr) -{ - struct sk_buff *skb; - bool done = false; - - if (pkt_size >= rx_copybreak) - goto out; - - skb = netdev_alloc_skb(tp->dev, pkt_size + NET_IP_ALIGN); - if (!skb) - goto out; - - pci_dma_sync_single_for_cpu(tp->pci_dev, addr, pkt_size, - PCI_DMA_FROMDEVICE); - skb_reserve(skb, NET_IP_ALIGN); - skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size); - *sk_buff = skb; - done = true; -out: - return done; -} - -static int rtl8101_rx_interrupt(struct net_device *dev, - struct rtl8101_private *tp, - void __iomem *ioaddr, u32 budget) -{ - unsigned int cur_rx, rx_left; - unsigned int delta, count; - - cur_rx = tp->cur_rx; - rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; - rx_left = min(rx_left, budget); - - for (; rx_left > 0; rx_left--, cur_rx++) { - unsigned int entry = cur_rx % NUM_RX_DESC; - struct RxDesc *desc = tp->RxDescArray + entry; - u32 status; - - rmb(); - status = le32_to_cpu(desc->opts1); - - if (status & DescOwn) - break; - if (unlikely(status & RxRES)) { - if (netif_msg_rx_err(tp)) { - printk(KERN_INFO - "%s: Rx ERROR. status = %08x\n", - dev->name, status); - } - dev->stats.rx_errors++; - if (status & (RxRWT | RxRUNT)) - dev->stats.rx_length_errors++; - if (status & RxCRC) - dev->stats.rx_crc_errors++; - if (status & RxFOVF) { - rtl8101_schedule_work(dev, rtl8101_reset_task); - dev->stats.rx_fifo_errors++; - } - rtl8101_mark_to_asic(desc, tp->rx_buf_sz); - } else { - struct sk_buff *skb = tp->Rx_skbuff[entry]; - dma_addr_t addr = le64_to_cpu(desc->addr); - int pkt_size = (status & 0x00001FFF) - 4; - struct pci_dev *pdev = tp->pci_dev; - - /* - * The driver does not support incoming fragmented - * frames. They are seen as a symptom of over-mtu - * sized frames. - */ - if (unlikely(rtl8101_fragmented_frame(status))) { - dev->stats.rx_dropped++; - dev->stats.rx_length_errors++; - rtl8101_mark_to_asic(desc, tp->rx_buf_sz); - continue; - } - - rtl8101_rx_csum(skb, desc); - - if (rtl8101_try_rx_copy(&skb, tp, pkt_size, addr)) { - pci_dma_sync_single_for_device(pdev, addr, - pkt_size, PCI_DMA_FROMDEVICE); - rtl8101_mark_to_asic(desc, tp->rx_buf_sz); - } else { - pci_unmap_single(pdev, addr, tp->rx_buf_sz, - PCI_DMA_FROMDEVICE); - tp->Rx_skbuff[entry] = NULL; - } - - skb_put(skb, pkt_size); - skb->protocol = eth_type_trans(skb, dev); - - if (rtl8101_rx_vlan_skb(tp, desc, skb) < 0) - netif_receive_skb(skb); - - dev->last_rx = jiffies; - dev->stats.rx_bytes += pkt_size; - dev->stats.rx_packets++; - } - - /* Work around for AMD plateform. */ - if ((desc->opts2 & cpu_to_le32(0xfffe000)) && - (tp->mac_version == RTL_GIGA_MAC_VER_05)) { - desc->opts2 = 0; - cur_rx++; - } - } - - count = cur_rx - tp->cur_rx; - tp->cur_rx = cur_rx; - - delta = rtl8101_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx); - if (!delta && count && netif_msg_intr(tp)) - printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); - tp->dirty_rx += delta; - - /* - * FIXME: until there is periodic timer to try and refill the ring, - * a temporary shortage may definitely kill the Rx process. - * - disable the asic to try and avoid an overflow and kick it again - * after refill ? - * - how do others driver handle this condition (Uh oh...). - */ - if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp)) - printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); - - return count; -} - -static irqreturn_t rtl8101_interrupt(int irq, void *dev_instance) -{ - struct net_device *dev = dev_instance; - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - int handled = 0; - int status; - - /* loop handling interrupts until we have no new ones or - * we hit a invalid/hotplug case. - */ - status = RTL_R16(IntrStatus); - while (status && status != 0xffff) { - handled = 1; - - /* Handle all of the error cases first. These will reset - * the chip, so just exit the loop. - */ - if (unlikely(!netif_running(dev))) { - rtl8101_asic_down(ioaddr); - break; - } - - /* Work around for rx fifo overflow */ - if (unlikely(status & RxFIFOOver) && - (tp->mac_version == RTL_GIGA_MAC_VER_11)) { - netif_stop_queue(dev); - rtl8101_tx_timeout(dev); - break; - } - - if (unlikely(status & SYSErr)) { - rtl8101_pcierr_interrupt(dev); - break; - } - - if (status & LinkChg) - rtl8101_check_link_status(dev, tp, ioaddr); - - /* We need to see the lastest version of tp->intr_mask to - * avoid ignoring an MSI interrupt and having to wait for - * another event which may never come. - */ - smp_rmb(); - if (status & tp->intr_mask & tp->napi_event) { - RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); - tp->intr_mask = ~tp->napi_event; - - if (likely(napi_schedule_prep(&tp->napi))) - __napi_schedule(&tp->napi); - else if (netif_msg_intr(tp)) { - printk(KERN_INFO "%s: interrupt %04x in poll\n", - dev->name, status); - } - } - - /* We only get a new MSI interrupt when all active irq - * sources on the chip have been acknowledged. So, ack - * everything we've seen and check if new sources have become - * active to avoid blocking all interrupts from the chip. - */ - RTL_W16(IntrStatus, - (status & RxFIFOOver) ? (status | RxOverflow) : status); - status = RTL_R16(IntrStatus); - } - - return IRQ_RETVAL(handled); -} - -static int rtl8101_poll(struct napi_struct *napi, int budget) -{ - struct rtl8101_private *tp = container_of(napi, struct rtl8101_private, napi); - struct net_device *dev = tp->dev; - void __iomem *ioaddr = tp->mmio_addr; - int work_done; - - work_done = rtl8101_rx_interrupt(dev, tp, ioaddr, (u32) budget); - rtl8101_tx_interrupt(dev, tp, ioaddr); - - if (work_done < budget) { - netif_rx_complete(dev, napi); - - /* We need for force the visibility of tp->intr_mask - * for other CPUs, as we can loose an MSI interrupt - * and potentially wait for a retransmit timeout if we don't. - * The posted write to IntrMask is safe, as it will - * eventually make it to the chip and we won't loose anything - * until it does. - */ - tp->intr_mask = 0xffff; - smp_wmb(); - RTL_W16(IntrMask, tp->intr_event); - } - - return work_done; -} - -static void rtl8101_rx_missed(struct net_device *dev, void __iomem *ioaddr) -{ - struct rtl8101_private *tp = netdev_priv(dev); - - if (tp->mac_version > RTL_GIGA_MAC_VER_06) - return; - - dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff); - RTL_W32(RxMissed, 0); -} - -static void rtl8101_down(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned int intrmask; - - rtl8101_delete_timer(dev); - - netif_stop_queue(dev); - - napi_disable(&tp->napi); - -core_down: - spin_lock_irq(&tp->lock); - - rtl8101_asic_down(ioaddr); - - rtl8101_rx_missed(dev, ioaddr); - - spin_unlock_irq(&tp->lock); - - synchronize_irq(dev->irq); - - /* Give a racing hard_start_xmit a few cycles to complete. */ - synchronize_sched(); /* FIXME: should this be synchronize_irq()? */ - - /* - * And now for the 50k$ question: are IRQ disabled or not ? - * - * Two paths lead here: - * 1) dev->close - * -> netif_running() is available to sync the current code and the - * IRQ handler. See rtl8101_interrupt for details. - * 2) dev->change_mtu - * -> rtl8101_poll can not be issued again and re-enable the - * interruptions. Let's simply issue the IRQ down sequence again. - * - * No loop if hotpluged or major error (0xffff). - */ - intrmask = RTL_R16(IntrMask); - if (intrmask && (intrmask != 0xffff)) - goto core_down; - - rtl8101_tx_clear(tp); - - rtl8101_rx_clear(tp); -} - -static int rtl8101_close(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - struct pci_dev *pdev = tp->pci_dev; - - /* update counters before going down */ - rtl8101_update_counters(dev); - - rtl8101_down(dev); - - free_irq(dev->irq, dev); - - pci_free_consistent(pdev, R8101_RX_RING_BYTES, tp->RxDescArray, - tp->RxPhyAddr); - pci_free_consistent(pdev, R8101_TX_RING_BYTES, tp->TxDescArray, - tp->TxPhyAddr); - tp->TxDescArray = NULL; - tp->RxDescArray = NULL; - - return 0; -} - -static void rtl_set_rx_mode(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned long flags; - u32 mc_filter[2]; /* Multicast hash filter */ - int rx_mode; - u32 tmp = 0; - - if (dev->flags & IFF_PROMISC) { - /* Unconditionally log net taps. */ - if (netif_msg_link(tp)) { - printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", - dev->name); - } - rx_mode = - AcceptBroadcast | AcceptMulticast | AcceptMyPhys | - AcceptAllPhys; - mc_filter[1] = mc_filter[0] = 0xffffffff; - } else if ((dev->mc_count > multicast_filter_limit) - || (dev->flags & IFF_ALLMULTI)) { - /* Too many to filter perfectly -- accept all multicasts. */ - rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; - mc_filter[1] = mc_filter[0] = 0xffffffff; - } else { - struct dev_mc_list *mclist; - unsigned int i; - - rx_mode = AcceptBroadcast | AcceptMyPhys; - mc_filter[1] = mc_filter[0] = 0; - for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; - i++, mclist = mclist->next) { - int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; - mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); - rx_mode |= AcceptMulticast; - } - } - - spin_lock_irqsave(&tp->lock, flags); - - tmp = rtl8101_rx_config | rx_mode | - (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); - - if (tp->mac_version > RTL_GIGA_MAC_VER_06) { - u32 data = mc_filter[0]; - - mc_filter[0] = swab32(mc_filter[1]); - mc_filter[1] = swab32(data); - } - - RTL_W32(MAR0 + 0, mc_filter[0]); - RTL_W32(MAR0 + 4, mc_filter[1]); - - RTL_W32(RxConfig, tmp); - - spin_unlock_irqrestore(&tp->lock, flags); -} - -/** - * rtl8101_get_stats - Get rtl8101 read/write statistics - * @dev: The Ethernet Device to get statistics for - * - * Get TX/RX statistics for rtl8101 - */ -static struct net_device_stats *rtl8101_get_stats(struct net_device *dev) -{ - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - unsigned long flags; - - if (netif_running(dev)) { - spin_lock_irqsave(&tp->lock, flags); - rtl8101_rx_missed(dev, ioaddr); - spin_unlock_irqrestore(&tp->lock, flags); - } - - return &dev->stats; -} - -#ifdef CONFIG_PM - -static int rtl8101_suspend(struct pci_dev *pdev, pm_message_t state) -{ - struct net_device *dev = pci_get_drvdata(pdev); - struct rtl8101_private *tp = netdev_priv(dev); - void __iomem *ioaddr = tp->mmio_addr; - - if (!netif_running(dev)) - goto out_pci_suspend; - - netif_device_detach(dev); - netif_stop_queue(dev); - - spin_lock_irq(&tp->lock); - - rtl8101_asic_down(ioaddr); - - rtl8101_rx_missed(dev, ioaddr); - - spin_unlock_irq(&tp->lock); - -out_pci_suspend: - pci_save_state(pdev); - pci_enable_wake(pdev, pci_choose_state(pdev, state), - (tp->features & RTL_FEATURE_WOL) ? 1 : 0); - pci_set_power_state(pdev, pci_choose_state(pdev, state)); - - return 0; -} - -static int rtl8101_resume(struct pci_dev *pdev) -{ - struct net_device *dev = pci_get_drvdata(pdev); - - pci_set_power_state(pdev, PCI_D0); - pci_restore_state(pdev); - pci_enable_wake(pdev, PCI_D0, 0); - - if (!netif_running(dev)) - goto out; - - netif_device_attach(dev); - - rtl8101_schedule_work(dev, rtl8101_reset_task); -out: - return 0; -} - -#endif /* CONFIG_PM */ - -static struct pci_driver rtl8101_pci_driver = { - .name = MODULENAME, - .id_table = rtl8101_pci_tbl, - .probe = rtl8101_init_one, - .remove = __devexit_p(rtl8101_remove_one), -#ifdef CONFIG_PM - .suspend = rtl8101_suspend, - .resume = rtl8101_resume, -#endif -}; - -static int __init rtl8101_init_module(void) -{ - return pci_register_driver(&rtl8101_pci_driver); -} - -static void __exit rtl8101_cleanup_module(void) -{ - pci_unregister_driver(&rtl8101_pci_driver); -} - -module_init(rtl8101_init_module); -module_exit(rtl8101_cleanup_module);

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