This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "IPFire 2.x development tree". The branch, next has been updated via 7aae8f6849d117f366520839737951815cb5c8cd (commit) via b0beeffab64126ff8e1dbee394a5994cc9de9360 (commit) via b6c1b03bef6400a8732291fb9cf040955efa193f (commit) via 321a86ea2c6780506b302b6425542505465c3252 (commit) via f4ee892858d3f2108fdadd79718a71c2dfb1ed03 (commit) from 96a00a4e0e45a72f9ff4b144ef671f440811113e (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 7aae8f6849d117f366520839737951815cb5c8cd Author: Michael Tremer Date: Thu May 14 15:51:23 2026 +0000 core203: Regenerate the initramdisks for Intel Microcode Signed-off-by: Michael Tremer commit b0beeffab64126ff8e1dbee394a5994cc9de9360 Author: Adolf Belka Date: Wed May 13 21:37:06 2026 +0200 core203: Ship intel-microcode Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer commit b6c1b03bef6400a8732291fb9cf040955efa193f Author: Adolf Belka Date: Wed May 13 21:37:08 2026 +0200 intel-microcode: Update to version 20260512 - Update from version 20260227 to 20260512 - Update of rootfile - Changelog 20260512 Purpose Security updates for INTEL-SA-01420 Update for functional issues. Refer to 4th Gen Intel® Xeon® Scalable Processors Specification Update for details. Update for functional issues. Refer to 5th Gen Intel® Xeon® Scalable Processors Specification Update for details. Update for functional issues. Refer to Intel® Core™ Ultra 200 V Series Processor for details. Update for functional issues. Refer to Intel® Core™ Ultra Processors (Series 2) for details. Update for functional issues. Refer to Intel® Core™ Ultra Processors (Series 3) for details. Update for functional issues. Refer to Intel® Xeon® 6700 Series Processors with E-cores for details. Update for functional issues. Refer to Intel® Xeon® 6900/6700/6500 Series Processors with P-cores for details. Update for functional issues. Refer to Intel® Xeon® 6700P-B/6500P-B-Series SoC with P-Cores for details. New Platforms Processor Stepping F-M-S/PI Old Ver New Ver Products PTL 404 A1 06-cc-03/90 0000011b Intel Core Ultra Processor (Series 3) PTL-H 484/12Xe A0/B0 06-cc-02/90 0000011b Intel Core Ultra Processor (Series 3) Updated Platforms Processor Stepping F-M-S/PI Old Ver New Ver Products ARL-H A1 06-c5-02/82 0000011b 00000121 Core Ultra Processor (Series 2) ARL-S/HX (8P) B0 06-c6-02/82 0000011b 00000121 Core Ultra Processor (Series 2) EMR-SP A1 06-cf-02/87 210002d3 210002e0 Xeon Scalable Gen5 GNR-AP/SP Bx/Hx/Lx 06-ad-01/95 01000405 01000423 Xeon 6900/6700/6500 Series Processors with P-Cores GNR-D B0/B1 06-ae-01/97 01000303 01000307 Xeon 6700P-B/6500P-B Series SoC with P-Cores GNR-SP R1S Bx/Hx/Lx 06-ad-01/20 0a000133 0a000142 Xeon 6700/6500-Series Processors with P-Cores LNL B0 06-bd-01/80 00000125 00000126 Core Ultra 200 V Series Processor SPR-SP E4/S2 06-8f-07/87 2b000661 2b000670 Xeon Scalable Gen4 SPR-SP E5/S3 06-8f-08/87 2b000661 2b000670 Xeon Scalable Gen4 SRF-AP/SP C0 06-af-03/01 03000382 030003a3 Xeon 6900/6700-Series Processors with E-Cores Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer commit 321a86ea2c6780506b302b6425542505465c3252 Author: Adolf Belka Date: Wed May 13 21:37:05 2026 +0200 core203: Ship expat Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer commit f4ee892858d3f2108fdadd79718a71c2dfb1ed03 Author: Adolf Belka Date: Wed May 13 21:37:07 2026 +0200 expat: Update to version 2.8.1 - Update from version 2.8.0 to 2.8.1 - Update of rootfile - 1 CVE fix - Changelog 2.8.1 Security fixes: #1216 CVE-2026-45186 -- Fix quadratic runtime from attribute name collision checks that allowed denial of service attacks through moderately sized crafted XML input (CWE-407). Please note that a layer of compression around XML can significantly reduce the minimum attack payload size. Other changes: #1209 #1213 Drop more casts related to `void *` that C99 does not need #1213 xmlwf: Streamline use of `mmap` #1214 #1217 Version info bumped from 13:0:12 (libexpat*.so.1.12.0) to 13:1:12 (libexpat*.so.1.12.1); see https://verbump.de/ for what these numbers do Infrastructure: #1210 CI: Cover compilation with Visual Studio 18 2026 on Windows #1215 CI: Cover compilation for ARM64 on Windows #1212 CI: Bump WASI SDK from 32 to 33 Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer ----------------------------------------------------------------------- Summary of changes: config/rootfiles/common/expat | 20 ++++++++++---------- config/rootfiles/common/x86_64/intel-microcode | 2 ++ .../{oldcore/106 => core/203}/filelists/expat | 0 .../203}/filelists/x86_64/intel-microcode | 0 config/rootfiles/core/203/update.sh | 10 ++++++++++ lfs/expat | 4 ++-- lfs/intel-microcode | 4 ++-- 7 files changed, 26 insertions(+), 14 deletions(-) copy config/rootfiles/{oldcore/106 => core/203}/filelists/expat (100%) copy config/rootfiles/{oldcore/121 => core/203}/filelists/x86_64/intel-microcode (100%) Difference in files: diff --git a/config/rootfiles/common/expat b/config/rootfiles/common/expat index 611c2a203..b13257ddb 100644 --- a/config/rootfiles/common/expat +++ b/config/rootfiles/common/expat @@ -2,21 +2,21 @@ #usr/include/expat.h #usr/include/expat_config.h #usr/include/expat_external.h -#usr/lib/cmake/expat-2.8.0 -#usr/lib/cmake/expat-2.8.0/expat-config-version.cmake -#usr/lib/cmake/expat-2.8.0/expat-config.cmake -#usr/lib/cmake/expat-2.8.0/expat-noconfig.cmake -#usr/lib/cmake/expat-2.8.0/expat.cmake +#usr/lib/cmake/expat-2.8.1 +#usr/lib/cmake/expat-2.8.1/expat-config-version.cmake +#usr/lib/cmake/expat-2.8.1/expat-config.cmake +#usr/lib/cmake/expat-2.8.1/expat-noconfig.cmake +#usr/lib/cmake/expat-2.8.1/expat.cmake #usr/lib/libexpat.la #usr/lib/libexpat.so usr/lib/libexpat.so.1 -usr/lib/libexpat.so.1.12.0 +usr/lib/libexpat.so.1.12.1 #usr/lib/pkgconfig/expat.pc #usr/share/doc/expat -#usr/share/doc/expat-2.8.0 -#usr/share/doc/expat-2.8.0/ok.min.css -#usr/share/doc/expat-2.8.0/reference.html -#usr/share/doc/expat-2.8.0/style.css +#usr/share/doc/expat-2.8.1 +#usr/share/doc/expat-2.8.1/ok.min.css +#usr/share/doc/expat-2.8.1/reference.html +#usr/share/doc/expat-2.8.1/style.css #usr/share/doc/expat/AUTHORS #usr/share/doc/expat/changelog #usr/share/man/man1/xmlwf.1 diff --git a/config/rootfiles/common/x86_64/intel-microcode b/config/rootfiles/common/x86_64/intel-microcode index fc212fe83..dd777dbf4 100644 --- a/config/rootfiles/common/x86_64/intel-microcode +++ b/config/rootfiles/common/x86_64/intel-microcode @@ -127,6 +127,8 @@ lib/firmware/intel-ucode/06-bf-02 lib/firmware/intel-ucode/06-bf-05 lib/firmware/intel-ucode/06-c5-02 lib/firmware/intel-ucode/06-c6-02 +lib/firmware/intel-ucode/06-cc-02 +lib/firmware/intel-ucode/06-cc-03 lib/firmware/intel-ucode/06-cf-02 lib/firmware/intel-ucode/0f-00-07 lib/firmware/intel-ucode/0f-00-0a diff --git a/config/rootfiles/core/203/filelists/expat b/config/rootfiles/core/203/filelists/expat new file mode 120000 index 000000000..e1923cf63 --- /dev/null +++ b/config/rootfiles/core/203/filelists/expat @@ -0,0 +1 @@ +../../../common/expat \ No newline at end of file diff --git a/config/rootfiles/core/203/filelists/x86_64/intel-microcode b/config/rootfiles/core/203/filelists/x86_64/intel-microcode new file mode 120000 index 000000000..d5ac074e2 --- /dev/null +++ b/config/rootfiles/core/203/filelists/x86_64/intel-microcode @@ -0,0 +1 @@ +../../../../common/x86_64/intel-microcode \ No newline at end of file diff --git a/config/rootfiles/core/203/update.sh b/config/rootfiles/core/203/update.sh index c7cbb911d..87ed06199 100644 --- a/config/rootfiles/core/203/update.sh +++ b/config/rootfiles/core/203/update.sh @@ -61,6 +61,16 @@ touch /var/run/need_reboot /etc/init.d/fireinfo start sendprofile +# Build initial ramdisks +dracut --regenerate-all --force +KVER="xxxKVERxxx" +case "$(uname -m)" in + aarch64) + mkimage -A arm64 -T ramdisk -C lzma -d /boot/initramfs-${KVER}.img /boot/uInit-${KVER} + # dont remove initramfs because grub need this to boot. + ;; +esac + # Update grub config to display new core version if [ -e /boot/grub/grub.cfg ]; then /usr/bin/install-bootloader diff --git a/lfs/expat b/lfs/expat index f14e48ab5..2ba04ca09 100644 --- a/lfs/expat +++ b/lfs/expat @@ -24,7 +24,7 @@ include Config -VER = 2.8.0 +VER = 2.8.1 THISAPP = expat-$(VER) DL_FILE = $(THISAPP).tar.xz @@ -40,7 +40,7 @@ objects = $(DL_FILE) $(DL_FILE) = $(DL_FROM)/$(DL_FILE) -$(DL_FILE)_BLAKE2 = e7b5f20e9960085d2bcfd88ac590e70a9aaebcc4b1411064d008af638bdf4189730d6fd9772d518dc4c38c3cefc649ed31c1e3ad7de64125377dba8c6d2e01b8 +$(DL_FILE)_BLAKE2 = 529551f960a1e611be6a0e9ff579e136ccad676d7e99ef8183bbee83969bf4cd37177444759ccbccc48c1bd49d2b0c3bd8f1f91862f272b54a23ad1b932d2f9d install : $(TARGET) diff --git a/lfs/intel-microcode b/lfs/intel-microcode index f7e992bca..12ace1d01 100644 --- a/lfs/intel-microcode +++ b/lfs/intel-microcode @@ -24,7 +24,7 @@ include Config -VER = 20260227 +VER = 20260512 THISAPP = Intel-Linux-Processor-Microcode-Data-Files-microcode-$(VER) DL_FILE = $(THISAPP).tar.gz @@ -41,7 +41,7 @@ objects = $(DL_FILE) $(DL_FILE) = $(DL_FROM)/$(DL_FILE) -$(DL_FILE)_BLAKE2 = 3725dee3af32b545a754a47616c7451a6e7e227af125a8eb35729b2784dfbdecccea6054e1f3190119253041697ce525380e5a98c929e42a4294028d2eca1ebd +$(DL_FILE)_BLAKE2 = 10407aa08481998fb5102bbf517b1cf5c083d16fae8468d25ad2c6ad4b6a665c520cb35f22a44b1f2b385232694bd18b1ee2e75a46658dcdafe40c0c54562c07 install : $(TARGET) hooks/post-receive -- IPFire 2.x development tree