From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.haj.ipfire.org (localhost [IPv6:::1]) by mail02.haj.ipfire.org (Postfix) with ESMTP id 4hxFN32x3mz2xRk for ; Fri, 02 Oct 2026 16:58:11 +0000 (UTC) Received: from mail01.ipfire.org (mail01.haj.ipfire.org [172.28.1.202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519) (Client CN "mail01.haj.ipfire.org", Issuer "YR2" (not verified)) by mail02.haj.ipfire.org (Postfix) with ESMTPS id 4hxFN32Zsjz2xP2 for ; Fri, 02 Oct 2026 16:58:11 +0000 (UTC) Received: from people01.haj.ipfire.org (people01.haj.ipfire.org [IPv6:2001:678:b28::161]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bit raw public key) server-digest SHA256 client-signature ECDSA (secp384r1) client-digest SHA384) (Client CN "people01.haj.ipfire.org", Issuer "YE1" (not verified)) by mail01.ipfire.org (Postfix) with ESMTPS id 4hxFN22Vynz2Xm for ; Fri, 02 Oct 2026 16:58:10 +0000 (UTC) DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=ipfire.org; s=202003ed25519; t=1790960290; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc; bh=2tJLKX1riFaEO5533G93PPQLgqPuIXoQx1XYh7ZTxOQ=; b=60I9Oy+m4rF6dLZCY3RLPn7MlxEkQiDKL2wu0KPrBWS2TOk1Dc81opacXBe7ir8kX0U6Ti z+GPIMwgcUab3TAw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ipfire.org; s=202003rsa; t=1790960290; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc; bh=2tJLKX1riFaEO5533G93PPQLgqPuIXoQx1XYh7ZTxOQ=; b=LxkmO30Zlzgshpku/kq+z5G1WlTzmXZclv5B1nvE6bAimaH55vEhptTW0ByaHMXzxz8oir cUVwsWd3/l8vQskl/VZ2JjOWrsyeSJRRUp1o4gAf2J/5UaCRiznT0mCQjlxqDyadPIQ1kN xyl8deAtWQWVg4GeAB7uOVrQ/71OgifZc9fusud2M8T2GN39ufJ/7SsOrbcV4HNYoBxO+E dslF7O3K6EOYrrz/qaE7Xbbg+nKK4NLGooOt/i0MwAphmEwl+t+jcDood4fMMx4GrNHEYV tEP5kQSIXaw+J84/rfoD8L6Ehuoaz2cxjuiWD7xqYDRoO1MzLtsbQITi13tIKQ== Received: by people01.haj.ipfire.org (Postfix, from userid 1000) id 4hxFN14rw3z2xcL; Fri, 02 Oct 2026 16:58:09 +0000 (UTC) To: ipfire-scm@lists.ipfire.org Subject: [git.ipfire.org] IPFire 2.x development tree branch, next, updated. 2bd964e6eae3eee54851e2bd5cf2af0f0a1ca70d X-Git-Refname: refs/heads/next X-Git-Reftype: branch X-Git-Oldrev: 5b1b46044f1d0bd3077c8d1e7b362e7868982f51 X-Git-Newrev: 2bd964e6eae3eee54851e2bd5cf2af0f0a1ca70d Message-Id: <4hxFN14rw3z2xcL@people01.haj.ipfire.org> Date: Fri, 02 Oct 2026 16:58:09 +0000 (UTC) From: Michael Tremer Precedence: list List-Id: List-Subscribe: , List-Unsubscribe: , List-Post: List-Help: Sender: Mail-Followup-To: This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "IPFire 2.x development tree". The branch, next has been updated via 2bd964e6eae3eee54851e2bd5cf2af0f0a1ca70d (commit) via c04e62afe079fea9999194759de9a4dad952953f (commit) via 450abf970af51680ea1ca39a3ba9fbd3eb380814 (commit) from 5b1b46044f1d0bd3077c8d1e7b362e7868982f51 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit 2bd964e6eae3eee54851e2bd5cf2af0f0a1ca70d Author: Michael Tremer Date: Fri Oct 2 16:57:17 2026 +0000 core205: Regenerate all initrds Signed-off-by: Michael Tremer commit c04e62afe079fea9999194759de9a4dad952953f Author: Adolf Belka Date: Fri Oct 2 18:28:05 2026 +0200 core205: Ship intel-microcode Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer commit 450abf970af51680ea1ca39a3ba9fbd3eb380814 Author: Adolf Belka Date: Fri Oct 2 18:28:06 2026 +0200 intel-microcode: Update to version 20260925 - Update from version 20260512 to 20260925 - Update of rootfile - Changelog 20260925 Purpose - Update for functional issues. Refer to [Intel® Core™ Ultra Processor] (https://cdrdv2.intel.com/v1/dl/getContent/792254) for details. Updated Platforms Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products MTL | C0 | 06-aa-04/e6 | 00000028 | 0000002b | Core Ultra Processor 20260812 Purpose - Removed MTL/06-aa-04/c0 due to functional issues observed when loading the MCU in some platforms. 20260811 Purpose - Security updates for [INTEL-SA-01379](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html) - Security updates for [INTEL-SA-01404](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01404.html) - Security updates for [INTEL-SA-01423](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01423.html) - Security updates for [INTEL-SA-01428](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01428.html) - Security updates for [INTEL-SA-01435](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01435.html) - Security updates for [INTEL-SA-01441](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01441.html) - Security updates for [INTEL-SA-01442](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01442.html) - Security updates for [INTEL-SA-01443](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01443.html) - Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/341079) for details. - Update for functional issues. Refer to [13th/14th Gen Intel® Core™ Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/740518) for details. - Update for functional issues. Refer to [3rd Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/637780) for details. - Update for functional issues. Refer to [4th Gen Intel® Xeon® Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/772415) for details. - Update for functional issues. Refer to [5th Gen Intel® Xeon® Scalable Processors Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/793902) for details. - Update for functional issues. Refer to Intel ®Core Series 2 Processors with P-cores for details. - Update for functional issues. Refer to [Intel® Core™ Processors (Series 3)](https://cdrdv2.intel.com/v1/dl/getContent/914196) for details. - Update for functional issues. Refer to [Intel® Core™ Ultra 200 V Series Processor](https://cdrdv2.intel.com/v1/dl/getContent/827538) for details. - Update for functional issues. Refer to [Intel® Core™ Ultra Processor (Series 2)](https://cdrdv2.intel.com/v1/dl/getContent/834774) for details. - Update for functional issues. Refer to [Intel® Core™ Ultra Processor](https://cdrdv2.intel.com/v1/dl/getContent/792254) for details. - Update for functional issues. Refer to [Intel® Core™ Ultra Processors (Series 3)](https://cdrdv2.intel.com/v1/dl/getContent/869992) for details. - Update for functional issues. Refer to [Intel® Xeon® 6700 Series Processors with E-cores](https://cdrdv2.intel.com/v1/dl/getContent/820922) for details. - Update for functional issues. Refer to [Intel® Xeon® 6700P-B/6500P-B-Series SoC with P-Cores](https://cdrdv2.intel.com/v1/dl/getContent/843306) for details. - Update for functional issues. Refer to [Intel® Xeon® 6900/6700/6500 Series Processors with P-cores](https://cdrdv2.intel.com/v1/dl/getContent/835486) for details. - Update for functional issues. Refer to [Intel® Xeon® D-2700 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/714071) for details. - Update for functional issues. Refer to [Intel® Xeon® E-2300 Processor Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/709192) for details. New Platforms Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products BTL-S12P | A0 | 06-d7-00/36 | | 00000137 | Intel Core Series 2 Processors with P-cores BTL-S816 | B0 | 06-b7-04/36 | | 00000137 | Intel Core Series 2 Processors with P-cores WCL | A1 | 06-d5-01/c0 | | 0000000c | Intel Core Processors (Series 3) Updated Platforms Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products ARL-H | A1 | 06-c5-02/82 | 00000121 | 00000122 | Core Ultra Processor (Series 2) ARL-S/HX (8P) | B0 | 06-c6-02/82 | 00000121 | 00000122 | Core Ultra Processor (Series 2) ARL-U | A0 | 06-b5-00/80 | 0000000d | 0000000e | Core Ultra Processor (Series 2) EMR-SP | A1 | 06-cf-02/87 | 210002e0 | 210002f4 | Xeon Scalable Gen5 GNR-AP/SP | Bx/Hx/Lx | 06-ad-01/95 | 01000423 | 01000434 | Xeon 6900/6700/6500 Series Processors with P-Cores GNR-D | B0/B1 | 06-ae-01/97 | 01000307 | 01000309 | Xeon 6700P-B/6500P-B Series SoC with P-Cores GNR-SP R1S | Bx/Hx/Lx | 06-ad-01/20 | 0a000142 | 0a000151 | Xeon 6700/6500-Series Processors with P-Cores ICL-D | B0 | 06-6c-01/10 | 010002f1 | 01000301 | Xeon D-17xx, D-27xx ICL-U/Y | D1 | 06-7e-05/80 | 000000cc | 000000ce | Core Gen10 Mobile ICX-SP | Dx/M1 | 06-6a-06/87 | 0d000421 | 0d000433 | Xeon Scalable Gen3 LNL | B0 | 06-bd-01/80 | 00000126 | 00000128 | Core Ultra 200 V Series Processor MTL | C0 | 06-aa-04/e6 | 00000028 | 0000002a | Core Ultra Processor PTL-404/H204 | A1 | 06-cc-03/94 | 0000011b | 0000011c | Intel Core Ultra processor (Series 3) PTL-H484/PTL-H12Xe | B0/A0| 06-cc-02/94 | 0000011b | 0000011c | Intel Core Ultra processor (Series 3) RKL-S | B0 | 06-a7-01/02 | 00000065 | 00000066 | Core Gen11 RPL-E/HX/S | B0 | 06-b7-01/36 | 00000133 | 00000137 | Core Gen13/Gen14 SPR-HBM | Bx | 06-8f-08/10 | 2c000421 | 2c000435 | Xeon Max SPR-SP | E4/S2 | 06-8f-07/87 | 2b000670 | 2b000685 | Xeon Scalable Gen4 SPR-SP | E5/S3 | 06-8f-08/87 | 2b000670 | 2b000685 | Xeon Scalable Gen4 SRF-AP/SP | C0 | 06-af-03/01 | 030003a3 | 030003b2 | Xeon 6900/6700-Series Processors with E-Cores Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer ----------------------------------------------------------------------- Summary of changes: config/rootfiles/common/x86_64/intel-microcode | 3 +++ .../{oldcore/121 => core/205}/filelists/x86_64/intel-microcode | 0 config/rootfiles/core/205/update.sh | 10 ++++++++++ lfs/intel-microcode | 4 ++-- 4 files changed, 15 insertions(+), 2 deletions(-) copy config/rootfiles/{oldcore/121 => core/205}/filelists/x86_64/intel-microcode (100%) Difference in files: diff --git a/config/rootfiles/common/x86_64/intel-microcode b/config/rootfiles/common/x86_64/intel-microcode index dd777dbf4b..a1cd1c8655 100644 --- a/config/rootfiles/common/x86_64/intel-microcode +++ b/config/rootfiles/common/x86_64/intel-microcode @@ -119,6 +119,7 @@ lib/firmware/intel-ucode/06-ae-01 lib/firmware/intel-ucode/06-af-03 lib/firmware/intel-ucode/06-b5-00 lib/firmware/intel-ucode/06-b7-01 +lib/firmware/intel-ucode/06-b7-04 lib/firmware/intel-ucode/06-ba-02 lib/firmware/intel-ucode/06-ba-03 lib/firmware/intel-ucode/06-bd-01 @@ -130,6 +131,8 @@ lib/firmware/intel-ucode/06-c6-02 lib/firmware/intel-ucode/06-cc-02 lib/firmware/intel-ucode/06-cc-03 lib/firmware/intel-ucode/06-cf-02 +lib/firmware/intel-ucode/06-d5-01 +lib/firmware/intel-ucode/06-d7-00 lib/firmware/intel-ucode/0f-00-07 lib/firmware/intel-ucode/0f-00-0a lib/firmware/intel-ucode/0f-01-02 diff --git a/config/rootfiles/core/205/filelists/x86_64/intel-microcode b/config/rootfiles/core/205/filelists/x86_64/intel-microcode new file mode 120000 index 0000000000..d5ac074e2e --- /dev/null +++ b/config/rootfiles/core/205/filelists/x86_64/intel-microcode @@ -0,0 +1 @@ +../../../../common/x86_64/intel-microcode \ No newline at end of file diff --git a/config/rootfiles/core/205/update.sh b/config/rootfiles/core/205/update.sh index 5b48597a8a..632fc13de2 100644 --- a/config/rootfiles/core/205/update.sh +++ b/config/rootfiles/core/205/update.sh @@ -72,6 +72,16 @@ gpgconf --kill all /etc/init.d/sshd restart /etc/init.d/suricata restart +# Build initial ramdisks +dracut --regenerate-all --force +KVER="xxxKVERxxx" +case "$(uname -m)" in + aarch64) + mkimage -A arm64 -T ramdisk -C lzma -d /boot/initramfs-${KVER}.img /boot/uInit-${KVER} + # dont remove initramfs because grub need this to boot. + ;; +esac + # This update needs a reboot... touch /var/run/need_reboot diff --git a/lfs/intel-microcode b/lfs/intel-microcode index 12ace1d018..67459fea42 100644 --- a/lfs/intel-microcode +++ b/lfs/intel-microcode @@ -24,7 +24,7 @@ include Config -VER = 20260512 +VER = 20260925 THISAPP = Intel-Linux-Processor-Microcode-Data-Files-microcode-$(VER) DL_FILE = $(THISAPP).tar.gz @@ -41,7 +41,7 @@ objects = $(DL_FILE) $(DL_FILE) = $(DL_FROM)/$(DL_FILE) -$(DL_FILE)_BLAKE2 = 10407aa08481998fb5102bbf517b1cf5c083d16fae8468d25ad2c6ad4b6a665c520cb35f22a44b1f2b385232694bd18b1ee2e75a46658dcdafe40c0c54562c07 +$(DL_FILE)_BLAKE2 = 7ba89181f45c69f42abc87a78a62842d687f52b6e4a8e872299fccb229ff6b6fabea1edc6ed7a2ac0124fd4d14a1f3ba2c11aec547e61dbff92324d73f1e304f install : $(TARGET) hooks/post-receive -- IPFire 2.x development tree